rockchip: rk3576: Disable USB3OTG0 U3 port early
authorJonas Karlman <jonas@kwiboo.se>
Mon, 21 Jul 2025 22:07:18 +0000 (22:07 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Sat, 30 Aug 2025 16:48:15 +0000 (00:48 +0800)
commitbe585d4916864387c53c82b4bde7f04093aac440
tree4b45ea1841231f95ec673e3e0b50c20784466fa2
parent9d39a56922878562b263e45f45523021cf5e7789
rockchip: rk3576: Disable USB3OTG0 U3 port early

The RK3576 SoC comes with USB OTG support using a DWC3 controller with
a USB2 PHY and a USB3 PHY (USBDP PHY).

Some board designs may not use the USBDP PHY for USB3 purpose. For these
board to use USB OTG the input clock source must change to use UTMI clk
instead of PIPE clk.

Change to always disable the USB3OTG0 U3 port early and leave it to the
USBDP PHY driver to re-enable the U3 port when a usb3-phy is described
in the board device tree.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/mach-rockchip/rk3576/rk3576.c