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Blackfin: don't attempt to flush on-chip L1 SRAM regions
authorSonic Zhang <sonic.zhang@analog.com>
Tue, 30 Jun 2009 09:48:03 +0000 (09:48 +0000)
committerMike Frysinger <vapier@gentoo.org>
Wed, 25 May 2011 12:13:41 +0000 (08:13 -0400)
commitbc6b92f8c31788a2fdc65d9be903983e5da78921
tree644b0834cd437094ca41ddf8a3155238d8fe1512tree | snapshot
parent73ecfcf9088672220f7ca98811b2d05339c4f14ccommit | diff
Blackfin: don't attempt to flush on-chip L1 SRAM regions

Since the on-chip L1 regions are not cacheable, there is no point in
trying to flush/invalidate them.  Plus, older Blackfin parts like to
trigger an exception (like BF533-0.3).

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
arch/blackfin/include/asm/cacheflush.h diff | blob | history
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