powerpc/85xx: Rework P1022DS device tree
authorKumar Gala <galak@kernel.crashing.org>
Wed, 26 Oct 2011 06:01:54 +0000 (01:01 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 24 Nov 2011 08:01:38 +0000 (02:01 -0600)
commitab827d97bd5c7aa3ccf637161d22a6329fb24a02
treee6a3c13c666d96c35a7869d34e46e451c5dc76f8
parentffeb33d20c6217bb8f0ab46d3f1396021c00c24f
powerpc/85xx: Rework P1022DS device tree

Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.

Other changes include:

* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
  and moved PCI device IRQs down to virtual bridge level
* Changed GPIO compatiable from 'fsl,mpc8572-gpio' to 'fsl,pq3-gpio' as the
  'mpc8572' compatiable is to deal with a 'mpc8572' specific to an erratum
* Updated spi node to new espi binding specification
* Renamed SDHC node from 'sdhci' to 'sdhc'
* Added usb node for 2nd usb controller
* Dropping "fsl,p1022-IP..." from compatibles for standard blocks
* Fixed bug in local bus range node for CS2, was maping to
  0x0 0x0xffa00000 instead of 0xf 0xffa00000
* Fixed localbus reg property should have been 0xf 0xffe05000

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Tested-by: Timur Tabi <timur@freescale.com>
arch/powerpc/boot/dts/fsl/p1022si-post.dtsi [new file with mode: 0644]
arch/powerpc/boot/dts/fsl/p1022si-pre.dtsi [new file with mode: 0644]
arch/powerpc/boot/dts/p1022ds.dts