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(parent: 4baa0ab) | patch
MIPS: Join the coherent domain when a CM is present
authorPaul Burton <paul.burton@imgtec.com>
Wed, 21 Sep 2016 10:18:55 +0000 (11:18 +0100)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Wed, 21 Sep 2016 13:04:04 +0000 (15:04 +0200)
commit7953354b07bba8fa9599bf5d212308e6cdf9cbe2
treeea7c5e9e3bb9f02a999f0c4c39392fbabb1607d3tree | snapshot
parent4baa0ab67d504f3b4318f999631e3f83d0c52c4acommit | diff
MIPS: Join the coherent domain when a CM is present

MIPS Linux expects the bootloader to leave the boot CPU a member of the
coherent domain when running on a system with a CM, and we will need to
do so if we wish to make use of IOCUs to have cache-coherent DMA in
U-Boot (and on some systems there is no choice in that matter). When a
CM is present, join the coherent domain after completing cache
initialisation.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
arch/mips/include/asm/cm.h diff | blob | history
arch/mips/lib/cache_init.S diff | blob | history
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