ARM: spinlock: use inner-shareable dsb variant prior to sev instruction
authorWill Deacon <will.deacon@arm.com>
Mon, 13 May 2013 10:39:50 +0000 (11:39 +0100)
committerWill Deacon <will.deacon@arm.com>
Mon, 12 Aug 2013 11:25:45 +0000 (12:25 +0100)
commit73a6fdc48bf52e93c26874dc8c0f0f8d5585a809
tree7e8c5bdf54bcb6bb33205952e7d51d4e3df8cddf
parent6abdd491698a27f7df04a32ca12cc453810e4396
ARM: spinlock: use inner-shareable dsb variant prior to sev instruction

When unlocking a spinlock, we use the sev instruction to signal other
CPUs waiting on the lock. Since sev is not a memory access instruction,
we require a dsb in order to ensure that the sev is not issued ahead
of the store placing the lock in an unlocked state.

However, as sev is only concerned with other processors in a
multiprocessor system, we can restrict the scope of the preceding dsb
to the inner-shareable domain. Furthermore, we can restrict the scope to
consider only stores, since there are no independent loads on the unlock
path.

A side-effect of this change is that a spin_unlock operation no longer
forces completion of pending TLB invalidation, something which we rely
on when unlocking runqueues to ensure that CPU migration during TLB
maintenance routines doesn't cause us to continue before the operation
has completed.

This patch adds the -ishst suffix to the ARMv7 definition of dsb_sev()
and adds an inner-shareable dsb to the context-switch path when running
a preemptible, SMP, v7 kernel.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm/include/asm/spinlock.h
arch/arm/include/asm/switch_to.h