ARM: OMAP4: hwmod: Fix SOFTRESET logic for OMAP4
authorIllia Smyrnov <illia.smyrnov@globallogic.com>
Wed, 5 Feb 2014 15:06:09 +0000 (17:06 +0200)
committerGrazvydas Ignotas <grazvydas@neurotechnology.com>
Mon, 14 Apr 2014 12:58:24 +0000 (15:58 +0300)
commit68f04104dc2eb6f25b60378c0eb093cfc2f0a5ba
treebdde9068f42a8ad9cbe30179604960ee7ae8e62b
parenta84f110d085fcc281d6797b843ede600e376aaa4
ARM: OMAP4: hwmod: Fix SOFTRESET logic for OMAP4

Commit 313a76e (ARM: OMAP2+: hwmod: Fix SOFTRESET logic) introduced
softreset bit cleaning right after set one. It is caused L3 error for
OMAP4 ISS because ISS register write occurs when ISS reset process is in
progress. Avoid this situation by cleaning softreset bit later, when reset
process is successfully finished.

Signed-off-by: Illia Smyrnov <illia.smyrnov@globallogic.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/omap_hwmod.c