rockchip: rk3528: Disable USB3OTG U3 port early
authorJonas Karlman <jonas@kwiboo.se>
Wed, 30 Jul 2025 23:52:45 +0000 (23:52 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Sat, 30 Aug 2025 15:26:08 +0000 (23:26 +0800)
commit58d39bbd773965404cd8cc41ebb94488b48ac1a4
tree33a498a934fea31b04cea4d9b20b40ea88101268
parent95ae8b040b891596c5a7916a0955d7820fc9e380
rockchip: rk3528: Disable USB3OTG U3 port early

The RK3528 SoC comes with USB OTG support using a DWC3 controller with
a USB2 PHY and a USB3 PHY (COMBPHY).

Some board designs may not use the COMBPHY for USB3 purpose. For these
board to use USB OTG the input clock source must change to use UTMI clk
instead of PIPE clk.

Change to always disable the USB3OTG U3 port early and leave it to the
COMBPHY driver to re-enable the U3 port when a usb3-phy is described in
the board device tree.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/mach-rockchip/rk3528/rk3528.c