drm/i915: fix per-pipe reads after "cleanup"
authorJesse Barnes <jbarnes@virtuousgeek.org>
Thu, 17 Feb 2011 18:40:53 +0000 (10:40 -0800)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 22 Feb 2011 15:55:49 +0000 (15:55 +0000)
commit548f245ba6a318ef93f4d79bcc15cfe59a86f0d5
treee5483f47b02a7a280fd0a0d6220f65f4ca1806f2
parentfc9a2228ac208dc2b6033cfc6c56b6f7655fbdfa
drm/i915: fix per-pipe reads after "cleanup"

In a few places I replaced reads of per-pipe registers with the actual
register offsets themselves (converting I915_READ(reg) to _PIPE(reg)).
Alexey caught this on his 9xx machine because the cursor control write
was affected.  A quick audit showed a few more places where I'd borked
a read, so here's a patch to fix things up.

Reported-by: Alexey Fisher <bug-track@fisher-privat.net>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: compilation fix]
Tested-by: Alexey Fisher <bug-track@fisher-privat.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/intel_display.c