m68knommu: move inclusion of ColdFire v4 cache registers
authorGreg Ungerer <gerg@uclinux.org>
Tue, 9 Nov 2010 00:40:44 +0000 (10:40 +1000)
committerGreg Ungerer <gerg@uclinux.org>
Wed, 5 Jan 2011 05:19:18 +0000 (15:19 +1000)
commit3d461401eb5e3a8c471e92500aebd6c115273fba
tree9b8df3b3afb8f358851527db5c73b40dfc65228d
parent278c2cbd59371bc8905d83b7cc3aa0bbe69c00f1
m68knommu: move inclusion of ColdFire v4 cache registers

Move the inclusion of the version 4 cache controller registers so that
it is with all the other register bit flag definitions. This makes it
consistent with the other version core inclusion points, and means we
don't need "#ifdef"ery in odd-ball places for these definitions.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
arch/m68k/include/asm/cacheflush_no.h
arch/m68k/include/asm/m5407sim.h
arch/m68k/include/asm/m54xxsim.h
arch/m68k/include/asm/mcfcache.h