x86, x2apic: Preserve high 32-bits of IA32_APIC_BASE MSR
authorNaga Chumbalkar <nagananda.chumbalkar@hp.com>
Tue, 12 Jul 2011 05:59:07 +0000 (05:59 +0000)
committerH. Peter Anvin <hpa@linux.intel.com>
Tue, 12 Jul 2011 21:33:49 +0000 (14:33 -0700)
commit25970852280c9d5fb2de899769880d3e97332baa
tree164c46e430637f790ed2e495155fd8fc724e47f5
parent7fece83235a59b15d75d6c8ef2225c24abd4505b
x86, x2apic: Preserve high 32-bits of IA32_APIC_BASE MSR

If there's no special reason to zero-out the "high" 32-bits of the IA32_APIC_BASE
MSR, let's preserve it.

The x2APIC Specification doesn't explicitly state any such requirement. (Sec 2.2
in: http://www.intel.com/Assets/PDF/manual/318148.pdf).

Signed-off-by: Naga Chumbalkar <nagananda.chumbalkar@hp.com>
Link: http://lkml.kernel.org/r/20110712055831.2498.78521.sendpatchset@nchumbalkar.americas.cpqcorp.net
Reviewed-by: Cyrill Gorcunov <gorcunov@openvz.org>
Reviewed-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
arch/x86/kernel/apic/apic.c