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(parent: 5d39525) | patch
drm/i915/bxt: Support BXT in SSEU device status dump
authorJeff McGee <jeff.mcgee@intel.com>
Sat, 4 Apr 2015 01:13:18 +0000 (18:13 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 9 Apr 2015 13:57:57 +0000 (15:57 +0200)
commit1c046bc1db49e5a42e5c4167ac42cee4c1725a37
treeb6660632d23c239280f392277d7bfbf4a7d1a266tree | snapshot
parent5d39525a1f2551a33f7f7380a038837e648ed511commit | diff
drm/i915/bxt: Support BXT in SSEU device status dump

Modify the Gen9 SSEU device status logic to support Broxton.
Broxton reuses the Skylake power gate acknowledgment registers but
has at most 1 slice and 3 subslices. Broxton supports subslice
power gating within its single slice.

Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c diff | blob | history
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
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