drm/i915: Add self-refresh support on Sandybridge
authorYuanhan Liu <yuanhan.liu@linux.intel.com>
Wed, 15 Dec 2010 07:42:31 +0000 (15:42 +0800)
committerChris Wilson <chris@chris-wilson.co.uk>
Wed, 15 Dec 2010 11:16:57 +0000 (11:16 +0000)
commit1398261a2e84c537c409259cfe9db3d0abcd9f99
treebbf7e6a450d83775b093b5a50e976a230e46fdd3
parentb7f1de289c50beb4998611ba5373e539efd0f79f
drm/i915: Add self-refresh support on Sandybridge

Add the support of memory self-refresh on Sandybridge, which is now
support 3 levels of watermarks and the source of the latency values
for watermarks has changed.

On Sandybridge, the LP0 WM value is not hardcoded any more. All the
latency value is now should be extracted from MCHBAR SSKPD register.
And the MCHBAR base address is changed, too.

For the WM values, if any calculated watermark values is larger than
the maximum value that can be programmed into the associated watermark
register, that watermark must be disabled.

Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
[ickle: remove duplicate compute routines and fixup for checkpatch]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c