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(parent: 3b2bd70) | patch
clk: sunxi: Add support for bus clock gates on Allwinner A80 SoC
authorChen-Yu Tsai <wens@csie.org>
Mon, 20 Oct 2014 14:10:28 +0000 (22:10 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Tue, 21 Oct 2014 19:47:34 +0000 (21:47 +0200)
commit0b0f08028e4e2d69edbe4bb073af26cd17505a04
tree17aef4828848ef4c2e971e4482db5367664f2211tree | snapshot
parent3b2bd70f03c75d37de791b65d574a31d1e2507b0commit | diff
clk: sunxi: Add support for bus clock gates on Allwinner A80 SoC

This adds the gate clocks for AHB/APB busses on the A80 SoC.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Documentation/devicetree/bindings/clock/sunxi.txt diff | blob | history
drivers/clk/sunxi/clk-sunxi.c diff | blob | history
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