2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4 * Routines for control of EMU10K1 chips
6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
7 * Added support for Audigy 2 Value.
8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
34 #include <linux/sched.h>
35 #include <linux/kthread.h>
36 #include <linux/delay.h>
37 #include <linux/init.h>
38 #include <linux/interrupt.h>
39 #include <linux/pci.h>
40 #include <linux/slab.h>
41 #include <linux/vmalloc.h>
42 #include <linux/mutex.h>
45 #include <sound/core.h>
46 #include <sound/emu10k1.h>
47 #include <linux/firmware.h>
53 #define HANA_FILENAME "emu/hana.fw"
54 #define DOCK_FILENAME "emu/audio_dock.fw"
55 #define EMU1010B_FILENAME "emu/emu1010b.fw"
56 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
57 #define EMU0404_FILENAME "emu/emu0404.fw"
58 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
60 MODULE_FIRMWARE(HANA_FILENAME);
61 MODULE_FIRMWARE(DOCK_FILENAME);
62 MODULE_FIRMWARE(EMU1010B_FILENAME);
63 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
64 MODULE_FIRMWARE(EMU0404_FILENAME);
65 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
68 /*************************************************************************
70 *************************************************************************/
72 void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
74 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
75 snd_emu10k1_ptr_write(emu, IP, ch, 0);
76 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
77 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
78 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
79 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
80 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
82 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
83 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
84 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
85 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
86 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
87 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
89 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
90 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
91 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
92 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
93 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
94 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
95 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
96 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
98 /*** these are last so OFF prevents writing ***/
99 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
100 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
101 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
102 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
103 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
105 /* Audigy extra stuffs */
107 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
108 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
109 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
110 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
111 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
112 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
113 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
117 static unsigned int spi_dac_init[] = {
141 static unsigned int i2c_adc_init[][2] = {
142 { 0x17, 0x00 }, /* Reset */
143 { 0x07, 0x00 }, /* Timeout */
144 { 0x0b, 0x22 }, /* Interface control */
145 { 0x0c, 0x22 }, /* Master mode control */
146 { 0x0d, 0x08 }, /* Powerdown control */
147 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
148 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
149 { 0x10, 0x7b }, /* ALC Control 1 */
150 { 0x11, 0x00 }, /* ALC Control 2 */
151 { 0x12, 0x32 }, /* ALC Control 3 */
152 { 0x13, 0x00 }, /* Noise gate control */
153 { 0x14, 0xa6 }, /* Limiter control */
154 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for Audigy 2 ZS Notebook */
157 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
159 unsigned int silent_page;
163 /* disable audio and lock cache */
164 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
167 /* reset recording buffers */
168 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
169 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
170 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
171 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
172 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
173 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
175 /* disable channel interrupt */
176 outl(0, emu->port + INTE);
177 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
178 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
179 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
180 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
183 /* set SPDIF bypass mode */
184 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
185 /* enable rear left + rear right AC97 slots */
186 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
190 /* init envelope engine */
191 for (ch = 0; ch < NUM_G; ch++)
192 snd_emu10k1_voice_init(emu, ch);
194 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
195 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
196 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
198 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
199 /* Hacks for Alice3 to work independent of haP16V driver */
200 //Setup SRCMulti_I2S SamplingRate
201 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
204 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
206 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
207 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
208 /* Setup SRCMulti Input Audio Enable */
209 /* Use 0xFFFFFFFF to enable P16V sounds. */
210 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
212 /* Enabled Phased (8-channel) P16V playback */
213 outl(0x0201, emu->port + HCFG2);
214 /* Set playback routing. */
215 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
217 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
218 /* Hacks for Alice3 to work independent of haP16V driver */
219 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
220 //Setup SRCMulti_I2S SamplingRate
221 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
224 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
226 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
227 outl(0x600000, emu->port + 0x20);
228 outl(0x14, emu->port + 0x24);
230 /* Setup SRCMulti Input Audio Enable */
231 outl(0x7b0000, emu->port + 0x20);
232 outl(0xFF000000, emu->port + 0x24);
234 /* Setup SPDIF Out Audio Enable */
235 /* The Audigy 2 Value has a separate SPDIF out,
236 * so no need for a mixer switch
238 outl(0x7a0000, emu->port + 0x20);
239 outl(0xFF000000, emu->port + 0x24);
240 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
241 outl(tmp, emu->port + A_IOCFG);
243 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
246 size = ARRAY_SIZE(spi_dac_init);
247 for (n = 0; n < size; n++)
248 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
250 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
253 * GPIO1: Speakers-enabled.
256 * GPIO4: IEC958 Output on.
261 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
264 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
267 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
268 tmp = inl(emu->port + A_IOCFG);
269 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
270 tmp = inl(emu->port + A_IOCFG);
271 size = ARRAY_SIZE(i2c_adc_init);
272 for (n = 0; n < size; n++)
273 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
274 for (n=0; n < 4; n++) {
275 emu->i2c_capture_volume[n][0]= 0xcf;
276 emu->i2c_capture_volume[n][1]= 0xcf;
282 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
283 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
284 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
286 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
287 for (ch = 0; ch < NUM_G; ch++) {
288 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
289 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
292 if (emu->card_capabilities->emu_model) {
293 outl(HCFG_AUTOMUTE_ASYNC |
295 HCFG_AUDIOENABLE, emu->port + HCFG);
298 * Mute Disable Audio = 0
299 * Lock Tank Memory = 1
300 * Lock Sound Memory = 0
303 } else if (emu->audigy) {
304 if (emu->revision == 4) /* audigy2 */
305 outl(HCFG_AUDIOENABLE |
306 HCFG_AC3ENABLE_CDSPDIF |
307 HCFG_AC3ENABLE_GPSPDIF |
308 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
310 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
311 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
312 * e.g. card_capabilities->joystick */
313 } else if (emu->model == 0x20 ||
314 emu->model == 0xc400 ||
315 (emu->model == 0x21 && emu->revision < 6))
316 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
318 // With on-chip joystick
319 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
321 if (enable_ir) { /* enable IR for SB Live */
322 if (emu->card_capabilities->emu_model) {
323 ; /* Disable all access to A_IOCFG for the emu1010 */
324 } else if (emu->card_capabilities->i2c_adc) {
325 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
326 } else if (emu->audigy) {
327 unsigned int reg = inl(emu->port + A_IOCFG);
328 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
330 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
332 outl(reg, emu->port + A_IOCFG);
334 unsigned int reg = inl(emu->port + HCFG);
335 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
337 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
339 outl(reg, emu->port + HCFG);
343 if (emu->card_capabilities->emu_model) {
344 ; /* Disable all access to A_IOCFG for the emu1010 */
345 } else if (emu->card_capabilities->i2c_adc) {
346 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
347 } else if (emu->audigy) { /* enable analog output */
348 unsigned int reg = inl(emu->port + A_IOCFG);
349 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
355 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
358 * Enable the audio bit
360 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
362 /* Enable analog/digital outs on audigy */
363 if (emu->card_capabilities->emu_model) {
364 ; /* Disable all access to A_IOCFG for the emu1010 */
365 } else if (emu->card_capabilities->i2c_adc) {
366 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
367 } else if (emu->audigy) {
368 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
370 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
371 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
372 * This has to be done after init ALice3 I2SOut beyond 48KHz.
373 * So, sequence is important. */
374 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
375 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
376 /* Unmute Analog now. */
377 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
379 /* Disable routing from AC97 line out to Front speakers */
380 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
387 /* FIXME: the following routine disables LiveDrive-II !! */
390 tmp = inl(emu->port + HCFG);
391 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
392 outl(tmp|0x800, emu->port + HCFG);
394 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
396 outl(tmp, emu->port + HCFG);
402 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
405 int snd_emu10k1_done(struct snd_emu10k1 * emu)
409 outl(0, emu->port + INTE);
414 for (ch = 0; ch < NUM_G; ch++)
415 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
416 for (ch = 0; ch < NUM_G; ch++) {
417 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
418 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
419 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
420 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
423 /* reset recording buffers */
424 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
425 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
426 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
427 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
428 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
429 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
430 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
431 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
432 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
434 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
436 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
438 /* disable channel interrupt */
439 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
440 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
441 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
442 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
444 /* disable audio and lock cache */
445 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
446 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
451 /*************************************************************************
452 * ECARD functional implementation
453 *************************************************************************/
455 /* In A1 Silicon, these bits are in the HC register */
456 #define HOOKN_BIT (1L << 12)
457 #define HANDN_BIT (1L << 11)
458 #define PULSEN_BIT (1L << 10)
460 #define EC_GDI1 (1 << 13)
461 #define EC_GDI0 (1 << 14)
463 #define EC_NUM_CONTROL_BITS 20
465 #define EC_AC3_DATA_SELN 0x0001L
466 #define EC_EE_DATA_SEL 0x0002L
467 #define EC_EE_CNTRL_SELN 0x0004L
468 #define EC_EECLK 0x0008L
469 #define EC_EECS 0x0010L
470 #define EC_EESDO 0x0020L
471 #define EC_TRIM_CSN 0x0040L
472 #define EC_TRIM_SCLK 0x0080L
473 #define EC_TRIM_SDATA 0x0100L
474 #define EC_TRIM_MUTEN 0x0200L
475 #define EC_ADCCAL 0x0400L
476 #define EC_ADCRSTN 0x0800L
477 #define EC_DACCAL 0x1000L
478 #define EC_DACMUTEN 0x2000L
479 #define EC_LEDN 0x4000L
481 #define EC_SPDIF0_SEL_SHIFT 15
482 #define EC_SPDIF1_SEL_SHIFT 17
483 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
484 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
485 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
486 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
487 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
488 * be incremented any time the EEPROM's
489 * format is changed. */
491 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
493 /* Addresses for special values stored in to EEPROM */
494 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
495 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
496 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
498 #define EC_LAST_PROMFILE_ADDR 0x2f
500 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
501 * can be up to 30 characters in length
502 * and is stored as a NULL-terminated
503 * ASCII string. Any unused bytes must be
504 * filled with zeros */
505 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
508 /* Most of this stuff is pretty self-evident. According to the hardware
509 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
510 * offset problem. Weird.
512 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
516 #define EC_DEFAULT_ADC_GAIN 0xC4C4
517 #define EC_DEFAULT_SPDIF0_SEL 0x0
518 #define EC_DEFAULT_SPDIF1_SEL 0x4
520 /**************************************************************************
521 * @func Clock bits into the Ecard's control latch. The Ecard uses a
522 * control latch will is loaded bit-serially by toggling the Modem control
523 * lines from function 2 on the E8010. This function hides these details
524 * and presents the illusion that we are actually writing to a distinct
528 static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
530 unsigned short count;
532 unsigned long hc_port;
533 unsigned int hc_value;
535 hc_port = emu->port + HCFG;
536 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
537 outl(hc_value, hc_port);
539 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
541 /* Set up the value */
542 data = ((value & 0x1) ? PULSEN_BIT : 0);
545 outl(hc_value | data, hc_port);
547 /* Clock the shift register */
548 outl(hc_value | data | HANDN_BIT, hc_port);
549 outl(hc_value | data, hc_port);
553 outl(hc_value | HOOKN_BIT, hc_port);
554 outl(hc_value, hc_port);
557 /**************************************************************************
558 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
559 * trim value consists of a 16bit value which is composed of two
560 * 8 bit gain/trim values, one for the left channel and one for the
561 * right channel. The following table maps from the Gain/Attenuation
562 * value in decibels into the corresponding bit pattern for a single
566 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
571 /* Enable writing to the TRIM registers */
572 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
574 /* Do it again to insure that we meet hold time requirements */
575 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
577 for (bit = (1 << 15); bit; bit >>= 1) {
580 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
583 value |= EC_TRIM_SDATA;
586 snd_emu10k1_ecard_write(emu, value);
587 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
588 snd_emu10k1_ecard_write(emu, value);
591 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
594 static int snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
596 unsigned int hc_value;
598 /* Set up the initial settings */
599 emu->ecard_ctrl = EC_RAW_RUN_MODE |
600 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
601 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
603 /* Step 0: Set the codec type in the hardware control register
604 * and enable audio output */
605 hc_value = inl(emu->port + HCFG);
606 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
607 inl(emu->port + HCFG);
609 /* Step 1: Turn off the led and deassert TRIM_CS */
610 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
612 /* Step 2: Calibrate the ADC and DAC */
613 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
615 /* Step 3: Wait for awhile; XXX We can't get away with this
616 * under a real operating system; we'll need to block and wait that
618 snd_emu10k1_wait(emu, 48000);
620 /* Step 4: Switch off the DAC and ADC calibration. Note
621 * That ADC_CAL is actually an inverted signal, so we assert
622 * it here to stop calibration. */
623 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
625 /* Step 4: Switch into run mode */
626 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
628 /* Step 5: Set the analog input gain */
629 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
634 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
636 unsigned long special_port;
639 /* Special initialisation routine
640 * before the rest of the IO-Ports become active.
642 special_port = emu->port + 0x38;
643 value = inl(special_port);
644 outl(0x00d00000, special_port);
645 value = inl(special_port);
646 outl(0x00d00001, special_port);
647 value = inl(special_port);
648 outl(0x00d0005f, special_port);
649 value = inl(special_port);
650 outl(0x00d0007f, special_port);
651 value = inl(special_port);
652 outl(0x0090007f, special_port);
653 value = inl(special_port);
655 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
659 static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * filename)
665 unsigned int write_post;
667 const struct firmware *fw_entry;
669 if ((err = request_firmware(&fw_entry, filename, &emu->pci->dev)) != 0) {
670 snd_printk(KERN_ERR "firmware: %s not found. Err=%d\n",filename, err);
673 snd_printk(KERN_INFO "firmware size=0x%zx\n", fw_entry->size);
675 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
676 /* GPIO7 -> FPGA PGMN
679 * FPGA CONFIG OFF -> FPGA PGMN
681 spin_lock_irqsave(&emu->emu_lock, flags);
682 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
683 write_post = inl(emu->port + A_IOCFG);
685 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
686 write_post = inl(emu->port + A_IOCFG);
687 udelay(100); /* Allow FPGA memory to clean */
688 for(n = 0; n < fw_entry->size; n++) {
689 value=fw_entry->data[n];
690 for(i = 0; i < 8; i++) {
695 outl(reg, emu->port + A_IOCFG);
696 write_post = inl(emu->port + A_IOCFG);
697 outl(reg | 0x40, emu->port + A_IOCFG);
698 write_post = inl(emu->port + A_IOCFG);
701 /* After programming, set GPIO bit 4 high again. */
702 outl(0x10, emu->port + A_IOCFG);
703 write_post = inl(emu->port + A_IOCFG);
704 spin_unlock_irqrestore(&emu->emu_lock, flags);
706 release_firmware(fw_entry);
710 int emu1010_firmware_thread(void *data) {
711 struct snd_emu10k1 * emu = data;
717 /* Delay to allow Audio Dock to settle */
718 msleep_interruptible(1000);
719 if (kthread_should_stop())
721 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp ); /* IRQ Status */
722 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® ); /* OPTIONS: Which cards are attached to the EMU */
723 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
724 /* Audio Dock attached */
725 /* Return to Audio Dock programming mode */
726 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
727 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK );
728 if (emu->card_capabilities->emu_model ==
730 if ((err = snd_emu1010_load_firmware(emu, DOCK_FILENAME)) != 0) {
733 } else if (emu->card_capabilities->emu_model ==
734 EMU_MODEL_EMU1010B) {
735 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
738 } else if (emu->card_capabilities->emu_model ==
740 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
745 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0 );
746 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ® );
747 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS=0x%x\n",reg);
748 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
749 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® );
750 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID=0x%x\n",reg);
751 if ((reg & 0x1f) != 0x15) {
752 /* FPGA failed to be programmed */
753 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg=0x%x\n", reg);
756 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
757 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp );
758 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2 );
759 snd_printk("Audio Dock ver:%d.%d\n",tmp ,tmp2);
760 /* Sync clocking between 1010 and Dock */
761 /* Allow DLL to settle */
763 /* Unmute all. Default is muted after a firmware load */
764 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE );
767 snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
772 * EMU-1010 - details found out from this driver, official MS Win drivers,
775 * Audigy2 (aka Alice2):
776 * ---------------------
777 * * communication over PCI
778 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
779 * to 2 x 16-bit, using internal DSP instructions
780 * * slave mode, clock supplied by HANA
781 * * linked to HANA using:
782 * 32 x 32-bit serial EMU32 output channels
783 * 16 x EMU32 input channels
784 * (?) x I2S I/O channels (?)
788 * * provides all (?) physical inputs and outputs of the card
789 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
790 * * provides clock signal for the card and Alice2
791 * * two crystals - for 44.1kHz and 48kHz multiples
792 * * provides internal routing of signal sources to signal destinations
793 * * inputs/outputs to Alice2 - see above
795 * Current status of the driver:
796 * ----------------------------
797 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
798 * * PCM device nb. 2:
799 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
800 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
802 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
808 const char *filename = NULL;
810 snd_printk(KERN_INFO "emu1010: Special config.\n");
811 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
812 * Lock Sound Memory Cache, Lock Tank Memory Cache,
815 outl(0x0005a00c, emu->port + HCFG);
816 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
817 * Lock Tank Memory Cache,
820 outl(0x0005a004, emu->port + HCFG);
821 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
824 outl(0x0005a000, emu->port + HCFG);
825 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
828 outl(0x0005a000, emu->port + HCFG);
830 /* Disable 48Volt power to Audio Dock */
831 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 );
833 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
834 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® );
835 snd_printdd("reg1=0x%x\n",reg);
836 if ((reg & 0x3f) == 0x15) {
837 /* FPGA netlist already present so clear it */
838 /* Return to programming mode */
840 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02 );
842 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® );
843 snd_printdd("reg2=0x%x\n",reg);
844 if ((reg & 0x3f) == 0x15) {
845 /* FPGA failed to return to programming mode */
846 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
849 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID=0x%x\n",reg);
850 switch (emu->card_capabilities->emu_model) {
851 case EMU_MODEL_EMU1010:
852 filename = HANA_FILENAME;
854 case EMU_MODEL_EMU1010B:
855 filename = EMU1010B_FILENAME;
857 case EMU_MODEL_EMU1616:
858 filename = EMU1010_NOTEBOOK_FILENAME;
860 case EMU_MODEL_EMU0404:
861 filename = EMU0404_FILENAME;
868 snd_printk(KERN_INFO "emu1010: filename %s testing\n", filename);
869 err = snd_emu1010_load_firmware(emu, filename);
872 KERN_INFO "emu1010: Loading Firmware file %s failed\n",
877 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
878 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® );
879 if ((reg & 0x3f) != 0x15) {
880 /* FPGA failed to be programmed */
881 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg=0x%x\n", reg);
885 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
886 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp );
887 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2 );
888 snd_printk("Hana ver:%d.%d\n",tmp ,tmp2);
889 /* Enable 48Volt power to Audio Dock */
890 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON );
892 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® );
893 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
894 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® );
895 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
896 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp );
897 /* Optical -> ADAT I/O */
901 emu->emu1010.optical_in = 1; /* IN_ADAT */
902 emu->emu1010.optical_out = 1; /* IN_ADAT */
904 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
905 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
906 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp );
907 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp );
908 /* Set no attenuation on Audio Dock pads. */
909 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00 );
910 emu->emu1010.adc_pads = 0x00;
911 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
912 /* Unmute Audio dock DACs, Headphone source DAC-4. */
913 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
914 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
915 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp );
917 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f );
918 emu->emu1010.dac_pads = 0x0f;
919 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
920 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
921 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
922 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
923 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 );
925 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 );
927 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c );
928 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); // IRQ Enable: All on */
929 /* IRQ Enable: All off */
930 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00 );
932 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® );
933 snd_printk(KERN_INFO "emu1010: Card options3=0x%x\n",reg);
934 /* Default WCLK set to 48kHz. */
935 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00 );
936 /* Word Clock source, Internal 48kHz x1 */
937 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
938 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
939 /* Audio Dock LEDs. */
940 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
944 snd_emu1010_fpga_link_dst_src_write(emu,
945 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
946 snd_emu1010_fpga_link_dst_src_write(emu,
947 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
948 snd_emu1010_fpga_link_dst_src_write(emu,
949 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
950 snd_emu1010_fpga_link_dst_src_write(emu,
951 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
955 snd_emu1010_fpga_link_dst_src_write(emu,
956 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
957 snd_emu1010_fpga_link_dst_src_write(emu,
958 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
959 snd_emu1010_fpga_link_dst_src_write(emu,
960 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
961 snd_emu1010_fpga_link_dst_src_write(emu,
962 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
963 snd_emu1010_fpga_link_dst_src_write(emu,
964 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
965 snd_emu1010_fpga_link_dst_src_write(emu,
966 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
967 snd_emu1010_fpga_link_dst_src_write(emu,
968 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
969 snd_emu1010_fpga_link_dst_src_write(emu,
970 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
974 snd_emu1010_fpga_link_dst_src_write(emu,
975 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
976 snd_emu1010_fpga_link_dst_src_write(emu,
977 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
978 snd_emu1010_fpga_link_dst_src_write(emu,
979 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
980 snd_emu1010_fpga_link_dst_src_write(emu,
981 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
982 snd_emu1010_fpga_link_dst_src_write(emu,
983 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
984 snd_emu1010_fpga_link_dst_src_write(emu,
985 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
986 snd_emu1010_fpga_link_dst_src_write(emu,
987 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
988 snd_emu1010_fpga_link_dst_src_write(emu,
989 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
990 /* Pavel Hofman - setting defaults for 8 more capture channels
991 * Defaults only, users will set their own values anyways, let's
995 snd_emu1010_fpga_link_dst_src_write(emu,
996 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
997 snd_emu1010_fpga_link_dst_src_write(emu,
998 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
999 snd_emu1010_fpga_link_dst_src_write(emu,
1000 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1001 snd_emu1010_fpga_link_dst_src_write(emu,
1002 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1003 snd_emu1010_fpga_link_dst_src_write(emu,
1004 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1005 snd_emu1010_fpga_link_dst_src_write(emu,
1006 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1007 snd_emu1010_fpga_link_dst_src_write(emu,
1008 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1009 snd_emu1010_fpga_link_dst_src_write(emu,
1010 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1014 snd_emu1010_fpga_link_dst_src_write(emu,
1015 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1016 snd_emu1010_fpga_link_dst_src_write(emu,
1017 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1018 snd_emu1010_fpga_link_dst_src_write(emu,
1019 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1020 snd_emu1010_fpga_link_dst_src_write(emu,
1021 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1022 snd_emu1010_fpga_link_dst_src_write(emu,
1023 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1024 snd_emu1010_fpga_link_dst_src_write(emu,
1025 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1026 snd_emu1010_fpga_link_dst_src_write(emu,
1027 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1028 snd_emu1010_fpga_link_dst_src_write(emu,
1029 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1030 snd_emu1010_fpga_link_dst_src_write(emu,
1031 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1032 snd_emu1010_fpga_link_dst_src_write(emu,
1033 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1034 snd_emu1010_fpga_link_dst_src_write(emu,
1035 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1036 snd_emu1010_fpga_link_dst_src_write(emu,
1037 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1039 for (i = 0;i < 0x20; i++ ) {
1040 /* AudioDock Elink <- Silence */
1041 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100+i, EMU_SRC_SILENCE);
1043 for (i = 0;i < 4; i++) {
1044 /* Hana SPDIF Out <- Silence */
1045 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200+i, EMU_SRC_SILENCE);
1047 for (i = 0;i < 7; i++) {
1048 /* Hamoa DAC <- Silence */
1049 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300+i, EMU_SRC_SILENCE);
1051 for (i = 0;i < 7; i++) {
1052 /* Hana ADAT Out <- Silence */
1053 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1055 snd_emu1010_fpga_link_dst_src_write(emu,
1056 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1057 snd_emu1010_fpga_link_dst_src_write(emu,
1058 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1059 snd_emu1010_fpga_link_dst_src_write(emu,
1060 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1061 snd_emu1010_fpga_link_dst_src_write(emu,
1062 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1063 snd_emu1010_fpga_link_dst_src_write(emu,
1064 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1065 snd_emu1010_fpga_link_dst_src_write(emu,
1066 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1067 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01 ); // Unmute all
1069 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1071 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1072 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1075 outl(0x0000a000, emu->port + HCFG);
1076 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1077 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1078 * Un-Mute all codecs.
1080 outl(0x0000a001, emu->port + HCFG);
1082 /* Initial boot complete. Now patches */
1084 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1085 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1086 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1087 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1088 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1089 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
1090 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1092 /* Start Micro/Audio Dock firmware loader thread */
1093 emu->emu1010.firmware_thread = kthread_create(&emu1010_firmware_thread,
1095 "emu1010_firmware");
1096 wake_up_process(emu->emu1010.firmware_thread);
1099 snd_emu1010_fpga_link_dst_src_write(emu,
1100 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1101 snd_emu1010_fpga_link_dst_src_write(emu,
1102 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1103 snd_emu1010_fpga_link_dst_src_write(emu,
1104 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1105 snd_emu1010_fpga_link_dst_src_write(emu,
1106 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1108 /* Default outputs */
1109 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1110 /* 1616(M) cardbus default outputs */
1111 /* ALICE2 bus 0xa0 */
1112 snd_emu1010_fpga_link_dst_src_write(emu,
1113 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1114 emu->emu1010.output_source[0] = 17;
1115 snd_emu1010_fpga_link_dst_src_write(emu,
1116 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1117 emu->emu1010.output_source[1] = 18;
1118 snd_emu1010_fpga_link_dst_src_write(emu,
1119 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1120 emu->emu1010.output_source[2] = 19;
1121 snd_emu1010_fpga_link_dst_src_write(emu,
1122 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1123 emu->emu1010.output_source[3] = 20;
1124 snd_emu1010_fpga_link_dst_src_write(emu,
1125 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1126 emu->emu1010.output_source[4] = 21;
1127 snd_emu1010_fpga_link_dst_src_write(emu,
1128 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1129 emu->emu1010.output_source[5] = 22;
1130 /* ALICE2 bus 0xa0 */
1131 snd_emu1010_fpga_link_dst_src_write(emu,
1132 EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1133 emu->emu1010.output_source[16] = 17;
1134 snd_emu1010_fpga_link_dst_src_write(emu,
1135 EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1136 emu->emu1010.output_source[17] = 18;
1138 /* ALICE2 bus 0xa0 */
1139 snd_emu1010_fpga_link_dst_src_write(emu,
1140 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1141 emu->emu1010.output_source[0] = 21;
1142 snd_emu1010_fpga_link_dst_src_write(emu,
1143 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1144 emu->emu1010.output_source[1] = 22;
1145 snd_emu1010_fpga_link_dst_src_write(emu,
1146 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1147 emu->emu1010.output_source[2] = 23;
1148 snd_emu1010_fpga_link_dst_src_write(emu,
1149 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1150 emu->emu1010.output_source[3] = 24;
1151 snd_emu1010_fpga_link_dst_src_write(emu,
1152 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1153 emu->emu1010.output_source[4] = 25;
1154 snd_emu1010_fpga_link_dst_src_write(emu,
1155 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1156 emu->emu1010.output_source[5] = 26;
1157 snd_emu1010_fpga_link_dst_src_write(emu,
1158 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1159 emu->emu1010.output_source[6] = 27;
1160 snd_emu1010_fpga_link_dst_src_write(emu,
1161 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1162 emu->emu1010.output_source[7] = 28;
1163 /* ALICE2 bus 0xa0 */
1164 snd_emu1010_fpga_link_dst_src_write(emu,
1165 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1166 emu->emu1010.output_source[8] = 21;
1167 snd_emu1010_fpga_link_dst_src_write(emu,
1168 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1169 emu->emu1010.output_source[9] = 22;
1170 /* ALICE2 bus 0xa0 */
1171 snd_emu1010_fpga_link_dst_src_write(emu,
1172 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1173 emu->emu1010.output_source[10] = 21;
1174 snd_emu1010_fpga_link_dst_src_write(emu,
1175 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1176 emu->emu1010.output_source[11] = 22;
1177 /* ALICE2 bus 0xa0 */
1178 snd_emu1010_fpga_link_dst_src_write(emu,
1179 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1180 emu->emu1010.output_source[12] = 21;
1181 snd_emu1010_fpga_link_dst_src_write(emu,
1182 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1183 emu->emu1010.output_source[13] = 22;
1184 /* ALICE2 bus 0xa0 */
1185 snd_emu1010_fpga_link_dst_src_write(emu,
1186 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1187 emu->emu1010.output_source[14] = 21;
1188 snd_emu1010_fpga_link_dst_src_write(emu,
1189 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1190 emu->emu1010.output_source[15] = 22;
1191 /* ALICE2 bus 0xa0 */
1192 snd_emu1010_fpga_link_dst_src_write(emu,
1193 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1194 emu->emu1010.output_source[16] = 21;
1195 snd_emu1010_fpga_link_dst_src_write(emu,
1196 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1197 emu->emu1010.output_source[17] = 22;
1198 snd_emu1010_fpga_link_dst_src_write(emu,
1199 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1200 emu->emu1010.output_source[18] = 23;
1201 snd_emu1010_fpga_link_dst_src_write(emu,
1202 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1203 emu->emu1010.output_source[19] = 24;
1204 snd_emu1010_fpga_link_dst_src_write(emu,
1205 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1206 emu->emu1010.output_source[20] = 25;
1207 snd_emu1010_fpga_link_dst_src_write(emu,
1208 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1209 emu->emu1010.output_source[21] = 26;
1210 snd_emu1010_fpga_link_dst_src_write(emu,
1211 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1212 emu->emu1010.output_source[22] = 27;
1213 snd_emu1010_fpga_link_dst_src_write(emu,
1214 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1215 emu->emu1010.output_source[23] = 28;
1217 /* TEMP: Select SPDIF in/out */
1218 //snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */
1220 /* TEMP: Select 48kHz SPDIF out */
1221 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1222 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1223 /* Word Clock source, Internal 48kHz x1 */
1224 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
1225 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
1226 emu->emu1010.internal_clock = 1; /* 48000 */
1227 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */
1228 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1229 //snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */
1230 //snd_emu1010_fpga_write(emu, 0x7, 0x1); /* Unmute all */
1231 //snd_emu1010_fpga_write(emu, 0xe, 0x12); /* Set LEDs on Audio Dock */
1236 * Create the EMU10K1 instance
1240 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1241 static void free_pm_buffer(struct snd_emu10k1 *emu);
1244 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1246 if (emu->port) { /* avoid access to already used hardware */
1247 snd_emu10k1_fx8010_tram_setup(emu, 0);
1248 snd_emu10k1_done(emu);
1249 /* remove reserved page */
1250 if (emu->reserved_page) {
1251 snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page);
1252 emu->reserved_page = NULL;
1254 snd_emu10k1_free_efx(emu);
1256 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1257 /* Disable 48Volt power to Audio Dock */
1258 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 );
1260 if (emu->card_capabilities->emu_model)
1261 kthread_stop(emu->emu1010.firmware_thread);
1263 snd_util_memhdr_free(emu->memhdr);
1264 if (emu->silent_page.area)
1265 snd_dma_free_pages(&emu->silent_page);
1266 if (emu->ptb_pages.area)
1267 snd_dma_free_pages(&emu->ptb_pages);
1268 vfree(emu->page_ptr_table);
1269 vfree(emu->page_addr_table);
1271 free_pm_buffer(emu);
1274 free_irq(emu->irq, emu);
1276 pci_release_regions(emu->pci);
1277 if (emu->card_capabilities->ca0151_chip) /* P16V */
1279 pci_disable_device(emu->pci);
1284 static int snd_emu10k1_dev_free(struct snd_device *device)
1286 struct snd_emu10k1 *emu = device->device_data;
1287 return snd_emu10k1_free(emu);
1290 static struct snd_emu_chip_details emu_chip_details[] = {
1291 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
1292 /* Tested by James@superbug.co.uk 3rd July 2005 */
1295 * ADC: Philips 1361T
1299 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1300 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
1306 /* Audigy4 (Not PRO) SB0610 */
1307 /* Tested by James@superbug.co.uk 4th April 2006 */
1313 * 3: 0 - Digital Out, 1 - Line in
1321 * A: Green jack sense (Front)
1323 * C: Black jack sense (Rear/Side Right)
1324 * D: Yellow jack sense (Center/LFE/Side Left)
1328 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1332 /* Mic input not tested.
1333 * Analog CD input not tested
1334 * Digital Out not tested.
1336 * Audio output 5.1 working. Side outputs not working.
1338 /* DSP: CA10300-IAT LF
1339 * DAC: Cirrus Logic CS4382-KQZ
1340 * ADC: Philips 1361T
1341 * AC97: Sigmatel STAC9750
1344 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1345 .driver = "Audigy2", .name = "Audigy 4 [SB0610]",
1350 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1352 /* Audigy 2 ZS Notebook Cardbus card.*/
1353 /* Tested by James@superbug.co.uk 6th November 2006 */
1354 /* Audio output 7.1/Headphones working.
1355 * Digital output working. (AC3 not checked, only PCM)
1356 * Audio Mic/Line inputs working.
1357 * Digital input not tested.
1360 * DAC: Wolfson WM8768/WM8568
1361 * ADC: Wolfson WM8775
1365 /* Tested by James@superbug.co.uk 4th April 2006 */
1369 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1370 * 2: Analog input 0 = line in, 1 = mic in
1372 * 4: Digital output 0 = off, 1 = on.
1377 * All bits 1 (0x3fxx) means nothing plugged in.
1378 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1379 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1380 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1384 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1385 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1389 .ca_cardbus_chip = 1,
1393 /* Tested by James@superbug.co.uk 20-3-2007. */
1394 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1395 .driver = "Audigy2", .name = "E-mu 0404 [4002]",
1400 .emu_model = EMU_MODEL_EMU0404} , /* EMU 0404 */
1401 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1402 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1403 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1407 .ca_cardbus_chip = 1,
1409 .emu_model = EMU_MODEL_EMU1616},
1410 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1411 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1412 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM????]",
1417 .emu_model = EMU_MODEL_EMU1010B},
1418 /* Tested by James@superbug.co.uk 8th July 2005. */
1419 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1420 .driver = "Audigy2", .name = "E-mu 1010 [4001]",
1425 .emu_model = EMU_MODEL_EMU1010} , /* Emu 1010 */
1426 /* Audigy4 (Not PRO) SB0610 */
1427 {.vendor = 0x1102, .device = 0x0008,
1428 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
1433 /* Tested by James@superbug.co.uk 3rd July 2005 */
1434 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1435 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
1443 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1444 /* The 0x20061102 does have SB0350 written on it
1445 * Just like 0x20021102
1447 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1448 .driver = "Audigy2", .name = "Audigy 2 [SB0350b]",
1456 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1457 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
1465 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1466 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
1475 /* Tested by James@superbug.co.uk 3rd July 2005 */
1478 * ADC: Philips 1361T
1482 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1483 .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
1490 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1492 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1493 .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
1500 /* Dell OEM/Creative Labs Audigy 2 ZS */
1501 /* See ALSA bug#1365 */
1502 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1503 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0353]",
1511 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1512 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
1519 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1521 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1522 .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
1529 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1530 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1535 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1536 .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
1542 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1543 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1548 {.vendor = 0x1102, .device = 0x0004,
1549 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1554 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
1555 .driver = "EMU10K1", .name = "SBLive! [SB0105]",
1560 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
1561 .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
1566 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1567 .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
1572 /* Tested by ALSA bug#1680 26th December 2005 */
1573 /* note: It really has SB0220 written on the card. */
1574 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1575 .driver = "EMU10K1", .name = "SB Live 5.1 Dell OEM [SB0220]",
1580 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1581 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1582 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1587 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1588 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1593 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1594 .driver = "EMU10K1", .name = "SB Live 5.1",
1599 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1600 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1601 .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
1604 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1605 * share the same IDs!
1608 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1609 .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
1614 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1615 .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
1619 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1620 .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
1625 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1626 .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
1631 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1632 .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
1637 /* Tested by James@superbug.co.uk 3rd July 2005 */
1638 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1639 .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
1644 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1645 .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
1650 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1651 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1656 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1657 .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
1662 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1663 .driver = "EMU10K1", .name = "E-mu APS [4001]",
1667 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1668 .driver = "EMU10K1", .name = "SBLive! [CT4620]",
1673 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1674 .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
1679 {.vendor = 0x1102, .device = 0x0002,
1680 .driver = "EMU10K1", .name = "SB Live [Unknown]",
1685 { } /* terminator */
1688 int __devinit snd_emu10k1_create(struct snd_card *card,
1689 struct pci_dev * pci,
1690 unsigned short extin_mask,
1691 unsigned short extout_mask,
1692 long max_cache_bytes,
1695 struct snd_emu10k1 ** remu)
1697 struct snd_emu10k1 *emu;
1700 unsigned int silent_page;
1701 const struct snd_emu_chip_details *c;
1702 static struct snd_device_ops ops = {
1703 .dev_free = snd_emu10k1_dev_free,
1708 /* enable PCI device */
1709 if ((err = pci_enable_device(pci)) < 0)
1712 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1714 pci_disable_device(pci);
1718 spin_lock_init(&emu->reg_lock);
1719 spin_lock_init(&emu->emu_lock);
1720 spin_lock_init(&emu->voice_lock);
1721 spin_lock_init(&emu->synth_lock);
1722 spin_lock_init(&emu->memblk_lock);
1723 mutex_init(&emu->fx8010.lock);
1724 INIT_LIST_HEAD(&emu->mapped_link_head);
1725 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1729 emu->get_synth_voice = NULL;
1730 /* read revision & serial */
1731 emu->revision = pci->revision;
1732 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1733 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1734 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
1736 for (c = emu_chip_details; c->vendor; c++) {
1737 if (c->vendor == pci->vendor && c->device == pci->device) {
1739 if (c->subsystem && (c->subsystem == subsystem) ) {
1743 if (c->subsystem && (c->subsystem != emu->serial) )
1745 if (c->revision && c->revision != emu->revision)
1751 if (c->vendor == 0) {
1752 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1754 pci_disable_device(pci);
1757 emu->card_capabilities = c;
1758 if (c->subsystem && !subsystem)
1759 snd_printdd("Sound card name=%s\n", c->name);
1761 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1762 c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
1764 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1765 c->name, pci->vendor, pci->device, emu->serial);
1767 if (!*card->id && c->id) {
1769 strlcpy(card->id, c->id, sizeof(card->id));
1771 for (i = 0; i < snd_ecards_limit; i++) {
1772 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1775 if (i >= snd_ecards_limit)
1778 if (n >= SNDRV_CARDS)
1780 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1784 is_audigy = emu->audigy = c->emu10k2_chip;
1786 /* set the DMA transfer mask */
1787 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1788 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1789 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1790 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1792 pci_disable_device(pci);
1796 emu->gpr_base = A_FXGPREGBASE;
1798 emu->gpr_base = FXGPREGBASE;
1800 if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
1802 pci_disable_device(pci);
1805 emu->port = pci_resource_start(pci, 0);
1807 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1812 emu->irq = pci->irq;
1814 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1815 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1816 32 * 1024, &emu->ptb_pages) < 0) {
1821 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1822 emu->page_addr_table = vmalloc(emu->max_cache_pages *
1823 sizeof(unsigned long));
1824 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1829 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1830 EMUPAGESIZE, &emu->silent_page) < 0) {
1834 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1835 if (emu->memhdr == NULL) {
1839 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1840 sizeof(struct snd_util_memblk);
1842 pci_set_master(pci);
1844 emu->fx8010.fxbus_mask = 0x303f;
1845 if (extin_mask == 0)
1846 extin_mask = 0x3fcf;
1847 if (extout_mask == 0)
1848 extout_mask = 0x7fff;
1849 emu->fx8010.extin_mask = extin_mask;
1850 emu->fx8010.extout_mask = extout_mask;
1851 emu->enable_ir = enable_ir;
1853 if (emu->card_capabilities->ca_cardbus_chip) {
1854 if ((err = snd_emu10k1_cardbus_init(emu)) < 0)
1857 if (emu->card_capabilities->ecard) {
1858 if ((err = snd_emu10k1_ecard_init(emu)) < 0)
1860 } else if (emu->card_capabilities->emu_model) {
1861 if ((err = snd_emu10k1_emu1010_init(emu)) < 0) {
1862 snd_emu10k1_free(emu);
1866 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1867 does not support this, it shouldn't do any harm */
1868 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1871 /* initialize TRAM setup */
1872 emu->fx8010.itram_size = (16 * 1024)/2;
1873 emu->fx8010.etram_pages.area = NULL;
1874 emu->fx8010.etram_pages.bytes = 0;
1877 * Init to 0x02109204 :
1878 * Clock accuracy = 0 (1000ppm)
1879 * Sample Rate = 2 (48kHz)
1880 * Audio Channel = 1 (Left of 2)
1881 * Source Number = 0 (Unspecified)
1882 * Generation Status = 1 (Original for Cat Code 12)
1883 * Cat Code = 12 (Digital Signal Mixer)
1885 * Emphasis = 0 (None)
1886 * CP = 1 (Copyright unasserted)
1887 * AN = 0 (Audio data)
1890 emu->spdif_bits[0] = emu->spdif_bits[1] =
1891 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1892 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1893 SPCS_GENERATIONSTATUS | 0x00001200 |
1894 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1896 emu->reserved_page = (struct snd_emu10k1_memblk *)
1897 snd_emu10k1_synth_alloc(emu, 4096);
1898 if (emu->reserved_page)
1899 emu->reserved_page->map_locked = 1;
1901 /* Clear silent pages and set up pointers */
1902 memset(emu->silent_page.area, 0, PAGE_SIZE);
1903 silent_page = emu->silent_page.addr << 1;
1904 for (idx = 0; idx < MAXPAGES; idx++)
1905 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1907 /* set up voice indices */
1908 for (idx = 0; idx < NUM_G; idx++) {
1909 emu->voices[idx].emu = emu;
1910 emu->voices[idx].number = idx;
1913 if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0)
1916 if ((err = alloc_pm_buffer(emu)) < 0)
1920 /* Initialize the effect engine */
1921 if ((err = snd_emu10k1_init_efx(emu)) < 0)
1923 snd_emu10k1_audio_enable(emu);
1925 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0)
1928 #ifdef CONFIG_PROC_FS
1929 snd_emu10k1_proc_init(emu);
1932 snd_card_set_dev(card, &pci->dev);
1937 snd_emu10k1_free(emu);
1942 static unsigned char saved_regs[] = {
1943 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1944 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1945 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1946 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1947 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1948 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1951 static unsigned char saved_regs_audigy[] = {
1952 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1953 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1957 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1961 size = ARRAY_SIZE(saved_regs);
1963 size += ARRAY_SIZE(saved_regs_audigy);
1964 emu->saved_ptr = vmalloc(4 * NUM_G * size);
1965 if (! emu->saved_ptr)
1967 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1969 if (emu->card_capabilities->ca0151_chip &&
1970 snd_p16v_alloc_pm_buffer(emu) < 0)
1975 static void free_pm_buffer(struct snd_emu10k1 *emu)
1977 vfree(emu->saved_ptr);
1978 snd_emu10k1_efx_free_pm_buffer(emu);
1979 if (emu->card_capabilities->ca0151_chip)
1980 snd_p16v_free_pm_buffer(emu);
1983 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1989 val = emu->saved_ptr;
1990 for (reg = saved_regs; *reg != 0xff; reg++)
1991 for (i = 0; i < NUM_G; i++, val++)
1992 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1994 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1995 for (i = 0; i < NUM_G; i++, val++)
1996 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1999 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2000 emu->saved_hcfg = inl(emu->port + HCFG);
2003 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2005 if (emu->card_capabilities->ca_cardbus_chip)
2006 snd_emu10k1_cardbus_init(emu);
2007 if (emu->card_capabilities->ecard)
2008 snd_emu10k1_ecard_init(emu);
2009 else if (emu->card_capabilities->emu_model)
2010 snd_emu10k1_emu1010_init(emu);
2012 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2013 snd_emu10k1_init(emu, emu->enable_ir, 1);
2016 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2022 snd_emu10k1_audio_enable(emu);
2024 /* resore for spdif */
2026 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2027 outl(emu->saved_hcfg, emu->port + HCFG);
2029 val = emu->saved_ptr;
2030 for (reg = saved_regs; *reg != 0xff; reg++)
2031 for (i = 0; i < NUM_G; i++, val++)
2032 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2034 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2035 for (i = 0; i < NUM_G; i++, val++)
2036 snd_emu10k1_ptr_write(emu, *reg, i, *val);