4471757b798588be35e2767bb244fe21fcb51e9f
[pandora-kernel.git] / sound / oss / sonicvibes.c
1 /*****************************************************************************/
2
3 /*
4  *      sonicvibes.c  --  S3 Sonic Vibes audio driver.
5  *
6  *      Copyright (C) 1998-2001, 2003  Thomas Sailer (t.sailer@alumni.ethz.ch)
7  *
8  *      This program is free software; you can redistribute it and/or modify
9  *      it under the terms of the GNU General Public License as published by
10  *      the Free Software Foundation; either version 2 of the License, or
11  *      (at your option) any later version.
12  *
13  *      This program is distributed in the hope that it will be useful,
14  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
15  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  *      GNU General Public License for more details.
17  *
18  *      You should have received a copy of the GNU General Public License
19  *      along with this program; if not, write to the Free Software
20  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  *
22  * Special thanks to David C. Niemi
23  *
24  *
25  * Module command line parameters:
26  *   none so far
27  *
28  *
29  *  Supported devices:
30  *  /dev/dsp    standard /dev/dsp device, (mostly) OSS compatible
31  *  /dev/mixer  standard /dev/mixer device, (mostly) OSS compatible
32  *  /dev/midi   simple MIDI UART interface, no ioctl
33  *
34  *  The card has both an FM and a Wavetable synth, but I have to figure
35  *  out first how to drive them...
36  *
37  *  Revision history
38  *    06.05.1998   0.1   Initial release
39  *    10.05.1998   0.2   Fixed many bugs, esp. ADC rate calculation
40  *                       First stab at a simple midi interface (no bells&whistles)
41  *    13.05.1998   0.3   Fix stupid cut&paste error: set_adc_rate was called instead of
42  *                       set_dac_rate in the FMODE_WRITE case in sv_open
43  *                       Fix hwptr out of bounds (now mpg123 works)
44  *    14.05.1998   0.4   Don't allow excessive interrupt rates
45  *    08.06.1998   0.5   First release using Alan Cox' soundcore instead of miscdevice
46  *    03.08.1998   0.6   Do not include modversions.h
47  *                       Now mixer behaviour can basically be selected between
48  *                       "OSS documented" and "OSS actual" behaviour
49  *    31.08.1998   0.7   Fix realplayer problems - dac.count issues
50  *    10.12.1998   0.8   Fix drain_dac trying to wait on not yet initialized DMA
51  *    16.12.1998   0.9   Fix a few f_file & FMODE_ bugs
52  *    06.01.1999   0.10  remove the silly SA_INTERRUPT flag.
53  *                       hopefully killed the egcs section type conflict
54  *    12.03.1999   0.11  cinfo.blocks should be reset after GETxPTR ioctl.
55  *                       reported by Johan Maes <joma@telindus.be>
56  *    22.03.1999   0.12  return EAGAIN instead of EBUSY when O_NONBLOCK
57  *                       read/write cannot be executed
58  *    05.04.1999   0.13  added code to sv_read and sv_write which should detect
59  *                       lockups of the sound chip and revive it. This is basically
60  *                       an ugly hack, but at least applications using this driver
61  *                       won't hang forever. I don't know why these lockups happen,
62  *                       it might well be the motherboard chipset (an early 486 PCI
63  *                       board with ALI chipset), since every busmastering 100MB
64  *                       ethernet card I've tried (Realtek 8139 and Macronix tulip clone)
65  *                       exhibit similar behaviour (they work for a couple of packets
66  *                       and then lock up and can be revived by ifconfig down/up).
67  *    07.04.1999   0.14  implemented the following ioctl's: SOUND_PCM_READ_RATE, 
68  *                       SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS; 
69  *                       Alpha fixes reported by Peter Jones <pjones@redhat.com>
70  *                       Note: dmaio hack might still be wrong on archs other than i386
71  *    15.06.1999   0.15  Fix bad allocation bug.
72  *                       Thanks to Deti Fliegl <fliegl@in.tum.de>
73  *    28.06.1999   0.16  Add pci_set_master
74  *    03.08.1999   0.17  adapt to Linus' new __setup/__initcall
75  *                       added kernel command line options "sonicvibes=reverb" and "sonicvibesdmaio=dmaioaddr"
76  *    12.08.1999   0.18  module_init/__setup fixes
77  *    24.08.1999   0.19  get rid of the dmaio kludge, replace with allocate_resource
78  *    31.08.1999   0.20  add spin_lock_init
79  *                       use new resource allocation to allocate DDMA IO space
80  *                       replaced current->state = x with set_current_state(x)
81  *    03.09.1999   0.21  change read semantics for MIDI to match
82  *                       OSS more closely; remove possible wakeup race
83  *    28.10.1999   0.22  More waitqueue races fixed
84  *    01.12.1999   0.23  New argument to allocate_resource
85  *    07.12.1999   0.24  More allocate_resource semantics change
86  *    08.01.2000   0.25  Prevent some ioctl's from returning bad count values on underrun/overrun;
87  *                       Tim Janik's BSE (Bedevilled Sound Engine) found this
88  *                       use Martin Mares' pci_assign_resource
89  *    07.02.2000   0.26  Use pci_alloc_consistent and pci_register_driver
90  *    21.11.2000   0.27  Initialize dma buffers in poll, otherwise poll may return a bogus mask
91  *    12.12.2000   0.28  More dma buffer initializations, patch from
92  *                       Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
93  *    31.01.2001   0.29  Register/Unregister gameport
94  *                       Fix SETTRIGGER non OSS API conformity
95  *    18.05.2001   0.30  PCI probing and error values cleaned up by Marcus
96  *                       Meissner <mm@caldera.de>
97  *    03.01.2003   0.31  open_mode fixes from Georg Acher <acher@in.tum.de>
98  *
99  */
100
101 /*****************************************************************************/
102       
103 #include <linux/module.h>
104 #include <linux/string.h>
105 #include <linux/ioport.h>
106 #include <linux/interrupt.h>
107 #include <linux/wait.h>
108 #include <linux/mm.h>
109 #include <linux/delay.h>
110 #include <linux/sound.h>
111 #include <linux/slab.h>
112 #include <linux/soundcard.h>
113 #include <linux/pci.h>
114 #include <linux/init.h>
115 #include <linux/poll.h>
116 #include <linux/spinlock.h>
117 #include <linux/smp_lock.h>
118 #include <linux/gameport.h>
119 #include <linux/mutex.h>
120
121
122 #include <asm/io.h>
123 #include <asm/uaccess.h>
124
125 #include "dm.h"
126
127 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
128 #define SUPPORT_JOYSTICK 1
129 #endif
130
131 /* --------------------------------------------------------------------- */
132
133 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
134
135 /* --------------------------------------------------------------------- */
136
137 #ifndef PCI_VENDOR_ID_S3
138 #define PCI_VENDOR_ID_S3             0x5333
139 #endif
140 #ifndef PCI_DEVICE_ID_S3_SONICVIBES
141 #define PCI_DEVICE_ID_S3_SONICVIBES  0xca00
142 #endif
143
144 #define SV_MAGIC  ((PCI_VENDOR_ID_S3<<16)|PCI_DEVICE_ID_S3_SONICVIBES)
145
146 #define SV_EXTENT_SB      0x10
147 #define SV_EXTENT_ENH     0x10
148 #define SV_EXTENT_SYNTH   0x4
149 #define SV_EXTENT_MIDI    0x4
150 #define SV_EXTENT_GAME    0x8
151 #define SV_EXTENT_DMA     0x10
152
153 /*
154  * we are not a bridge and thus use a resource for DDMA that is used for bridges but
155  * left empty for normal devices
156  */
157 #define RESOURCE_SB       0
158 #define RESOURCE_ENH      1
159 #define RESOURCE_SYNTH    2
160 #define RESOURCE_MIDI     3
161 #define RESOURCE_GAME     4
162 #define RESOURCE_DDMA     7
163
164 #define SV_MIDI_DATA      0
165 #define SV_MIDI_COMMAND   1
166 #define SV_MIDI_STATUS    1
167
168 #define SV_DMA_ADDR0      0
169 #define SV_DMA_ADDR1      1
170 #define SV_DMA_ADDR2      2
171 #define SV_DMA_ADDR3      3
172 #define SV_DMA_COUNT0     4
173 #define SV_DMA_COUNT1     5
174 #define SV_DMA_COUNT2     6
175 #define SV_DMA_MODE       0xb
176 #define SV_DMA_RESET      0xd
177 #define SV_DMA_MASK       0xf
178
179 /*
180  * DONT reset the DMA controllers unless you understand
181  * the reset semantics. Assuming reset semantics as in
182  * the 8237 does not work.
183  */
184
185 #define DMA_MODE_AUTOINIT 0x10
186 #define DMA_MODE_READ     0x44    /* I/O to memory, no autoinit, increment, single mode */
187 #define DMA_MODE_WRITE    0x48    /* memory to I/O, no autoinit, increment, single mode */
188
189 #define SV_CODEC_CONTROL  0
190 #define SV_CODEC_INTMASK  1
191 #define SV_CODEC_STATUS   2
192 #define SV_CODEC_IADDR    4
193 #define SV_CODEC_IDATA    5
194
195 #define SV_CCTRL_RESET      0x80
196 #define SV_CCTRL_INTADRIVE  0x20
197 #define SV_CCTRL_WAVETABLE  0x08
198 #define SV_CCTRL_REVERB     0x04
199 #define SV_CCTRL_ENHANCED   0x01
200
201 #define SV_CINTMASK_DMAA    0x01
202 #define SV_CINTMASK_DMAC    0x04
203 #define SV_CINTMASK_SPECIAL 0x08
204 #define SV_CINTMASK_UPDOWN  0x40
205 #define SV_CINTMASK_MIDI    0x80
206
207 #define SV_CSTAT_DMAA       0x01
208 #define SV_CSTAT_DMAC       0x04
209 #define SV_CSTAT_SPECIAL    0x08
210 #define SV_CSTAT_UPDOWN     0x40
211 #define SV_CSTAT_MIDI       0x80
212
213 #define SV_CIADDR_TRD       0x80
214 #define SV_CIADDR_MCE       0x40
215
216 /* codec indirect registers */
217 #define SV_CIMIX_ADCINL     0x00
218 #define SV_CIMIX_ADCINR     0x01
219 #define SV_CIMIX_AUX1INL    0x02
220 #define SV_CIMIX_AUX1INR    0x03
221 #define SV_CIMIX_CDINL      0x04
222 #define SV_CIMIX_CDINR      0x05
223 #define SV_CIMIX_LINEINL    0x06
224 #define SV_CIMIX_LINEINR    0x07
225 #define SV_CIMIX_MICIN      0x08
226 #define SV_CIMIX_SYNTHINL   0x0A
227 #define SV_CIMIX_SYNTHINR   0x0B
228 #define SV_CIMIX_AUX2INL    0x0C
229 #define SV_CIMIX_AUX2INR    0x0D
230 #define SV_CIMIX_ANALOGINL  0x0E
231 #define SV_CIMIX_ANALOGINR  0x0F
232 #define SV_CIMIX_PCMINL     0x10
233 #define SV_CIMIX_PCMINR     0x11
234
235 #define SV_CIGAMECONTROL    0x09
236 #define SV_CIDATAFMT        0x12
237 #define SV_CIENABLE         0x13
238 #define SV_CIUPDOWN         0x14
239 #define SV_CIREVISION       0x15
240 #define SV_CIADCOUTPUT      0x16
241 #define SV_CIDMAABASECOUNT1 0x18
242 #define SV_CIDMAABASECOUNT0 0x19
243 #define SV_CIDMACBASECOUNT1 0x1c
244 #define SV_CIDMACBASECOUNT0 0x1d
245 #define SV_CIPCMSR0         0x1e
246 #define SV_CIPCMSR1         0x1f
247 #define SV_CISYNTHSR0       0x20
248 #define SV_CISYNTHSR1       0x21
249 #define SV_CIADCCLKSOURCE   0x22
250 #define SV_CIADCALTSR       0x23
251 #define SV_CIADCPLLM        0x24
252 #define SV_CIADCPLLN        0x25
253 #define SV_CISYNTHPLLM      0x26
254 #define SV_CISYNTHPLLN      0x27
255 #define SV_CIUARTCONTROL    0x2a
256 #define SV_CIDRIVECONTROL   0x2b
257 #define SV_CISRSSPACE       0x2c
258 #define SV_CISRSCENTER      0x2d
259 #define SV_CIWAVETABLESRC   0x2e
260 #define SV_CIANALOGPWRDOWN  0x30
261 #define SV_CIDIGITALPWRDOWN 0x31
262
263
264 #define SV_CIMIX_ADCSRC_CD     0x20
265 #define SV_CIMIX_ADCSRC_DAC    0x40
266 #define SV_CIMIX_ADCSRC_AUX2   0x60
267 #define SV_CIMIX_ADCSRC_LINE   0x80
268 #define SV_CIMIX_ADCSRC_AUX1   0xa0
269 #define SV_CIMIX_ADCSRC_MIC    0xc0
270 #define SV_CIMIX_ADCSRC_MIXOUT 0xe0
271 #define SV_CIMIX_ADCSRC_MASK   0xe0
272
273 #define SV_CFMT_STEREO     0x01
274 #define SV_CFMT_16BIT      0x02
275 #define SV_CFMT_MASK       0x03
276 #define SV_CFMT_ASHIFT     0   
277 #define SV_CFMT_CSHIFT     4
278
279 static const unsigned sample_size[] = { 1, 2, 2, 4 };
280 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
281
282 #define SV_CENABLE_PPE     0x4
283 #define SV_CENABLE_RE      0x2
284 #define SV_CENABLE_PE      0x1
285
286
287 /* MIDI buffer sizes */
288
289 #define MIDIINBUF  256
290 #define MIDIOUTBUF 256
291
292 #define FMODE_MIDI_SHIFT 2
293 #define FMODE_MIDI_READ  (FMODE_READ << FMODE_MIDI_SHIFT)
294 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
295
296 #define FMODE_DMFM 0x10
297
298 /* --------------------------------------------------------------------- */
299
300 struct sv_state {
301         /* magic */
302         unsigned int magic;
303
304         /* list of sonicvibes devices */
305         struct list_head devs;
306
307         /* the corresponding pci_dev structure */
308         struct pci_dev *dev;
309
310         /* soundcore stuff */
311         int dev_audio;
312         int dev_mixer;
313         int dev_midi;
314         int dev_dmfm;
315
316         /* hardware resources */
317         unsigned long iosb, ioenh, iosynth, iomidi;  /* long for SPARC */
318         unsigned int iodmaa, iodmac, irq;
319
320         /* mixer stuff */
321         struct {
322                 unsigned int modcnt;
323 #ifndef OSS_DOCUMENTED_MIXER_SEMANTICS
324                 unsigned short vol[13];
325 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
326         } mix;
327
328         /* wave stuff */
329         unsigned int rateadc, ratedac;
330         unsigned char fmt, enable;
331
332         spinlock_t lock;
333         struct mutex open_mutex;
334         mode_t open_mode;
335         wait_queue_head_t open_wait;
336
337         struct dmabuf {
338                 void *rawbuf;
339                 dma_addr_t dmaaddr;
340                 unsigned buforder;
341                 unsigned numfrag;
342                 unsigned fragshift;
343                 unsigned hwptr, swptr;
344                 unsigned total_bytes;
345                 int count;
346                 unsigned error; /* over/underrun */
347                 wait_queue_head_t wait;
348                 /* redundant, but makes calculations easier */
349                 unsigned fragsize;
350                 unsigned dmasize;
351                 unsigned fragsamples;
352                 /* OSS stuff */
353                 unsigned mapped:1;
354                 unsigned ready:1;
355                 unsigned endcleared:1;
356                 unsigned enabled:1;
357                 unsigned ossfragshift;
358                 int ossmaxfrags;
359                 unsigned subdivision;
360         } dma_dac, dma_adc;
361
362         /* midi stuff */
363         struct {
364                 unsigned ird, iwr, icnt;
365                 unsigned ord, owr, ocnt;
366                 wait_queue_head_t iwait;
367                 wait_queue_head_t owait;
368                 struct timer_list timer;
369                 unsigned char ibuf[MIDIINBUF];
370                 unsigned char obuf[MIDIOUTBUF];
371         } midi;
372
373 #if SUPPORT_JOYSTICK
374         struct gameport *gameport;
375 #endif
376 };
377
378 /* --------------------------------------------------------------------- */
379
380 static LIST_HEAD(devs);
381 static unsigned long wavetable_mem;
382
383 /* --------------------------------------------------------------------- */
384
385 static inline unsigned ld2(unsigned int x)
386 {
387         unsigned r = 0;
388         
389         if (x >= 0x10000) {
390                 x >>= 16;
391                 r += 16;
392         }
393         if (x >= 0x100) {
394                 x >>= 8;
395                 r += 8;
396         }
397         if (x >= 0x10) {
398                 x >>= 4;
399                 r += 4;
400         }
401         if (x >= 4) {
402                 x >>= 2;
403                 r += 2;
404         }
405         if (x >= 2)
406                 r++;
407         return r;
408 }
409
410 /* --------------------------------------------------------------------- */
411
412 /*
413  * Why use byte IO? Nobody knows, but S3 does it also in their Windows driver.
414  */
415
416 #undef DMABYTEIO
417
418 static void set_dmaa(struct sv_state *s, unsigned int addr, unsigned int count)
419 {
420 #ifdef DMABYTEIO
421         unsigned io = s->iodmaa, u;
422
423         count--;
424         for (u = 4; u > 0; u--, addr >>= 8, io++)
425                 outb(addr & 0xff, io);
426         for (u = 3; u > 0; u--, count >>= 8, io++)
427                 outb(count & 0xff, io);
428 #else /* DMABYTEIO */
429         count--;
430         outl(addr, s->iodmaa + SV_DMA_ADDR0);
431         outl(count, s->iodmaa + SV_DMA_COUNT0);
432 #endif /* DMABYTEIO */
433         outb(0x18, s->iodmaa + SV_DMA_MODE);
434 }
435
436 static void set_dmac(struct sv_state *s, unsigned int addr, unsigned int count)
437 {
438 #ifdef DMABYTEIO
439         unsigned io = s->iodmac, u;
440
441         count >>= 1;
442         count--;
443         for (u = 4; u > 0; u--, addr >>= 8, io++)
444                 outb(addr & 0xff, io);
445         for (u = 3; u > 0; u--, count >>= 8, io++)
446                 outb(count & 0xff, io);
447 #else /* DMABYTEIO */
448         count >>= 1;
449         count--;
450         outl(addr, s->iodmac + SV_DMA_ADDR0);
451         outl(count, s->iodmac + SV_DMA_COUNT0);
452 #endif /* DMABYTEIO */
453         outb(0x14, s->iodmac + SV_DMA_MODE);
454 }
455
456 static inline unsigned get_dmaa(struct sv_state *s)
457 {
458 #ifdef DMABYTEIO
459         unsigned io = s->iodmaa+6, v = 0, u;
460
461         for (u = 3; u > 0; u--, io--) {
462                 v <<= 8;
463                 v |= inb(io);
464         }
465         return v + 1;
466 #else /* DMABYTEIO */
467         return (inl(s->iodmaa + SV_DMA_COUNT0) & 0xffffff) + 1;
468 #endif /* DMABYTEIO */
469 }
470
471 static inline unsigned get_dmac(struct sv_state *s)
472 {
473 #ifdef DMABYTEIO
474         unsigned io = s->iodmac+6, v = 0, u;
475
476         for (u = 3; u > 0; u--, io--) {
477                 v <<= 8;
478                 v |= inb(io);
479         }
480         return (v + 1) << 1;
481 #else /* DMABYTEIO */
482         return ((inl(s->iodmac + SV_DMA_COUNT0) & 0xffffff) + 1) << 1;
483 #endif /* DMABYTEIO */
484 }
485
486 static void wrindir(struct sv_state *s, unsigned char idx, unsigned char data)
487 {
488         outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
489         udelay(10);
490         outb(data, s->ioenh + SV_CODEC_IDATA);
491         udelay(10);
492 }
493
494 static unsigned char rdindir(struct sv_state *s, unsigned char idx)
495 {
496         unsigned char v;
497
498         outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
499         udelay(10);
500         v = inb(s->ioenh + SV_CODEC_IDATA);
501         udelay(10);
502         return v;
503 }
504
505 static void set_fmt(struct sv_state *s, unsigned char mask, unsigned char data)
506 {
507         unsigned long flags;
508
509         spin_lock_irqsave(&s->lock, flags);
510         outb(SV_CIDATAFMT | SV_CIADDR_MCE, s->ioenh + SV_CODEC_IADDR);
511         if (mask) {
512                 s->fmt = inb(s->ioenh + SV_CODEC_IDATA);
513                 udelay(10);
514         }
515         s->fmt = (s->fmt & mask) | data;
516         outb(s->fmt, s->ioenh + SV_CODEC_IDATA);
517         udelay(10);
518         outb(0, s->ioenh + SV_CODEC_IADDR);
519         spin_unlock_irqrestore(&s->lock, flags);
520         udelay(10);
521 }
522
523 static void frobindir(struct sv_state *s, unsigned char idx, unsigned char mask, unsigned char data)
524 {
525         outb(idx & 0x3f, s->ioenh + SV_CODEC_IADDR);
526         udelay(10);
527         outb((inb(s->ioenh + SV_CODEC_IDATA) & mask) ^ data, s->ioenh + SV_CODEC_IDATA);
528         udelay(10);
529 }
530
531 #define REFFREQUENCY  24576000
532 #define ADCMULT 512
533 #define FULLRATE 48000
534
535 static unsigned setpll(struct sv_state *s, unsigned char reg, unsigned rate)
536 {
537         unsigned long flags;
538         unsigned char r, m=0, n=0;
539         unsigned xm, xn, xr, xd, metric = ~0U;
540         /* the warnings about m and n used uninitialized are bogus and may safely be ignored */
541
542         if (rate < 625000/ADCMULT)
543                 rate = 625000/ADCMULT;
544         if (rate > 150000000/ADCMULT)
545                 rate = 150000000/ADCMULT;
546         /* slight violation of specs, needed for continuous sampling rates */
547         for (r = 0; rate < 75000000/ADCMULT; r += 0x20, rate <<= 1);
548         for (xn = 3; xn < 35; xn++)
549                 for (xm = 3; xm < 130; xm++) {
550                         xr = REFFREQUENCY/ADCMULT * xm / xn;
551                         xd = abs((signed)(xr - rate));
552                         if (xd < metric) {
553                                 metric = xd;
554                                 m = xm - 2;
555                                 n = xn - 2;
556                         }
557                 }
558         reg &= 0x3f;
559         spin_lock_irqsave(&s->lock, flags);
560         outb(reg, s->ioenh + SV_CODEC_IADDR);
561         udelay(10);
562         outb(m, s->ioenh + SV_CODEC_IDATA);
563         udelay(10);
564         outb(reg+1, s->ioenh + SV_CODEC_IADDR);
565         udelay(10);
566         outb(r | n, s->ioenh + SV_CODEC_IDATA);
567         spin_unlock_irqrestore(&s->lock, flags);
568         udelay(10);
569         return (REFFREQUENCY/ADCMULT * (m + 2) / (n + 2)) >> ((r >> 5) & 7);
570 }
571
572 #if 0
573
574 static unsigned getpll(struct sv_state *s, unsigned char reg)
575 {
576         unsigned long flags;
577         unsigned char m, n;
578
579         reg &= 0x3f;
580         spin_lock_irqsave(&s->lock, flags);
581         outb(reg, s->ioenh + SV_CODEC_IADDR);
582         udelay(10);
583         m = inb(s->ioenh + SV_CODEC_IDATA);
584         udelay(10);
585         outb(reg+1, s->ioenh + SV_CODEC_IADDR);
586         udelay(10);
587         n = inb(s->ioenh + SV_CODEC_IDATA);
588         spin_unlock_irqrestore(&s->lock, flags);
589         udelay(10);
590         return (REFFREQUENCY/ADCMULT * (m + 2) / ((n & 0x1f) + 2)) >> ((n >> 5) & 7);
591 }
592
593 #endif
594
595 static void set_dac_rate(struct sv_state *s, unsigned rate)
596 {
597         unsigned div;
598         unsigned long flags;
599
600         if (rate > 48000)
601                 rate = 48000;
602         if (rate < 4000)
603                 rate = 4000;
604         div = (rate * 65536 + FULLRATE/2) / FULLRATE;
605         if (div > 65535)
606                 div = 65535;
607         spin_lock_irqsave(&s->lock, flags);
608         wrindir(s, SV_CIPCMSR1, div >> 8);
609         wrindir(s, SV_CIPCMSR0, div);
610         spin_unlock_irqrestore(&s->lock, flags);
611         s->ratedac = (div * FULLRATE + 32768) / 65536;
612 }
613
614 static void set_adc_rate(struct sv_state *s, unsigned rate)
615 {
616         unsigned long flags;
617         unsigned rate1, rate2, div;
618
619         if (rate > 48000)
620                 rate = 48000;
621         if (rate < 4000)
622                 rate = 4000;
623         rate1 = setpll(s, SV_CIADCPLLM, rate);
624         div = (48000 + rate/2) / rate;
625         if (div > 8)
626                 div = 8;
627         rate2 = (48000 + div/2) / div;
628         spin_lock_irqsave(&s->lock, flags);
629         wrindir(s, SV_CIADCALTSR, (div-1) << 4);
630         if (abs((signed)(rate-rate2)) <= abs((signed)(rate-rate1))) {
631                 wrindir(s, SV_CIADCCLKSOURCE, 0x10);
632                 s->rateadc = rate2;
633         } else {
634                 wrindir(s, SV_CIADCCLKSOURCE, 0x00);
635                 s->rateadc = rate1;
636         }
637         spin_unlock_irqrestore(&s->lock, flags);
638 }
639
640 /* --------------------------------------------------------------------- */
641
642 static inline void stop_adc(struct sv_state *s)
643 {
644         unsigned long flags;
645
646         spin_lock_irqsave(&s->lock, flags);
647         s->enable &= ~SV_CENABLE_RE;
648         wrindir(s, SV_CIENABLE, s->enable);
649         spin_unlock_irqrestore(&s->lock, flags);
650 }       
651
652 static inline void stop_dac(struct sv_state *s)
653 {
654         unsigned long flags;
655
656         spin_lock_irqsave(&s->lock, flags);
657         s->enable &= ~(SV_CENABLE_PPE | SV_CENABLE_PE);
658         wrindir(s, SV_CIENABLE, s->enable);
659         spin_unlock_irqrestore(&s->lock, flags);
660 }       
661
662 static void start_dac(struct sv_state *s)
663 {
664         unsigned long flags;
665
666         spin_lock_irqsave(&s->lock, flags);
667         if ((s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
668                 s->enable = (s->enable & ~SV_CENABLE_PPE) | SV_CENABLE_PE;
669                 wrindir(s, SV_CIENABLE, s->enable);
670         }
671         spin_unlock_irqrestore(&s->lock, flags);
672 }       
673
674 static void start_adc(struct sv_state *s)
675 {
676         unsigned long flags;
677
678         spin_lock_irqsave(&s->lock, flags);
679         if ((s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize)) 
680             && s->dma_adc.ready) {
681                 s->enable |= SV_CENABLE_RE;
682                 wrindir(s, SV_CIENABLE, s->enable);
683         }
684         spin_unlock_irqrestore(&s->lock, flags);
685 }       
686
687 /* --------------------------------------------------------------------- */
688
689 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
690 #define DMABUF_MINORDER 1
691
692 static void dealloc_dmabuf(struct sv_state *s, struct dmabuf *db)
693 {
694         struct page *page, *pend;
695
696         if (db->rawbuf) {
697                 /* undo marking the pages as reserved */
698                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
699                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
700                         ClearPageReserved(page);
701                 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
702         }
703         db->rawbuf = NULL;
704         db->mapped = db->ready = 0;
705 }
706
707
708 /* DMAA is used for playback, DMAC is used for recording */
709
710 static int prog_dmabuf(struct sv_state *s, unsigned rec)
711 {
712         struct dmabuf *db = rec ? &s->dma_adc : &s->dma_dac;
713         unsigned rate = rec ? s->rateadc : s->ratedac;
714         int order;
715         unsigned bytepersec;
716         unsigned bufs;
717         struct page *page, *pend;
718         unsigned char fmt;
719         unsigned long flags;
720
721         spin_lock_irqsave(&s->lock, flags);
722         fmt = s->fmt;
723         if (rec) {
724                 s->enable &= ~SV_CENABLE_RE;
725                 fmt >>= SV_CFMT_CSHIFT;
726         } else {
727                 s->enable &= ~SV_CENABLE_PE;
728                 fmt >>= SV_CFMT_ASHIFT;
729         }
730         wrindir(s, SV_CIENABLE, s->enable);
731         spin_unlock_irqrestore(&s->lock, flags);
732         fmt &= SV_CFMT_MASK;
733         db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
734         if (!db->rawbuf) {
735                 db->ready = db->mapped = 0;
736                 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
737                         if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
738                                 break;
739                 if (!db->rawbuf)
740                         return -ENOMEM;
741                 db->buforder = order;
742                 if ((virt_to_bus(db->rawbuf) ^ (virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1)) & ~0xffff)
743                         printk(KERN_DEBUG "sv: DMA buffer crosses 64k boundary: busaddr 0x%lx  size %ld\n", 
744                                virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
745                 if ((virt_to_bus(db->rawbuf) + (PAGE_SIZE << db->buforder) - 1) & ~0xffffff)
746                         printk(KERN_DEBUG "sv: DMA buffer beyond 16MB: busaddr 0x%lx  size %ld\n", 
747                                virt_to_bus(db->rawbuf), PAGE_SIZE << db->buforder);
748                 /* now mark the pages as reserved; otherwise remap_pfn_range doesn't do what we want */
749                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
750                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
751                         SetPageReserved(page);
752         }
753         bytepersec = rate << sample_shift[fmt];
754         bufs = PAGE_SIZE << db->buforder;
755         if (db->ossfragshift) {
756                 if ((1000 << db->ossfragshift) < bytepersec)
757                         db->fragshift = ld2(bytepersec/1000);
758                 else
759                         db->fragshift = db->ossfragshift;
760         } else {
761                 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
762                 if (db->fragshift < 3)
763                         db->fragshift = 3;
764         }
765         db->numfrag = bufs >> db->fragshift;
766         while (db->numfrag < 4 && db->fragshift > 3) {
767                 db->fragshift--;
768                 db->numfrag = bufs >> db->fragshift;
769         }
770         db->fragsize = 1 << db->fragshift;
771         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
772                 db->numfrag = db->ossmaxfrags;
773         db->fragsamples = db->fragsize >> sample_shift[fmt];
774         db->dmasize = db->numfrag << db->fragshift;
775         memset(db->rawbuf, (fmt & SV_CFMT_16BIT) ? 0 : 0x80, db->dmasize);
776         spin_lock_irqsave(&s->lock, flags);
777         if (rec) {
778                 set_dmac(s, db->dmaaddr, db->numfrag << db->fragshift);
779                 /* program enhanced mode registers */
780                 wrindir(s, SV_CIDMACBASECOUNT1, (db->fragsamples-1) >> 8);
781                 wrindir(s, SV_CIDMACBASECOUNT0, db->fragsamples-1);
782         } else {
783                 set_dmaa(s, db->dmaaddr, db->numfrag << db->fragshift);
784                 /* program enhanced mode registers */
785                 wrindir(s, SV_CIDMAABASECOUNT1, (db->fragsamples-1) >> 8);
786                 wrindir(s, SV_CIDMAABASECOUNT0, db->fragsamples-1);
787         }
788         spin_unlock_irqrestore(&s->lock, flags);
789         db->enabled = 1;
790         db->ready = 1;
791         return 0;
792 }
793
794 static inline void clear_advance(struct sv_state *s)
795 {
796         unsigned char c = (s->fmt & (SV_CFMT_16BIT << SV_CFMT_ASHIFT)) ? 0 : 0x80;
797         unsigned char *buf = s->dma_dac.rawbuf;
798         unsigned bsize = s->dma_dac.dmasize;
799         unsigned bptr = s->dma_dac.swptr;
800         unsigned len = s->dma_dac.fragsize;
801
802         if (bptr + len > bsize) {
803                 unsigned x = bsize - bptr;
804                 memset(buf + bptr, c, x);
805                 bptr = 0;
806                 len -= x;
807         }
808         memset(buf + bptr, c, len);
809 }
810
811 /* call with spinlock held! */
812 static void sv_update_ptr(struct sv_state *s)
813 {
814         unsigned hwptr;
815         int diff;
816
817         /* update ADC pointer */
818         if (s->dma_adc.ready) {
819                 hwptr = (s->dma_adc.dmasize - get_dmac(s)) % s->dma_adc.dmasize;
820                 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
821                 s->dma_adc.hwptr = hwptr;
822                 s->dma_adc.total_bytes += diff;
823                 s->dma_adc.count += diff;
824                 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize) 
825                         wake_up(&s->dma_adc.wait);
826                 if (!s->dma_adc.mapped) {
827                         if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
828                                 s->enable &= ~SV_CENABLE_RE;
829                                 wrindir(s, SV_CIENABLE, s->enable);
830                                 s->dma_adc.error++;
831                         }
832                 }
833         }
834         /* update DAC pointer */
835         if (s->dma_dac.ready) {
836                 hwptr = (s->dma_dac.dmasize - get_dmaa(s)) % s->dma_dac.dmasize;
837                 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
838                 s->dma_dac.hwptr = hwptr;
839                 s->dma_dac.total_bytes += diff;
840                 if (s->dma_dac.mapped) {
841                         s->dma_dac.count += diff;
842                         if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
843                                 wake_up(&s->dma_dac.wait);
844                 } else {
845                         s->dma_dac.count -= diff;
846                         if (s->dma_dac.count <= 0) {
847                                 s->enable &= ~SV_CENABLE_PE;
848                                 wrindir(s, SV_CIENABLE, s->enable);
849                                 s->dma_dac.error++;
850                         } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
851                                 clear_advance(s);
852                                 s->dma_dac.endcleared = 1;
853                         }
854                         if (s->dma_dac.count + (signed)s->dma_dac.fragsize <= (signed)s->dma_dac.dmasize)
855                                 wake_up(&s->dma_dac.wait);
856                 }
857         }
858 }
859
860 /* hold spinlock for the following! */
861 static void sv_handle_midi(struct sv_state *s)
862 {
863         unsigned char ch;
864         int wake;
865
866         wake = 0;
867         while (!(inb(s->iomidi+1) & 0x80)) {
868                 ch = inb(s->iomidi);
869                 if (s->midi.icnt < MIDIINBUF) {
870                         s->midi.ibuf[s->midi.iwr] = ch;
871                         s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
872                         s->midi.icnt++;
873                 }
874                 wake = 1;
875         }
876         if (wake)
877                 wake_up(&s->midi.iwait);
878         wake = 0;
879         while (!(inb(s->iomidi+1) & 0x40) && s->midi.ocnt > 0) {
880                 outb(s->midi.obuf[s->midi.ord], s->iomidi);
881                 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
882                 s->midi.ocnt--;
883                 if (s->midi.ocnt < MIDIOUTBUF-16)
884                         wake = 1;
885         }
886         if (wake)
887                 wake_up(&s->midi.owait);
888 }
889
890 static irqreturn_t sv_interrupt(int irq, void *dev_id, struct pt_regs *regs)
891 {
892         struct sv_state *s = (struct sv_state *)dev_id;
893         unsigned int intsrc;
894         
895         /* fastpath out, to ease interrupt sharing */
896         intsrc = inb(s->ioenh + SV_CODEC_STATUS);
897         if (!(intsrc & (SV_CSTAT_DMAA | SV_CSTAT_DMAC | SV_CSTAT_MIDI)))
898                 return IRQ_NONE;
899         spin_lock(&s->lock);
900         sv_update_ptr(s);
901         sv_handle_midi(s);
902         spin_unlock(&s->lock);
903         return IRQ_HANDLED;
904 }
905
906 static void sv_midi_timer(unsigned long data)
907 {
908         struct sv_state *s = (struct sv_state *)data;
909         unsigned long flags;
910         
911         spin_lock_irqsave(&s->lock, flags);
912         sv_handle_midi(s);
913         spin_unlock_irqrestore(&s->lock, flags);
914         s->midi.timer.expires = jiffies+1;
915         add_timer(&s->midi.timer);
916 }
917
918 /* --------------------------------------------------------------------- */
919
920 static const char invalid_magic[] = KERN_CRIT "sv: invalid magic value\n";
921
922 #define VALIDATE_STATE(s)                         \
923 ({                                                \
924         if (!(s) || (s)->magic != SV_MAGIC) { \
925                 printk(invalid_magic);            \
926                 return -ENXIO;                    \
927         }                                         \
928 })
929
930 /* --------------------------------------------------------------------- */
931
932 #define MT_4          1
933 #define MT_5MUTE      2
934 #define MT_4MUTEMONO  3
935 #define MT_6MUTE      4
936
937 static const struct {
938         unsigned left:5;
939         unsigned right:5;
940         unsigned type:3;
941         unsigned rec:3;
942 } mixtable[SOUND_MIXER_NRDEVICES] = {
943         [SOUND_MIXER_RECLEV] = { SV_CIMIX_ADCINL,    SV_CIMIX_ADCINR,    MT_4,         0 },
944         [SOUND_MIXER_LINE1]  = { SV_CIMIX_AUX1INL,   SV_CIMIX_AUX1INR,   MT_5MUTE,     5 },
945         [SOUND_MIXER_CD]     = { SV_CIMIX_CDINL,     SV_CIMIX_CDINR,     MT_5MUTE,     1 },
946         [SOUND_MIXER_LINE]   = { SV_CIMIX_LINEINL,   SV_CIMIX_LINEINR,   MT_5MUTE,     4 },
947         [SOUND_MIXER_MIC]    = { SV_CIMIX_MICIN,     SV_CIMIX_ADCINL,    MT_4MUTEMONO, 6 },
948         [SOUND_MIXER_SYNTH]  = { SV_CIMIX_SYNTHINL,  SV_CIMIX_SYNTHINR,  MT_5MUTE,     2 },
949         [SOUND_MIXER_LINE2]  = { SV_CIMIX_AUX2INL,   SV_CIMIX_AUX2INR,   MT_5MUTE,     3 },
950         [SOUND_MIXER_VOLUME] = { SV_CIMIX_ANALOGINL, SV_CIMIX_ANALOGINR, MT_5MUTE,     7 },
951         [SOUND_MIXER_PCM]    = { SV_CIMIX_PCMINL,    SV_CIMIX_PCMINR,    MT_6MUTE,     0 }
952 };
953
954 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
955
956 static int return_mixval(struct sv_state *s, unsigned i, int *arg)
957 {
958         unsigned long flags;
959         unsigned char l, r, rl, rr;
960
961         spin_lock_irqsave(&s->lock, flags);
962         l = rdindir(s, mixtable[i].left);
963         r = rdindir(s, mixtable[i].right);
964         spin_unlock_irqrestore(&s->lock, flags);
965         switch (mixtable[i].type) {
966         case MT_4:
967                 r &= 0xf;
968                 l &= 0xf;
969                 rl = 10 + 6 * (l & 15);
970                 rr = 10 + 6 * (r & 15);
971                 break;
972
973         case MT_4MUTEMONO:
974                 rl = 55 - 3 * (l & 15);
975                 if (r & 0x10)
976                         rl += 45;
977                 rr = rl;
978                 r = l;
979                 break;
980
981         case MT_5MUTE:
982         default:
983                 rl = 100 - 3 * (l & 31);
984                 rr = 100 - 3 * (r & 31);
985                 break;
986                                 
987         case MT_6MUTE:
988                 rl = 100 - 3 * (l & 63) / 2;
989                 rr = 100 - 3 * (r & 63) / 2;
990                 break;
991         }
992         if (l & 0x80)
993                 rl = 0;
994         if (r & 0x80)
995                 rr = 0;
996         return put_user((rr << 8) | rl, arg);
997 }
998
999 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1000
1001 static const unsigned char volidx[SOUND_MIXER_NRDEVICES] = 
1002 {
1003         [SOUND_MIXER_RECLEV] = 1,
1004         [SOUND_MIXER_LINE1]  = 2,
1005         [SOUND_MIXER_CD]     = 3,
1006         [SOUND_MIXER_LINE]   = 4,
1007         [SOUND_MIXER_MIC]    = 5,
1008         [SOUND_MIXER_SYNTH]  = 6,
1009         [SOUND_MIXER_LINE2]  = 7,
1010         [SOUND_MIXER_VOLUME] = 8,
1011         [SOUND_MIXER_PCM]    = 9
1012 };
1013
1014 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1015
1016 static unsigned mixer_recmask(struct sv_state *s)
1017 {
1018         unsigned long flags;
1019         int i, j;
1020
1021         spin_lock_irqsave(&s->lock, flags);
1022         j = rdindir(s, SV_CIMIX_ADCINL) >> 5;
1023         spin_unlock_irqrestore(&s->lock, flags);
1024         j &= 7;
1025         for (i = 0; i < SOUND_MIXER_NRDEVICES && mixtable[i].rec != j; i++);
1026         return 1 << i;
1027 }
1028
1029 static int mixer_ioctl(struct sv_state *s, unsigned int cmd, unsigned long arg)
1030 {
1031         unsigned long flags;
1032         int i, val;
1033         unsigned char l, r, rl, rr;
1034         int __user *p = (int __user *)arg;
1035
1036         VALIDATE_STATE(s);
1037         if (cmd == SOUND_MIXER_INFO) {
1038                 mixer_info info;
1039                 memset(&info, 0, sizeof(info));
1040                 strlcpy(info.id, "SonicVibes", sizeof(info.id));
1041                 strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
1042                 info.modify_counter = s->mix.modcnt;
1043                 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
1044                         return -EFAULT;
1045                 return 0;
1046         }
1047         if (cmd == SOUND_OLD_MIXER_INFO) {
1048                 _old_mixer_info info;
1049                 memset(&info, 0, sizeof(info));
1050                 strlcpy(info.id, "SonicVibes", sizeof(info.id));
1051                 strlcpy(info.name, "S3 SonicVibes", sizeof(info.name));
1052                 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
1053                         return -EFAULT;
1054                 return 0;
1055         }
1056         if (cmd == OSS_GETVERSION)
1057                 return put_user(SOUND_VERSION, p);
1058         if (cmd == SOUND_MIXER_PRIVATE1) {  /* SRS settings */
1059                 if (get_user(val, p))
1060                         return -EFAULT;
1061                 spin_lock_irqsave(&s->lock, flags);
1062                 if (val & 1) {
1063                         if (val & 2) {
1064                                 l = 4 - ((val >> 2) & 7);
1065                                 if (l & ~3)
1066                                         l = 4;
1067                                 r = 4 - ((val >> 5) & 7);
1068                                 if (r & ~3)
1069                                         r = 4;
1070                                 wrindir(s, SV_CISRSSPACE, l);
1071                                 wrindir(s, SV_CISRSCENTER, r);
1072                         } else
1073                                 wrindir(s, SV_CISRSSPACE, 0x80);
1074                 }
1075                 l = rdindir(s, SV_CISRSSPACE);
1076                 r = rdindir(s, SV_CISRSCENTER);
1077                 spin_unlock_irqrestore(&s->lock, flags);
1078                 if (l & 0x80)
1079                         return put_user(0, p);
1080                 return put_user(((4 - (l & 7)) << 2) | ((4 - (r & 7)) << 5) | 2, p);
1081         }
1082         if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
1083                 return -EINVAL;
1084         if (_SIOC_DIR(cmd) == _SIOC_READ) {
1085                 switch (_IOC_NR(cmd)) {
1086                 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1087                         return put_user(mixer_recmask(s), p);
1088                         
1089                 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
1090                         for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1091                                 if (mixtable[i].type)
1092                                         val |= 1 << i;
1093                         return put_user(val, p);
1094
1095                 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
1096                         for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1097                                 if (mixtable[i].rec)
1098                                         val |= 1 << i;
1099                         return put_user(val, p);
1100                         
1101                 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
1102                         for (val = i = 0; i < SOUND_MIXER_NRDEVICES; i++)
1103                                 if (mixtable[i].type && mixtable[i].type != MT_4MUTEMONO)
1104                                         val |= 1 << i;
1105                         return put_user(val, p);
1106                         
1107                 case SOUND_MIXER_CAPS:
1108                         return put_user(SOUND_CAP_EXCL_INPUT, p);
1109
1110                 default:
1111                         i = _IOC_NR(cmd);
1112                         if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1113                                 return -EINVAL;
1114 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1115                         return return_mixval(s, i, p);
1116 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1117                         if (!volidx[i])
1118                                 return -EINVAL;
1119                         return put_user(s->mix.vol[volidx[i]-1], p);
1120 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1121                 }
1122         }
1123         if (_SIOC_DIR(cmd) != (_SIOC_READ|_SIOC_WRITE)) 
1124                 return -EINVAL;
1125         s->mix.modcnt++;
1126         switch (_IOC_NR(cmd)) {
1127         case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
1128                 if (get_user(val, p))
1129                         return -EFAULT;
1130                 i = hweight32(val);
1131                 if (i == 0)
1132                         return 0; /*val = mixer_recmask(s);*/
1133                 else if (i > 1) 
1134                         val &= ~mixer_recmask(s);
1135                 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1136                         if (!(val & (1 << i)))
1137                                 continue;
1138                         if (mixtable[i].rec)
1139                                 break;
1140                 }
1141                 if (i == SOUND_MIXER_NRDEVICES)
1142                         return 0;
1143                 spin_lock_irqsave(&s->lock, flags);
1144                 frobindir(s, SV_CIMIX_ADCINL, 0x1f, mixtable[i].rec << 5);
1145                 frobindir(s, SV_CIMIX_ADCINR, 0x1f, mixtable[i].rec << 5);
1146                 spin_unlock_irqrestore(&s->lock, flags);
1147                 return 0;
1148
1149         default:
1150                 i = _IOC_NR(cmd);
1151                 if (i >= SOUND_MIXER_NRDEVICES || !mixtable[i].type)
1152                         return -EINVAL;
1153                 if (get_user(val, p))
1154                         return -EFAULT;
1155                 l = val & 0xff;
1156                 r = (val >> 8) & 0xff;
1157                 if (mixtable[i].type == MT_4MUTEMONO)
1158                         l = (r + l) / 2;
1159                 if (l > 100)
1160                         l = 100;
1161                 if (r > 100)
1162                         r = 100;
1163                 spin_lock_irqsave(&s->lock, flags);
1164                 switch (mixtable[i].type) {
1165                 case MT_4:
1166                         if (l >= 10)
1167                                 l -= 10;
1168                         if (r >= 10)
1169                                 r -= 10;
1170                         frobindir(s, mixtable[i].left, 0xf0, l / 6);
1171                         frobindir(s, mixtable[i].right, 0xf0, l / 6);
1172                         break;
1173
1174                 case MT_4MUTEMONO:
1175                         rr = 0;
1176                         if (l < 10)
1177                                 rl = 0x80;
1178                         else {
1179                                 if (l >= 55) {
1180                                         rr = 0x10;
1181                                         l -= 45;
1182                                 }
1183                                 rl = (55 - l) / 3;
1184                         }
1185                         wrindir(s, mixtable[i].left, rl);
1186                         frobindir(s, mixtable[i].right, ~0x10, rr);
1187                         break;
1188                         
1189                 case MT_5MUTE:
1190                         if (l < 7)
1191                                 rl = 0x80;
1192                         else
1193                                 rl = (100 - l) / 3;
1194                         if (r < 7)
1195                                 rr = 0x80;
1196                         else
1197                                 rr = (100 - r) / 3;
1198                         wrindir(s, mixtable[i].left, rl);
1199                         wrindir(s, mixtable[i].right, rr);
1200                         break;
1201                                 
1202                 case MT_6MUTE:
1203                         if (l < 6)
1204                                 rl = 0x80;
1205                         else
1206                                 rl = (100 - l) * 2 / 3;
1207                         if (r < 6)
1208                                 rr = 0x80;
1209                         else
1210                                 rr = (100 - r) * 2 / 3;
1211                         wrindir(s, mixtable[i].left, rl);
1212                         wrindir(s, mixtable[i].right, rr);
1213                         break;
1214                 }
1215                 spin_unlock_irqrestore(&s->lock, flags);
1216 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
1217                 return return_mixval(s, i, p);
1218 #else /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1219                 if (!volidx[i])
1220                         return -EINVAL;
1221                 s->mix.vol[volidx[i]-1] = val;
1222                 return put_user(s->mix.vol[volidx[i]-1], p);
1223 #endif /* OSS_DOCUMENTED_MIXER_SEMANTICS */
1224         }
1225 }
1226
1227 /* --------------------------------------------------------------------- */
1228
1229 static int sv_open_mixdev(struct inode *inode, struct file *file)
1230 {
1231         int minor = iminor(inode);
1232         struct list_head *list;
1233         struct sv_state *s;
1234
1235         for (list = devs.next; ; list = list->next) {
1236                 if (list == &devs)
1237                         return -ENODEV;
1238                 s = list_entry(list, struct sv_state, devs);
1239                 if (s->dev_mixer == minor)
1240                         break;
1241         }
1242         VALIDATE_STATE(s);
1243         file->private_data = s;
1244         return nonseekable_open(inode, file);
1245 }
1246
1247 static int sv_release_mixdev(struct inode *inode, struct file *file)
1248 {
1249         struct sv_state *s = (struct sv_state *)file->private_data;
1250         
1251         VALIDATE_STATE(s);
1252         return 0;
1253 }
1254
1255 static int sv_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1256 {
1257         return mixer_ioctl((struct sv_state *)file->private_data, cmd, arg);
1258 }
1259
1260 static /*const*/ struct file_operations sv_mixer_fops = {
1261         .owner          = THIS_MODULE,
1262         .llseek         = no_llseek,
1263         .ioctl          = sv_ioctl_mixdev,
1264         .open           = sv_open_mixdev,
1265         .release        = sv_release_mixdev,
1266 };
1267
1268 /* --------------------------------------------------------------------- */
1269
1270 static int drain_dac(struct sv_state *s, int nonblock)
1271 {
1272         DECLARE_WAITQUEUE(wait, current);
1273         unsigned long flags;
1274         int count, tmo;
1275
1276         if (s->dma_dac.mapped || !s->dma_dac.ready)
1277                 return 0;
1278         add_wait_queue(&s->dma_dac.wait, &wait);
1279         for (;;) {
1280                 __set_current_state(TASK_INTERRUPTIBLE);
1281                 spin_lock_irqsave(&s->lock, flags);
1282                 count = s->dma_dac.count;
1283                 spin_unlock_irqrestore(&s->lock, flags);
1284                 if (count <= 0)
1285                         break;
1286                 if (signal_pending(current))
1287                         break;
1288                 if (nonblock) {
1289                         remove_wait_queue(&s->dma_dac.wait, &wait);
1290                         set_current_state(TASK_RUNNING);
1291                         return -EBUSY;
1292                 }
1293                 tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->ratedac;
1294                 tmo >>= sample_shift[(s->fmt >> SV_CFMT_ASHIFT) & SV_CFMT_MASK];
1295                 if (!schedule_timeout(tmo + 1))
1296                         printk(KERN_DEBUG "sv: dma timed out??\n");
1297         }
1298         remove_wait_queue(&s->dma_dac.wait, &wait);
1299         set_current_state(TASK_RUNNING);
1300         if (signal_pending(current))
1301                 return -ERESTARTSYS;
1302         return 0;
1303 }
1304
1305 /* --------------------------------------------------------------------- */
1306
1307 static ssize_t sv_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1308 {
1309         struct sv_state *s = (struct sv_state *)file->private_data;
1310         DECLARE_WAITQUEUE(wait, current);
1311         ssize_t ret;
1312         unsigned long flags;
1313         unsigned swptr;
1314         int cnt;
1315
1316         VALIDATE_STATE(s);
1317         if (s->dma_adc.mapped)
1318                 return -ENXIO;
1319         if (!s->dma_adc.ready && (ret = prog_dmabuf(s, 1)))
1320                 return ret;
1321         if (!access_ok(VERIFY_WRITE, buffer, count))
1322                 return -EFAULT;
1323         ret = 0;
1324 #if 0
1325         spin_lock_irqsave(&s->lock, flags);
1326         sv_update_ptr(s);
1327         spin_unlock_irqrestore(&s->lock, flags);
1328 #endif
1329         add_wait_queue(&s->dma_adc.wait, &wait);
1330         while (count > 0) {
1331                 spin_lock_irqsave(&s->lock, flags);
1332                 swptr = s->dma_adc.swptr;
1333                 cnt = s->dma_adc.dmasize-swptr;
1334                 if (s->dma_adc.count < cnt)
1335                         cnt = s->dma_adc.count;
1336                 if (cnt <= 0)
1337                         __set_current_state(TASK_INTERRUPTIBLE);
1338                 spin_unlock_irqrestore(&s->lock, flags);
1339                 if (cnt > count)
1340                         cnt = count;
1341                 if (cnt <= 0) {
1342                         if (s->dma_adc.enabled)
1343                                 start_adc(s);
1344                         if (file->f_flags & O_NONBLOCK) {
1345                                 if (!ret)
1346                                         ret = -EAGAIN;
1347                                 break;
1348                         }
1349                         if (!schedule_timeout(HZ)) {
1350                                 printk(KERN_DEBUG "sv: read: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1351                                        s->dma_adc.dmasize, s->dma_adc.fragsize, s->dma_adc.count, 
1352                                        s->dma_adc.hwptr, s->dma_adc.swptr);
1353                                 stop_adc(s);
1354                                 spin_lock_irqsave(&s->lock, flags);
1355                                 set_dmac(s, virt_to_bus(s->dma_adc.rawbuf), s->dma_adc.numfrag << s->dma_adc.fragshift);
1356                                 /* program enhanced mode registers */
1357                                 wrindir(s, SV_CIDMACBASECOUNT1, (s->dma_adc.fragsamples-1) >> 8);
1358                                 wrindir(s, SV_CIDMACBASECOUNT0, s->dma_adc.fragsamples-1);
1359                                 s->dma_adc.count = s->dma_adc.hwptr = s->dma_adc.swptr = 0;
1360                                 spin_unlock_irqrestore(&s->lock, flags);
1361                         }
1362                         if (signal_pending(current)) {
1363                                 if (!ret)
1364                                         ret = -ERESTARTSYS;
1365                                 break;
1366                         }
1367                         continue;
1368                 }
1369                 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1370                         if (!ret)
1371                                 ret = -EFAULT;
1372                         break;
1373                 }
1374                 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1375                 spin_lock_irqsave(&s->lock, flags);
1376                 s->dma_adc.swptr = swptr;
1377                 s->dma_adc.count -= cnt;
1378                 spin_unlock_irqrestore(&s->lock, flags);
1379                 count -= cnt;
1380                 buffer += cnt;
1381                 ret += cnt;
1382                 if (s->dma_adc.enabled)
1383                         start_adc(s);
1384         }
1385         remove_wait_queue(&s->dma_adc.wait, &wait);
1386         set_current_state(TASK_RUNNING);
1387         return ret;
1388 }
1389
1390 static ssize_t sv_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1391 {
1392         struct sv_state *s = (struct sv_state *)file->private_data;
1393         DECLARE_WAITQUEUE(wait, current);
1394         ssize_t ret;
1395         unsigned long flags;
1396         unsigned swptr;
1397         int cnt;
1398
1399         VALIDATE_STATE(s);
1400         if (s->dma_dac.mapped)
1401                 return -ENXIO;
1402         if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1403                 return ret;
1404         if (!access_ok(VERIFY_READ, buffer, count))
1405                 return -EFAULT;
1406         ret = 0;
1407 #if 0
1408         spin_lock_irqsave(&s->lock, flags);
1409         sv_update_ptr(s);
1410         spin_unlock_irqrestore(&s->lock, flags);
1411 #endif
1412         add_wait_queue(&s->dma_dac.wait, &wait);
1413         while (count > 0) {
1414                 spin_lock_irqsave(&s->lock, flags);
1415                 if (s->dma_dac.count < 0) {
1416                         s->dma_dac.count = 0;
1417                         s->dma_dac.swptr = s->dma_dac.hwptr;
1418                 }
1419                 swptr = s->dma_dac.swptr;
1420                 cnt = s->dma_dac.dmasize-swptr;
1421                 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1422                         cnt = s->dma_dac.dmasize - s->dma_dac.count;
1423                 if (cnt <= 0)
1424                         __set_current_state(TASK_INTERRUPTIBLE);
1425                 spin_unlock_irqrestore(&s->lock, flags);
1426                 if (cnt > count)
1427                         cnt = count;
1428                 if (cnt <= 0) {
1429                         if (s->dma_dac.enabled)
1430                                 start_dac(s);
1431                         if (file->f_flags & O_NONBLOCK) {
1432                                 if (!ret)
1433                                         ret = -EAGAIN;
1434                                 break;
1435                         }
1436                         if (!schedule_timeout(HZ)) {
1437                                 printk(KERN_DEBUG "sv: write: chip lockup? dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1438                                        s->dma_dac.dmasize, s->dma_dac.fragsize, s->dma_dac.count, 
1439                                        s->dma_dac.hwptr, s->dma_dac.swptr);
1440                                 stop_dac(s);
1441                                 spin_lock_irqsave(&s->lock, flags);
1442                                 set_dmaa(s, virt_to_bus(s->dma_dac.rawbuf), s->dma_dac.numfrag << s->dma_dac.fragshift);
1443                                 /* program enhanced mode registers */
1444                                 wrindir(s, SV_CIDMAABASECOUNT1, (s->dma_dac.fragsamples-1) >> 8);
1445                                 wrindir(s, SV_CIDMAABASECOUNT0, s->dma_dac.fragsamples-1);
1446                                 s->dma_dac.count = s->dma_dac.hwptr = s->dma_dac.swptr = 0;
1447                                 spin_unlock_irqrestore(&s->lock, flags);
1448                         }
1449                         if (signal_pending(current)) {
1450                                 if (!ret)
1451                                         ret = -ERESTARTSYS;
1452                                 break;
1453                         }
1454                         continue;
1455                 }
1456                 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
1457                         if (!ret)
1458                                 ret = -EFAULT;
1459                         break;
1460                 }
1461                 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1462                 spin_lock_irqsave(&s->lock, flags);
1463                 s->dma_dac.swptr = swptr;
1464                 s->dma_dac.count += cnt;
1465                 s->dma_dac.endcleared = 0;
1466                 spin_unlock_irqrestore(&s->lock, flags);
1467                 count -= cnt;
1468                 buffer += cnt;
1469                 ret += cnt;
1470                 if (s->dma_dac.enabled)
1471                         start_dac(s);
1472         }
1473         remove_wait_queue(&s->dma_dac.wait, &wait);
1474         set_current_state(TASK_RUNNING);
1475         return ret;
1476 }
1477
1478 /* No kernel lock - we have our own spinlock */
1479 static unsigned int sv_poll(struct file *file, struct poll_table_struct *wait)
1480 {
1481         struct sv_state *s = (struct sv_state *)file->private_data;
1482         unsigned long flags;
1483         unsigned int mask = 0;
1484
1485         VALIDATE_STATE(s);
1486         if (file->f_mode & FMODE_WRITE) {
1487                 if (!s->dma_dac.ready && prog_dmabuf(s, 1))
1488                         return 0;
1489                 poll_wait(file, &s->dma_dac.wait, wait);
1490         }
1491         if (file->f_mode & FMODE_READ) {
1492                 if (!s->dma_adc.ready && prog_dmabuf(s, 0))
1493                         return 0;
1494                 poll_wait(file, &s->dma_adc.wait, wait);
1495         }
1496         spin_lock_irqsave(&s->lock, flags);
1497         sv_update_ptr(s);
1498         if (file->f_mode & FMODE_READ) {
1499                 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1500                         mask |= POLLIN | POLLRDNORM;
1501         }
1502         if (file->f_mode & FMODE_WRITE) {
1503                 if (s->dma_dac.mapped) {
1504                         if (s->dma_dac.count >= (signed)s->dma_dac.fragsize) 
1505                                 mask |= POLLOUT | POLLWRNORM;
1506                 } else {
1507                         if ((signed)s->dma_dac.dmasize >= s->dma_dac.count + (signed)s->dma_dac.fragsize)
1508                                 mask |= POLLOUT | POLLWRNORM;
1509                 }
1510         }
1511         spin_unlock_irqrestore(&s->lock, flags);
1512         return mask;
1513 }
1514
1515 static int sv_mmap(struct file *file, struct vm_area_struct *vma)
1516 {
1517         struct sv_state *s = (struct sv_state *)file->private_data;
1518         struct dmabuf *db;
1519         int ret = -EINVAL;
1520         unsigned long size;
1521
1522         VALIDATE_STATE(s);
1523         lock_kernel();
1524         if (vma->vm_flags & VM_WRITE) {
1525                 if ((ret = prog_dmabuf(s, 1)) != 0)
1526                         goto out;
1527                 db = &s->dma_dac;
1528         } else if (vma->vm_flags & VM_READ) {
1529                 if ((ret = prog_dmabuf(s, 0)) != 0)
1530                         goto out;
1531                 db = &s->dma_adc;
1532         } else 
1533                 goto out;
1534         ret = -EINVAL;
1535         if (vma->vm_pgoff != 0)
1536                 goto out;
1537         size = vma->vm_end - vma->vm_start;
1538         if (size > (PAGE_SIZE << db->buforder))
1539                 goto out;
1540         ret = -EAGAIN;
1541         if (remap_pfn_range(vma, vma->vm_start,
1542                                 virt_to_phys(db->rawbuf) >> PAGE_SHIFT,
1543                                 size, vma->vm_page_prot))
1544                 goto out;
1545         db->mapped = 1;
1546         ret = 0;
1547 out:
1548         unlock_kernel();
1549         return ret;
1550 }
1551
1552 static int sv_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1553 {
1554         struct sv_state *s = (struct sv_state *)file->private_data;
1555         unsigned long flags;
1556         audio_buf_info abinfo;
1557         count_info cinfo;
1558         int count;
1559         int val, mapped, ret;
1560         unsigned char fmtm, fmtd;
1561         void __user *argp = (void __user *)arg;
1562         int __user *p = argp;
1563
1564         VALIDATE_STATE(s);
1565         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1566                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1567         switch (cmd) {
1568         case OSS_GETVERSION:
1569                 return put_user(SOUND_VERSION, p);
1570
1571         case SNDCTL_DSP_SYNC:
1572                 if (file->f_mode & FMODE_WRITE)
1573                         return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1574                 return 0;
1575                 
1576         case SNDCTL_DSP_SETDUPLEX:
1577                 return 0;
1578
1579         case SNDCTL_DSP_GETCAPS:
1580                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1581                 
1582         case SNDCTL_DSP_RESET:
1583                 if (file->f_mode & FMODE_WRITE) {
1584                         stop_dac(s);
1585                         synchronize_irq(s->irq);
1586                         s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1587                 }
1588                 if (file->f_mode & FMODE_READ) {
1589                         stop_adc(s);
1590                         synchronize_irq(s->irq);
1591                         s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1592                 }
1593                 return 0;
1594
1595         case SNDCTL_DSP_SPEED:
1596                 if (get_user(val, p))
1597                         return -EFAULT;
1598                 if (val >= 0) {
1599                         if (file->f_mode & FMODE_READ) {
1600                                 stop_adc(s);
1601                                 s->dma_adc.ready = 0;
1602                                 set_adc_rate(s, val);
1603                         }
1604                         if (file->f_mode & FMODE_WRITE) {
1605                                 stop_dac(s);
1606                                 s->dma_dac.ready = 0;
1607                                 set_dac_rate(s, val);
1608                         }
1609                 }
1610                 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
1611                 
1612         case SNDCTL_DSP_STEREO:
1613                 if (get_user(val, p))
1614                         return -EFAULT;
1615                 fmtd = 0;
1616                 fmtm = ~0;
1617                 if (file->f_mode & FMODE_READ) {
1618                         stop_adc(s);
1619                         s->dma_adc.ready = 0;
1620                         if (val)
1621                                 fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1622                         else
1623                                 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1624                 }
1625                 if (file->f_mode & FMODE_WRITE) {
1626                         stop_dac(s);
1627                         s->dma_dac.ready = 0;
1628                         if (val)
1629                                 fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1630                         else
1631                                 fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1632                 }
1633                 set_fmt(s, fmtm, fmtd);
1634                 return 0;
1635
1636         case SNDCTL_DSP_CHANNELS:
1637                 if (get_user(val, p))
1638                         return -EFAULT;
1639                 if (val != 0) {
1640                         fmtd = 0;
1641                         fmtm = ~0;
1642                         if (file->f_mode & FMODE_READ) {
1643                                 stop_adc(s);
1644                                 s->dma_adc.ready = 0;
1645                                 if (val >= 2)
1646                                         fmtd |= SV_CFMT_STEREO << SV_CFMT_CSHIFT;
1647                                 else
1648                                         fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_CSHIFT);
1649                         }
1650                         if (file->f_mode & FMODE_WRITE) {
1651                                 stop_dac(s);
1652                                 s->dma_dac.ready = 0;
1653                                 if (val >= 2)
1654                                         fmtd |= SV_CFMT_STEREO << SV_CFMT_ASHIFT;
1655                                 else
1656                                         fmtm &= ~(SV_CFMT_STEREO << SV_CFMT_ASHIFT);
1657                         }
1658                         set_fmt(s, fmtm, fmtd);
1659                 }
1660                 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT) 
1661                                            : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, p);
1662                 
1663         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1664                 return put_user(AFMT_S16_LE|AFMT_U8, p);
1665                 
1666         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1667                 if (get_user(val, p))
1668                         return -EFAULT;
1669                 if (val != AFMT_QUERY) {
1670                         fmtd = 0;
1671                         fmtm = ~0;
1672                         if (file->f_mode & FMODE_READ) {
1673                                 stop_adc(s);
1674                                 s->dma_adc.ready = 0;
1675                                 if (val == AFMT_S16_LE)
1676                                         fmtd |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1677                                 else
1678                                         fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_CSHIFT);
1679                         }
1680                         if (file->f_mode & FMODE_WRITE) {
1681                                 stop_dac(s);
1682                                 s->dma_dac.ready = 0;
1683                                 if (val == AFMT_S16_LE)
1684                                         fmtd |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1685                                 else
1686                                         fmtm &= ~(SV_CFMT_16BIT << SV_CFMT_ASHIFT);
1687                         }
1688                         set_fmt(s, fmtm, fmtd);
1689                 }
1690                 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT) 
1691                                            : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? AFMT_S16_LE : AFMT_U8, p);
1692                 
1693         case SNDCTL_DSP_POST:
1694                 return 0;
1695
1696         case SNDCTL_DSP_GETTRIGGER:
1697                 val = 0;
1698                 if (file->f_mode & FMODE_READ && s->enable & SV_CENABLE_RE) 
1699                         val |= PCM_ENABLE_INPUT;
1700                 if (file->f_mode & FMODE_WRITE && s->enable & SV_CENABLE_PE) 
1701                         val |= PCM_ENABLE_OUTPUT;
1702                 return put_user(val, p);
1703                 
1704         case SNDCTL_DSP_SETTRIGGER:
1705                 if (get_user(val, p))
1706                         return -EFAULT;
1707                 if (file->f_mode & FMODE_READ) {
1708                         if (val & PCM_ENABLE_INPUT) {
1709                                 if (!s->dma_adc.ready && (ret =  prog_dmabuf(s, 1)))
1710                                         return ret;
1711                                 s->dma_adc.enabled = 1;
1712                                 start_adc(s);
1713                         } else {
1714                                 s->dma_adc.enabled = 0;
1715                                 stop_adc(s);
1716                         }
1717                 }
1718                 if (file->f_mode & FMODE_WRITE) {
1719                         if (val & PCM_ENABLE_OUTPUT) {
1720                                 if (!s->dma_dac.ready && (ret = prog_dmabuf(s, 0)))
1721                                         return ret;
1722                                 s->dma_dac.enabled = 1;
1723                                 start_dac(s);
1724                         } else {
1725                                 s->dma_dac.enabled = 0;
1726                                 stop_dac(s);
1727                         }
1728                 }
1729                 return 0;
1730
1731         case SNDCTL_DSP_GETOSPACE:
1732                 if (!(file->f_mode & FMODE_WRITE))
1733                         return -EINVAL;
1734                 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1735                         return val;
1736                 spin_lock_irqsave(&s->lock, flags);
1737                 sv_update_ptr(s);
1738                 abinfo.fragsize = s->dma_dac.fragsize;
1739                 count = s->dma_dac.count;
1740                 if (count < 0)
1741                         count = 0;
1742                 abinfo.bytes = s->dma_dac.dmasize - count;
1743                 abinfo.fragstotal = s->dma_dac.numfrag;
1744                 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;      
1745                 spin_unlock_irqrestore(&s->lock, flags);
1746                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1747
1748         case SNDCTL_DSP_GETISPACE:
1749                 if (!(file->f_mode & FMODE_READ))
1750                         return -EINVAL;
1751                 if (!s->dma_adc.ready && (val = prog_dmabuf(s, 1)) != 0)
1752                         return val;
1753                 spin_lock_irqsave(&s->lock, flags);
1754                 sv_update_ptr(s);
1755                 abinfo.fragsize = s->dma_adc.fragsize;
1756                 count = s->dma_adc.count;
1757                 if (count < 0)
1758                         count = 0;
1759                 abinfo.bytes = count;
1760                 abinfo.fragstotal = s->dma_adc.numfrag;
1761                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;      
1762                 spin_unlock_irqrestore(&s->lock, flags);
1763                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1764                 
1765         case SNDCTL_DSP_NONBLOCK:
1766                 file->f_flags |= O_NONBLOCK;
1767                 return 0;
1768
1769         case SNDCTL_DSP_GETODELAY:
1770                 if (!(file->f_mode & FMODE_WRITE))
1771                         return -EINVAL;
1772                 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1773                         return val;
1774                 spin_lock_irqsave(&s->lock, flags);
1775                 sv_update_ptr(s);
1776                 count = s->dma_dac.count;
1777                 spin_unlock_irqrestore(&s->lock, flags);
1778                 if (count < 0)
1779                         count = 0;
1780                 return put_user(count, p);
1781
1782         case SNDCTL_DSP_GETIPTR:
1783                 if (!(file->f_mode & FMODE_READ))
1784                         return -EINVAL;
1785                 if (!s->dma_adc.ready && (val = prog_dmabuf(s, 1)) != 0)
1786                         return val;
1787                 spin_lock_irqsave(&s->lock, flags);
1788                 sv_update_ptr(s);
1789                 cinfo.bytes = s->dma_adc.total_bytes;
1790                 count = s->dma_adc.count;
1791                 if (count < 0)
1792                         count = 0;
1793                 cinfo.blocks = count >> s->dma_adc.fragshift;
1794                 cinfo.ptr = s->dma_adc.hwptr;
1795                 if (s->dma_adc.mapped)
1796                         s->dma_adc.count &= s->dma_adc.fragsize-1;
1797                 spin_unlock_irqrestore(&s->lock, flags);
1798                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1799                         return -EFAULT;
1800                 return 0;
1801
1802         case SNDCTL_DSP_GETOPTR:
1803                 if (!(file->f_mode & FMODE_WRITE))
1804                         return -EINVAL;
1805                 if (!s->dma_dac.ready && (val = prog_dmabuf(s, 0)) != 0)
1806                         return val;
1807                 spin_lock_irqsave(&s->lock, flags);
1808                 sv_update_ptr(s);
1809                 cinfo.bytes = s->dma_dac.total_bytes;
1810                 count = s->dma_dac.count;
1811                 if (count < 0)
1812                         count = 0;
1813                 cinfo.blocks = count >> s->dma_dac.fragshift;
1814                 cinfo.ptr = s->dma_dac.hwptr;
1815                 if (s->dma_dac.mapped)
1816                         s->dma_dac.count &= s->dma_dac.fragsize-1;
1817                 spin_unlock_irqrestore(&s->lock, flags);
1818                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1819                         return -EFAULT;
1820                 return 0;
1821
1822         case SNDCTL_DSP_GETBLKSIZE:
1823                 if (file->f_mode & FMODE_WRITE) {
1824                         if ((val = prog_dmabuf(s, 0)))
1825                                 return val;
1826                         return put_user(s->dma_dac.fragsize, p);
1827                 }
1828                 if ((val = prog_dmabuf(s, 1)))
1829                         return val;
1830                 return put_user(s->dma_adc.fragsize, p);
1831
1832         case SNDCTL_DSP_SETFRAGMENT:
1833                 if (get_user(val, p))
1834                         return -EFAULT;
1835                 if (file->f_mode & FMODE_READ) {
1836                         s->dma_adc.ossfragshift = val & 0xffff;
1837                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1838                         if (s->dma_adc.ossfragshift < 4)
1839                                 s->dma_adc.ossfragshift = 4;
1840                         if (s->dma_adc.ossfragshift > 15)
1841                                 s->dma_adc.ossfragshift = 15;
1842                         if (s->dma_adc.ossmaxfrags < 4)
1843                                 s->dma_adc.ossmaxfrags = 4;
1844                 }
1845                 if (file->f_mode & FMODE_WRITE) {
1846                         s->dma_dac.ossfragshift = val & 0xffff;
1847                         s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1848                         if (s->dma_dac.ossfragshift < 4)
1849                                 s->dma_dac.ossfragshift = 4;
1850                         if (s->dma_dac.ossfragshift > 15)
1851                                 s->dma_dac.ossfragshift = 15;
1852                         if (s->dma_dac.ossmaxfrags < 4)
1853                                 s->dma_dac.ossmaxfrags = 4;
1854                 }
1855                 return 0;
1856
1857         case SNDCTL_DSP_SUBDIVIDE:
1858                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1859                     (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1860                         return -EINVAL;
1861                 if (get_user(val, p))
1862                         return -EFAULT;
1863                 if (val != 1 && val != 2 && val != 4)
1864                         return -EINVAL;
1865                 if (file->f_mode & FMODE_READ)
1866                         s->dma_adc.subdivision = val;
1867                 if (file->f_mode & FMODE_WRITE)
1868                         s->dma_dac.subdivision = val;
1869                 return 0;
1870
1871         case SOUND_PCM_READ_RATE:
1872                 return put_user((file->f_mode & FMODE_READ) ? s->rateadc : s->ratedac, p);
1873
1874         case SOUND_PCM_READ_CHANNELS:
1875                 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_STEREO << SV_CFMT_CSHIFT) 
1876                                            : (SV_CFMT_STEREO << SV_CFMT_ASHIFT))) ? 2 : 1, p);
1877
1878         case SOUND_PCM_READ_BITS:
1879                 return put_user((s->fmt & ((file->f_mode & FMODE_READ) ? (SV_CFMT_16BIT << SV_CFMT_CSHIFT) 
1880                                            : (SV_CFMT_16BIT << SV_CFMT_ASHIFT))) ? 16 : 8, p);
1881
1882         case SOUND_PCM_WRITE_FILTER:
1883         case SNDCTL_DSP_SETSYNCRO:
1884         case SOUND_PCM_READ_FILTER:
1885                 return -EINVAL;
1886                 
1887         }
1888         return mixer_ioctl(s, cmd, arg);
1889 }
1890
1891 static int sv_open(struct inode *inode, struct file *file)
1892 {
1893         int minor = iminor(inode);
1894         DECLARE_WAITQUEUE(wait, current);
1895         unsigned char fmtm = ~0, fmts = 0;
1896         struct list_head *list;
1897         struct sv_state *s;
1898
1899         for (list = devs.next; ; list = list->next) {
1900                 if (list == &devs)
1901                         return -ENODEV;
1902                 s = list_entry(list, struct sv_state, devs);
1903                 if (!((s->dev_audio ^ minor) & ~0xf))
1904                         break;
1905         }
1906         VALIDATE_STATE(s);
1907         file->private_data = s;
1908         /* wait for device to become free */
1909         mutex_lock(&s->open_mutex);
1910         while (s->open_mode & file->f_mode) {
1911                 if (file->f_flags & O_NONBLOCK) {
1912                         mutex_unlock(&s->open_mutex);
1913                         return -EBUSY;
1914                 }
1915                 add_wait_queue(&s->open_wait, &wait);
1916                 __set_current_state(TASK_INTERRUPTIBLE);
1917                 mutex_unlock(&s->open_mutex);
1918                 schedule();
1919                 remove_wait_queue(&s->open_wait, &wait);
1920                 set_current_state(TASK_RUNNING);
1921                 if (signal_pending(current))
1922                         return -ERESTARTSYS;
1923                 mutex_lock(&s->open_mutex);
1924         }
1925         if (file->f_mode & FMODE_READ) {
1926                 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_CSHIFT);
1927                 if ((minor & 0xf) == SND_DEV_DSP16)
1928                         fmts |= SV_CFMT_16BIT << SV_CFMT_CSHIFT;
1929                 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1930                 s->dma_adc.enabled = 1;
1931                 set_adc_rate(s, 8000);
1932         }
1933         if (file->f_mode & FMODE_WRITE) {
1934                 fmtm &= ~((SV_CFMT_STEREO | SV_CFMT_16BIT) << SV_CFMT_ASHIFT);
1935                 if ((minor & 0xf) == SND_DEV_DSP16)
1936                         fmts |= SV_CFMT_16BIT << SV_CFMT_ASHIFT;
1937                 s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
1938                 s->dma_dac.enabled = 1;
1939                 set_dac_rate(s, 8000);
1940         }
1941         set_fmt(s, fmtm, fmts);
1942         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1943         mutex_unlock(&s->open_mutex);
1944         return nonseekable_open(inode, file);
1945 }
1946
1947 static int sv_release(struct inode *inode, struct file *file)
1948 {
1949         struct sv_state *s = (struct sv_state *)file->private_data;
1950
1951         VALIDATE_STATE(s);
1952         lock_kernel();
1953         if (file->f_mode & FMODE_WRITE)
1954                 drain_dac(s, file->f_flags & O_NONBLOCK);
1955         mutex_lock(&s->open_mutex);
1956         if (file->f_mode & FMODE_WRITE) {
1957                 stop_dac(s);
1958                 dealloc_dmabuf(s, &s->dma_dac);
1959         }
1960         if (file->f_mode & FMODE_READ) {
1961                 stop_adc(s);
1962                 dealloc_dmabuf(s, &s->dma_adc);
1963         }
1964         s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
1965         wake_up(&s->open_wait);
1966         mutex_unlock(&s->open_mutex);
1967         unlock_kernel();
1968         return 0;
1969 }
1970
1971 static /*const*/ struct file_operations sv_audio_fops = {
1972         .owner          = THIS_MODULE,
1973         .llseek         = no_llseek,
1974         .read           = sv_read,
1975         .write          = sv_write,
1976         .poll           = sv_poll,
1977         .ioctl          = sv_ioctl,
1978         .mmap           = sv_mmap,
1979         .open           = sv_open,
1980         .release        = sv_release,
1981 };
1982
1983 /* --------------------------------------------------------------------- */
1984
1985 static ssize_t sv_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1986 {
1987         struct sv_state *s = (struct sv_state *)file->private_data;
1988         DECLARE_WAITQUEUE(wait, current);
1989         ssize_t ret;
1990         unsigned long flags;
1991         unsigned ptr;
1992         int cnt;
1993
1994         VALIDATE_STATE(s);
1995         if (!access_ok(VERIFY_WRITE, buffer, count))
1996                 return -EFAULT;
1997         if (count == 0)
1998                 return 0;
1999         ret = 0;
2000         add_wait_queue(&s->midi.iwait, &wait);
2001         while (count > 0) {
2002                 spin_lock_irqsave(&s->lock, flags);
2003                 ptr = s->midi.ird;
2004                 cnt = MIDIINBUF - ptr;
2005                 if (s->midi.icnt < cnt)
2006                         cnt = s->midi.icnt;
2007                 if (cnt <= 0)
2008                       __set_current_state(TASK_INTERRUPTIBLE);
2009                 spin_unlock_irqrestore(&s->lock, flags);
2010                 if (cnt > count)
2011                         cnt = count;
2012                 if (cnt <= 0) {
2013                       if (file->f_flags & O_NONBLOCK) {
2014                               if (!ret)
2015                                       ret = -EAGAIN;
2016                               break;
2017                       }
2018                       schedule();
2019                       if (signal_pending(current)) {
2020                               if (!ret)
2021                                       ret = -ERESTARTSYS;
2022                               break;
2023                       }
2024                         continue;
2025                 }
2026                 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
2027                         if (!ret)
2028                                 ret = -EFAULT;
2029                         break;
2030                 }
2031                 ptr = (ptr + cnt) % MIDIINBUF;
2032                 spin_lock_irqsave(&s->lock, flags);
2033                 s->midi.ird = ptr;
2034                 s->midi.icnt -= cnt;
2035                 spin_unlock_irqrestore(&s->lock, flags);
2036                 count -= cnt;
2037                 buffer += cnt;
2038                 ret += cnt;
2039                 break;
2040         }
2041         __set_current_state(TASK_RUNNING);
2042         remove_wait_queue(&s->midi.iwait, &wait);
2043         return ret;
2044 }
2045
2046 static ssize_t sv_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2047 {
2048         struct sv_state *s = (struct sv_state *)file->private_data;
2049         DECLARE_WAITQUEUE(wait, current);
2050         ssize_t ret;
2051         unsigned long flags;
2052         unsigned ptr;
2053         int cnt;
2054
2055         VALIDATE_STATE(s);
2056         if (!access_ok(VERIFY_READ, buffer, count))
2057                 return -EFAULT;
2058         if (count == 0)
2059                 return 0;
2060         ret = 0;
2061         add_wait_queue(&s->midi.owait, &wait);
2062         while (count > 0) {
2063                 spin_lock_irqsave(&s->lock, flags);
2064                 ptr = s->midi.owr;
2065                 cnt = MIDIOUTBUF - ptr;
2066                 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2067                         cnt = MIDIOUTBUF - s->midi.ocnt;
2068                 if (cnt <= 0) {
2069                         __set_current_state(TASK_INTERRUPTIBLE);
2070                         sv_handle_midi(s);
2071                 }
2072                 spin_unlock_irqrestore(&s->lock, flags);
2073                 if (cnt > count)
2074                         cnt = count;
2075                 if (cnt <= 0) {
2076                         if (file->f_flags & O_NONBLOCK) {
2077                                 if (!ret)
2078                                         ret = -EAGAIN;
2079                                 break;
2080                         }
2081                         schedule();
2082                         if (signal_pending(current)) {
2083                                 if (!ret)
2084                                         ret = -ERESTARTSYS;
2085                                 break;
2086                         }
2087                         continue;
2088                 }
2089                 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
2090                         if (!ret)
2091                                 ret = -EFAULT;
2092                         break;
2093                 }
2094                 ptr = (ptr + cnt) % MIDIOUTBUF;
2095                 spin_lock_irqsave(&s->lock, flags);
2096                 s->midi.owr = ptr;
2097                 s->midi.ocnt += cnt;
2098                 spin_unlock_irqrestore(&s->lock, flags);
2099                 count -= cnt;
2100                 buffer += cnt;
2101                 ret += cnt;
2102                 spin_lock_irqsave(&s->lock, flags);
2103                 sv_handle_midi(s);
2104                 spin_unlock_irqrestore(&s->lock, flags);
2105         }
2106         __set_current_state(TASK_RUNNING);
2107         remove_wait_queue(&s->midi.owait, &wait);
2108         return ret;
2109 }
2110
2111 /* No kernel lock - we have our own spinlock */
2112 static unsigned int sv_midi_poll(struct file *file, struct poll_table_struct *wait)
2113 {
2114         struct sv_state *s = (struct sv_state *)file->private_data;
2115         unsigned long flags;
2116         unsigned int mask = 0;
2117
2118         VALIDATE_STATE(s);
2119         if (file->f_mode & FMODE_WRITE)
2120                 poll_wait(file, &s->midi.owait, wait);
2121         if (file->f_mode & FMODE_READ)
2122                 poll_wait(file, &s->midi.iwait, wait);
2123         spin_lock_irqsave(&s->lock, flags);
2124         if (file->f_mode & FMODE_READ) {
2125                 if (s->midi.icnt > 0)
2126                         mask |= POLLIN | POLLRDNORM;
2127         }
2128         if (file->f_mode & FMODE_WRITE) {
2129                 if (s->midi.ocnt < MIDIOUTBUF)
2130                         mask |= POLLOUT | POLLWRNORM;
2131         }
2132         spin_unlock_irqrestore(&s->lock, flags);
2133         return mask;
2134 }
2135
2136 static int sv_midi_open(struct inode *inode, struct file *file)
2137 {
2138         int minor = iminor(inode);
2139         DECLARE_WAITQUEUE(wait, current);
2140         unsigned long flags;
2141         struct list_head *list;
2142         struct sv_state *s;
2143
2144         for (list = devs.next; ; list = list->next) {
2145                 if (list == &devs)
2146                         return -ENODEV;
2147                 s = list_entry(list, struct sv_state, devs);
2148                 if (s->dev_midi == minor)
2149                         break;
2150         }
2151         VALIDATE_STATE(s);
2152         file->private_data = s;
2153         /* wait for device to become free */
2154         mutex_lock(&s->open_mutex);
2155         while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2156                 if (file->f_flags & O_NONBLOCK) {
2157                         mutex_unlock(&s->open_mutex);
2158                         return -EBUSY;
2159                 }
2160                 add_wait_queue(&s->open_wait, &wait);
2161                 __set_current_state(TASK_INTERRUPTIBLE);
2162                 mutex_unlock(&s->open_mutex);
2163                 schedule();
2164                 remove_wait_queue(&s->open_wait, &wait);
2165                 set_current_state(TASK_RUNNING);
2166                 if (signal_pending(current))
2167                         return -ERESTARTSYS;
2168                 mutex_lock(&s->open_mutex);
2169         }
2170         spin_lock_irqsave(&s->lock, flags);
2171         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2172                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2173                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2174                 //outb(inb(s->ioenh + SV_CODEC_CONTROL) | SV_CCTRL_WAVETABLE, s->ioenh + SV_CODEC_CONTROL);
2175                 outb(inb(s->ioenh + SV_CODEC_INTMASK) | SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2176                 wrindir(s, SV_CIUARTCONTROL, 5); /* output MIDI data to external and internal synth */
2177                 wrindir(s, SV_CIWAVETABLESRC, 1); /* Wavetable in PC RAM */
2178                 outb(0xff, s->iomidi+1); /* reset command */
2179                 outb(0x3f, s->iomidi+1); /* uart command */
2180                 if (!(inb(s->iomidi+1) & 0x80))
2181                         inb(s->iomidi);
2182                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2183                 init_timer(&s->midi.timer);
2184                 s->midi.timer.expires = jiffies+1;
2185                 s->midi.timer.data = (unsigned long)s;
2186                 s->midi.timer.function = sv_midi_timer;
2187                 add_timer(&s->midi.timer);
2188         }
2189         if (file->f_mode & FMODE_READ) {
2190                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2191         }
2192         if (file->f_mode & FMODE_WRITE) {
2193                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2194         }
2195         spin_unlock_irqrestore(&s->lock, flags);
2196         s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2197         mutex_unlock(&s->open_mutex);
2198         return nonseekable_open(inode, file);
2199 }
2200
2201 static int sv_midi_release(struct inode *inode, struct file *file)
2202 {
2203         struct sv_state *s = (struct sv_state *)file->private_data;
2204         DECLARE_WAITQUEUE(wait, current);
2205         unsigned long flags;
2206         unsigned count, tmo;
2207
2208         VALIDATE_STATE(s);
2209
2210         lock_kernel();
2211         if (file->f_mode & FMODE_WRITE) {
2212                 add_wait_queue(&s->midi.owait, &wait);
2213                 for (;;) {
2214                         __set_current_state(TASK_INTERRUPTIBLE);
2215                         spin_lock_irqsave(&s->lock, flags);
2216                         count = s->midi.ocnt;
2217                         spin_unlock_irqrestore(&s->lock, flags);
2218                         if (count <= 0)
2219                                 break;
2220                         if (signal_pending(current))
2221                                 break;
2222                         if (file->f_flags & O_NONBLOCK) {
2223                                 remove_wait_queue(&s->midi.owait, &wait);
2224                                 set_current_state(TASK_RUNNING);
2225                                 unlock_kernel();
2226                                 return -EBUSY;
2227                         }
2228                         tmo = (count * HZ) / 3100;
2229                         if (!schedule_timeout(tmo ? : 1) && tmo)
2230                                 printk(KERN_DEBUG "sv: midi timed out??\n");
2231                 }
2232                 remove_wait_queue(&s->midi.owait, &wait);
2233                 set_current_state(TASK_RUNNING);
2234         }
2235         mutex_lock(&s->open_mutex);
2236         s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
2237         spin_lock_irqsave(&s->lock, flags);
2238         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2239                 outb(inb(s->ioenh + SV_CODEC_INTMASK) & ~SV_CINTMASK_MIDI, s->ioenh + SV_CODEC_INTMASK);
2240                 del_timer(&s->midi.timer);              
2241         }
2242         spin_unlock_irqrestore(&s->lock, flags);
2243         wake_up(&s->open_wait);
2244         mutex_unlock(&s->open_mutex);
2245         unlock_kernel();
2246         return 0;
2247 }
2248
2249 static /*const*/ struct file_operations sv_midi_fops = {
2250         .owner          = THIS_MODULE,
2251         .llseek         = no_llseek,
2252         .read           = sv_midi_read,
2253         .write          = sv_midi_write,
2254         .poll           = sv_midi_poll,
2255         .open           = sv_midi_open,
2256         .release        = sv_midi_release,
2257 };
2258
2259 /* --------------------------------------------------------------------- */
2260
2261 static int sv_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2262 {
2263         static const unsigned char op_offset[18] = {
2264                 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2265                 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2266                 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2267         };
2268         struct sv_state *s = (struct sv_state *)file->private_data;
2269         struct dm_fm_voice v;
2270         struct dm_fm_note n;
2271         struct dm_fm_params p;
2272         unsigned int io;
2273         unsigned int regb;
2274
2275         switch (cmd) {          
2276         case FM_IOCTL_RESET:
2277                 for (regb = 0xb0; regb < 0xb9; regb++) {
2278                         outb(regb, s->iosynth);
2279                         outb(0, s->iosynth+1);
2280                         outb(regb, s->iosynth+2);
2281                         outb(0, s->iosynth+3);
2282                 }
2283                 return 0;
2284
2285         case FM_IOCTL_PLAY_NOTE:
2286                 if (copy_from_user(&n, (void __user *)arg, sizeof(n)))
2287                         return -EFAULT;
2288                 if (n.voice >= 18)
2289                         return -EINVAL;
2290                 if (n.voice >= 9) {
2291                         regb = n.voice - 9;
2292                         io = s->iosynth+2;
2293                 } else {
2294                         regb = n.voice;
2295                         io = s->iosynth;
2296                 }
2297                 outb(0xa0 + regb, io);
2298                 outb(n.fnum & 0xff, io+1);
2299                 outb(0xb0 + regb, io);
2300                 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2301                 return 0;
2302
2303         case FM_IOCTL_SET_VOICE:
2304                 if (copy_from_user(&v, (void __user *)arg, sizeof(v)))
2305                         return -EFAULT;
2306                 if (v.voice >= 18)
2307                         return -EINVAL;
2308                 regb = op_offset[v.voice];
2309                 io = s->iosynth + ((v.op & 1) << 1);
2310                 outb(0x20 + regb, io);
2311                 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) | 
2312                      ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2313                 outb(0x40 + regb, io);
2314                 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2315                 outb(0x60 + regb, io);
2316                 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2317                 outb(0x80 + regb, io);
2318                 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2319                 outb(0xe0 + regb, io);
2320                 outb(v.waveform & 0x7, io+1);
2321                 if (n.voice >= 9) {
2322                         regb = n.voice - 9;
2323                         io = s->iosynth+2;
2324                 } else {
2325                         regb = n.voice;
2326                         io = s->iosynth;
2327                 }
2328                 outb(0xc0 + regb, io);
2329                 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2330                      (v.connection & 1), io+1);
2331                 return 0;
2332                 
2333         case FM_IOCTL_SET_PARAMS:
2334                 if (copy_from_user(&p, (void *__user )arg, sizeof(p)))
2335                         return -EFAULT;
2336                 outb(0x08, s->iosynth);
2337                 outb((p.kbd_split & 1) << 6, s->iosynth+1);
2338                 outb(0xbd, s->iosynth);
2339                 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2340                      ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->iosynth+1);
2341                 return 0;
2342
2343         case FM_IOCTL_SET_OPL:
2344                 outb(4, s->iosynth+2);
2345                 outb(arg, s->iosynth+3);
2346                 return 0;
2347
2348         case FM_IOCTL_SET_MODE:
2349                 outb(5, s->iosynth+2);
2350                 outb(arg & 1, s->iosynth+3);
2351                 return 0;
2352
2353         default:
2354                 return -EINVAL;
2355         }
2356 }
2357
2358 static int sv_dmfm_open(struct inode *inode, struct file *file)
2359 {
2360         int minor = iminor(inode);
2361         DECLARE_WAITQUEUE(wait, current);
2362         struct list_head *list;
2363         struct sv_state *s;
2364
2365         for (list = devs.next; ; list = list->next) {
2366                 if (list == &devs)
2367                         return -ENODEV;
2368                 s = list_entry(list, struct sv_state, devs);
2369                 if (s->dev_dmfm == minor)
2370                         break;
2371         }
2372         VALIDATE_STATE(s);
2373         file->private_data = s;
2374         /* wait for device to become free */
2375         mutex_lock(&s->open_mutex);
2376         while (s->open_mode & FMODE_DMFM) {
2377                 if (file->f_flags & O_NONBLOCK) {
2378                         mutex_unlock(&s->open_mutex);
2379                         return -EBUSY;
2380                 }
2381                 add_wait_queue(&s->open_wait, &wait);
2382                 __set_current_state(TASK_INTERRUPTIBLE);
2383                 mutex_unlock(&s->open_mutex);
2384                 schedule();
2385                 remove_wait_queue(&s->open_wait, &wait);
2386                 set_current_state(TASK_RUNNING);
2387                 if (signal_pending(current))
2388                         return -ERESTARTSYS;
2389                 mutex_lock(&s->open_mutex);
2390         }
2391         /* init the stuff */
2392         outb(1, s->iosynth);
2393         outb(0x20, s->iosynth+1); /* enable waveforms */
2394         outb(4, s->iosynth+2);
2395         outb(0, s->iosynth+3);  /* no 4op enabled */
2396         outb(5, s->iosynth+2);
2397         outb(1, s->iosynth+3);  /* enable OPL3 */
2398         s->open_mode |= FMODE_DMFM;
2399         mutex_unlock(&s->open_mutex);
2400         return nonseekable_open(inode, file);
2401 }
2402
2403 static int sv_dmfm_release(struct inode *inode, struct file *file)
2404 {
2405         struct sv_state *s = (struct sv_state *)file->private_data;
2406         unsigned int regb;
2407
2408         VALIDATE_STATE(s);
2409         lock_kernel();
2410         mutex_lock(&s->open_mutex);
2411         s->open_mode &= ~FMODE_DMFM;
2412         for (regb = 0xb0; regb < 0xb9; regb++) {
2413                 outb(regb, s->iosynth);
2414                 outb(0, s->iosynth+1);
2415                 outb(regb, s->iosynth+2);
2416                 outb(0, s->iosynth+3);
2417         }
2418         wake_up(&s->open_wait);
2419         mutex_unlock(&s->open_mutex);
2420         unlock_kernel();
2421         return 0;
2422 }
2423
2424 static /*const*/ struct file_operations sv_dmfm_fops = {
2425         .owner          = THIS_MODULE,
2426         .llseek         = no_llseek,
2427         .ioctl          = sv_dmfm_ioctl,
2428         .open           = sv_dmfm_open,
2429         .release        = sv_dmfm_release,
2430 };
2431
2432 /* --------------------------------------------------------------------- */
2433
2434 /* maximum number of devices; only used for command line params */
2435 #define NR_DEVICE 5
2436
2437 static int reverb[NR_DEVICE];
2438
2439 #if 0
2440 static int wavetable[NR_DEVICE];
2441 #endif
2442
2443 static unsigned int devindex;
2444
2445 module_param_array(reverb, bool, NULL, 0);
2446 MODULE_PARM_DESC(reverb, "if 1 enables the reverb circuitry. NOTE: your card must have the reverb RAM");
2447 #if 0
2448 MODULE_PARM(wavetable, "1-" __MODULE_STRING(NR_DEVICE) "i");
2449 MODULE_PARM_DESC(wavetable, "if 1 the wavetable synth is enabled");
2450 #endif
2451
2452 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2453 MODULE_DESCRIPTION("S3 SonicVibes Driver");
2454 MODULE_LICENSE("GPL");
2455
2456
2457 /* --------------------------------------------------------------------- */
2458
2459 static struct initvol {
2460         int mixch;
2461         int vol;
2462 } initvol[] __devinitdata = {
2463         { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2464         { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2465         { SOUND_MIXER_WRITE_CD, 0x4040 },
2466         { SOUND_MIXER_WRITE_LINE, 0x4040 },
2467         { SOUND_MIXER_WRITE_MIC, 0x4040 },
2468         { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2469         { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2470         { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2471         { SOUND_MIXER_WRITE_PCM, 0x4040 }
2472 };
2473
2474 #define RSRCISIOREGION(dev,num) (pci_resource_start((dev), (num)) != 0 && \
2475                                  (pci_resource_flags((dev), (num)) & IORESOURCE_IO))
2476
2477 #ifdef SUPPORT_JOYSTICK
2478 static int __devinit sv_register_gameport(struct sv_state *s, int io_port)
2479 {
2480         struct gameport *gp;
2481
2482         if (!request_region(io_port, SV_EXTENT_GAME, "S3 SonicVibes Gameport")) {
2483                 printk(KERN_ERR "sv: gameport io ports are in use\n");
2484                 return -EBUSY;
2485         }
2486
2487         s->gameport = gp = gameport_allocate_port();
2488         if (!gp) {
2489                 printk(KERN_ERR "sv: can not allocate memory for gameport\n");
2490                 release_region(io_port, SV_EXTENT_GAME);
2491                 return -ENOMEM;
2492         }
2493
2494         gameport_set_name(gp, "S3 SonicVibes Gameport");
2495         gameport_set_phys(gp, "isa%04x/gameport0", io_port);
2496         gp->dev.parent = &s->dev->dev;
2497         gp->io = io_port;
2498
2499         gameport_register_port(gp);
2500
2501         return 0;
2502 }
2503
2504 static inline void sv_unregister_gameport(struct sv_state *s)
2505 {
2506         if (s->gameport) {
2507                 int gpio = s->gameport->io;
2508                 gameport_unregister_port(s->gameport);
2509                 release_region(gpio, SV_EXTENT_GAME);
2510         }
2511 }
2512 #else
2513 static inline int sv_register_gameport(struct sv_state *s, int io_port) { return -ENOSYS; }
2514 static inline void sv_unregister_gameport(struct sv_state *s) { }
2515 #endif /* SUPPORT_JOYSTICK */
2516
2517 static int __devinit sv_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2518 {
2519         static char __devinitdata sv_ddma_name[] = "S3 Inc. SonicVibes DDMA Controller";
2520         struct sv_state *s;
2521         mm_segment_t fs;
2522         int i, val, ret;
2523         int gpio;
2524         char *ddmaname;
2525         unsigned ddmanamelen;
2526
2527         if ((ret=pci_enable_device(pcidev)))
2528                 return ret;
2529
2530         if (!RSRCISIOREGION(pcidev, RESOURCE_SB) ||
2531             !RSRCISIOREGION(pcidev, RESOURCE_ENH) ||
2532             !RSRCISIOREGION(pcidev, RESOURCE_SYNTH) ||
2533             !RSRCISIOREGION(pcidev, RESOURCE_MIDI) ||
2534             !RSRCISIOREGION(pcidev, RESOURCE_GAME))
2535                 return -ENODEV;
2536         if (pcidev->irq == 0)
2537                 return -ENODEV;
2538         if (pci_set_dma_mask(pcidev, 0x00ffffff)) {
2539                 printk(KERN_WARNING "sonicvibes: architecture does not support 24bit PCI busmaster DMA\n");
2540                 return -ENODEV;
2541         }
2542         /* try to allocate a DDMA resource if not already available */
2543         if (!RSRCISIOREGION(pcidev, RESOURCE_DDMA)) {
2544                 pcidev->resource[RESOURCE_DDMA].start = 0;
2545                 pcidev->resource[RESOURCE_DDMA].end = 2*SV_EXTENT_DMA-1;
2546                 pcidev->resource[RESOURCE_DDMA].flags = PCI_BASE_ADDRESS_SPACE_IO | IORESOURCE_IO;
2547                 ddmanamelen = strlen(sv_ddma_name)+1;
2548                 if (!(ddmaname = kmalloc(ddmanamelen, GFP_KERNEL)))
2549                         return -1;
2550                 memcpy(ddmaname, sv_ddma_name, ddmanamelen);
2551                 pcidev->resource[RESOURCE_DDMA].name = ddmaname;
2552                 if (pci_assign_resource(pcidev, RESOURCE_DDMA)) {
2553                         pcidev->resource[RESOURCE_DDMA].name = NULL;
2554                         kfree(ddmaname);
2555                         printk(KERN_ERR "sv: cannot allocate DDMA controller io ports\n");
2556                         return -EBUSY;
2557                 }
2558         }
2559         if (!(s = kmalloc(sizeof(struct sv_state), GFP_KERNEL))) {
2560                 printk(KERN_WARNING "sv: out of memory\n");
2561                 return -ENOMEM;
2562         }
2563         memset(s, 0, sizeof(struct sv_state));
2564         init_waitqueue_head(&s->dma_adc.wait);
2565         init_waitqueue_head(&s->dma_dac.wait);
2566         init_waitqueue_head(&s->open_wait);
2567         init_waitqueue_head(&s->midi.iwait);
2568         init_waitqueue_head(&s->midi.owait);
2569         mutex_init(&s->open_mutex);
2570         spin_lock_init(&s->lock);
2571         s->magic = SV_MAGIC;
2572         s->dev = pcidev;
2573         s->iosb = pci_resource_start(pcidev, RESOURCE_SB);
2574         s->ioenh = pci_resource_start(pcidev, RESOURCE_ENH);
2575         s->iosynth = pci_resource_start(pcidev, RESOURCE_SYNTH);
2576         s->iomidi = pci_resource_start(pcidev, RESOURCE_MIDI);
2577         s->iodmaa = pci_resource_start(pcidev, RESOURCE_DDMA);
2578         s->iodmac = pci_resource_start(pcidev, RESOURCE_DDMA) + SV_EXTENT_DMA;
2579         gpio = pci_resource_start(pcidev, RESOURCE_GAME);
2580         pci_write_config_dword(pcidev, 0x40, s->iodmaa | 9);  /* enable and use extended mode */
2581         pci_write_config_dword(pcidev, 0x48, s->iodmac | 9);  /* enable */
2582         printk(KERN_DEBUG "sv: io ports: %#lx %#lx %#lx %#lx %#x %#x %#x\n",
2583                s->iosb, s->ioenh, s->iosynth, s->iomidi, gpio, s->iodmaa, s->iodmac);
2584         s->irq = pcidev->irq;
2585         
2586         /* hack */
2587         pci_write_config_dword(pcidev, 0x60, wavetable_mem >> 12);  /* wavetable base address */
2588
2589         ret = -EBUSY;
2590         if (!request_region(s->ioenh, SV_EXTENT_ENH, "S3 SonicVibes PCM")) {
2591                 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->ioenh, s->ioenh+SV_EXTENT_ENH-1);
2592                 goto err_region5;
2593         }
2594         if (!request_region(s->iodmaa, SV_EXTENT_DMA, "S3 SonicVibes DMAA")) {
2595                 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmaa, s->iodmaa+SV_EXTENT_DMA-1);
2596                 goto err_region4;
2597         }
2598         if (!request_region(s->iodmac, SV_EXTENT_DMA, "S3 SonicVibes DMAC")) {
2599                 printk(KERN_ERR "sv: io ports %#x-%#x in use\n", s->iodmac, s->iodmac+SV_EXTENT_DMA-1);
2600                 goto err_region3;
2601         }
2602         if (!request_region(s->iomidi, SV_EXTENT_MIDI, "S3 SonicVibes Midi")) {
2603                 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iomidi, s->iomidi+SV_EXTENT_MIDI-1);
2604                 goto err_region2;
2605         }
2606         if (!request_region(s->iosynth, SV_EXTENT_SYNTH, "S3 SonicVibes Synth")) {
2607                 printk(KERN_ERR "sv: io ports %#lx-%#lx in use\n", s->iosynth, s->iosynth+SV_EXTENT_SYNTH-1);
2608                 goto err_region1;
2609         }
2610
2611         /* initialize codec registers */
2612         outb(0x80, s->ioenh + SV_CODEC_CONTROL); /* assert reset */
2613         udelay(50);
2614         outb(0x00, s->ioenh + SV_CODEC_CONTROL); /* deassert reset */
2615         udelay(50);
2616         outb(SV_CCTRL_INTADRIVE | SV_CCTRL_ENHANCED /*| SV_CCTRL_WAVETABLE */
2617              | (reverb[devindex] ? SV_CCTRL_REVERB : 0), s->ioenh + SV_CODEC_CONTROL);
2618         inb(s->ioenh + SV_CODEC_STATUS); /* clear ints */
2619         wrindir(s, SV_CIDRIVECONTROL, 0);  /* drive current 16mA */
2620         wrindir(s, SV_CIENABLE, s->enable = 0);  /* disable DMAA and DMAC */
2621         outb(~(SV_CINTMASK_DMAA | SV_CINTMASK_DMAC), s->ioenh + SV_CODEC_INTMASK);
2622         /* outb(0xff, s->iodmaa + SV_DMA_RESET); */
2623         /* outb(0xff, s->iodmac + SV_DMA_RESET); */
2624         inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2625         wrindir(s, SV_CIADCCLKSOURCE, 0); /* use pll as ADC clock source */
2626         wrindir(s, SV_CIANALOGPWRDOWN, 0); /* power up the analog parts of the device */
2627         wrindir(s, SV_CIDIGITALPWRDOWN, 0); /* power up the digital parts of the device */
2628         setpll(s, SV_CIADCPLLM, 8000);
2629         wrindir(s, SV_CISRSSPACE, 0x80); /* SRS off */
2630         wrindir(s, SV_CIPCMSR0, (8000 * 65536 / FULLRATE) & 0xff);
2631         wrindir(s, SV_CIPCMSR1, ((8000 * 65536 / FULLRATE) >> 8) & 0xff);
2632         wrindir(s, SV_CIADCOUTPUT, 0);
2633         /* request irq */
2634         if ((ret=request_irq(s->irq,sv_interrupt,SA_SHIRQ,"S3 SonicVibes",s))) {
2635                 printk(KERN_ERR "sv: irq %u in use\n", s->irq);
2636                 goto err_irq;
2637         }
2638         printk(KERN_INFO "sv: found adapter at io %#lx irq %u dmaa %#06x dmac %#06x revision %u\n",
2639                s->ioenh, s->irq, s->iodmaa, s->iodmac, rdindir(s, SV_CIREVISION));
2640         /* register devices */
2641         if ((s->dev_audio = register_sound_dsp(&sv_audio_fops, -1)) < 0) {
2642                 ret = s->dev_audio;
2643                 goto err_dev1;
2644         }
2645         if ((s->dev_mixer = register_sound_mixer(&sv_mixer_fops, -1)) < 0) {
2646                 ret = s->dev_mixer;
2647                 goto err_dev2;
2648         }
2649         if ((s->dev_midi = register_sound_midi(&sv_midi_fops, -1)) < 0) {
2650                 ret = s->dev_midi;
2651                 goto err_dev3;
2652         }
2653         if ((s->dev_dmfm = register_sound_special(&sv_dmfm_fops, 15 /* ?? */)) < 0) {
2654                 ret = s->dev_dmfm;
2655                 goto err_dev4;
2656         }
2657         pci_set_master(pcidev);  /* enable bus mastering */
2658         /* initialize the chips */
2659         fs = get_fs();
2660         set_fs(KERNEL_DS);
2661         val = SOUND_MASK_LINE|SOUND_MASK_SYNTH;
2662         mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2663         for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2664                 val = initvol[i].vol;
2665                 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2666         }
2667         set_fs(fs);
2668         /* register gameport */
2669         sv_register_gameport(s, gpio);
2670         /* store it in the driver field */
2671         pci_set_drvdata(pcidev, s);
2672         /* put it into driver list */
2673         list_add_tail(&s->devs, &devs);
2674         /* increment devindex */
2675         if (devindex < NR_DEVICE-1)
2676                 devindex++;
2677         return 0;
2678
2679  err_dev4:
2680         unregister_sound_midi(s->dev_midi);
2681  err_dev3:
2682         unregister_sound_mixer(s->dev_mixer);
2683  err_dev2:
2684         unregister_sound_dsp(s->dev_audio);
2685  err_dev1:
2686         printk(KERN_ERR "sv: cannot register misc device\n");
2687         free_irq(s->irq, s);
2688  err_irq:
2689         release_region(s->iosynth, SV_EXTENT_SYNTH);
2690  err_region1:
2691         release_region(s->iomidi, SV_EXTENT_MIDI);
2692  err_region2:
2693         release_region(s->iodmac, SV_EXTENT_DMA);
2694  err_region3:
2695         release_region(s->iodmaa, SV_EXTENT_DMA);
2696  err_region4:
2697         release_region(s->ioenh, SV_EXTENT_ENH);
2698  err_region5:
2699         kfree(s);
2700         return ret;
2701 }
2702
2703 static void __devexit sv_remove(struct pci_dev *dev)
2704 {
2705         struct sv_state *s = pci_get_drvdata(dev);
2706
2707         if (!s)
2708                 return;
2709         list_del(&s->devs);
2710         outb(~0, s->ioenh + SV_CODEC_INTMASK);  /* disable ints */
2711         synchronize_irq(s->irq);
2712         inb(s->ioenh + SV_CODEC_STATUS); /* ack interrupts */
2713         wrindir(s, SV_CIENABLE, 0);     /* disable DMAA and DMAC */
2714         /*outb(0, s->iodmaa + SV_DMA_RESET);*/
2715         /*outb(0, s->iodmac + SV_DMA_RESET);*/
2716         free_irq(s->irq, s);
2717         sv_unregister_gameport(s);
2718         release_region(s->iodmac, SV_EXTENT_DMA);
2719         release_region(s->iodmaa, SV_EXTENT_DMA);
2720         release_region(s->ioenh, SV_EXTENT_ENH);
2721         release_region(s->iomidi, SV_EXTENT_MIDI);
2722         release_region(s->iosynth, SV_EXTENT_SYNTH);
2723         unregister_sound_dsp(s->dev_audio);
2724         unregister_sound_mixer(s->dev_mixer);
2725         unregister_sound_midi(s->dev_midi);
2726         unregister_sound_special(s->dev_dmfm);
2727         kfree(s);
2728         pci_set_drvdata(dev, NULL);
2729 }
2730
2731 static struct pci_device_id id_table[] = {
2732        { PCI_VENDOR_ID_S3, PCI_DEVICE_ID_S3_SONICVIBES, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
2733        { 0, }
2734 };
2735
2736 MODULE_DEVICE_TABLE(pci, id_table);
2737
2738 static struct pci_driver sv_driver = {
2739        .name            = "sonicvibes",
2740        .id_table        = id_table,
2741        .probe           = sv_probe,
2742        .remove          = __devexit_p(sv_remove),
2743 };
2744  
2745 static int __init init_sonicvibes(void)
2746 {
2747         printk(KERN_INFO "sv: version v0.31 time " __TIME__ " " __DATE__ "\n");
2748 #if 0
2749         if (!(wavetable_mem = __get_free_pages(GFP_KERNEL, 20-PAGE_SHIFT)))
2750                 printk(KERN_INFO "sv: cannot allocate 1MB of contiguous nonpageable memory for wavetable data\n");
2751 #endif
2752         return pci_register_driver(&sv_driver);
2753 }
2754
2755 static void __exit cleanup_sonicvibes(void)
2756 {
2757         printk(KERN_INFO "sv: unloading\n");
2758         pci_unregister_driver(&sv_driver);
2759         if (wavetable_mem)
2760                 free_pages(wavetable_mem, 20-PAGE_SHIFT);
2761 }
2762
2763 module_init(init_sonicvibes);
2764 module_exit(cleanup_sonicvibes);
2765
2766 /* --------------------------------------------------------------------- */
2767
2768 #ifndef MODULE
2769
2770 /* format is: sonicvibes=[reverb] sonicvibesdmaio=dmaioaddr */
2771
2772 static int __init sonicvibes_setup(char *str)
2773 {
2774         static unsigned __initdata nr_dev = 0;
2775
2776         if (nr_dev >= NR_DEVICE)
2777                 return 0;
2778 #if 0
2779         if (get_option(&str, &reverb[nr_dev]) == 2)
2780                 (void)get_option(&str, &wavetable[nr_dev]);
2781 #else
2782         (void)get_option(&str, &reverb[nr_dev]);
2783 #endif
2784
2785         nr_dev++;
2786         return 1;
2787 }
2788
2789 __setup("sonicvibes=", sonicvibes_setup);
2790
2791 #endif /* MODULE */