1 /**********************************************************************
3 * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful but, except
10 * as otherwise stated in writing, without any warranty; without even the
11 * implied warranty of merchantability or fitness for a particular purpose.
12 * See the GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * Imagination Technologies Ltd. <gpl-support@imgtec.com>
23 * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
25 ******************************************************************************/
27 #if !defined(__SGXMMU_KM_H__)
28 #define __SGXMMU_KM_H__
30 #define SGX_MMU_PAGE_SHIFT 12
31 #define SGX_MMU_PAGE_SIZE (1UL << SGX_MMU_PAGE_SHIFT)
32 #define SGX_MMU_PAGE_MASK (SGX_MMU_PAGE_SIZE - 1UL)
34 #define SGX_MMU_PD_SHIFT 10
35 #define SGX_MMU_PD_SIZE (1UL << SGX_MMU_PD_SHIFT)
36 #define SGX_MMU_PD_MASK 0xFFC00000UL
38 #define SGX_MMU_PDE_ADDR_MASK 0xFFFFF000UL
39 #define SGX_MMU_PDE_VALID 0x00000001UL
40 #define SGX_MMU_PDE_PAGE_SIZE_4K 0x00000000UL
41 #define SGX_MMU_PDE_WRITEONLY 0x00000002UL
42 #define SGX_MMU_PDE_READONLY 0x00000004UL
43 #define SGX_MMU_PDE_CACHECONSISTENT 0x00000008UL
44 #define SGX_MMU_PDE_EDMPROTECT 0x00000010UL
46 #define SGX_MMU_PT_SHIFT 10
47 #define SGX_MMU_PT_SIZE (1UL << SGX_MMU_PT_SHIFT)
48 #define SGX_MMU_PT_MASK 0x003FF000UL
50 #define SGX_MMU_PTE_ADDR_MASK 0xFFFFF000UL
51 #define SGX_MMU_PTE_VALID 0x00000001UL
52 #define SGX_MMU_PTE_WRITEONLY 0x00000002UL
53 #define SGX_MMU_PTE_READONLY 0x00000004UL
54 #define SGX_MMU_PTE_CACHECONSISTENT 0x00000008UL
55 #define SGX_MMU_PTE_EDMPROTECT 0x00000010UL