1 /**********************************************************************
3 * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful but, except
10 * as otherwise stated in writing, without any warranty; without even the
11 * implied warranty of merchantability or fitness for a particular purpose.
12 * See the GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * Imagination Technologies Ltd. <gpl-support@imgtec.com>
23 * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
25 ******************************************************************************/
27 #if !defined(__SGX_BRIDGE_H__)
28 #define __SGX_BRIDGE_H__
30 #include "sgxapi_km.h"
32 #include "pvr_bridge.h"
34 #define PVRSRV_BRIDGE_SGX_CMD_BASE (PVRSRV_BRIDGE_LAST_NON_DEVICE_CMD+1)
35 #define PVRSRV_BRIDGE_SGX_GETCLIENTINFO \
36 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+0)
37 #define PVRSRV_BRIDGE_SGX_RELEASECLIENTINFO \
38 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+1)
39 #define PVRSRV_BRIDGE_SGX_GETINTERNALDEVINFO \
40 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+2)
41 #define PVRSRV_BRIDGE_SGX_DOKICK \
42 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+3)
43 #define PVRSRV_BRIDGE_SGX_GETPHYSPAGEADDR \
44 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+4)
45 #define PVRSRV_BRIDGE_SGX_READREGISTRYDWORD \
46 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+5)
47 #define PVRSRV_BRIDGE_SGX_SCHEDULECOMMAND \
48 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+6)
50 #define PVRSRV_BRIDGE_SGX_2DQUERYBLTSCOMPLETE \
51 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+9)
53 #define PVRSRV_BRIDGE_SGX_GETMMUPDADDR \
54 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+10)
56 #define PVRSRV_BRIDGE_SGX_SUBMITTRANSFER \
57 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+13)
58 #define PVRSRV_BRIDGE_SGX_GETMISCINFO \
59 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+14)
60 #define PVRSRV_BRIDGE_SGXINFO_FOR_SRVINIT \
61 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+15)
62 #define PVRSRV_BRIDGE_SGX_DEVINITPART2 \
63 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+16)
65 #define PVRSRV_BRIDGE_SGX_FINDSHAREDPBDESC \
66 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+17)
67 #define PVRSRV_BRIDGE_SGX_UNREFSHAREDPBDESC \
68 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+18)
69 #define PVRSRV_BRIDGE_SGX_ADDSHAREDPBDESC \
70 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+19)
71 #define PVRSRV_BRIDGE_SGX_REGISTER_HW_RENDER_CONTEXT \
72 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+20)
73 #define PVRSRV_BRIDGE_SGX_FLUSH_HW_RENDER_TARGET \
74 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+21)
75 #define PVRSRV_BRIDGE_SGX_UNREGISTER_HW_RENDER_CONTEXT \
76 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+22)
77 #define PVRSRV_BRIDGE_SGX_REGISTER_HW_TRANSFER_CONTEXT \
78 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+26)
79 #define PVRSRV_BRIDGE_SGX_UNREGISTER_HW_TRANSFER_CONTEXT \
80 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+27)
82 #define PVRSRV_BRIDGE_SGX_SCHEDULE_PROCESS_QUEUES \
83 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+28)
85 #define PVRSRV_BRIDGE_SGX_READ_DIFF_COUNTERS \
86 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+29)
87 #define PVRSRV_BRIDGE_SGX_READ_HWPERF_CB \
88 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+30)
91 #define PVRSRV_BRIDGE_SGX_PDUMP_BUFFER_ARRAY \
92 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+31)
93 #define PVRSRV_BRIDGE_SGX_PDUMP_3D_SIGNATURE_REGISTERS \
94 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+32)
95 #define PVRSRV_BRIDGE_SGX_PDUMP_COUNTER_REGISTERS \
96 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+33)
97 #define PVRSRV_BRIDGE_SGX_PDUMP_TA_SIGNATURE_REGISTERS \
98 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+34)
99 #define PVRSRV_BRIDGE_SGX_PDUMP_HWPERFCB \
100 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+35)
103 #define PVRSRV_BRIDGE_LAST_SGX_CMD (PVRSRV_BRIDGE_SGX_CMD_BASE+35)
105 struct PVRSRV_BRIDGE_IN_GETPHYSPAGEADDR {
108 struct IMG_DEV_VIRTADDR sDevVAddr;
111 struct PVRSRV_BRIDGE_OUT_GETPHYSPAGEADDR {
112 enum PVRSRV_ERROR eError;
113 struct IMG_DEV_PHYADDR DevPAddr;
114 struct IMG_CPU_PHYADDR CpuPAddr;
117 struct PVRSRV_BRIDGE_IN_SGX_GETMMU_PDADDR {
120 void *hDevMemContext;
123 struct PVRSRV_BRIDGE_OUT_SGX_GETMMU_PDADDR {
124 struct IMG_DEV_PHYADDR sPDDevPAddr;
125 enum PVRSRV_ERROR eError;
128 struct PVRSRV_BRIDGE_IN_GETCLIENTINFO {
133 struct PVRSRV_BRIDGE_OUT_GETINTERNALDEVINFO {
134 struct SGX_INTERNAL_DEVINFO sSGXInternalDevInfo;
135 enum PVRSRV_ERROR eError;
138 struct PVRSRV_BRIDGE_IN_GETINTERNALDEVINFO {
143 struct PVRSRV_BRIDGE_OUT_GETCLIENTINFO {
144 struct SGX_CLIENT_INFO sClientInfo;
145 enum PVRSRV_ERROR eError;
148 struct PVRSRV_BRIDGE_IN_RELEASECLIENTINFO {
151 struct SGX_CLIENT_INFO sClientInfo;
154 struct PVRSRV_BRIDGE_IN_ISPBREAKPOLL {
159 struct PVRSRV_BRIDGE_IN_DOKICK {
162 struct SGX_CCB_KICK sCCBKick;
165 struct PVRSRV_BRIDGE_IN_SGX_SCHEDULE_PROCESS_QUEUES {
170 struct PVRSRV_BRIDGE_IN_SUBMITTRANSFER {
173 struct PVRSRV_TRANSFER_SGX_KICK sKick;
177 struct PVRSRV_BRIDGE_IN_READREGDWORD {
184 struct PVRSRV_BRIDGE_OUT_READREGDWORD {
185 enum PVRSRV_ERROR eError;
189 struct PVRSRV_BRIDGE_IN_SCHEDULECOMMAND {
192 enum SGXMKIF_COMMAND_TYPE eCommandType;
193 struct SGXMKIF_COMMAND *psCommandData;
197 struct PVRSRV_BRIDGE_IN_SGXGETMISCINFO {
200 struct SGX_MISC_INFO __user *psMiscInfo;
203 struct PVRSRV_BRIDGE_IN_SGXINFO_FOR_SRVINIT {
208 struct PVRSRV_BRIDGE_OUT_SGXINFO_FOR_SRVINIT {
209 enum PVRSRV_ERROR eError;
210 struct SGX_BRIDGE_INFO_FOR_SRVINIT sInitInfo;
213 struct PVRSRV_BRIDGE_IN_SGXDEVINITPART2 {
216 struct SGX_BRIDGE_INIT_INFO sInitInfo;
219 enum pvr_sync_wait_seq_type {
220 _PVR_SYNC_WAIT_BLOCK,
221 _PVR_SYNC_WAIT_NONBLOCK,
222 _PVR_SYNC_WAIT_EVENT,
224 _PVR_SYNC_WAIT_UPDATE,
227 struct PVRSRV_BRIDGE_IN_2DQUERYBLTSCOMPLETE {
232 enum pvr_sync_wait_seq_type type;
235 #define PVRSRV_BRIDGE_SGX_SHAREDPBDESC_MAX_SUBMEMINFOS 10
237 struct PVRSRV_BRIDGE_IN_SGXFINDSHAREDPBDESC {
240 IMG_BOOL bLockOnFailure;
244 struct PVRSRV_BRIDGE_OUT_SGXFINDSHAREDPBDESC {
245 void *hKernelMemInfo;
247 void *hSharedPBDescKernelMemInfoHandle;
248 void *hHWPBDescKernelMemInfoHandle;
249 void *hBlockKernelMemInfoHandle;
250 void *ahSharedPBDescSubKernelMemInfoHandles
251 [PVRSRV_BRIDGE_SGX_SHAREDPBDESC_MAX_SUBMEMINFOS];
252 u32 ui32SharedPBDescSubKernelMemInfoHandlesCount;
253 enum PVRSRV_ERROR eError;
256 struct PVRSRV_BRIDGE_IN_SGXUNREFSHAREDPBDESC {
261 struct PVRSRV_BRIDGE_OUT_SGXUNREFSHAREDPBDESC {
262 enum PVRSRV_ERROR eError;
265 struct PVRSRV_BRIDGE_IN_SGXADDSHAREDPBDESC {
268 void *hSharedPBDescKernelMemInfo;
269 void *hHWPBDescKernelMemInfo;
270 void *hBlockKernelMemInfo;
272 void * __user *phKernelMemInfoHandles;
273 u32 ui32KernelMemInfoHandlesCount;
276 struct PVRSRV_BRIDGE_OUT_SGXADDSHAREDPBDESC {
277 enum PVRSRV_ERROR eError;
282 struct PVRSRV_BRIDGE_IN_PDUMP_BUFFER_ARRAY {
284 struct SGX_KICKTA_DUMP_BUFFER __user *psBufferArray;
285 u32 ui32BufferArrayLength;
289 struct PVRSRV_BRIDGE_IN_PDUMP_3D_SIGNATURE_REGISTERS {
291 u32 ui32DumpFrameNum;
293 u32 __user *pui32Registers;
294 u32 ui32NumRegisters;
297 struct PVRSRV_BRIDGE_IN_PDUMP_COUNTER_REGISTERS {
299 u32 ui32DumpFrameNum;
301 u32 __user *pui32Registers;
302 u32 ui32NumRegisters;
305 struct PVRSRV_BRIDGE_IN_PDUMP_TA_SIGNATURE_REGISTERS {
307 u32 ui32DumpFrameNum;
310 u32 __user *pui32Registers;
311 u32 ui32NumRegisters;
314 struct PVRSRV_BRIDGE_IN_PDUMP_HWPERFCB {
317 char szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
325 struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_RENDER_CONTEXT {
328 struct IMG_DEV_VIRTADDR sHWRenderContextDevVAddr;
331 struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_RENDER_CONTEXT {
332 enum PVRSRV_ERROR eError;
333 void *hHWRenderContext;
336 struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT {
339 void *hHWRenderContext;
342 struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_TRANSFER_CONTEXT {
345 struct IMG_DEV_VIRTADDR sHWTransferContextDevVAddr;
348 struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT {
349 enum PVRSRV_ERROR eError;
350 void *hHWTransferContext;
353 struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_TRANSFER_CONTEXT {
356 void *hHWTransferContext;
359 struct PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET {
362 struct IMG_DEV_VIRTADDR sHWRTDataSetDevVAddr;
365 struct PVRSRV_BRIDGE_IN_SGX_READ_DIFF_COUNTERS {
375 struct PVRSRV_BRIDGE_OUT_SGX_READ_DIFF_COUNTERS {
376 enum PVRSRV_ERROR eError;
380 struct PVRSRV_SGXDEV_DIFF_INFO sDiffs;
383 struct PVRSRV_BRIDGE_IN_SGX_READ_HWPERF_CB {
387 struct PVRSRV_SGX_HWPERF_CB_ENTRY __user *psHWPerfCBData;
390 struct PVRSRV_BRIDGE_OUT_SGX_READ_HWPERF_CB {
391 enum PVRSRV_ERROR eError;
394 u32 ui32HostTimeStamp;