3 * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * Based on sc520cdp.c from rolo 1.6:
26 *----------------------------------------------------------------------
28 * Sysgo Real-Time Solutions GmbH
29 * Klein-Winternheim, Germany
30 *----------------------------------------------------------------------
35 #include <asm/ic/ali512x.h>
38 /* ALI M5123 Logical device numbers:
51 ************************************************************
52 * Some access primitives for the ALi chip: *
53 ************************************************************
56 static void ali_write(u8 index, u8 value)
58 /* write an arbirary register */
59 outb(index, ALI_INDEX);
60 outb(value, ALI_DATA);
63 static int ali_read(u8 index)
65 outb(index, ALI_INDEX);
70 outb(0x51, ALI_DATA); \
77 /* Select a logical device */
78 #define ALI_SELDEV(dev) \
82 void ali512x_init(void)
86 ali_write(0x02, 0x01); /* soft reset */
87 ali_write(0x03, 0x03); /* disable access to CIOs */
88 ali_write(0x22, 0x00); /* disable direct powerdown */
89 ali_write(0x23, 0x00); /* disable auto powerdown */
90 ali_write(0x24, 0x00); /* IR 8 is active hi, pin26 is PDIR */
95 void ali512x_set_fdc(int enabled, u16 io, u8 irq, u8 dma_channel)
100 ali_write(0x30, enabled?1:0);
102 ali_write(0x60, io >> 8);
103 ali_write(0x61, io & 0xff);
104 ali_write(0x70, irq);
105 ali_write(0x74, dma_channel);
107 /* AT mode, no drive swap */
108 ali_write(0xf0, 0x08);
109 ali_write(0xf1, 0x00);
110 ali_write(0xf2, 0xff);
111 ali_write(0xf4, 0x00);
117 void ali512x_set_pp(int enabled, u16 io, u8 irq, u8 dma_channel)
122 ali_write(0x30, enabled?1:0);
124 ali_write(0x60, io >> 8);
125 ali_write(0x61, io & 0xff);
126 ali_write(0x70, irq);
127 ali_write(0x74, dma_channel);
129 /* mode: EPP 1.9, ECP FIFO threshold = 7, IRQ active low */
130 ali_write(0xf0, 0xbc);
131 /* 12 MHz, Burst DMA in ECP */
132 ali_write(0xf1, 0x05);
138 void ali512x_set_uart(int enabled, int index, u16 io, u8 irq)
141 ALI_SELDEV(index?5:4);
143 ali_write(0x30, enabled?1:0);
145 ali_write(0x60, io >> 8);
146 ali_write(0x61, io & 0xff);
147 ali_write(0x70, irq);
149 ali_write(0xf0, 0x00);
150 ali_write(0xf1, 0x00);
152 /* huh? write 0xf2 twice - a typo in rolo
153 * or some secret ali errata? Who knows?
156 ali_write(0xf2, 0x00);
158 ali_write(0xf2, 0x0c);
164 void ali512x_set_uart2_irda(int enabled)
169 ali_write(0xf1, enabled?0x48:0x00); /* fullduplex IrDa */
174 void ali512x_set_rtc(int enabled, u16 io, u8 irq)
179 ali_write(0x30, enabled?1:0);
181 ali_write(0x60, io >> 8);
182 ali_write(0x61, io & 0xff);
183 ali_write(0x70, irq);
185 ali_write(0xf0, 0x00);
190 void ali512x_set_kbc(int enabled, u8 kbc_irq, u8 mouse_irq)
195 ali_write(0x30, enabled?1:0);
197 ali_write(0x70, kbc_irq);
198 ali_write(0x72, mouse_irq);
200 ali_write(0xf0, 0x00);
208 * (This descripotsion is base on several incompete sources
209 * since I have not been able to obtain any datasheet for the device
210 * there may be some mis-understandings burried in here.
211 * -- Daniel daniel@omicron.se)
213 * There are 22 CIO pins numbered
218 * 20-24 are dedicated CIO pins, the other 17 are muliplexed with
222 * CIO Pin Function Decription
223 * =======================================================
224 * CIO10 IRQIN1 Interrupt input 1?
225 * CIO11 IRQIN2 Interrupt input 2?
226 * CIO12 IRRX IrDa Receive
227 * CIO13 IRTX IrDa Transmit
228 * CIO14 P21 KBC P21 fucntion
229 * CIO15 P20 KBC P21 fucntion
230 * CIO16 I2C_CLK I2C Clock
231 * CIO17 I2C_DAT I2C Data
240 * CIO30 KBC_CLK Keybaord Clock
241 * CIO31 CS0J General Chip Select decoder CS0J
242 * CIO32 CS1J General Chip Select decoder CS1J
243 * CIO33 ALT_KCLK Alternative Keyboard Clock
244 * CIO34 ALT_KDAT Alternative Keyboard Data
245 * CIO35 ALT_MCLK Alternative Mouse Clock
246 * CIO36 ALT_MDAT Alternative Mouse Data
247 * CIO37 ALT_KBC Alternative KBC select
249 * The CIO use a double indirect address scheme.
251 * Reigster 3 in the SIO is used to selectg where the CIO
252 * I/O registers show up under function 8. Note that these
253 * registers clash with the CIO function select regsters,
256 * SIO reigster 3 (CIO Address Selection) bit definitions:
257 * bit 7 CIO data register enabled
258 * bit 1-0 CIO indirect registers select
259 * 0 index = 0xE0 data = 0xE1
260 * 1 index = 0xE2 data = 0xE3
261 * 2 index = 0xE4 data = 0xE5
262 * 3 index = 0xEA data = 0xEB
264 * There are three CIO I/O register accessed via CIO index and CIO data
265 * 0x01 CIO 10-17 data
266 * 0x02 CIO 20-25 data (bits 7-6 unused)
267 * 0x03 CIO 30-37 data
270 * The pin function is accessed through normal
271 * SIO registers, each register have the same format:
274 * 0 Input/output 1=input
275 * 1 Polarity of signal 1=inverted
277 * 3 Function (normal or special) 1=special
308 void ali512x_set_cio(int enabled)
313 ali_write(0x3, 3); /* Disable CIO data register */
316 ali_write(0x30, enabled?1:0);
318 /* set all pins to input to start with */
319 for (i=0xe0;i<0xee;i++) {
322 for (i=0xf5;i<0xfe;i++) {
329 void ali512x_cio_function(int pin, int special, int inv, int input)
335 /* valid pins are 10-17, 20-25 and 30-37 */
336 if (pin >= 10 && pin <= 17) {
337 addr = 0xe0+(pin-10);
338 } else if (pin >= 20 && pin <= 25) {
339 addr = 0xe8+(pin-20);
340 } else if (pin >= 30 && pin <= 37) {
341 addr = 0xf5+(pin-30);
349 ali_write(0x03, 0x03); /* Disable CIO data register */
363 ali_write(addr, data);
368 void ali512x_cio_out(int pin, int value)
374 /* valid pins are 10-17, 20-25 and 30-37 */
375 if (pin >= 10 && pin <= 17) {
378 } else if (pin >= 20 && pin <= 25) {
381 } else if (pin >= 30 && pin <= 37) {
392 ali_write(0x03, 0x83); /* Enable CIO data register, use data port at 0xea */
394 ali_write(0xea, reg); /* select I/O register */
395 data = ali_read(0xeb);
401 ali_write(0xeb, data);
402 ali_write(0xea, 0); /* select register 0 */
403 ali_write(0x03, 0x03); /* Disable CIO data register */
407 int ali512x_cio_in(int pin)
413 /* valid pins are 10-17, 20-25 and 30-37 */
414 if (pin >= 10 && pin <= 17) {
417 } else if (pin >= 20 && pin <= 25) {
420 } else if (pin >= 30 && pin <= 37) {
431 ali_write(0x03, 0x83); /* Enable CIO data register, use data port at 0xea */
433 ali_write(0xea, reg); /* select I/O register */
434 data = ali_read(0xeb);
435 ali_write(0xea, 0); /* select register 0 */
436 ali_write(0x03, 0x03); /* Disable CIO data register */