3 * ISEE 2007 SL <www.iseebcn.com>
5 * X-Loader Configuration settings for the IGEP0020 board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 /* serial printf facility takes about 3.5K */
33 * High Level Configuration Options
35 #define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
36 #define CONFIG_OMAP 1 /* in a TI OMAP core */
37 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
38 #define CONFIG_OMAP3430 1 /* which is in a 3430 */
39 #define CONFIG_OMAP3_IGEP0020 1 /* working with IGEP0020 */
41 /* Enable the below macro if MMC boot support is required */
43 #if defined(CONFIG_MMC)
46 #define CFG_I2C_SPEED 100000
47 #define CFG_I2C_SLAVE 1
49 #define CFG_I2C_BUS_SELECT 1
50 #define CONFIG_DRIVER_OMAP34XX_I2C 1
53 #include <asm/arch/cpu.h> /* get chip and board defs */
56 #define V_OSCK 26000000 /* Clock output from T2 */
58 #if (V_OSCK > 19200000)
59 #define V_SCLK (V_OSCK >> 1)
64 #define PRCM_CLK_CFG2_332MHZ 1 /* VDD2=1.15v - 166MHz DDR */
65 #define PRCM_PCLK_OPP2 1 /* ARM=381MHz - VDD1=1.20v */
68 #define CONFIG_SDRAM_M65KX002AM 1 /* 2 dice of 2Gb, DDR x32, 4KB page */
70 /* The actual register values are defined in u-boot- mem.h */
71 /* SDRAM Bank Allocation method */
74 #define OMAP34XX_GPMC_CS0_SIZE GPMC_SIZE_128M
79 #define CFG_NS16550_SERIAL
80 #define CFG_NS16550_REG_SIZE -4
81 #define CFG_NS16550_CLK 48000000
82 #define CFG_NS16550_COM3 OMAP34XX_UART3
85 * select serial console configuration
87 #define CONFIG_SERIAL1 3 /* use UART3 */
88 #define CONFIG_CONS_INDEX 3
90 #define CONFIG_BAUDRATE 115200
91 #define CFG_PBSIZE 256
93 #endif /* CFG_PRINTF */
96 * Miscellaneous configurable options
98 #define CFG_LOADADDR 0x80008000
100 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
105 * The stack sizes are set up in start.S using the settings below
107 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
110 * Board oneNAND Info.
112 #define CONFIG_ONENAND 1
114 #define ONENAND_BASE ONENAND_MAP
115 #define ONENAND_ADDR ONENAND_BASE
117 #define ONENAND_START_BLOCK 4 /* 0x00080000 */
118 #define ONENAND_END_BLOCK 6 /* 0x00200000 */
119 #define ONENAND_PAGE_SIZE 2048 /* 2KB */
120 #define ONENAND_BLOCK_SIZE 0x20000 /* 128KB */
122 #endif /* __CONFIG_H */