148e19dbdbc514cfbf26eca828cb2efb569fdee3
[pandora-kernel.git] / drivers / video / s3c-fb.c
1 /* linux/drivers/video/s3c-fb.c
2  *
3  * Copyright 2008 Openmoko Inc.
4  * Copyright 2008-2010 Simtec Electronics
5  *      Ben Dooks <ben@simtec.co.uk>
6  *      http://armlinux.simtec.co.uk/
7  *
8  * Samsung SoC Framebuffer driver
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software FoundatIon.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/slab.h>
20 #include <linux/init.h>
21 #include <linux/clk.h>
22 #include <linux/fb.h>
23 #include <linux/io.h>
24 #include <linux/uaccess.h>
25 #include <linux/interrupt.h>
26 #include <linux/pm_runtime.h>
27
28 #include <mach/map.h>
29 #include <plat/regs-fb-v4.h>
30 #include <plat/fb.h>
31
32 /* This driver will export a number of framebuffer interfaces depending
33  * on the configuration passed in via the platform data. Each fb instance
34  * maps to a hardware window. Currently there is no support for runtime
35  * setting of the alpha-blending functions that each window has, so only
36  * window 0 is actually useful.
37  *
38  * Window 0 is treated specially, it is used for the basis of the LCD
39  * output timings and as the control for the output power-down state.
40 */
41
42 /* note, the previous use of <mach/regs-fb.h> to get platform specific data
43  * has been replaced by using the platform device name to pick the correct
44  * configuration data for the system.
45 */
46
47 #ifdef CONFIG_FB_S3C_DEBUG_REGWRITE
48 #undef writel
49 #define writel(v, r) do { \
50         printk(KERN_DEBUG "%s: %08x => %p\n", __func__, (unsigned int)v, r); \
51         __raw_writel(v, r); } while (0)
52 #endif /* FB_S3C_DEBUG_REGWRITE */
53
54 /* irq_flags bits */
55 #define S3C_FB_VSYNC_IRQ_EN     0
56
57 #define VSYNC_TIMEOUT_MSEC 50
58
59 struct s3c_fb;
60
61 #define VALID_BPP(x) (1 << ((x) - 1))
62
63 #define OSD_BASE(win, variant) ((variant).osd + ((win) * (variant).osd_stride))
64 #define VIDOSD_A(win, variant) (OSD_BASE(win, variant) + 0x00)
65 #define VIDOSD_B(win, variant) (OSD_BASE(win, variant) + 0x04)
66 #define VIDOSD_C(win, variant) (OSD_BASE(win, variant) + 0x08)
67 #define VIDOSD_D(win, variant) (OSD_BASE(win, variant) + 0x0C)
68
69 /**
70  * struct s3c_fb_variant - fb variant information
71  * @is_2443: Set if S3C2443/S3C2416 style hardware.
72  * @nr_windows: The number of windows.
73  * @vidtcon: The base for the VIDTCONx registers
74  * @wincon: The base for the WINxCON registers.
75  * @winmap: The base for the WINxMAP registers.
76  * @keycon: The abse for the WxKEYCON registers.
77  * @buf_start: Offset of buffer start registers.
78  * @buf_size: Offset of buffer size registers.
79  * @buf_end: Offset of buffer end registers.
80  * @osd: The base for the OSD registers.
81  * @palette: Address of palette memory, or 0 if none.
82  * @has_prtcon: Set if has PRTCON register.
83  * @has_shadowcon: Set if has SHADOWCON register.
84  */
85 struct s3c_fb_variant {
86         unsigned int    is_2443:1;
87         unsigned short  nr_windows;
88         unsigned short  vidtcon;
89         unsigned short  wincon;
90         unsigned short  winmap;
91         unsigned short  keycon;
92         unsigned short  buf_start;
93         unsigned short  buf_end;
94         unsigned short  buf_size;
95         unsigned short  osd;
96         unsigned short  osd_stride;
97         unsigned short  palette[S3C_FB_MAX_WIN];
98
99         unsigned int    has_prtcon:1;
100         unsigned int    has_shadowcon:1;
101 };
102
103 /**
104  * struct s3c_fb_win_variant
105  * @has_osd_c: Set if has OSD C register.
106  * @has_osd_d: Set if has OSD D register.
107  * @has_osd_alpha: Set if can change alpha transparency for a window.
108  * @palette_sz: Size of palette in entries.
109  * @palette_16bpp: Set if palette is 16bits wide.
110  * @osd_size_off: If != 0, supports setting up OSD for a window; the appropriate
111  *                register is located at the given offset from OSD_BASE.
112  * @valid_bpp: 1 bit per BPP setting to show valid bits-per-pixel.
113  *
114  * valid_bpp bit x is set if (x+1)BPP is supported.
115  */
116 struct s3c_fb_win_variant {
117         unsigned int    has_osd_c:1;
118         unsigned int    has_osd_d:1;
119         unsigned int    has_osd_alpha:1;
120         unsigned int    palette_16bpp:1;
121         unsigned short  osd_size_off;
122         unsigned short  palette_sz;
123         u32             valid_bpp;
124 };
125
126 /**
127  * struct s3c_fb_driverdata - per-device type driver data for init time.
128  * @variant: The variant information for this driver.
129  * @win: The window information for each window.
130  */
131 struct s3c_fb_driverdata {
132         struct s3c_fb_variant   variant;
133         struct s3c_fb_win_variant *win[S3C_FB_MAX_WIN];
134 };
135
136 /**
137  * struct s3c_fb_palette - palette information
138  * @r: Red bitfield.
139  * @g: Green bitfield.
140  * @b: Blue bitfield.
141  * @a: Alpha bitfield.
142  */
143 struct s3c_fb_palette {
144         struct fb_bitfield      r;
145         struct fb_bitfield      g;
146         struct fb_bitfield      b;
147         struct fb_bitfield      a;
148 };
149
150 /**
151  * struct s3c_fb_win - per window private data for each framebuffer.
152  * @windata: The platform data supplied for the window configuration.
153  * @parent: The hardware that this window is part of.
154  * @fbinfo: Pointer pack to the framebuffer info for this window.
155  * @varint: The variant information for this window.
156  * @palette_buffer: Buffer/cache to hold palette entries.
157  * @pseudo_palette: For use in TRUECOLOUR modes for entries 0..15/
158  * @index: The window number of this window.
159  * @palette: The bitfields for changing r/g/b into a hardware palette entry.
160  */
161 struct s3c_fb_win {
162         struct s3c_fb_pd_win    *windata;
163         struct s3c_fb           *parent;
164         struct fb_info          *fbinfo;
165         struct s3c_fb_palette    palette;
166         struct s3c_fb_win_variant variant;
167
168         u32                     *palette_buffer;
169         u32                      pseudo_palette[16];
170         unsigned int             index;
171 };
172
173 /**
174  * struct s3c_fb_vsync - vsync information
175  * @wait:       a queue for processes waiting for vsync
176  * @count:      vsync interrupt count
177  */
178 struct s3c_fb_vsync {
179         wait_queue_head_t       wait;
180         unsigned int            count;
181 };
182
183 /**
184  * struct s3c_fb - overall hardware state of the hardware
185  * @slock: The spinlock protection for this data sturcture.
186  * @dev: The device that we bound to, for printing, etc.
187  * @regs_res: The resource we claimed for the IO registers.
188  * @bus_clk: The clk (hclk) feeding our interface and possibly pixclk.
189  * @regs: The mapped hardware registers.
190  * @variant: Variant information for this hardware.
191  * @enabled: A bitmask of enabled hardware windows.
192  * @pdata: The platform configuration data passed with the device.
193  * @windows: The hardware windows that have been claimed.
194  * @irq_no: IRQ line number
195  * @irq_flags: irq flags
196  * @vsync_info: VSYNC-related information (count, queues...)
197  */
198 struct s3c_fb {
199         spinlock_t              slock;
200         struct device           *dev;
201         struct resource         *regs_res;
202         struct clk              *bus_clk;
203         void __iomem            *regs;
204         struct s3c_fb_variant    variant;
205
206         unsigned char            enabled;
207
208         struct s3c_fb_platdata  *pdata;
209         struct s3c_fb_win       *windows[S3C_FB_MAX_WIN];
210
211         int                      irq_no;
212         unsigned long            irq_flags;
213         struct s3c_fb_vsync      vsync_info;
214 };
215
216 /**
217  * s3c_fb_validate_win_bpp - validate the bits-per-pixel for this mode.
218  * @win: The device window.
219  * @bpp: The bit depth.
220  */
221 static bool s3c_fb_validate_win_bpp(struct s3c_fb_win *win, unsigned int bpp)
222 {
223         return win->variant.valid_bpp & VALID_BPP(bpp);
224 }
225
226 /**
227  * s3c_fb_check_var() - framebuffer layer request to verify a given mode.
228  * @var: The screen information to verify.
229  * @info: The framebuffer device.
230  *
231  * Framebuffer layer call to verify the given information and allow us to
232  * update various information depending on the hardware capabilities.
233  */
234 static int s3c_fb_check_var(struct fb_var_screeninfo *var,
235                             struct fb_info *info)
236 {
237         struct s3c_fb_win *win = info->par;
238         struct s3c_fb_pd_win *windata = win->windata;
239         struct s3c_fb *sfb = win->parent;
240
241         dev_dbg(sfb->dev, "checking parameters\n");
242
243         var->xres_virtual = max((unsigned int)windata->virtual_x, var->xres);
244         var->yres_virtual = max((unsigned int)windata->virtual_y, var->yres);
245
246         if (!s3c_fb_validate_win_bpp(win, var->bits_per_pixel)) {
247                 dev_dbg(sfb->dev, "win %d: unsupported bpp %d\n",
248                         win->index, var->bits_per_pixel);
249                 return -EINVAL;
250         }
251
252         /* always ensure these are zero, for drop through cases below */
253         var->transp.offset = 0;
254         var->transp.length = 0;
255
256         switch (var->bits_per_pixel) {
257         case 1:
258         case 2:
259         case 4:
260         case 8:
261                 if (sfb->variant.palette[win->index] != 0) {
262                         /* non palletised, A:1,R:2,G:3,B:2 mode */
263                         var->red.offset         = 4;
264                         var->green.offset       = 2;
265                         var->blue.offset        = 0;
266                         var->red.length         = 5;
267                         var->green.length       = 3;
268                         var->blue.length        = 2;
269                         var->transp.offset      = 7;
270                         var->transp.length      = 1;
271                 } else {
272                         var->red.offset = 0;
273                         var->red.length = var->bits_per_pixel;
274                         var->green      = var->red;
275                         var->blue       = var->red;
276                 }
277                 break;
278
279         case 19:
280                 /* 666 with one bit alpha/transparency */
281                 var->transp.offset      = 18;
282                 var->transp.length      = 1;
283         case 18:
284                 var->bits_per_pixel     = 32;
285
286                 /* 666 format */
287                 var->red.offset         = 12;
288                 var->green.offset       = 6;
289                 var->blue.offset        = 0;
290                 var->red.length         = 6;
291                 var->green.length       = 6;
292                 var->blue.length        = 6;
293                 break;
294
295         case 16:
296                 /* 16 bpp, 565 format */
297                 var->red.offset         = 11;
298                 var->green.offset       = 5;
299                 var->blue.offset        = 0;
300                 var->red.length         = 5;
301                 var->green.length       = 6;
302                 var->blue.length        = 5;
303                 break;
304
305         case 32:
306         case 28:
307         case 25:
308                 var->transp.length      = var->bits_per_pixel - 24;
309                 var->transp.offset      = 24;
310                 /* drop through */
311         case 24:
312                 /* our 24bpp is unpacked, so 32bpp */
313                 var->bits_per_pixel     = 32;
314                 var->red.offset         = 16;
315                 var->red.length         = 8;
316                 var->green.offset       = 8;
317                 var->green.length       = 8;
318                 var->blue.offset        = 0;
319                 var->blue.length        = 8;
320                 break;
321
322         default:
323                 dev_err(sfb->dev, "invalid bpp\n");
324         }
325
326         dev_dbg(sfb->dev, "%s: verified parameters\n", __func__);
327         return 0;
328 }
329
330 /**
331  * s3c_fb_calc_pixclk() - calculate the divider to create the pixel clock.
332  * @sfb: The hardware state.
333  * @pixclock: The pixel clock wanted, in picoseconds.
334  *
335  * Given the specified pixel clock, work out the necessary divider to get
336  * close to the output frequency.
337  */
338 static int s3c_fb_calc_pixclk(struct s3c_fb *sfb, unsigned int pixclk)
339 {
340         unsigned long clk = clk_get_rate(sfb->bus_clk);
341         unsigned long long tmp;
342         unsigned int result;
343
344         tmp = (unsigned long long)clk;
345         tmp *= pixclk;
346
347         do_div(tmp, 1000000000UL);
348         result = (unsigned int)tmp / 1000;
349
350         dev_dbg(sfb->dev, "pixclk=%u, clk=%lu, div=%d (%lu)\n",
351                 pixclk, clk, result, clk / result);
352
353         return result;
354 }
355
356 /**
357  * s3c_fb_align_word() - align pixel count to word boundary
358  * @bpp: The number of bits per pixel
359  * @pix: The value to be aligned.
360  *
361  * Align the given pixel count so that it will start on an 32bit word
362  * boundary.
363  */
364 static int s3c_fb_align_word(unsigned int bpp, unsigned int pix)
365 {
366         int pix_per_word;
367
368         if (bpp > 16)
369                 return pix;
370
371         pix_per_word = (8 * 32) / bpp;
372         return ALIGN(pix, pix_per_word);
373 }
374
375 /**
376  * vidosd_set_size() - set OSD size for a window
377  *
378  * @win: the window to set OSD size for
379  * @size: OSD size register value
380  */
381 static void vidosd_set_size(struct s3c_fb_win *win, u32 size)
382 {
383         struct s3c_fb *sfb = win->parent;
384
385         /* OSD can be set up if osd_size_off != 0 for this window */
386         if (win->variant.osd_size_off)
387                 writel(size, sfb->regs + OSD_BASE(win->index, sfb->variant)
388                                 + win->variant.osd_size_off);
389 }
390
391 /**
392  * vidosd_set_alpha() - set alpha transparency for a window
393  *
394  * @win: the window to set OSD size for
395  * @alpha: alpha register value
396  */
397 static void vidosd_set_alpha(struct s3c_fb_win *win, u32 alpha)
398 {
399         struct s3c_fb *sfb = win->parent;
400
401         if (win->variant.has_osd_alpha)
402                 writel(alpha, sfb->regs + VIDOSD_C(win->index, sfb->variant));
403 }
404
405 /**
406  * shadow_protect_win() - disable updating values from shadow registers at vsync
407  *
408  * @win: window to protect registers for
409  * @protect: 1 to protect (disable updates)
410  */
411 static void shadow_protect_win(struct s3c_fb_win *win, bool protect)
412 {
413         struct s3c_fb *sfb = win->parent;
414         u32 reg;
415
416         if (protect) {
417                 if (sfb->variant.has_prtcon) {
418                         writel(PRTCON_PROTECT, sfb->regs + PRTCON);
419                 } else if (sfb->variant.has_shadowcon) {
420                         reg = readl(sfb->regs + SHADOWCON);
421                         writel(reg | SHADOWCON_WINx_PROTECT(win->index),
422                                 sfb->regs + SHADOWCON);
423                 }
424         } else {
425                 if (sfb->variant.has_prtcon) {
426                         writel(0, sfb->regs + PRTCON);
427                 } else if (sfb->variant.has_shadowcon) {
428                         reg = readl(sfb->regs + SHADOWCON);
429                         writel(reg & ~SHADOWCON_WINx_PROTECT(win->index),
430                                 sfb->regs + SHADOWCON);
431                 }
432         }
433 }
434
435 /**
436  * s3c_fb_set_par() - framebuffer request to set new framebuffer state.
437  * @info: The framebuffer to change.
438  *
439  * Framebuffer layer request to set a new mode for the specified framebuffer
440  */
441 static int s3c_fb_set_par(struct fb_info *info)
442 {
443         struct fb_var_screeninfo *var = &info->var;
444         struct s3c_fb_win *win = info->par;
445         struct s3c_fb *sfb = win->parent;
446         void __iomem *regs = sfb->regs;
447         void __iomem *buf = regs;
448         int win_no = win->index;
449         u32 alpha = 0;
450         u32 data;
451         u32 pagewidth;
452         int clkdiv;
453
454         dev_dbg(sfb->dev, "setting framebuffer parameters\n");
455
456         shadow_protect_win(win, 1);
457
458         switch (var->bits_per_pixel) {
459         case 32:
460         case 24:
461         case 16:
462         case 12:
463                 info->fix.visual = FB_VISUAL_TRUECOLOR;
464                 break;
465         case 8:
466                 if (win->variant.palette_sz >= 256)
467                         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
468                 else
469                         info->fix.visual = FB_VISUAL_TRUECOLOR;
470                 break;
471         case 1:
472                 info->fix.visual = FB_VISUAL_MONO01;
473                 break;
474         default:
475                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
476                 break;
477         }
478
479         info->fix.line_length = (var->xres_virtual * var->bits_per_pixel) / 8;
480
481         info->fix.xpanstep = info->var.xres_virtual > info->var.xres ? 1 : 0;
482         info->fix.ypanstep = info->var.yres_virtual > info->var.yres ? 1 : 0;
483
484         /* disable the window whilst we update it */
485         writel(0, regs + WINCON(win_no));
486
487         /* use platform specified window as the basis for the lcd timings */
488
489         if (win_no == sfb->pdata->default_win) {
490                 clkdiv = s3c_fb_calc_pixclk(sfb, var->pixclock);
491
492                 data = sfb->pdata->vidcon0;
493                 data &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
494
495                 if (clkdiv > 1)
496                         data |= VIDCON0_CLKVAL_F(clkdiv-1) | VIDCON0_CLKDIR;
497                 else
498                         data &= ~VIDCON0_CLKDIR;        /* 1:1 clock */
499
500                 /* write the timing data to the panel */
501
502                 if (sfb->variant.is_2443)
503                         data |= (1 << 5);
504
505                 data |= VIDCON0_ENVID | VIDCON0_ENVID_F;
506                 writel(data, regs + VIDCON0);
507
508                 data = VIDTCON0_VBPD(var->upper_margin - 1) |
509                        VIDTCON0_VFPD(var->lower_margin - 1) |
510                        VIDTCON0_VSPW(var->vsync_len - 1);
511
512                 writel(data, regs + sfb->variant.vidtcon);
513
514                 data = VIDTCON1_HBPD(var->left_margin - 1) |
515                        VIDTCON1_HFPD(var->right_margin - 1) |
516                        VIDTCON1_HSPW(var->hsync_len - 1);
517
518                 /* VIDTCON1 */
519                 writel(data, regs + sfb->variant.vidtcon + 4);
520
521                 data = VIDTCON2_LINEVAL(var->yres - 1) |
522                        VIDTCON2_HOZVAL(var->xres - 1);
523                 writel(data, regs + sfb->variant.vidtcon + 8);
524         }
525
526         /* write the buffer address */
527
528         /* start and end registers stride is 8 */
529         buf = regs + win_no * 8;
530
531         writel(info->fix.smem_start, buf + sfb->variant.buf_start);
532
533         data = info->fix.smem_start + info->fix.line_length * var->yres;
534         writel(data, buf + sfb->variant.buf_end);
535
536         pagewidth = (var->xres * var->bits_per_pixel) >> 3;
537         data = VIDW_BUF_SIZE_OFFSET(info->fix.line_length - pagewidth) |
538                VIDW_BUF_SIZE_PAGEWIDTH(pagewidth);
539         writel(data, regs + sfb->variant.buf_size + (win_no * 4));
540
541         /* write 'OSD' registers to control position of framebuffer */
542
543         data = VIDOSDxA_TOPLEFT_X(0) | VIDOSDxA_TOPLEFT_Y(0);
544         writel(data, regs + VIDOSD_A(win_no, sfb->variant));
545
546         data = VIDOSDxB_BOTRIGHT_X(s3c_fb_align_word(var->bits_per_pixel,
547                                                      var->xres - 1)) |
548                VIDOSDxB_BOTRIGHT_Y(var->yres - 1);
549
550         writel(data, regs + VIDOSD_B(win_no, sfb->variant));
551
552         data = var->xres * var->yres;
553
554         alpha = VIDISD14C_ALPHA1_R(0xf) |
555                 VIDISD14C_ALPHA1_G(0xf) |
556                 VIDISD14C_ALPHA1_B(0xf);
557
558         vidosd_set_alpha(win, alpha);
559         vidosd_set_size(win, data);
560
561         data = WINCONx_ENWIN;
562
563         /* note, since we have to round up the bits-per-pixel, we end up
564          * relying on the bitfield information for r/g/b/a to work out
565          * exactly which mode of operation is intended. */
566
567         switch (var->bits_per_pixel) {
568         case 1:
569                 data |= WINCON0_BPPMODE_1BPP;
570                 data |= WINCONx_BITSWP;
571                 data |= WINCONx_BURSTLEN_4WORD;
572                 break;
573         case 2:
574                 data |= WINCON0_BPPMODE_2BPP;
575                 data |= WINCONx_BITSWP;
576                 data |= WINCONx_BURSTLEN_8WORD;
577                 break;
578         case 4:
579                 data |= WINCON0_BPPMODE_4BPP;
580                 data |= WINCONx_BITSWP;
581                 data |= WINCONx_BURSTLEN_8WORD;
582                 break;
583         case 8:
584                 if (var->transp.length != 0)
585                         data |= WINCON1_BPPMODE_8BPP_1232;
586                 else
587                         data |= WINCON0_BPPMODE_8BPP_PALETTE;
588                 data |= WINCONx_BURSTLEN_8WORD;
589                 data |= WINCONx_BYTSWP;
590                 break;
591         case 16:
592                 if (var->transp.length != 0)
593                         data |= WINCON1_BPPMODE_16BPP_A1555;
594                 else
595                         data |= WINCON0_BPPMODE_16BPP_565;
596                 data |= WINCONx_HAWSWP;
597                 data |= WINCONx_BURSTLEN_16WORD;
598                 break;
599         case 24:
600         case 32:
601                 if (var->red.length == 6) {
602                         if (var->transp.length != 0)
603                                 data |= WINCON1_BPPMODE_19BPP_A1666;
604                         else
605                                 data |= WINCON1_BPPMODE_18BPP_666;
606                 } else if (var->transp.length == 1)
607                         data |= WINCON1_BPPMODE_25BPP_A1888
608                                 | WINCON1_BLD_PIX;
609                 else if (var->transp.length == 4)
610                         data |= WINCON1_BPPMODE_28BPP_A4888
611                                 | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
612                 else
613                         data |= WINCON0_BPPMODE_24BPP_888;
614
615                 data |= WINCONx_WSWP;
616                 data |= WINCONx_BURSTLEN_16WORD;
617                 break;
618         }
619
620         /* Enable the colour keying for the window below this one */
621         if (win_no > 0) {
622                 u32 keycon0_data = 0, keycon1_data = 0;
623                 void __iomem *keycon = regs + sfb->variant.keycon;
624
625                 keycon0_data = ~(WxKEYCON0_KEYBL_EN |
626                                 WxKEYCON0_KEYEN_F |
627                                 WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
628
629                 keycon1_data = WxKEYCON1_COLVAL(0xffffff);
630
631                 keycon += (win_no - 1) * 8;
632
633                 writel(keycon0_data, keycon + WKEYCON0);
634                 writel(keycon1_data, keycon + WKEYCON1);
635         }
636
637         writel(data, regs + sfb->variant.wincon + (win_no * 4));
638         writel(0x0, regs + sfb->variant.winmap + (win_no * 4));
639
640         /* Enable DMA channel for this window */
641         if (sfb->variant.has_shadowcon) {
642                 data = readl(sfb->regs + SHADOWCON);
643                 data |= SHADOWCON_CHx_ENABLE(win_no);
644                 writel(data, sfb->regs + SHADOWCON);
645         }
646
647         shadow_protect_win(win, 0);
648
649         return 0;
650 }
651
652 /**
653  * s3c_fb_update_palette() - set or schedule a palette update.
654  * @sfb: The hardware information.
655  * @win: The window being updated.
656  * @reg: The palette index being changed.
657  * @value: The computed palette value.
658  *
659  * Change the value of a palette register, either by directly writing to
660  * the palette (this requires the palette RAM to be disconnected from the
661  * hardware whilst this is in progress) or schedule the update for later.
662  *
663  * At the moment, since we have no VSYNC interrupt support, we simply set
664  * the palette entry directly.
665  */
666 static void s3c_fb_update_palette(struct s3c_fb *sfb,
667                                   struct s3c_fb_win *win,
668                                   unsigned int reg,
669                                   u32 value)
670 {
671         void __iomem *palreg;
672         u32 palcon;
673
674         palreg = sfb->regs + sfb->variant.palette[win->index];
675
676         dev_dbg(sfb->dev, "%s: win %d, reg %d (%p): %08x\n",
677                 __func__, win->index, reg, palreg, value);
678
679         win->palette_buffer[reg] = value;
680
681         palcon = readl(sfb->regs + WPALCON);
682         writel(palcon | WPALCON_PAL_UPDATE, sfb->regs + WPALCON);
683
684         if (win->variant.palette_16bpp)
685                 writew(value, palreg + (reg * 2));
686         else
687                 writel(value, palreg + (reg * 4));
688
689         writel(palcon, sfb->regs + WPALCON);
690 }
691
692 static inline unsigned int chan_to_field(unsigned int chan,
693                                          struct fb_bitfield *bf)
694 {
695         chan &= 0xffff;
696         chan >>= 16 - bf->length;
697         return chan << bf->offset;
698 }
699
700 /**
701  * s3c_fb_setcolreg() - framebuffer layer request to change palette.
702  * @regno: The palette index to change.
703  * @red: The red field for the palette data.
704  * @green: The green field for the palette data.
705  * @blue: The blue field for the palette data.
706  * @trans: The transparency (alpha) field for the palette data.
707  * @info: The framebuffer being changed.
708  */
709 static int s3c_fb_setcolreg(unsigned regno,
710                             unsigned red, unsigned green, unsigned blue,
711                             unsigned transp, struct fb_info *info)
712 {
713         struct s3c_fb_win *win = info->par;
714         struct s3c_fb *sfb = win->parent;
715         unsigned int val;
716
717         dev_dbg(sfb->dev, "%s: win %d: %d => rgb=%d/%d/%d\n",
718                 __func__, win->index, regno, red, green, blue);
719
720         switch (info->fix.visual) {
721         case FB_VISUAL_TRUECOLOR:
722                 /* true-colour, use pseudo-palette */
723
724                 if (regno < 16) {
725                         u32 *pal = info->pseudo_palette;
726
727                         val  = chan_to_field(red,   &info->var.red);
728                         val |= chan_to_field(green, &info->var.green);
729                         val |= chan_to_field(blue,  &info->var.blue);
730
731                         pal[regno] = val;
732                 }
733                 break;
734
735         case FB_VISUAL_PSEUDOCOLOR:
736                 if (regno < win->variant.palette_sz) {
737                         val  = chan_to_field(red, &win->palette.r);
738                         val |= chan_to_field(green, &win->palette.g);
739                         val |= chan_to_field(blue, &win->palette.b);
740
741                         s3c_fb_update_palette(sfb, win, regno, val);
742                 }
743
744                 break;
745
746         default:
747                 return 1;       /* unknown type */
748         }
749
750         return 0;
751 }
752
753 /**
754  * s3c_fb_enable() - Set the state of the main LCD output
755  * @sfb: The main framebuffer state.
756  * @enable: The state to set.
757  */
758 static void s3c_fb_enable(struct s3c_fb *sfb, int enable)
759 {
760         u32 vidcon0 = readl(sfb->regs + VIDCON0);
761
762         if (enable)
763                 vidcon0 |= VIDCON0_ENVID | VIDCON0_ENVID_F;
764         else {
765                 /* see the note in the framebuffer datasheet about
766                  * why you cannot take both of these bits down at the
767                  * same time. */
768
769                 if (!(vidcon0 & VIDCON0_ENVID))
770                         return;
771
772                 vidcon0 |= VIDCON0_ENVID;
773                 vidcon0 &= ~VIDCON0_ENVID_F;
774         }
775
776         writel(vidcon0, sfb->regs + VIDCON0);
777 }
778
779 /**
780  * s3c_fb_blank() - blank or unblank the given window
781  * @blank_mode: The blank state from FB_BLANK_*
782  * @info: The framebuffer to blank.
783  *
784  * Framebuffer layer request to change the power state.
785  */
786 static int s3c_fb_blank(int blank_mode, struct fb_info *info)
787 {
788         struct s3c_fb_win *win = info->par;
789         struct s3c_fb *sfb = win->parent;
790         unsigned int index = win->index;
791         u32 wincon;
792
793         dev_dbg(sfb->dev, "blank mode %d\n", blank_mode);
794
795         wincon = readl(sfb->regs + sfb->variant.wincon + (index * 4));
796
797         switch (blank_mode) {
798         case FB_BLANK_POWERDOWN:
799                 wincon &= ~WINCONx_ENWIN;
800                 sfb->enabled &= ~(1 << index);
801                 /* fall through to FB_BLANK_NORMAL */
802
803         case FB_BLANK_NORMAL:
804                 /* disable the DMA and display 0x0 (black) */
805                 writel(WINxMAP_MAP | WINxMAP_MAP_COLOUR(0x0),
806                        sfb->regs + sfb->variant.winmap + (index * 4));
807                 break;
808
809         case FB_BLANK_UNBLANK:
810                 writel(0x0, sfb->regs + sfb->variant.winmap + (index * 4));
811                 wincon |= WINCONx_ENWIN;
812                 sfb->enabled |= (1 << index);
813                 break;
814
815         case FB_BLANK_VSYNC_SUSPEND:
816         case FB_BLANK_HSYNC_SUSPEND:
817         default:
818                 return 1;
819         }
820
821         writel(wincon, sfb->regs + sfb->variant.wincon + (index * 4));
822
823         /* Check the enabled state to see if we need to be running the
824          * main LCD interface, as if there are no active windows then
825          * it is highly likely that we also do not need to output
826          * anything.
827          */
828
829         /* We could do something like the following code, but the current
830          * system of using framebuffer events means that we cannot make
831          * the distinction between just window 0 being inactive and all
832          * the windows being down.
833          *
834          * s3c_fb_enable(sfb, sfb->enabled ? 1 : 0);
835         */
836
837         /* we're stuck with this until we can do something about overriding
838          * the power control using the blanking event for a single fb.
839          */
840         if (index == sfb->pdata->default_win)
841                 s3c_fb_enable(sfb, blank_mode != FB_BLANK_POWERDOWN ? 1 : 0);
842
843         return 0;
844 }
845
846 /**
847  * s3c_fb_pan_display() - Pan the display.
848  *
849  * Note that the offsets can be written to the device at any time, as their
850  * values are latched at each vsync automatically. This also means that only
851  * the last call to this function will have any effect on next vsync, but
852  * there is no need to sleep waiting for it to prevent tearing.
853  *
854  * @var: The screen information to verify.
855  * @info: The framebuffer device.
856  */
857 static int s3c_fb_pan_display(struct fb_var_screeninfo *var,
858                               struct fb_info *info)
859 {
860         struct s3c_fb_win *win  = info->par;
861         struct s3c_fb *sfb      = win->parent;
862         void __iomem *buf       = sfb->regs + win->index * 8;
863         unsigned int start_boff, end_boff;
864
865         /* Offset in bytes to the start of the displayed area */
866         start_boff = var->yoffset * info->fix.line_length;
867         /* X offset depends on the current bpp */
868         if (info->var.bits_per_pixel >= 8) {
869                 start_boff += var->xoffset * (info->var.bits_per_pixel >> 3);
870         } else {
871                 switch (info->var.bits_per_pixel) {
872                 case 4:
873                         start_boff += var->xoffset >> 1;
874                         break;
875                 case 2:
876                         start_boff += var->xoffset >> 2;
877                         break;
878                 case 1:
879                         start_boff += var->xoffset >> 3;
880                         break;
881                 default:
882                         dev_err(sfb->dev, "invalid bpp\n");
883                         return -EINVAL;
884                 }
885         }
886         /* Offset in bytes to the end of the displayed area */
887         end_boff = start_boff + var->yres * info->fix.line_length;
888
889         /* Temporarily turn off per-vsync update from shadow registers until
890          * both start and end addresses are updated to prevent corruption */
891         shadow_protect_win(win, 1);
892
893         writel(info->fix.smem_start + start_boff, buf + sfb->variant.buf_start);
894         writel(info->fix.smem_start + end_boff, buf + sfb->variant.buf_end);
895
896         shadow_protect_win(win, 0);
897
898         return 0;
899 }
900
901 /**
902  * s3c_fb_enable_irq() - enable framebuffer interrupts
903  * @sfb: main hardware state
904  */
905 static void s3c_fb_enable_irq(struct s3c_fb *sfb)
906 {
907         void __iomem *regs = sfb->regs;
908         u32 irq_ctrl_reg;
909
910         if (!test_and_set_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
911                 /* IRQ disabled, enable it */
912                 irq_ctrl_reg = readl(regs + VIDINTCON0);
913
914                 irq_ctrl_reg |= VIDINTCON0_INT_ENABLE;
915                 irq_ctrl_reg |= VIDINTCON0_INT_FRAME;
916
917                 irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL0_MASK;
918                 irq_ctrl_reg |= VIDINTCON0_FRAMESEL0_VSYNC;
919                 irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL1_MASK;
920                 irq_ctrl_reg |= VIDINTCON0_FRAMESEL1_NONE;
921
922                 writel(irq_ctrl_reg, regs + VIDINTCON0);
923         }
924 }
925
926 /**
927  * s3c_fb_disable_irq() - disable framebuffer interrupts
928  * @sfb: main hardware state
929  */
930 static void s3c_fb_disable_irq(struct s3c_fb *sfb)
931 {
932         void __iomem *regs = sfb->regs;
933         u32 irq_ctrl_reg;
934
935         if (test_and_clear_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
936                 /* IRQ enabled, disable it */
937                 irq_ctrl_reg = readl(regs + VIDINTCON0);
938
939                 irq_ctrl_reg &= ~VIDINTCON0_INT_FRAME;
940                 irq_ctrl_reg &= ~VIDINTCON0_INT_ENABLE;
941
942                 writel(irq_ctrl_reg, regs + VIDINTCON0);
943         }
944 }
945
946 static irqreturn_t s3c_fb_irq(int irq, void *dev_id)
947 {
948         struct s3c_fb *sfb = dev_id;
949         void __iomem  *regs = sfb->regs;
950         u32 irq_sts_reg;
951
952         spin_lock(&sfb->slock);
953
954         irq_sts_reg = readl(regs + VIDINTCON1);
955
956         if (irq_sts_reg & VIDINTCON1_INT_FRAME) {
957
958                 /* VSYNC interrupt, accept it */
959                 writel(VIDINTCON1_INT_FRAME, regs + VIDINTCON1);
960
961                 sfb->vsync_info.count++;
962                 wake_up_interruptible(&sfb->vsync_info.wait);
963         }
964
965         /* We only support waiting for VSYNC for now, so it's safe
966          * to always disable irqs here.
967          */
968         s3c_fb_disable_irq(sfb);
969
970         spin_unlock(&sfb->slock);
971         return IRQ_HANDLED;
972 }
973
974 /**
975  * s3c_fb_wait_for_vsync() - sleep until next VSYNC interrupt or timeout
976  * @sfb: main hardware state
977  * @crtc: head index.
978  */
979 static int s3c_fb_wait_for_vsync(struct s3c_fb *sfb, u32 crtc)
980 {
981         unsigned long count;
982         int ret;
983
984         if (crtc != 0)
985                 return -ENODEV;
986
987         count = sfb->vsync_info.count;
988         s3c_fb_enable_irq(sfb);
989         ret = wait_event_interruptible_timeout(sfb->vsync_info.wait,
990                                        count != sfb->vsync_info.count,
991                                        msecs_to_jiffies(VSYNC_TIMEOUT_MSEC));
992         if (ret == 0)
993                 return -ETIMEDOUT;
994
995         return 0;
996 }
997
998 static int s3c_fb_ioctl(struct fb_info *info, unsigned int cmd,
999                         unsigned long arg)
1000 {
1001         struct s3c_fb_win *win = info->par;
1002         struct s3c_fb *sfb = win->parent;
1003         int ret;
1004         u32 crtc;
1005
1006         switch (cmd) {
1007         case FBIO_WAITFORVSYNC:
1008                 if (get_user(crtc, (u32 __user *)arg)) {
1009                         ret = -EFAULT;
1010                         break;
1011                 }
1012
1013                 ret = s3c_fb_wait_for_vsync(sfb, crtc);
1014                 break;
1015         default:
1016                 ret = -ENOTTY;
1017         }
1018
1019         return ret;
1020 }
1021
1022 static int s3c_fb_open(struct fb_info *info, int user)
1023 {
1024         struct s3c_fb_win *win = info->par;
1025         struct s3c_fb *sfb = win->parent;
1026
1027         pm_runtime_get_sync(sfb->dev);
1028
1029         return 0;
1030 }
1031
1032 static int s3c_fb_release(struct fb_info *info, int user)
1033 {
1034         struct s3c_fb_win *win = info->par;
1035         struct s3c_fb *sfb = win->parent;
1036
1037         pm_runtime_put_sync(sfb->dev);
1038
1039         return 0;
1040 }
1041
1042 static struct fb_ops s3c_fb_ops = {
1043         .owner          = THIS_MODULE,
1044         .fb_open        = s3c_fb_open,
1045         .fb_release     = s3c_fb_release,
1046         .fb_check_var   = s3c_fb_check_var,
1047         .fb_set_par     = s3c_fb_set_par,
1048         .fb_blank       = s3c_fb_blank,
1049         .fb_setcolreg   = s3c_fb_setcolreg,
1050         .fb_fillrect    = cfb_fillrect,
1051         .fb_copyarea    = cfb_copyarea,
1052         .fb_imageblit   = cfb_imageblit,
1053         .fb_pan_display = s3c_fb_pan_display,
1054         .fb_ioctl       = s3c_fb_ioctl,
1055 };
1056
1057 /**
1058  * s3c_fb_missing_pixclock() - calculates pixel clock
1059  * @mode: The video mode to change.
1060  *
1061  * Calculate the pixel clock when none has been given through platform data.
1062  */
1063 static void __devinit s3c_fb_missing_pixclock(struct fb_videomode *mode)
1064 {
1065         u64 pixclk = 1000000000000ULL;
1066         u32 div;
1067
1068         div  = mode->left_margin + mode->hsync_len + mode->right_margin +
1069                mode->xres;
1070         div *= mode->upper_margin + mode->vsync_len + mode->lower_margin +
1071                mode->yres;
1072         div *= mode->refresh ? : 60;
1073
1074         do_div(pixclk, div);
1075
1076         mode->pixclock = pixclk;
1077 }
1078
1079 /**
1080  * s3c_fb_alloc_memory() - allocate display memory for framebuffer window
1081  * @sfb: The base resources for the hardware.
1082  * @win: The window to initialise memory for.
1083  *
1084  * Allocate memory for the given framebuffer.
1085  */
1086 static int __devinit s3c_fb_alloc_memory(struct s3c_fb *sfb,
1087                                          struct s3c_fb_win *win)
1088 {
1089         struct s3c_fb_pd_win *windata = win->windata;
1090         unsigned int real_size, virt_size, size;
1091         struct fb_info *fbi = win->fbinfo;
1092         dma_addr_t map_dma;
1093
1094         dev_dbg(sfb->dev, "allocating memory for display\n");
1095
1096         real_size = windata->win_mode.xres * windata->win_mode.yres;
1097         virt_size = windata->virtual_x * windata->virtual_y;
1098
1099         dev_dbg(sfb->dev, "real_size=%u (%u.%u), virt_size=%u (%u.%u)\n",
1100                 real_size, windata->win_mode.xres, windata->win_mode.yres,
1101                 virt_size, windata->virtual_x, windata->virtual_y);
1102
1103         size = (real_size > virt_size) ? real_size : virt_size;
1104         size *= (windata->max_bpp > 16) ? 32 : windata->max_bpp;
1105         size /= 8;
1106
1107         fbi->fix.smem_len = size;
1108         size = PAGE_ALIGN(size);
1109
1110         dev_dbg(sfb->dev, "want %u bytes for window\n", size);
1111
1112         fbi->screen_base = dma_alloc_writecombine(sfb->dev, size,
1113                                                   &map_dma, GFP_KERNEL);
1114         if (!fbi->screen_base)
1115                 return -ENOMEM;
1116
1117         dev_dbg(sfb->dev, "mapped %x to %p\n",
1118                 (unsigned int)map_dma, fbi->screen_base);
1119
1120         memset(fbi->screen_base, 0x0, size);
1121         fbi->fix.smem_start = map_dma;
1122
1123         return 0;
1124 }
1125
1126 /**
1127  * s3c_fb_free_memory() - free the display memory for the given window
1128  * @sfb: The base resources for the hardware.
1129  * @win: The window to free the display memory for.
1130  *
1131  * Free the display memory allocated by s3c_fb_alloc_memory().
1132  */
1133 static void s3c_fb_free_memory(struct s3c_fb *sfb, struct s3c_fb_win *win)
1134 {
1135         struct fb_info *fbi = win->fbinfo;
1136
1137         if (fbi->screen_base)
1138                 dma_free_writecombine(sfb->dev, PAGE_ALIGN(fbi->fix.smem_len),
1139                               fbi->screen_base, fbi->fix.smem_start);
1140 }
1141
1142 /**
1143  * s3c_fb_release_win() - release resources for a framebuffer window.
1144  * @win: The window to cleanup the resources for.
1145  *
1146  * Release the resources that where claimed for the hardware window,
1147  * such as the framebuffer instance and any memory claimed for it.
1148  */
1149 static void s3c_fb_release_win(struct s3c_fb *sfb, struct s3c_fb_win *win)
1150 {
1151         u32 data;
1152
1153         if (win->fbinfo) {
1154                 if (sfb->variant.has_shadowcon) {
1155                         data = readl(sfb->regs + SHADOWCON);
1156                         data &= ~SHADOWCON_CHx_ENABLE(win->index);
1157                         data &= ~SHADOWCON_CHx_LOCAL_ENABLE(win->index);
1158                         writel(data, sfb->regs + SHADOWCON);
1159                 }
1160                 unregister_framebuffer(win->fbinfo);
1161                 if (win->fbinfo->cmap.len)
1162                         fb_dealloc_cmap(&win->fbinfo->cmap);
1163                 s3c_fb_free_memory(sfb, win);
1164                 framebuffer_release(win->fbinfo);
1165         }
1166 }
1167
1168 /**
1169  * s3c_fb_probe_win() - register an hardware window
1170  * @sfb: The base resources for the hardware
1171  * @variant: The variant information for this window.
1172  * @res: Pointer to where to place the resultant window.
1173  *
1174  * Allocate and do the basic initialisation for one of the hardware's graphics
1175  * windows.
1176  */
1177 static int __devinit s3c_fb_probe_win(struct s3c_fb *sfb, unsigned int win_no,
1178                                       struct s3c_fb_win_variant *variant,
1179                                       struct s3c_fb_win **res)
1180 {
1181         struct fb_var_screeninfo *var;
1182         struct fb_videomode *initmode;
1183         struct s3c_fb_pd_win *windata;
1184         struct s3c_fb_win *win;
1185         struct fb_info *fbinfo;
1186         int palette_size;
1187         int ret;
1188
1189         dev_dbg(sfb->dev, "probing window %d, variant %p\n", win_no, variant);
1190
1191         init_waitqueue_head(&sfb->vsync_info.wait);
1192
1193         palette_size = variant->palette_sz * 4;
1194
1195         fbinfo = framebuffer_alloc(sizeof(struct s3c_fb_win) +
1196                                    palette_size * sizeof(u32), sfb->dev);
1197         if (!fbinfo) {
1198                 dev_err(sfb->dev, "failed to allocate framebuffer\n");
1199                 return -ENOENT;
1200         }
1201
1202         windata = sfb->pdata->win[win_no];
1203         initmode = &windata->win_mode;
1204
1205         WARN_ON(windata->max_bpp == 0);
1206         WARN_ON(windata->win_mode.xres == 0);
1207         WARN_ON(windata->win_mode.yres == 0);
1208
1209         win = fbinfo->par;
1210         *res = win;
1211         var = &fbinfo->var;
1212         win->variant = *variant;
1213         win->fbinfo = fbinfo;
1214         win->parent = sfb;
1215         win->windata = windata;
1216         win->index = win_no;
1217         win->palette_buffer = (u32 *)(win + 1);
1218
1219         ret = s3c_fb_alloc_memory(sfb, win);
1220         if (ret) {
1221                 dev_err(sfb->dev, "failed to allocate display memory\n");
1222                 return ret;
1223         }
1224
1225         /* setup the r/b/g positions for the window's palette */
1226         if (win->variant.palette_16bpp) {
1227                 /* Set RGB 5:6:5 as default */
1228                 win->palette.r.offset = 11;
1229                 win->palette.r.length = 5;
1230                 win->palette.g.offset = 5;
1231                 win->palette.g.length = 6;
1232                 win->palette.b.offset = 0;
1233                 win->palette.b.length = 5;
1234
1235         } else {
1236                 /* Set 8bpp or 8bpp and 1bit alpha */
1237                 win->palette.r.offset = 16;
1238                 win->palette.r.length = 8;
1239                 win->palette.g.offset = 8;
1240                 win->palette.g.length = 8;
1241                 win->palette.b.offset = 0;
1242                 win->palette.b.length = 8;
1243         }
1244
1245         /* setup the initial video mode from the window */
1246         fb_videomode_to_var(&fbinfo->var, initmode);
1247
1248         fbinfo->fix.type        = FB_TYPE_PACKED_PIXELS;
1249         fbinfo->fix.accel       = FB_ACCEL_NONE;
1250         fbinfo->var.activate    = FB_ACTIVATE_NOW;
1251         fbinfo->var.vmode       = FB_VMODE_NONINTERLACED;
1252         fbinfo->var.bits_per_pixel = windata->default_bpp;
1253         fbinfo->fbops           = &s3c_fb_ops;
1254         fbinfo->flags           = FBINFO_FLAG_DEFAULT;
1255         fbinfo->pseudo_palette  = &win->pseudo_palette;
1256
1257         /* prepare to actually start the framebuffer */
1258
1259         ret = s3c_fb_check_var(&fbinfo->var, fbinfo);
1260         if (ret < 0) {
1261                 dev_err(sfb->dev, "check_var failed on initial video params\n");
1262                 return ret;
1263         }
1264
1265         /* create initial colour map */
1266
1267         ret = fb_alloc_cmap(&fbinfo->cmap, win->variant.palette_sz, 1);
1268         if (ret == 0)
1269                 fb_set_cmap(&fbinfo->cmap, fbinfo);
1270         else
1271                 dev_err(sfb->dev, "failed to allocate fb cmap\n");
1272
1273         s3c_fb_set_par(fbinfo);
1274
1275         dev_dbg(sfb->dev, "about to register framebuffer\n");
1276
1277         /* run the check_var and set_par on our configuration. */
1278
1279         ret = register_framebuffer(fbinfo);
1280         if (ret < 0) {
1281                 dev_err(sfb->dev, "failed to register framebuffer\n");
1282                 return ret;
1283         }
1284
1285         dev_info(sfb->dev, "window %d: fb %s\n", win_no, fbinfo->fix.id);
1286
1287         return 0;
1288 }
1289
1290 /**
1291  * s3c_fb_clear_win() - clear hardware window registers.
1292  * @sfb: The base resources for the hardware.
1293  * @win: The window to process.
1294  *
1295  * Reset the specific window registers to a known state.
1296  */
1297 static void s3c_fb_clear_win(struct s3c_fb *sfb, int win)
1298 {
1299         void __iomem *regs = sfb->regs;
1300         u32 reg;
1301
1302         writel(0, regs + sfb->variant.wincon + (win * 4));
1303         writel(0, regs + VIDOSD_A(win, sfb->variant));
1304         writel(0, regs + VIDOSD_B(win, sfb->variant));
1305         writel(0, regs + VIDOSD_C(win, sfb->variant));
1306         reg = readl(regs + SHADOWCON);
1307         writel(reg & ~SHADOWCON_WINx_PROTECT(win), regs + SHADOWCON);
1308 }
1309
1310 static int __devinit s3c_fb_probe(struct platform_device *pdev)
1311 {
1312         const struct platform_device_id *platid;
1313         struct s3c_fb_driverdata *fbdrv;
1314         struct device *dev = &pdev->dev;
1315         struct s3c_fb_platdata *pd;
1316         struct s3c_fb *sfb;
1317         struct resource *res;
1318         int win;
1319         int ret = 0;
1320
1321         platid = platform_get_device_id(pdev);
1322         fbdrv = (struct s3c_fb_driverdata *)platid->driver_data;
1323
1324         if (fbdrv->variant.nr_windows > S3C_FB_MAX_WIN) {
1325                 dev_err(dev, "too many windows, cannot attach\n");
1326                 return -EINVAL;
1327         }
1328
1329         pd = pdev->dev.platform_data;
1330         if (!pd) {
1331                 dev_err(dev, "no platform data specified\n");
1332                 return -EINVAL;
1333         }
1334
1335         sfb = kzalloc(sizeof(struct s3c_fb), GFP_KERNEL);
1336         if (!sfb) {
1337                 dev_err(dev, "no memory for framebuffers\n");
1338                 return -ENOMEM;
1339         }
1340
1341         dev_dbg(dev, "allocate new framebuffer %p\n", sfb);
1342
1343         sfb->dev = dev;
1344         sfb->pdata = pd;
1345         sfb->variant = fbdrv->variant;
1346
1347         spin_lock_init(&sfb->slock);
1348
1349         sfb->bus_clk = clk_get(dev, "lcd");
1350         if (IS_ERR(sfb->bus_clk)) {
1351                 dev_err(dev, "failed to get bus clock\n");
1352                 ret = PTR_ERR(sfb->bus_clk);
1353                 goto err_sfb;
1354         }
1355
1356         clk_enable(sfb->bus_clk);
1357
1358         pm_runtime_enable(sfb->dev);
1359
1360         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1361         if (!res) {
1362                 dev_err(dev, "failed to find registers\n");
1363                 ret = -ENOENT;
1364                 goto err_clk;
1365         }
1366
1367         sfb->regs_res = request_mem_region(res->start, resource_size(res),
1368                                            dev_name(dev));
1369         if (!sfb->regs_res) {
1370                 dev_err(dev, "failed to claim register region\n");
1371                 ret = -ENOENT;
1372                 goto err_clk;
1373         }
1374
1375         sfb->regs = ioremap(res->start, resource_size(res));
1376         if (!sfb->regs) {
1377                 dev_err(dev, "failed to map registers\n");
1378                 ret = -ENXIO;
1379                 goto err_req_region;
1380         }
1381
1382         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1383         if (!res) {
1384                 dev_err(dev, "failed to acquire irq resource\n");
1385                 ret = -ENOENT;
1386                 goto err_ioremap;
1387         }
1388         sfb->irq_no = res->start;
1389         ret = request_irq(sfb->irq_no, s3c_fb_irq,
1390                           0, "s3c_fb", sfb);
1391         if (ret) {
1392                 dev_err(dev, "irq request failed\n");
1393                 goto err_ioremap;
1394         }
1395
1396         dev_dbg(dev, "got resources (regs %p), probing windows\n", sfb->regs);
1397
1398         platform_set_drvdata(pdev, sfb);
1399         pm_runtime_get_sync(sfb->dev);
1400
1401         /* setup gpio and output polarity controls */
1402
1403         pd->setup_gpio();
1404
1405         writel(pd->vidcon1, sfb->regs + VIDCON1);
1406
1407         /* zero all windows before we do anything */
1408
1409         for (win = 0; win < fbdrv->variant.nr_windows; win++)
1410                 s3c_fb_clear_win(sfb, win);
1411
1412         /* initialise colour key controls */
1413         for (win = 0; win < (fbdrv->variant.nr_windows - 1); win++) {
1414                 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1415
1416                 regs += (win * 8);
1417                 writel(0xffffff, regs + WKEYCON0);
1418                 writel(0xffffff, regs + WKEYCON1);
1419         }
1420
1421         /* we have the register setup, start allocating framebuffers */
1422
1423         for (win = 0; win < fbdrv->variant.nr_windows; win++) {
1424                 if (!pd->win[win])
1425                         continue;
1426
1427                 if (!pd->win[win]->win_mode.pixclock)
1428                         s3c_fb_missing_pixclock(&pd->win[win]->win_mode);
1429
1430                 ret = s3c_fb_probe_win(sfb, win, fbdrv->win[win],
1431                                        &sfb->windows[win]);
1432                 if (ret < 0) {
1433                         dev_err(dev, "failed to create window %d\n", win);
1434                         for (; win >= 0; win--)
1435                                 s3c_fb_release_win(sfb, sfb->windows[win]);
1436                         goto err_irq;
1437                 }
1438         }
1439
1440         platform_set_drvdata(pdev, sfb);
1441         pm_runtime_put_sync(sfb->dev);
1442
1443         return 0;
1444
1445 err_irq:
1446         free_irq(sfb->irq_no, sfb);
1447
1448 err_ioremap:
1449         iounmap(sfb->regs);
1450
1451 err_req_region:
1452         release_mem_region(sfb->regs_res->start, resource_size(sfb->regs_res));
1453
1454 err_clk:
1455         clk_disable(sfb->bus_clk);
1456         clk_put(sfb->bus_clk);
1457
1458 err_sfb:
1459         kfree(sfb);
1460         return ret;
1461 }
1462
1463 /**
1464  * s3c_fb_remove() - Cleanup on module finalisation
1465  * @pdev: The platform device we are bound to.
1466  *
1467  * Shutdown and then release all the resources that the driver allocated
1468  * on initialisation.
1469  */
1470 static int __devexit s3c_fb_remove(struct platform_device *pdev)
1471 {
1472         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1473         int win;
1474
1475         pm_runtime_get_sync(sfb->dev);
1476
1477         for (win = 0; win < S3C_FB_MAX_WIN; win++)
1478                 if (sfb->windows[win])
1479                         s3c_fb_release_win(sfb, sfb->windows[win]);
1480
1481         free_irq(sfb->irq_no, sfb);
1482
1483         iounmap(sfb->regs);
1484
1485         clk_disable(sfb->bus_clk);
1486         clk_put(sfb->bus_clk);
1487
1488         release_mem_region(sfb->regs_res->start, resource_size(sfb->regs_res));
1489
1490         pm_runtime_put_sync(sfb->dev);
1491         pm_runtime_disable(sfb->dev);
1492
1493         kfree(sfb);
1494         return 0;
1495 }
1496
1497 #ifdef CONFIG_PM
1498 static int s3c_fb_suspend(struct device *dev)
1499 {
1500         struct platform_device *pdev = to_platform_device(dev);
1501         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1502         struct s3c_fb_win *win;
1503         int win_no;
1504
1505         for (win_no = S3C_FB_MAX_WIN - 1; win_no >= 0; win_no--) {
1506                 win = sfb->windows[win_no];
1507                 if (!win)
1508                         continue;
1509
1510                 /* use the blank function to push into power-down */
1511                 s3c_fb_blank(FB_BLANK_POWERDOWN, win->fbinfo);
1512         }
1513
1514         clk_disable(sfb->bus_clk);
1515         return 0;
1516 }
1517
1518 static int s3c_fb_resume(struct device *dev)
1519 {
1520         struct platform_device *pdev = to_platform_device(dev);
1521         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1522         struct s3c_fb_platdata *pd = sfb->pdata;
1523         struct s3c_fb_win *win;
1524         int win_no;
1525
1526         clk_enable(sfb->bus_clk);
1527
1528         /* setup gpio and output polarity controls */
1529         pd->setup_gpio();
1530         writel(pd->vidcon1, sfb->regs + VIDCON1);
1531
1532         /* zero all windows before we do anything */
1533         for (win_no = 0; win_no < sfb->variant.nr_windows; win_no++)
1534                 s3c_fb_clear_win(sfb, win_no);
1535
1536         for (win_no = 0; win_no < sfb->variant.nr_windows - 1; win_no++) {
1537                 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1538
1539                 regs += (win_no * 8);
1540                 writel(0xffffff, regs + WKEYCON0);
1541                 writel(0xffffff, regs + WKEYCON1);
1542         }
1543
1544         /* restore framebuffers */
1545         for (win_no = 0; win_no < S3C_FB_MAX_WIN; win_no++) {
1546                 win = sfb->windows[win_no];
1547                 if (!win)
1548                         continue;
1549
1550                 dev_dbg(&pdev->dev, "resuming window %d\n", win_no);
1551                 s3c_fb_set_par(win->fbinfo);
1552         }
1553
1554         return 0;
1555 }
1556
1557 static int s3c_fb_runtime_suspend(struct device *dev)
1558 {
1559         struct platform_device *pdev = to_platform_device(dev);
1560         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1561         struct s3c_fb_win *win;
1562         int win_no;
1563
1564         for (win_no = S3C_FB_MAX_WIN - 1; win_no >= 0; win_no--) {
1565                 win = sfb->windows[win_no];
1566                 if (!win)
1567                         continue;
1568
1569                 /* use the blank function to push into power-down */
1570                 s3c_fb_blank(FB_BLANK_POWERDOWN, win->fbinfo);
1571         }
1572
1573         clk_disable(sfb->bus_clk);
1574         return 0;
1575 }
1576
1577 static int s3c_fb_runtime_resume(struct device *dev)
1578 {
1579         struct platform_device *pdev = to_platform_device(dev);
1580         struct s3c_fb *sfb = platform_get_drvdata(pdev);
1581         struct s3c_fb_platdata *pd = sfb->pdata;
1582         struct s3c_fb_win *win;
1583         int win_no;
1584
1585         clk_enable(sfb->bus_clk);
1586
1587         /* setup gpio and output polarity controls */
1588         pd->setup_gpio();
1589         writel(pd->vidcon1, sfb->regs + VIDCON1);
1590
1591         /* zero all windows before we do anything */
1592         for (win_no = 0; win_no < sfb->variant.nr_windows; win_no++)
1593                 s3c_fb_clear_win(sfb, win_no);
1594
1595         for (win_no = 0; win_no < sfb->variant.nr_windows - 1; win_no++) {
1596                 void __iomem *regs = sfb->regs + sfb->variant.keycon;
1597
1598                 regs += (win_no * 8);
1599                 writel(0xffffff, regs + WKEYCON0);
1600                 writel(0xffffff, regs + WKEYCON1);
1601         }
1602
1603         /* restore framebuffers */
1604         for (win_no = 0; win_no < S3C_FB_MAX_WIN; win_no++) {
1605                 win = sfb->windows[win_no];
1606                 if (!win)
1607                         continue;
1608
1609                 dev_dbg(&pdev->dev, "resuming window %d\n", win_no);
1610                 s3c_fb_set_par(win->fbinfo);
1611         }
1612
1613         return 0;
1614 }
1615
1616 #else
1617 #define s3c_fb_suspend NULL
1618 #define s3c_fb_resume  NULL
1619 #define s3c_fb_runtime_suspend NULL
1620 #define s3c_fb_runtime_resume NULL
1621 #endif
1622
1623
1624 #define VALID_BPP124 (VALID_BPP(1) | VALID_BPP(2) | VALID_BPP(4))
1625 #define VALID_BPP1248 (VALID_BPP124 | VALID_BPP(8))
1626
1627 static struct s3c_fb_win_variant s3c_fb_data_64xx_wins[] = {
1628         [0] = {
1629                 .has_osd_c      = 1,
1630                 .osd_size_off   = 0x8,
1631                 .palette_sz     = 256,
1632                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1633                                    VALID_BPP(18) | VALID_BPP(24)),
1634         },
1635         [1] = {
1636                 .has_osd_c      = 1,
1637                 .has_osd_d      = 1,
1638                 .osd_size_off   = 0xc,
1639                 .has_osd_alpha  = 1,
1640                 .palette_sz     = 256,
1641                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1642                                    VALID_BPP(18) | VALID_BPP(19) |
1643                                    VALID_BPP(24) | VALID_BPP(25) |
1644                                    VALID_BPP(28)),
1645         },
1646         [2] = {
1647                 .has_osd_c      = 1,
1648                 .has_osd_d      = 1,
1649                 .osd_size_off   = 0xc,
1650                 .has_osd_alpha  = 1,
1651                 .palette_sz     = 16,
1652                 .palette_16bpp  = 1,
1653                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1654                                    VALID_BPP(18) | VALID_BPP(19) |
1655                                    VALID_BPP(24) | VALID_BPP(25) |
1656                                    VALID_BPP(28)),
1657         },
1658         [3] = {
1659                 .has_osd_c      = 1,
1660                 .has_osd_alpha  = 1,
1661                 .palette_sz     = 16,
1662                 .palette_16bpp  = 1,
1663                 .valid_bpp      = (VALID_BPP124  | VALID_BPP(16) |
1664                                    VALID_BPP(18) | VALID_BPP(19) |
1665                                    VALID_BPP(24) | VALID_BPP(25) |
1666                                    VALID_BPP(28)),
1667         },
1668         [4] = {
1669                 .has_osd_c      = 1,
1670                 .has_osd_alpha  = 1,
1671                 .palette_sz     = 4,
1672                 .palette_16bpp  = 1,
1673                 .valid_bpp      = (VALID_BPP(1) | VALID_BPP(2) |
1674                                    VALID_BPP(16) | VALID_BPP(18) |
1675                                    VALID_BPP(19) | VALID_BPP(24) |
1676                                    VALID_BPP(25) | VALID_BPP(28)),
1677         },
1678 };
1679
1680 static struct s3c_fb_win_variant s3c_fb_data_s5p_wins[] = {
1681         [0] = {
1682                 .has_osd_c      = 1,
1683                 .osd_size_off   = 0x8,
1684                 .palette_sz     = 256,
1685                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1686                                    VALID_BPP(15) | VALID_BPP(16) |
1687                                    VALID_BPP(18) | VALID_BPP(19) |
1688                                    VALID_BPP(24) | VALID_BPP(25) |
1689                                    VALID_BPP(32)),
1690         },
1691         [1] = {
1692                 .has_osd_c      = 1,
1693                 .has_osd_d      = 1,
1694                 .osd_size_off   = 0xc,
1695                 .has_osd_alpha  = 1,
1696                 .palette_sz     = 256,
1697                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1698                                    VALID_BPP(15) | VALID_BPP(16) |
1699                                    VALID_BPP(18) | VALID_BPP(19) |
1700                                    VALID_BPP(24) | VALID_BPP(25) |
1701                                    VALID_BPP(32)),
1702         },
1703         [2] = {
1704                 .has_osd_c      = 1,
1705                 .has_osd_d      = 1,
1706                 .osd_size_off   = 0xc,
1707                 .has_osd_alpha  = 1,
1708                 .palette_sz     = 256,
1709                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1710                                    VALID_BPP(15) | VALID_BPP(16) |
1711                                    VALID_BPP(18) | VALID_BPP(19) |
1712                                    VALID_BPP(24) | VALID_BPP(25) |
1713                                    VALID_BPP(32)),
1714         },
1715         [3] = {
1716                 .has_osd_c      = 1,
1717                 .has_osd_alpha  = 1,
1718                 .palette_sz     = 256,
1719                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1720                                    VALID_BPP(15) | VALID_BPP(16) |
1721                                    VALID_BPP(18) | VALID_BPP(19) |
1722                                    VALID_BPP(24) | VALID_BPP(25) |
1723                                    VALID_BPP(32)),
1724         },
1725         [4] = {
1726                 .has_osd_c      = 1,
1727                 .has_osd_alpha  = 1,
1728                 .palette_sz     = 256,
1729                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(13) |
1730                                    VALID_BPP(15) | VALID_BPP(16) |
1731                                    VALID_BPP(18) | VALID_BPP(19) |
1732                                    VALID_BPP(24) | VALID_BPP(25) |
1733                                    VALID_BPP(32)),
1734         },
1735 };
1736
1737 static struct s3c_fb_driverdata s3c_fb_data_64xx = {
1738         .variant = {
1739                 .nr_windows     = 5,
1740                 .vidtcon        = VIDTCON0,
1741                 .wincon         = WINCON(0),
1742                 .winmap         = WINxMAP(0),
1743                 .keycon         = WKEYCON,
1744                 .osd            = VIDOSD_BASE,
1745                 .osd_stride     = 16,
1746                 .buf_start      = VIDW_BUF_START(0),
1747                 .buf_size       = VIDW_BUF_SIZE(0),
1748                 .buf_end        = VIDW_BUF_END(0),
1749
1750                 .palette = {
1751                         [0] = 0x400,
1752                         [1] = 0x800,
1753                         [2] = 0x300,
1754                         [3] = 0x320,
1755                         [4] = 0x340,
1756                 },
1757
1758                 .has_prtcon     = 1,
1759         },
1760         .win[0] = &s3c_fb_data_64xx_wins[0],
1761         .win[1] = &s3c_fb_data_64xx_wins[1],
1762         .win[2] = &s3c_fb_data_64xx_wins[2],
1763         .win[3] = &s3c_fb_data_64xx_wins[3],
1764         .win[4] = &s3c_fb_data_64xx_wins[4],
1765 };
1766
1767 static struct s3c_fb_driverdata s3c_fb_data_s5pc100 = {
1768         .variant = {
1769                 .nr_windows     = 5,
1770                 .vidtcon        = VIDTCON0,
1771                 .wincon         = WINCON(0),
1772                 .winmap         = WINxMAP(0),
1773                 .keycon         = WKEYCON,
1774                 .osd            = VIDOSD_BASE,
1775                 .osd_stride     = 16,
1776                 .buf_start      = VIDW_BUF_START(0),
1777                 .buf_size       = VIDW_BUF_SIZE(0),
1778                 .buf_end        = VIDW_BUF_END(0),
1779
1780                 .palette = {
1781                         [0] = 0x2400,
1782                         [1] = 0x2800,
1783                         [2] = 0x2c00,
1784                         [3] = 0x3000,
1785                         [4] = 0x3400,
1786                 },
1787
1788                 .has_prtcon     = 1,
1789         },
1790         .win[0] = &s3c_fb_data_s5p_wins[0],
1791         .win[1] = &s3c_fb_data_s5p_wins[1],
1792         .win[2] = &s3c_fb_data_s5p_wins[2],
1793         .win[3] = &s3c_fb_data_s5p_wins[3],
1794         .win[4] = &s3c_fb_data_s5p_wins[4],
1795 };
1796
1797 static struct s3c_fb_driverdata s3c_fb_data_s5pv210 = {
1798         .variant = {
1799                 .nr_windows     = 5,
1800                 .vidtcon        = VIDTCON0,
1801                 .wincon         = WINCON(0),
1802                 .winmap         = WINxMAP(0),
1803                 .keycon         = WKEYCON,
1804                 .osd            = VIDOSD_BASE,
1805                 .osd_stride     = 16,
1806                 .buf_start      = VIDW_BUF_START(0),
1807                 .buf_size       = VIDW_BUF_SIZE(0),
1808                 .buf_end        = VIDW_BUF_END(0),
1809
1810                 .palette = {
1811                         [0] = 0x2400,
1812                         [1] = 0x2800,
1813                         [2] = 0x2c00,
1814                         [3] = 0x3000,
1815                         [4] = 0x3400,
1816                 },
1817
1818                 .has_shadowcon  = 1,
1819         },
1820         .win[0] = &s3c_fb_data_s5p_wins[0],
1821         .win[1] = &s3c_fb_data_s5p_wins[1],
1822         .win[2] = &s3c_fb_data_s5p_wins[2],
1823         .win[3] = &s3c_fb_data_s5p_wins[3],
1824         .win[4] = &s3c_fb_data_s5p_wins[4],
1825 };
1826
1827 /* S3C2443/S3C2416 style hardware */
1828 static struct s3c_fb_driverdata s3c_fb_data_s3c2443 = {
1829         .variant = {
1830                 .nr_windows     = 2,
1831                 .is_2443        = 1,
1832
1833                 .vidtcon        = 0x08,
1834                 .wincon         = 0x14,
1835                 .winmap         = 0xd0,
1836                 .keycon         = 0xb0,
1837                 .osd            = 0x28,
1838                 .osd_stride     = 12,
1839                 .buf_start      = 0x64,
1840                 .buf_size       = 0x94,
1841                 .buf_end        = 0x7c,
1842
1843                 .palette = {
1844                         [0] = 0x400,
1845                         [1] = 0x800,
1846                 },
1847         },
1848         .win[0] = &(struct s3c_fb_win_variant) {
1849                 .palette_sz     = 256,
1850                 .valid_bpp      = VALID_BPP1248 | VALID_BPP(16) | VALID_BPP(24),
1851         },
1852         .win[1] = &(struct s3c_fb_win_variant) {
1853                 .has_osd_c      = 1,
1854                 .has_osd_alpha  = 1,
1855                 .palette_sz     = 256,
1856                 .valid_bpp      = (VALID_BPP1248 | VALID_BPP(16) |
1857                                    VALID_BPP(18) | VALID_BPP(19) |
1858                                    VALID_BPP(24) | VALID_BPP(25) |
1859                                    VALID_BPP(28)),
1860         },
1861 };
1862
1863 static struct platform_device_id s3c_fb_driver_ids[] = {
1864         {
1865                 .name           = "s3c-fb",
1866                 .driver_data    = (unsigned long)&s3c_fb_data_64xx,
1867         }, {
1868                 .name           = "s5pc100-fb",
1869                 .driver_data    = (unsigned long)&s3c_fb_data_s5pc100,
1870         }, {
1871                 .name           = "s5pv210-fb",
1872                 .driver_data    = (unsigned long)&s3c_fb_data_s5pv210,
1873         }, {
1874                 .name           = "s3c2443-fb",
1875                 .driver_data    = (unsigned long)&s3c_fb_data_s3c2443,
1876         },
1877         {},
1878 };
1879 MODULE_DEVICE_TABLE(platform, s3c_fb_driver_ids);
1880
1881 static const struct dev_pm_ops s3cfb_pm_ops = {
1882         .suspend        = s3c_fb_suspend,
1883         .resume         = s3c_fb_resume,
1884         .runtime_suspend        = s3c_fb_runtime_suspend,
1885         .runtime_resume         = s3c_fb_runtime_resume,
1886 };
1887
1888 static struct platform_driver s3c_fb_driver = {
1889         .probe          = s3c_fb_probe,
1890         .remove         = __devexit_p(s3c_fb_remove),
1891         .id_table       = s3c_fb_driver_ids,
1892         .driver         = {
1893                 .name   = "s3c-fb",
1894                 .owner  = THIS_MODULE,
1895                 .pm     = &s3cfb_pm_ops,
1896         },
1897 };
1898
1899 static int __init s3c_fb_init(void)
1900 {
1901         return platform_driver_register(&s3c_fb_driver);
1902 }
1903
1904 static void __exit s3c_fb_cleanup(void)
1905 {
1906         platform_driver_unregister(&s3c_fb_driver);
1907 }
1908
1909 module_init(s3c_fb_init);
1910 module_exit(s3c_fb_cleanup);
1911
1912 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
1913 MODULE_DESCRIPTION("Samsung S3C SoC Framebuffer driver");
1914 MODULE_LICENSE("GPL");
1915 MODULE_ALIAS("platform:s3c-fb");