2 * linux/drivers/video/omap2/dss/rfbi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "RFBI"
25 #include <linux/kernel.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/vmalloc.h>
28 #include <linux/clk.h>
30 #include <linux/delay.h>
31 #include <linux/kfifo.h>
32 #include <linux/ktime.h>
33 #include <linux/hrtimer.h>
34 #include <linux/seq_file.h>
35 #include <linux/semaphore.h>
37 #include <video/omapdss.h>
40 struct rfbi_reg { u16 idx; };
42 #define RFBI_REG(idx) ((const struct rfbi_reg) { idx })
44 #define RFBI_REVISION RFBI_REG(0x0000)
45 #define RFBI_SYSCONFIG RFBI_REG(0x0010)
46 #define RFBI_SYSSTATUS RFBI_REG(0x0014)
47 #define RFBI_CONTROL RFBI_REG(0x0040)
48 #define RFBI_PIXEL_CNT RFBI_REG(0x0044)
49 #define RFBI_LINE_NUMBER RFBI_REG(0x0048)
50 #define RFBI_CMD RFBI_REG(0x004c)
51 #define RFBI_PARAM RFBI_REG(0x0050)
52 #define RFBI_DATA RFBI_REG(0x0054)
53 #define RFBI_READ RFBI_REG(0x0058)
54 #define RFBI_STATUS RFBI_REG(0x005c)
56 #define RFBI_CONFIG(n) RFBI_REG(0x0060 + (n)*0x18)
57 #define RFBI_ONOFF_TIME(n) RFBI_REG(0x0064 + (n)*0x18)
58 #define RFBI_CYCLE_TIME(n) RFBI_REG(0x0068 + (n)*0x18)
59 #define RFBI_DATA_CYCLE1(n) RFBI_REG(0x006c + (n)*0x18)
60 #define RFBI_DATA_CYCLE2(n) RFBI_REG(0x0070 + (n)*0x18)
61 #define RFBI_DATA_CYCLE3(n) RFBI_REG(0x0074 + (n)*0x18)
63 #define RFBI_VSYNC_WIDTH RFBI_REG(0x0090)
64 #define RFBI_HSYNC_WIDTH RFBI_REG(0x0094)
66 #define REG_FLD_MOD(idx, val, start, end) \
67 rfbi_write_reg(idx, FLD_MOD(rfbi_read_reg(idx), val, start, end))
69 /* To work around an RFBI transfer rate limitation */
70 #define OMAP_RFBI_RATE_LIMIT 1
72 enum omap_rfbi_cycleformat {
73 OMAP_DSS_RFBI_CYCLEFORMAT_1_1 = 0,
74 OMAP_DSS_RFBI_CYCLEFORMAT_2_1 = 1,
75 OMAP_DSS_RFBI_CYCLEFORMAT_3_1 = 2,
76 OMAP_DSS_RFBI_CYCLEFORMAT_3_2 = 3,
79 enum omap_rfbi_datatype {
80 OMAP_DSS_RFBI_DATATYPE_12 = 0,
81 OMAP_DSS_RFBI_DATATYPE_16 = 1,
82 OMAP_DSS_RFBI_DATATYPE_18 = 2,
83 OMAP_DSS_RFBI_DATATYPE_24 = 3,
86 enum omap_rfbi_parallelmode {
87 OMAP_DSS_RFBI_PARALLELMODE_8 = 0,
88 OMAP_DSS_RFBI_PARALLELMODE_9 = 1,
89 OMAP_DSS_RFBI_PARALLELMODE_12 = 2,
90 OMAP_DSS_RFBI_PARALLELMODE_16 = 3,
98 static int rfbi_convert_timings(struct rfbi_timings *t);
99 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div);
102 struct platform_device *pdev;
105 unsigned long l4_khz;
107 enum omap_rfbi_datatype datatype;
108 enum omap_rfbi_parallelmode parallelmode;
110 enum omap_rfbi_te_mode te_mode;
113 void (*framedone_callback)(void *data);
114 void *framedone_callback_data;
116 struct omap_dss_device *dssdev[2];
118 struct kfifo cmd_fifo;
120 struct completion cmd_done;
121 atomic_t cmd_fifo_full;
122 atomic_t cmd_pending;
124 struct semaphore bus_lock;
127 struct update_region {
134 static inline void rfbi_write_reg(const struct rfbi_reg idx, u32 val)
136 __raw_writel(val, rfbi.base + idx.idx);
139 static inline u32 rfbi_read_reg(const struct rfbi_reg idx)
141 return __raw_readl(rfbi.base + idx.idx);
144 static void rfbi_enable_clocks(bool enable)
147 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
149 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
152 void rfbi_bus_lock(void)
154 down(&rfbi.bus_lock);
156 EXPORT_SYMBOL(rfbi_bus_lock);
158 void rfbi_bus_unlock(void)
162 EXPORT_SYMBOL(rfbi_bus_unlock);
164 void omap_rfbi_write_command(const void *buf, u32 len)
166 switch (rfbi.parallelmode) {
167 case OMAP_DSS_RFBI_PARALLELMODE_8:
171 rfbi_write_reg(RFBI_CMD, *b++);
175 case OMAP_DSS_RFBI_PARALLELMODE_16:
179 for (; len; len -= 2)
180 rfbi_write_reg(RFBI_CMD, *w++);
184 case OMAP_DSS_RFBI_PARALLELMODE_9:
185 case OMAP_DSS_RFBI_PARALLELMODE_12:
190 EXPORT_SYMBOL(omap_rfbi_write_command);
192 void omap_rfbi_read_data(void *buf, u32 len)
194 switch (rfbi.parallelmode) {
195 case OMAP_DSS_RFBI_PARALLELMODE_8:
199 rfbi_write_reg(RFBI_READ, 0);
200 *b++ = rfbi_read_reg(RFBI_READ);
205 case OMAP_DSS_RFBI_PARALLELMODE_16:
209 for (; len; len -= 2) {
210 rfbi_write_reg(RFBI_READ, 0);
211 *w++ = rfbi_read_reg(RFBI_READ);
216 case OMAP_DSS_RFBI_PARALLELMODE_9:
217 case OMAP_DSS_RFBI_PARALLELMODE_12:
222 EXPORT_SYMBOL(omap_rfbi_read_data);
224 void omap_rfbi_write_data(const void *buf, u32 len)
226 switch (rfbi.parallelmode) {
227 case OMAP_DSS_RFBI_PARALLELMODE_8:
231 rfbi_write_reg(RFBI_PARAM, *b++);
235 case OMAP_DSS_RFBI_PARALLELMODE_16:
239 for (; len; len -= 2)
240 rfbi_write_reg(RFBI_PARAM, *w++);
244 case OMAP_DSS_RFBI_PARALLELMODE_9:
245 case OMAP_DSS_RFBI_PARALLELMODE_12:
251 EXPORT_SYMBOL(omap_rfbi_write_data);
253 void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
257 int start_offset = scr_width * y + x;
258 int horiz_offset = scr_width - w;
261 if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
262 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
263 const u16 __iomem *pd = buf;
267 for (i = 0; i < w; ++i) {
268 const u8 __iomem *b = (const u8 __iomem *)pd;
269 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
270 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
275 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_24 &&
276 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_8) {
277 const u32 __iomem *pd = buf;
281 for (i = 0; i < w; ++i) {
282 const u8 __iomem *b = (const u8 __iomem *)pd;
283 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+2));
284 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+1));
285 rfbi_write_reg(RFBI_PARAM, __raw_readb(b+0));
290 } else if (rfbi.datatype == OMAP_DSS_RFBI_DATATYPE_16 &&
291 rfbi.parallelmode == OMAP_DSS_RFBI_PARALLELMODE_16) {
292 const u16 __iomem *pd = buf;
296 for (i = 0; i < w; ++i) {
297 rfbi_write_reg(RFBI_PARAM, __raw_readw(pd));
306 EXPORT_SYMBOL(omap_rfbi_write_pixels);
308 void rfbi_transfer_area(struct omap_dss_device *dssdev, u16 width,
309 u16 height, void (*callback)(void *data), void *data)
313 /*BUG_ON(callback == 0);*/
314 BUG_ON(rfbi.framedone_callback != NULL);
316 DSSDBG("rfbi_transfer_area %dx%d\n", width, height);
318 dispc_set_lcd_size(dssdev->manager->id, width, height);
320 dispc_enable_channel(dssdev->manager->id, true);
322 rfbi.framedone_callback = callback;
323 rfbi.framedone_callback_data = data;
325 rfbi_write_reg(RFBI_PIXEL_CNT, width * height);
327 l = rfbi_read_reg(RFBI_CONTROL);
328 l = FLD_MOD(l, 1, 0, 0); /* enable */
329 if (!rfbi.te_enabled)
330 l = FLD_MOD(l, 1, 4, 4); /* ITE */
332 rfbi_write_reg(RFBI_CONTROL, l);
335 static void framedone_callback(void *data, u32 mask)
337 void (*callback)(void *data);
339 DSSDBG("FRAMEDONE\n");
341 REG_FLD_MOD(RFBI_CONTROL, 0, 0, 0);
343 callback = rfbi.framedone_callback;
344 rfbi.framedone_callback = NULL;
346 if (callback != NULL)
347 callback(rfbi.framedone_callback_data);
349 atomic_set(&rfbi.cmd_pending, 0);
353 static void rfbi_print_timings(void)
358 l = rfbi_read_reg(RFBI_CONFIG(0));
359 time = 1000000000 / rfbi.l4_khz;
363 DSSDBG("Tick time %u ps\n", time);
364 l = rfbi_read_reg(RFBI_ONOFF_TIME(0));
365 DSSDBG("CSONTIME %d, CSOFFTIME %d, WEONTIME %d, WEOFFTIME %d, "
366 "REONTIME %d, REOFFTIME %d\n",
367 l & 0x0f, (l >> 4) & 0x3f, (l >> 10) & 0x0f, (l >> 14) & 0x3f,
368 (l >> 20) & 0x0f, (l >> 24) & 0x3f);
370 l = rfbi_read_reg(RFBI_CYCLE_TIME(0));
371 DSSDBG("WECYCLETIME %d, RECYCLETIME %d, CSPULSEWIDTH %d, "
373 (l & 0x3f), (l >> 6) & 0x3f, (l >> 12) & 0x3f,
377 static void rfbi_print_timings(void) {}
383 static u32 extif_clk_period;
385 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
387 int bus_tick = extif_clk_period * div;
388 return (ps + bus_tick - 1) / bus_tick * bus_tick;
391 static int calc_reg_timing(struct rfbi_timings *t, int div)
395 t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div);
397 t->we_on_time = round_to_extif_ticks(t->we_on_time, div);
398 t->we_off_time = round_to_extif_ticks(t->we_off_time, div);
399 t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div);
401 t->re_on_time = round_to_extif_ticks(t->re_on_time, div);
402 t->re_off_time = round_to_extif_ticks(t->re_off_time, div);
403 t->re_cycle_time = round_to_extif_ticks(t->re_cycle_time, div);
405 t->access_time = round_to_extif_ticks(t->access_time, div);
406 t->cs_off_time = round_to_extif_ticks(t->cs_off_time, div);
407 t->cs_pulse_width = round_to_extif_ticks(t->cs_pulse_width, div);
409 DSSDBG("[reg]cson %d csoff %d reon %d reoff %d\n",
410 t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
411 DSSDBG("[reg]weon %d weoff %d recyc %d wecyc %d\n",
412 t->we_on_time, t->we_off_time, t->re_cycle_time,
414 DSSDBG("[reg]rdaccess %d cspulse %d\n",
415 t->access_time, t->cs_pulse_width);
417 return rfbi_convert_timings(t);
420 static int calc_extif_timings(struct rfbi_timings *t)
425 rfbi_get_clk_info(&extif_clk_period, &max_clk_div);
426 for (div = 1; div <= max_clk_div; div++) {
427 if (calc_reg_timing(t, div) == 0)
431 if (div <= max_clk_div)
434 DSSERR("can't setup timings\n");
439 void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t)
444 r = calc_extif_timings(t);
446 DSSERR("Failed to calc timings\n");
449 BUG_ON(!t->converted);
451 rfbi_write_reg(RFBI_ONOFF_TIME(rfbi_module), t->tim[0]);
452 rfbi_write_reg(RFBI_CYCLE_TIME(rfbi_module), t->tim[1]);
454 /* TIMEGRANULARITY */
455 REG_FLD_MOD(RFBI_CONFIG(rfbi_module),
456 (t->tim[2] ? 1 : 0), 4, 4);
458 rfbi_print_timings();
461 static int ps_to_rfbi_ticks(int time, int div)
463 unsigned long tick_ps;
466 /* Calculate in picosecs to yield more exact results */
467 tick_ps = 1000000000 / (rfbi.l4_khz) * div;
469 ret = (time + tick_ps - 1) / tick_ps;
474 #ifdef OMAP_RFBI_RATE_LIMIT
475 unsigned long rfbi_get_max_tx_rate(void)
477 unsigned long l4_rate, dss1_rate;
478 int min_l4_ticks = 0;
481 /* According to TI this can't be calculated so make the
482 * adjustments for a couple of known frequencies and warn for
485 static const struct {
486 unsigned long l4_clk; /* HZ */
487 unsigned long dss1_clk; /* HZ */
488 unsigned long min_l4_ticks;
490 { 55, 132, 7, }, /* 7.86 MPix/s */
491 { 110, 110, 12, }, /* 9.16 MPix/s */
492 { 110, 132, 10, }, /* 11 Mpix/s */
493 { 120, 120, 10, }, /* 12 Mpix/s */
494 { 133, 133, 10, }, /* 13.3 Mpix/s */
497 l4_rate = rfbi.l4_khz / 1000;
498 dss1_rate = dss_clk_get_rate(DSS_CLK_FCK) / 1000000;
500 for (i = 0; i < ARRAY_SIZE(ftab); i++) {
501 /* Use a window instead of an exact match, to account
502 * for different DPLL multiplier / divider pairs.
504 if (abs(ftab[i].l4_clk - l4_rate) < 3 &&
505 abs(ftab[i].dss1_clk - dss1_rate) < 3) {
506 min_l4_ticks = ftab[i].min_l4_ticks;
510 if (i == ARRAY_SIZE(ftab)) {
511 /* Can't be sure, return anyway the maximum not
512 * rate-limited. This might cause a problem only for the
513 * tearing synchronisation.
515 DSSERR("can't determine maximum RFBI transfer rate\n");
516 return rfbi.l4_khz * 1000;
518 return rfbi.l4_khz * 1000 / min_l4_ticks;
521 int rfbi_get_max_tx_rate(void)
523 return rfbi.l4_khz * 1000;
527 static void rfbi_get_clk_info(u32 *clk_period, u32 *max_clk_div)
529 *clk_period = 1000000000 / rfbi.l4_khz;
533 static int rfbi_convert_timings(struct rfbi_timings *t)
536 int reon, reoff, weon, weoff, cson, csoff, cs_pulse;
537 int actim, recyc, wecyc;
538 int div = t->clk_div;
540 if (div <= 0 || div > 2)
543 /* Make sure that after conversion it still holds that:
544 * weoff > weon, reoff > reon, recyc >= reoff, wecyc >= weoff,
545 * csoff > cson, csoff >= max(weoff, reoff), actim > reon
547 weon = ps_to_rfbi_ticks(t->we_on_time, div);
548 weoff = ps_to_rfbi_ticks(t->we_off_time, div);
556 reon = ps_to_rfbi_ticks(t->re_on_time, div);
557 reoff = ps_to_rfbi_ticks(t->re_off_time, div);
565 cson = ps_to_rfbi_ticks(t->cs_on_time, div);
566 csoff = ps_to_rfbi_ticks(t->cs_off_time, div);
569 if (csoff < max(weoff, reoff))
570 csoff = max(weoff, reoff);
585 actim = ps_to_rfbi_ticks(t->access_time, div);
591 wecyc = ps_to_rfbi_ticks(t->we_cycle_time, div);
597 recyc = ps_to_rfbi_ticks(t->re_cycle_time, div);
603 cs_pulse = ps_to_rfbi_ticks(t->cs_pulse_width, div);
621 /* xxx FIX module selection missing */
622 int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
623 unsigned hs_pulse_time, unsigned vs_pulse_time,
624 int hs_pol_inv, int vs_pol_inv, int extif_div)
630 hs = ps_to_rfbi_ticks(hs_pulse_time, 1);
631 vs = ps_to_rfbi_ticks(vs_pulse_time, 1);
634 if (mode == OMAP_DSS_RFBI_TE_MODE_2)
636 else /* OMAP_DSS_RFBI_TE_MODE_1 */
643 DSSDBG("setup_te: mode %d hs %d vs %d hs_inv %d vs_inv %d\n",
644 mode, hs, vs, hs_pol_inv, vs_pol_inv);
646 rfbi_write_reg(RFBI_HSYNC_WIDTH, hs);
647 rfbi_write_reg(RFBI_VSYNC_WIDTH, vs);
649 l = rfbi_read_reg(RFBI_CONFIG(0));
661 EXPORT_SYMBOL(omap_rfbi_setup_te);
663 /* xxx FIX module selection missing */
664 int omap_rfbi_enable_te(bool enable, unsigned line)
668 DSSDBG("te %d line %d mode %d\n", enable, line, rfbi.te_mode);
669 if (line > (1 << 11) - 1)
672 l = rfbi_read_reg(RFBI_CONFIG(0));
676 l |= rfbi.te_mode << 2;
679 rfbi_write_reg(RFBI_CONFIG(0), l);
680 rfbi_write_reg(RFBI_LINE_NUMBER, line);
684 EXPORT_SYMBOL(omap_rfbi_enable_te);
687 static void rfbi_enable_config(int enable1, int enable2)
697 rfbi_enable_clocks(1);
699 l = rfbi_read_reg(RFBI_CONTROL);
701 l = FLD_MOD(l, cs, 3, 2);
702 l = FLD_MOD(l, 0, 1, 1);
704 rfbi_write_reg(RFBI_CONTROL, l);
707 l = rfbi_read_reg(RFBI_CONFIG(0));
708 l = FLD_MOD(l, 0, 3, 2); /* TRIGGERMODE: ITE */
709 /*l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */
710 /*l |= FLD_VAL(0, 8, 7); */ /* L4FORMAT, 1pix/L4 */
712 l = FLD_MOD(l, 0, 16, 16); /* A0POLARITY */
713 l = FLD_MOD(l, 1, 20, 20); /* TE_VSYNC_POLARITY */
714 l = FLD_MOD(l, 1, 21, 21); /* HSYNCPOLARITY */
716 l = FLD_MOD(l, OMAP_DSS_RFBI_PARALLELMODE_8, 1, 0);
717 rfbi_write_reg(RFBI_CONFIG(0), l);
719 rfbi_enable_clocks(0);
723 int rfbi_configure(int rfbi_module, int bpp, int lines)
726 int cycle1 = 0, cycle2 = 0, cycle3 = 0;
727 enum omap_rfbi_cycleformat cycleformat;
728 enum omap_rfbi_datatype datatype;
729 enum omap_rfbi_parallelmode parallelmode;
733 datatype = OMAP_DSS_RFBI_DATATYPE_12;
736 datatype = OMAP_DSS_RFBI_DATATYPE_16;
739 datatype = OMAP_DSS_RFBI_DATATYPE_18;
742 datatype = OMAP_DSS_RFBI_DATATYPE_24;
748 rfbi.datatype = datatype;
752 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_8;
755 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_9;
758 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_12;
761 parallelmode = OMAP_DSS_RFBI_PARALLELMODE_16;
767 rfbi.parallelmode = parallelmode;
769 if ((bpp % lines) == 0) {
770 switch (bpp / lines) {
772 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_1_1;
775 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_2_1;
778 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_1;
784 } else if ((2 * bpp % lines) == 0) {
785 if ((2 * bpp / lines) == 3)
786 cycleformat = OMAP_DSS_RFBI_CYCLEFORMAT_3_2;
796 switch (cycleformat) {
797 case OMAP_DSS_RFBI_CYCLEFORMAT_1_1:
801 case OMAP_DSS_RFBI_CYCLEFORMAT_2_1:
806 case OMAP_DSS_RFBI_CYCLEFORMAT_3_1:
812 case OMAP_DSS_RFBI_CYCLEFORMAT_3_2:
814 cycle2 = (lines / 2) | ((lines / 2) << 16);
815 cycle3 = (lines << 16);
819 REG_FLD_MOD(RFBI_CONTROL, 0, 3, 2); /* clear CS */
822 l |= FLD_VAL(parallelmode, 1, 0);
823 l |= FLD_VAL(0, 3, 2); /* TRIGGERMODE: ITE */
824 l |= FLD_VAL(0, 4, 4); /* TIMEGRANULARITY */
825 l |= FLD_VAL(datatype, 6, 5);
826 /* l |= FLD_VAL(2, 8, 7); */ /* L4FORMAT, 2pix/L4 */
827 l |= FLD_VAL(0, 8, 7); /* L4FORMAT, 1pix/L4 */
828 l |= FLD_VAL(cycleformat, 10, 9);
829 l |= FLD_VAL(0, 12, 11); /* UNUSEDBITS */
830 l |= FLD_VAL(0, 16, 16); /* A0POLARITY */
831 l |= FLD_VAL(0, 17, 17); /* REPOLARITY */
832 l |= FLD_VAL(0, 18, 18); /* WEPOLARITY */
833 l |= FLD_VAL(0, 19, 19); /* CSPOLARITY */
834 l |= FLD_VAL(1, 20, 20); /* TE_VSYNC_POLARITY */
835 l |= FLD_VAL(1, 21, 21); /* HSYNCPOLARITY */
836 rfbi_write_reg(RFBI_CONFIG(rfbi_module), l);
838 rfbi_write_reg(RFBI_DATA_CYCLE1(rfbi_module), cycle1);
839 rfbi_write_reg(RFBI_DATA_CYCLE2(rfbi_module), cycle2);
840 rfbi_write_reg(RFBI_DATA_CYCLE3(rfbi_module), cycle3);
843 l = rfbi_read_reg(RFBI_CONTROL);
844 l = FLD_MOD(l, rfbi_module+1, 3, 2); /* Select CSx */
845 l = FLD_MOD(l, 0, 1, 1); /* clear bypass */
846 rfbi_write_reg(RFBI_CONTROL, l);
849 DSSDBG("RFBI config: bpp %d, lines %d, cycles: 0x%x 0x%x 0x%x\n",
850 bpp, lines, cycle1, cycle2, cycle3);
855 int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size,
858 return rfbi_configure(dssdev->phy.rfbi.channel, pixel_size, data_lines);
860 EXPORT_SYMBOL(omap_rfbi_configure);
862 int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
863 u16 *x, u16 *y, u16 *w, u16 *h)
867 dssdev->driver->get_resolution(dssdev, &dw, &dh);
869 if (*x > dw || *y > dh)
881 if (*w == 0 || *h == 0)
884 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
885 dss_setup_partial_planes(dssdev, x, y, w, h, true);
886 dispc_set_lcd_size(dssdev->manager->id, *w, *h);
891 EXPORT_SYMBOL(omap_rfbi_prepare_update);
893 int omap_rfbi_update(struct omap_dss_device *dssdev,
894 u16 x, u16 y, u16 w, u16 h,
895 void (*callback)(void *), void *data)
897 if (dssdev->manager->caps & OMAP_DSS_OVL_MGR_CAP_DISPC) {
898 rfbi_transfer_area(dssdev, w, h, callback, data);
900 struct omap_overlay *ovl;
904 ovl = dssdev->manager->overlays[0];
905 scr_width = ovl->info.screen_width;
906 addr = ovl->info.vaddr;
908 omap_rfbi_write_pixels(addr, scr_width, x, y, w, h);
915 EXPORT_SYMBOL(omap_rfbi_update);
917 void rfbi_dump_regs(struct seq_file *s)
919 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r))
921 dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
923 DUMPREG(RFBI_REVISION);
924 DUMPREG(RFBI_SYSCONFIG);
925 DUMPREG(RFBI_SYSSTATUS);
926 DUMPREG(RFBI_CONTROL);
927 DUMPREG(RFBI_PIXEL_CNT);
928 DUMPREG(RFBI_LINE_NUMBER);
933 DUMPREG(RFBI_STATUS);
935 DUMPREG(RFBI_CONFIG(0));
936 DUMPREG(RFBI_ONOFF_TIME(0));
937 DUMPREG(RFBI_CYCLE_TIME(0));
938 DUMPREG(RFBI_DATA_CYCLE1(0));
939 DUMPREG(RFBI_DATA_CYCLE2(0));
940 DUMPREG(RFBI_DATA_CYCLE3(0));
942 DUMPREG(RFBI_CONFIG(1));
943 DUMPREG(RFBI_ONOFF_TIME(1));
944 DUMPREG(RFBI_CYCLE_TIME(1));
945 DUMPREG(RFBI_DATA_CYCLE1(1));
946 DUMPREG(RFBI_DATA_CYCLE2(1));
947 DUMPREG(RFBI_DATA_CYCLE3(1));
949 DUMPREG(RFBI_VSYNC_WIDTH);
950 DUMPREG(RFBI_HSYNC_WIDTH);
952 dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
956 int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev)
960 rfbi_enable_clocks(1);
962 r = omap_dss_start_device(dssdev);
964 DSSERR("failed to start device\n");
968 r = omap_dispc_register_isr(framedone_callback, NULL,
969 DISPC_IRQ_FRAMEDONE);
971 DSSERR("can't get FRAMEDONE irq\n");
975 dispc_set_lcd_display_type(dssdev->manager->id,
976 OMAP_DSS_LCD_DISPLAY_TFT);
978 dispc_set_parallel_interface_mode(dssdev->manager->id,
979 OMAP_DSS_PARALLELMODE_RFBI);
981 dispc_set_tft_data_lines(dssdev->manager->id, dssdev->ctrl.pixel_size);
983 rfbi_configure(dssdev->phy.rfbi.channel,
984 dssdev->ctrl.pixel_size,
985 dssdev->phy.rfbi.data_lines);
987 rfbi_set_timings(dssdev->phy.rfbi.channel,
988 &dssdev->ctrl.rfbi_timings);
993 omap_dss_stop_device(dssdev);
997 EXPORT_SYMBOL(omapdss_rfbi_display_enable);
999 void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev)
1001 omap_dispc_unregister_isr(framedone_callback, NULL,
1002 DISPC_IRQ_FRAMEDONE);
1003 omap_dss_stop_device(dssdev);
1005 rfbi_enable_clocks(0);
1007 EXPORT_SYMBOL(omapdss_rfbi_display_disable);
1009 int rfbi_init_display(struct omap_dss_device *dssdev)
1011 rfbi.dssdev[dssdev->phy.rfbi.channel] = dssdev;
1012 dssdev->caps = OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
1016 /* RFBI HW IP initialisation */
1017 static int omap_rfbihw_probe(struct platform_device *pdev)
1021 struct resource *rfbi_mem;
1025 spin_lock_init(&rfbi.cmd_lock);
1026 sema_init(&rfbi.bus_lock, 1);
1028 init_completion(&rfbi.cmd_done);
1029 atomic_set(&rfbi.cmd_fifo_full, 0);
1030 atomic_set(&rfbi.cmd_pending, 0);
1032 rfbi_mem = platform_get_resource(rfbi.pdev, IORESOURCE_MEM, 0);
1034 DSSERR("can't get IORESOURCE_MEM RFBI\n");
1037 rfbi.base = ioremap(rfbi_mem->start, resource_size(rfbi_mem));
1039 DSSERR("can't ioremap RFBI\n");
1043 rfbi_enable_clocks(1);
1047 rfbi.l4_khz = dss_clk_get_rate(DSS_CLK_ICK) / 1000;
1049 /* Enable autoidle and smart-idle */
1050 l = rfbi_read_reg(RFBI_SYSCONFIG);
1051 l |= (1 << 0) | (2 << 3);
1052 rfbi_write_reg(RFBI_SYSCONFIG, l);
1054 rev = rfbi_read_reg(RFBI_REVISION);
1055 dev_dbg(&pdev->dev, "OMAP RFBI rev %d.%d\n",
1056 FLD_GET(rev, 7, 4), FLD_GET(rev, 3, 0));
1058 rfbi_enable_clocks(0);
1063 static int omap_rfbihw_remove(struct platform_device *pdev)
1069 static struct platform_driver omap_rfbihw_driver = {
1070 .probe = omap_rfbihw_probe,
1071 .remove = omap_rfbihw_remove,
1073 .name = "omapdss_rfbi",
1074 .owner = THIS_MODULE,
1078 int rfbi_init_platform_driver(void)
1080 return platform_driver_register(&omap_rfbihw_driver);
1083 void rfbi_uninit_platform_driver(void)
1085 return platform_driver_unregister(&omap_rfbihw_driver);