2 * MUSB OTG driver defines
4 * Copyright 2005 Mentor Graphics Corporation
5 * Copyright (C) 2005-2006 by Texas Instruments
6 * Copyright (C) 2006-2007 Nokia Corporation
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 #ifndef __MUSB_CORE_H__
36 #define __MUSB_CORE_H__
38 #include <linux/slab.h>
39 #include <linux/list.h>
40 #include <linux/interrupt.h>
41 #include <linux/errno.h>
42 #include <linux/timer.h>
43 #include <linux/clk.h>
44 #include <linux/device.h>
45 #include <linux/usb/ch9.h>
46 #include <linux/usb/gadget.h>
47 #include <linux/usb.h>
48 #include <linux/usb/otg.h>
49 #include <linux/usb/musb.h>
55 /* Helper defines for struct musb->hwvers */
56 #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
57 #define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
58 #define MUSB_HWVERS_RC 0x8000
59 #define MUSB_HWVERS_1300 0x52C
60 #define MUSB_HWVERS_1400 0x590
61 #define MUSB_HWVERS_1800 0x720
62 #define MUSB_HWVERS_1900 0x784
63 #define MUSB_HWVERS_2000 0x800
65 #include "musb_debug.h"
69 #include "musb_regs.h"
71 #include "musb_gadget.h"
72 #include <linux/usb/hcd.h>
73 #include "musb_host.h"
77 #ifdef CONFIG_USB_MUSB_OTG
79 #define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
80 #define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
81 #define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
83 /* NOTE: otg and peripheral-only state machines start at B_IDLE.
84 * OTG or host-only go to A_IDLE when ID is sensed.
86 #define is_peripheral_active(m) (!(m)->is_host)
87 #define is_host_active(m) ((m)->is_host)
90 #define is_peripheral_enabled(musb) is_peripheral_capable()
91 #define is_host_enabled(musb) is_host_capable()
92 #define is_otg_enabled(musb) 0
94 #define is_peripheral_active(musb) is_peripheral_capable()
95 #define is_host_active(musb) is_host_capable()
98 #if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL)
99 /* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always
100 * override that choice selection (often USB_GADGET_DUMMY_HCD).
102 #ifndef CONFIG_USB_GADGET_MUSB_HDRC
103 #error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC
105 #endif /* need MUSB gadget selection */
107 #ifndef CONFIG_HAVE_CLK
108 /* Dummy stub for clk framework */
109 #define clk_get(dev, id) NULL
110 #define clk_put(clock) do {} while (0)
111 #define clk_enable(clock) do {} while (0)
112 #define clk_disable(clock) do {} while (0)
115 #ifdef CONFIG_PROC_FS
116 #include <linux/fs.h>
117 #define MUSB_CONFIG_PROC_FS
120 /****************************** PERIPHERAL ROLE *****************************/
122 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
124 #define is_peripheral_capable() (1)
126 extern irqreturn_t musb_g_ep0_irq(struct musb *);
127 extern void musb_g_tx(struct musb *, u8);
128 extern void musb_g_rx(struct musb *, u8);
129 extern void musb_g_reset(struct musb *);
130 extern void musb_g_suspend(struct musb *);
131 extern void musb_g_resume(struct musb *);
132 extern void musb_g_wakeup(struct musb *);
133 extern void musb_g_disconnect(struct musb *);
137 #define is_peripheral_capable() (0)
139 static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; }
140 static inline void musb_g_reset(struct musb *m) {}
141 static inline void musb_g_suspend(struct musb *m) {}
142 static inline void musb_g_resume(struct musb *m) {}
143 static inline void musb_g_wakeup(struct musb *m) {}
144 static inline void musb_g_disconnect(struct musb *m) {}
148 /****************************** HOST ROLE ***********************************/
150 #ifdef CONFIG_USB_MUSB_HDRC_HCD
152 #define is_host_capable() (1)
154 extern irqreturn_t musb_h_ep0_irq(struct musb *);
155 extern void musb_host_tx(struct musb *, u8);
156 extern void musb_host_rx(struct musb *, u8);
160 #define is_host_capable() (0)
162 static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; }
163 static inline void musb_host_tx(struct musb *m, u8 e) {}
164 static inline void musb_host_rx(struct musb *m, u8 e) {}
169 /****************************** CONSTANTS ********************************/
171 #ifndef MUSB_C_NUM_EPS
172 #define MUSB_C_NUM_EPS ((u8)16)
175 #ifndef MUSB_MAX_END0_PACKET
176 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
179 /* host side ep0 states */
180 enum musb_h_ep0_state {
182 MUSB_EP0_START, /* expect ack of setup */
183 MUSB_EP0_IN, /* expect IN DATA */
184 MUSB_EP0_OUT, /* expect ack of OUT DATA */
185 MUSB_EP0_STATUS, /* expect ack of STATUS */
186 } __attribute__ ((packed));
188 /* peripheral side ep0 states */
189 enum musb_g_ep0_state {
190 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
191 MUSB_EP0_STAGE_SETUP, /* received SETUP */
192 MUSB_EP0_STAGE_TX, /* IN data */
193 MUSB_EP0_STAGE_RX, /* OUT data */
194 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
195 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
196 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
197 } __attribute__ ((packed));
200 * OTG protocol constants. See USB OTG 1.3 spec,
201 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
203 #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
204 #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
205 #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
206 #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
209 /*************************** REGISTER ACCESS ********************************/
211 /* Endpoint registers (other than dynfifo setup) can be accessed either
212 * directly with the "flat" model, or after setting up an index register.
215 #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \
216 || defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_BLACKFIN) \
217 || defined(CONFIG_ARCH_OMAP4)
218 /* REVISIT indexed access seemed to
219 * misbehave (on DaVinci) for at least peripheral IN ...
221 #define MUSB_FLAT_REG
224 /* TUSB mapping: "flat" plus ep0 special cases */
225 #if defined(CONFIG_USB_MUSB_TUSB6010)
226 #define musb_ep_select(_mbase, _epnum) \
227 musb_writeb((_mbase), MUSB_INDEX, (_epnum))
228 #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
230 /* "flat" mapping: each endpoint has its own i/o address */
231 #elif defined(MUSB_FLAT_REG)
232 #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
233 #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
235 /* "indexed" mapping: INDEX register controls register bank select */
237 #define musb_ep_select(_mbase, _epnum) \
238 musb_writeb((_mbase), MUSB_INDEX, (_epnum))
239 #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
242 /****************************** FUNCTIONS ********************************/
244 #define MUSB_HST_MODE(_musb)\
245 { (_musb)->is_host = true; }
246 #define MUSB_DEV_MODE(_musb) \
247 { (_musb)->is_host = false; }
249 #define test_devctl_hst_mode(_x) \
250 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
252 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
254 /******************************** TYPES *************************************/
257 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
258 * @init: turns on clocks, sets up platform-specific registers, etc
259 * @exit: undoes @init
260 * @suspend: platform-specific suspend, e.g. context save
261 * @resume: platform-specific resume, e.g. context restore
262 * @set_mode: forcefully changes operating mode
263 * @try_ilde: tries to idle the IP
264 * @vbus_status: returns vbus status if possible
265 * @set_vbus: forces vbus status
267 struct musb_platform_ops {
268 int (*init)(struct musb *musb);
269 int (*exit)(struct musb *musb);
271 int (*suspend)(struct musb *musb);
272 int (*resume)(struct musb *musb);
274 void (*enable)(struct musb *musb);
275 void (*disable)(struct musb *musb);
277 int (*set_mode)(struct musb *musb, u8 mode);
278 void (*try_idle)(struct musb *musb, unsigned long timeout);
280 int (*vbus_status)(struct musb *musb);
281 void (*set_vbus)(struct musb *musb, int on);
285 * struct musb_hw_ep - endpoint hardware (bidirectional)
287 * Ordered slightly for better cacheline locality.
294 #ifdef CONFIG_USB_MUSB_TUSB6010
298 /* index in musb->endpoints[] */
301 /* hardware configuration, possibly dynamic */
303 bool tx_double_buffered;
304 bool rx_double_buffered;
305 u16 max_packet_sz_tx;
306 u16 max_packet_sz_rx;
308 struct dma_channel *tx_channel;
309 struct dma_channel *rx_channel;
311 #ifdef CONFIG_USB_MUSB_TUSB6010
312 /* TUSB has "asynchronous" and "synchronous" dma modes */
313 dma_addr_t fifo_async;
314 dma_addr_t fifo_sync;
315 void __iomem *fifo_sync_va;
318 #ifdef CONFIG_USB_MUSB_HDRC_HCD
319 void __iomem *target_regs;
321 /* currently scheduled peripheral endpoint */
322 struct musb_qh *in_qh;
323 struct musb_qh *out_qh;
329 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
330 /* peripheral side */
331 struct musb_ep ep_in; /* TX */
332 struct musb_ep ep_out; /* RX */
336 static inline struct usb_request *next_in_request(struct musb_hw_ep *hw_ep)
338 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
339 return next_request(&hw_ep->ep_in);
345 static inline struct usb_request *next_out_request(struct musb_hw_ep *hw_ep)
347 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
348 return next_request(&hw_ep->ep_out);
354 struct musb_csr_regs {
356 u16 txmaxp, txcsr, rxmaxp, rxcsr;
357 u16 rxfifoadd, txfifoadd;
358 u8 txtype, txinterval, rxtype, rxinterval;
359 u8 rxfifosz, txfifosz;
360 u8 txfunaddr, txhubaddr, txhubport;
361 u8 rxfunaddr, rxhubaddr, rxhubport;
364 struct musb_context_registers {
366 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
367 defined(CONFIG_ARCH_OMAP4)
368 u32 otg_sysconfig, otg_forcestandby;
371 u16 intrtxe, intrrxe;
376 u8 devctl, busctl, misc;
378 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
382 * struct musb - Driver instance data.
388 const struct musb_platform_ops *ops;
389 struct musb_context_registers context;
391 irqreturn_t (*isr)(int, void *);
392 struct work_struct irq_work;
395 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
396 #define MUSB_PORT_STAT_RESUME (1 << 31)
400 #ifdef CONFIG_USB_MUSB_HDRC_HCD
401 unsigned long rh_timer;
403 enum musb_h_ep0_state ep0_stage;
405 /* bulk traffic normally dedicates endpoint hardware, and each
406 * direction has its own ring of host side endpoints.
407 * we try to progress the transfer at the head of each endpoint's
408 * queue until it completes or NAKs too much; then we try the next
411 struct musb_hw_ep *bulk_ep;
413 struct list_head control; /* of musb_qh */
414 struct list_head in_bulk; /* of musb_qh */
415 struct list_head out_bulk; /* of musb_qh */
417 struct timer_list otg_timer;
420 /* called with IRQs blocked; ON/nonzero implies starting a session,
421 * and waiting at least a_wait_vrise_tmout.
423 void (*board_set_vbus)(struct musb *, int is_on);
425 struct dma_controller *dma_controller;
427 struct device *controller;
428 void __iomem *ctrl_base;
431 #ifdef CONFIG_USB_MUSB_TUSB6010
434 void __iomem *sync_va;
437 /* passed down from chip/board specific irq handlers */
442 struct otg_transceiver *xceiv;
447 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
448 #define control_ep endpoints
450 #define VBUSERR_RETRY_COUNT 3
455 u8 board_mode; /* enum musb_mode */
456 int (*board_set_power)(int state);
458 int (*set_clock)(struct clk *clk, int is_active);
460 u8 min_power; /* vbus for periph, in mA/2 */
464 int a_wait_bcon; /* VBUS timeout in msecs */
465 unsigned long idle_timeout; /* Next timeout in jiffies */
467 /* active means connected and not suspended */
468 unsigned is_active:1;
470 unsigned is_multipoint:1;
471 unsigned ignore_disconnect:1; /* during bus resets */
473 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
474 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
475 unsigned dyn_fifo:1; /* dynamic FIFO supported? */
477 unsigned bulk_split:1;
478 #define can_bulk_split(musb,type) \
479 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
481 unsigned bulk_combine:1;
482 #define can_bulk_combine(musb,type) \
483 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
485 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
486 /* is_suspended means USB B_PERIPHERAL suspend */
487 unsigned is_suspended:1;
489 /* may_wakeup means remote wakeup is enabled */
490 unsigned may_wakeup:1;
492 /* is_self_powered is reported in device status and the
493 * config descriptor. is_bus_powered means B_PERIPHERAL
494 * draws some VBUS current; both can be true.
496 unsigned is_self_powered:1;
497 unsigned is_bus_powered:1;
499 unsigned set_address:1;
500 unsigned test_mode:1;
501 unsigned softconnect:1;
505 u16 ackpend; /* ep0 */
506 enum musb_g_ep0_state ep0_state;
507 struct usb_gadget g; /* the gadget */
508 struct usb_gadget_driver *gadget_driver; /* its driver */
511 struct musb_hdrc_config *config;
513 #ifdef MUSB_CONFIG_PROC_FS
514 struct proc_dir_entry *proc_entry;
518 #ifdef CONFIG_USB_GADGET_MUSB_HDRC
519 static inline struct musb *gadget_to_musb(struct usb_gadget *g)
521 return container_of(g, struct musb, g);
525 #ifdef CONFIG_BLACKFIN
526 static inline int musb_read_fifosize(struct musb *musb,
527 struct musb_hw_ep *hw_ep, u8 epnum)
529 musb->nr_endpoints++;
530 musb->epmask |= (1 << epnum);
533 hw_ep->max_packet_sz_tx = 128;
534 hw_ep->max_packet_sz_rx = 128;
536 hw_ep->max_packet_sz_tx = 1024;
537 hw_ep->max_packet_sz_rx = 1024;
539 hw_ep->is_shared_fifo = false;
544 static inline void musb_configure_ep0(struct musb *musb)
546 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
547 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
548 musb->endpoints[0].is_shared_fifo = true;
553 static inline int musb_read_fifosize(struct musb *musb,
554 struct musb_hw_ep *hw_ep, u8 epnum)
556 void *mbase = musb->mregs;
559 /* read from core using indexed model */
560 reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
561 /* 0's returned when no more endpoints */
565 musb->nr_endpoints++;
566 musb->epmask |= (1 << epnum);
568 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
570 /* shared TX/RX FIFO? */
571 if ((reg & 0xf0) == 0xf0) {
572 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
573 hw_ep->is_shared_fifo = true;
576 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
577 hw_ep->is_shared_fifo = false;
583 static inline void musb_configure_ep0(struct musb *musb)
585 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
586 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
587 musb->endpoints[0].is_shared_fifo = true;
589 #endif /* CONFIG_BLACKFIN */
592 /***************************** Glue it together *****************************/
594 extern const char musb_driver_name[];
596 extern void musb_start(struct musb *musb);
597 extern void musb_stop(struct musb *musb);
599 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
600 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
602 extern void musb_load_testpacket(struct musb *);
604 extern irqreturn_t musb_interrupt(struct musb *);
606 extern void musb_hnp_stop(struct musb *musb);
609 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
610 defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_BLACKFIN)
611 extern void musb_platform_save_context(struct musb *musb,
612 struct musb_context_registers *musb_context);
613 extern void musb_platform_restore_context(struct musb *musb,
614 struct musb_context_registers *musb_context);
616 #define musb_platform_save_context(m, x) do {} while (0)
617 #define musb_platform_restore_context(m, x) do {} while (0)
622 static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
624 if (musb->ops->set_vbus)
625 musb->ops->set_vbus(musb, is_on);
628 static inline void musb_platform_enable(struct musb *musb)
630 if (musb->ops->enable)
631 musb->ops->enable(musb);
634 static inline void musb_platform_disable(struct musb *musb)
636 if (musb->ops->disable)
637 musb->ops->disable(musb);
640 static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
642 if (!musb->ops->set_mode)
645 return musb->ops->set_mode(musb, mode);
648 static inline void musb_platform_try_idle(struct musb *musb,
649 unsigned long timeout)
651 if (musb->ops->try_idle)
652 musb->ops->try_idle(musb, timeout);
655 static inline int musb_platform_get_vbus_status(struct musb *musb)
657 if (!musb->ops->vbus_status)
660 return musb->ops->vbus_status(musb);
663 static inline int musb_platform_init(struct musb *musb)
665 if (!musb->ops->init)
668 return musb->ops->init(musb);
671 static inline int musb_platform_exit(struct musb *musb)
673 if (!musb->ops->exit)
676 return musb->ops->exit(musb);
679 static inline int musb_platform_suspend(struct musb *musb)
681 if (!musb->ops->suspend)
684 return musb->ops->suspend(musb);
687 static inline int musb_platform_resume(struct musb *musb)
689 if (!musb->ops->resume)
692 return musb->ops->resume(musb);
695 #endif /* __MUSB_CORE_H__ */