2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <asm/unaligned.h>
27 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
28 #define PORT_RWC_BITS (PORT_CSC | PORT_PEC | PORT_WRC | PORT_OCC | \
29 PORT_RC | PORT_PLC | PORT_PE)
31 static void xhci_common_hub_descriptor(struct xhci_hcd *xhci,
32 struct usb_hub_descriptor *desc, int ports)
36 desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
37 desc->bHubContrCurrent = 0;
39 desc->bNbrPorts = ports;
40 /* Ugh, these should be #defines, FIXME */
41 /* Using table 11-13 in USB 2.0 spec. */
43 /* Bits 1:0 - support port power switching, or power always on */
44 if (HCC_PPC(xhci->hcc_params))
48 /* Bit 2 - root hubs are not part of a compound device */
49 /* Bits 4:3 - individual port over current protection */
51 /* Bits 6:5 - no TTs in root ports */
52 /* Bit 7 - no port indicators */
53 desc->wHubCharacteristics = cpu_to_le16(temp);
56 /* Fill in the USB 2.0 roothub descriptor */
57 static void xhci_usb2_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
58 struct usb_hub_descriptor *desc)
62 __u8 port_removable[(USB_MAXCHILDREN + 1 + 7) / 8];
66 ports = xhci->num_usb2_ports;
68 xhci_common_hub_descriptor(xhci, desc, ports);
69 desc->bDescriptorType = 0x29;
70 temp = 1 + (ports / 8);
71 desc->bDescLength = 7 + 2 * temp;
73 /* The Device Removable bits are reported on a byte granularity.
74 * If the port doesn't exist within that byte, the bit is set to 0.
76 memset(port_removable, 0, sizeof(port_removable));
77 for (i = 0; i < ports; i++) {
78 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
79 /* If a device is removable, PORTSC reports a 0, same as in the
80 * hub descriptor DeviceRemovable bits.
82 if (portsc & PORT_DEV_REMOVE)
83 /* This math is hairy because bit 0 of DeviceRemovable
84 * is reserved, and bit 1 is for port 1, etc.
86 port_removable[(i + 1) / 8] |= 1 << ((i + 1) % 8);
89 /* ch11.h defines a hub descriptor that has room for USB_MAXCHILDREN
90 * ports on it. The USB 2.0 specification says that there are two
91 * variable length fields at the end of the hub descriptor:
92 * DeviceRemovable and PortPwrCtrlMask. But since we can have less than
93 * USB_MAXCHILDREN ports, we may need to use the DeviceRemovable array
94 * to set PortPwrCtrlMask bits. PortPwrCtrlMask must always be set to
95 * 0xFF, so we initialize the both arrays (DeviceRemovable and
96 * PortPwrCtrlMask) to 0xFF. Then we set the DeviceRemovable for each
97 * set of ports that actually exist.
99 memset(desc->u.hs.DeviceRemovable, 0xff,
100 sizeof(desc->u.hs.DeviceRemovable));
101 memset(desc->u.hs.PortPwrCtrlMask, 0xff,
102 sizeof(desc->u.hs.PortPwrCtrlMask));
104 for (i = 0; i < (ports + 1 + 7) / 8; i++)
105 memset(&desc->u.hs.DeviceRemovable[i], port_removable[i],
109 /* Fill in the USB 3.0 roothub descriptor */
110 static void xhci_usb3_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
111 struct usb_hub_descriptor *desc)
118 ports = xhci->num_usb3_ports;
119 xhci_common_hub_descriptor(xhci, desc, ports);
120 desc->bDescriptorType = 0x2a;
121 desc->bDescLength = 12;
123 /* header decode latency should be zero for roothubs,
124 * see section 4.23.5.2.
126 desc->u.ss.bHubHdrDecLat = 0;
127 desc->u.ss.wHubDelay = 0;
130 /* bit 0 is reserved, bit 1 is for port 1, etc. */
131 for (i = 0; i < ports; i++) {
132 portsc = xhci_readl(xhci, xhci->usb3_ports[i]);
133 if (portsc & PORT_DEV_REMOVE)
134 port_removable |= 1 << (i + 1);
136 memset(&desc->u.ss.DeviceRemovable,
137 (__force __u16) cpu_to_le16(port_removable),
141 static void xhci_hub_descriptor(struct usb_hcd *hcd, struct xhci_hcd *xhci,
142 struct usb_hub_descriptor *desc)
145 if (hcd->speed == HCD_USB3)
146 xhci_usb3_hub_descriptor(hcd, xhci, desc);
148 xhci_usb2_hub_descriptor(hcd, xhci, desc);
152 static unsigned int xhci_port_speed(unsigned int port_status)
154 if (DEV_LOWSPEED(port_status))
155 return USB_PORT_STAT_LOW_SPEED;
156 if (DEV_HIGHSPEED(port_status))
157 return USB_PORT_STAT_HIGH_SPEED;
159 * FIXME: Yes, we should check for full speed, but the core uses that as
160 * a default in portspeed() in usb/core/hub.c (which is the only place
161 * USB_PORT_STAT_*_SPEED is used).
167 * These bits are Read Only (RO) and should be saved and written to the
168 * registers: 0, 3, 10:13, 30
169 * connect status, over-current status, port speed, and device removable.
170 * connect status and port speed are also sticky - meaning they're in
171 * the AUX well and they aren't changed by a hot, warm, or cold reset.
173 #define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
175 * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
176 * bits 5:8, 9, 14:15, 25:27
177 * link state, port power, port indicator state, "wake on" enable state
179 #define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
181 * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
184 #define XHCI_PORT_RW1S ((1<<4))
186 * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
187 * bits 1, 17, 18, 19, 20, 21, 22, 23
188 * port enable/disable, and
189 * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
190 * over-current, reset, link state, and L1 change
192 #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
194 * Bit 16 is RW, and writing a '1' to it causes the link state control to be
197 #define XHCI_PORT_RW ((1<<16))
199 * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
202 #define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
205 * Given a port state, this function returns a value that would result in the
206 * port being in the same state, if the value was written to the port status
208 * Save Read Only (RO) bits and save read/write bits where
209 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
210 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
212 u32 xhci_port_state_to_neutral(u32 state)
214 /* Save read-only status and port state */
215 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
219 * find slot id based on port number.
220 * @port: The one-based port number from one of the two split roothubs.
222 int xhci_find_slot_id_by_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
227 enum usb_device_speed speed;
230 for (i = 0; i < MAX_HC_SLOTS; i++) {
233 speed = xhci->devs[i]->udev->speed;
234 if (((speed == USB_SPEED_SUPER) == (hcd->speed == HCD_USB3))
235 && xhci->devs[i]->port == port) {
246 * It issues stop endpoint command for EP 0 to 30. And wait the last command
248 * suspend will set to 1, if suspend bit need to set in command.
250 static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
252 struct xhci_virt_device *virt_dev;
253 struct xhci_command *cmd;
260 virt_dev = xhci->devs[slot_id];
261 cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
263 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
267 spin_lock_irqsave(&xhci->lock, flags);
268 for (i = LAST_EP_INDEX; i > 0; i--) {
269 if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
270 xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
272 cmd->command_trb = xhci->cmd_ring->enqueue;
273 list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
274 xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
275 xhci_ring_cmd_db(xhci);
276 spin_unlock_irqrestore(&xhci->lock, flags);
278 /* Wait for last stop endpoint command to finish */
279 timeleft = wait_for_completion_interruptible_timeout(
281 USB_CTRL_SET_TIMEOUT);
283 xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
284 timeleft == 0 ? "Timeout" : "Signal");
285 spin_lock_irqsave(&xhci->lock, flags);
286 /* The timeout might have raced with the event ring handler, so
287 * only delete from the list if the item isn't poisoned.
289 if (cmd->cmd_list.next != LIST_POISON1)
290 list_del(&cmd->cmd_list);
291 spin_unlock_irqrestore(&xhci->lock, flags);
293 goto command_cleanup;
297 xhci_free_command(xhci, cmd);
302 * Ring device, it rings the all doorbells unconditionally.
304 void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
308 for (i = 0; i < LAST_EP_INDEX + 1; i++)
309 if (xhci->devs[slot_id]->eps[i].ring &&
310 xhci->devs[slot_id]->eps[i].ring->dequeue)
311 xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
316 static void xhci_disable_port(struct usb_hcd *hcd, struct xhci_hcd *xhci,
317 u16 wIndex, __le32 __iomem *addr, u32 port_status)
319 /* Don't allow the USB core to disable SuperSpeed ports. */
320 if (hcd->speed == HCD_USB3) {
321 xhci_dbg(xhci, "Ignoring request to disable "
322 "SuperSpeed port.\n");
326 /* Write 1 to disable the port */
327 xhci_writel(xhci, port_status | PORT_PE, addr);
328 port_status = xhci_readl(xhci, addr);
329 xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
330 wIndex, port_status);
333 static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
334 u16 wIndex, __le32 __iomem *addr, u32 port_status)
336 char *port_change_bit;
340 case USB_PORT_FEAT_C_RESET:
342 port_change_bit = "reset";
344 case USB_PORT_FEAT_C_BH_PORT_RESET:
346 port_change_bit = "warm(BH) reset";
348 case USB_PORT_FEAT_C_CONNECTION:
350 port_change_bit = "connect";
352 case USB_PORT_FEAT_C_OVER_CURRENT:
354 port_change_bit = "over-current";
356 case USB_PORT_FEAT_C_ENABLE:
358 port_change_bit = "enable/disable";
360 case USB_PORT_FEAT_C_SUSPEND:
362 port_change_bit = "suspend/resume";
364 case USB_PORT_FEAT_C_PORT_LINK_STATE:
366 port_change_bit = "link state";
369 /* Should never happen */
372 /* Change bits are all write 1 to clear */
373 xhci_writel(xhci, port_status | status, addr);
374 port_status = xhci_readl(xhci, addr);
375 xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
376 port_change_bit, wIndex, port_status);
379 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
380 u16 wIndex, char *buf, u16 wLength)
382 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
385 u32 temp, temp1, status;
387 __le32 __iomem **port_array;
389 struct xhci_bus_state *bus_state;
392 if (hcd->speed == HCD_USB3) {
393 ports = xhci->num_usb3_ports;
394 port_array = xhci->usb3_ports;
396 ports = xhci->num_usb2_ports;
397 port_array = xhci->usb2_ports;
399 bus_state = &xhci->bus_state[hcd_index(hcd)];
401 spin_lock_irqsave(&xhci->lock, flags);
404 /* No power source, over-current reported per port */
407 case GetHubDescriptor:
408 /* Check to make sure userspace is asking for the USB 3.0 hub
409 * descriptor for the USB 3.0 roothub. If not, we stall the
410 * endpoint, like external hubs do.
412 if (hcd->speed == HCD_USB3 &&
413 (wLength < USB_DT_SS_HUB_SIZE ||
414 wValue != (USB_DT_SS_HUB << 8))) {
415 xhci_dbg(xhci, "Wrong hub descriptor type for "
416 "USB 3.0 roothub.\n");
419 xhci_hub_descriptor(hcd, xhci,
420 (struct usb_hub_descriptor *) buf);
423 if (!wIndex || wIndex > ports)
427 temp = xhci_readl(xhci, port_array[wIndex]);
428 if (temp == 0xffffffff) {
432 xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
434 /* wPortChange bits */
436 status |= USB_PORT_STAT_C_CONNECTION << 16;
438 status |= USB_PORT_STAT_C_ENABLE << 16;
439 if ((temp & PORT_OCC))
440 status |= USB_PORT_STAT_C_OVERCURRENT << 16;
441 if ((temp & PORT_RC))
442 status |= USB_PORT_STAT_C_RESET << 16;
444 if (hcd->speed == HCD_USB3) {
445 if ((temp & PORT_PLC))
446 status |= USB_PORT_STAT_C_LINK_STATE << 16;
447 if ((temp & PORT_WRC))
448 status |= USB_PORT_STAT_C_BH_RESET << 16;
451 if (hcd->speed != HCD_USB3) {
452 if ((temp & PORT_PLS_MASK) == XDEV_U3
453 && (temp & PORT_POWER))
454 status |= USB_PORT_STAT_SUSPEND;
456 if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
457 if ((temp & PORT_RESET) || !(temp & PORT_PE))
459 if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
460 bus_state->resume_done[wIndex])) {
461 xhci_dbg(xhci, "Resume USB2 port %d\n",
463 bus_state->resume_done[wIndex] = 0;
464 temp1 = xhci_port_state_to_neutral(temp);
465 temp1 &= ~PORT_PLS_MASK;
466 temp1 |= PORT_LINK_STROBE | XDEV_U0;
467 xhci_writel(xhci, temp1, port_array[wIndex]);
469 xhci_dbg(xhci, "set port %d resume\n",
471 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
474 xhci_dbg(xhci, "slot_id is zero\n");
477 xhci_ring_device(xhci, slot_id);
478 bus_state->port_c_suspend |= 1 << wIndex;
479 bus_state->suspended_ports &= ~(1 << wIndex);
482 if ((temp & PORT_PLS_MASK) == XDEV_U0
483 && (temp & PORT_POWER)
484 && (bus_state->suspended_ports & (1 << wIndex))) {
485 bus_state->suspended_ports &= ~(1 << wIndex);
486 if (hcd->speed != HCD_USB3)
487 bus_state->port_c_suspend |= 1 << wIndex;
489 if (temp & PORT_CONNECT) {
490 status |= USB_PORT_STAT_CONNECTION;
491 status |= xhci_port_speed(temp);
494 status |= USB_PORT_STAT_ENABLE;
496 status |= USB_PORT_STAT_OVERCURRENT;
497 if (temp & PORT_RESET)
498 status |= USB_PORT_STAT_RESET;
499 if (temp & PORT_POWER) {
500 if (hcd->speed == HCD_USB3)
501 status |= USB_SS_PORT_STAT_POWER;
503 status |= USB_PORT_STAT_POWER;
505 /* Port Link State */
506 if (hcd->speed == HCD_USB3) {
507 /* resume state is a xHCI internal state.
508 * Do not report it to usb core.
510 if ((temp & PORT_PLS_MASK) != XDEV_RESUME)
511 status |= (temp & PORT_PLS_MASK);
513 if (bus_state->port_c_suspend & (1 << wIndex))
514 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
515 xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
516 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
519 if (wValue == USB_PORT_FEAT_LINK_STATE)
520 link_state = (wIndex & 0xff00) >> 3;
522 if (!wIndex || wIndex > ports)
525 temp = xhci_readl(xhci, port_array[wIndex]);
526 if (temp == 0xffffffff) {
530 temp = xhci_port_state_to_neutral(temp);
531 /* FIXME: What new port features do we need to support? */
533 case USB_PORT_FEAT_SUSPEND:
534 temp = xhci_readl(xhci, port_array[wIndex]);
535 /* In spec software should not attempt to suspend
536 * a port unless the port reports that it is in the
537 * enabled (PED = ‘1’,PLS < ‘3’) state.
539 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
540 || (temp & PORT_PLS_MASK) >= XDEV_U3) {
541 xhci_warn(xhci, "USB core suspending device "
542 "not in U0/U1/U2.\n");
546 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
549 xhci_warn(xhci, "slot_id is zero\n");
552 /* unlock to execute stop endpoint commands */
553 spin_unlock_irqrestore(&xhci->lock, flags);
554 xhci_stop_device(xhci, slot_id, 1);
555 spin_lock_irqsave(&xhci->lock, flags);
557 temp = xhci_port_state_to_neutral(temp);
558 temp &= ~PORT_PLS_MASK;
559 temp |= PORT_LINK_STROBE | XDEV_U3;
560 xhci_writel(xhci, temp, port_array[wIndex]);
562 spin_unlock_irqrestore(&xhci->lock, flags);
563 msleep(10); /* wait device to enter */
564 spin_lock_irqsave(&xhci->lock, flags);
566 temp = xhci_readl(xhci, port_array[wIndex]);
567 bus_state->suspended_ports |= 1 << wIndex;
569 case USB_PORT_FEAT_LINK_STATE:
570 temp = xhci_readl(xhci, port_array[wIndex]);
571 /* Software should not attempt to set
572 * port link state above '5' (Rx.Detect) and the port
575 if ((temp & PORT_PE) == 0 ||
576 (link_state > USB_SS_PORT_LS_RX_DETECT)) {
577 xhci_warn(xhci, "Cannot set link state.\n");
581 if (link_state == USB_SS_PORT_LS_U3) {
582 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
585 /* unlock to execute stop endpoint
587 spin_unlock_irqrestore(&xhci->lock,
589 xhci_stop_device(xhci, slot_id, 1);
590 spin_lock_irqsave(&xhci->lock, flags);
594 temp = xhci_port_state_to_neutral(temp);
595 temp &= ~PORT_PLS_MASK;
596 temp |= PORT_LINK_STROBE | link_state;
597 xhci_writel(xhci, temp, port_array[wIndex]);
599 spin_unlock_irqrestore(&xhci->lock, flags);
600 msleep(20); /* wait device to enter */
601 spin_lock_irqsave(&xhci->lock, flags);
603 temp = xhci_readl(xhci, port_array[wIndex]);
604 if (link_state == USB_SS_PORT_LS_U3)
605 bus_state->suspended_ports |= 1 << wIndex;
607 case USB_PORT_FEAT_POWER:
609 * Turn on ports, even if there isn't per-port switching.
610 * HC will report connect events even before this is set.
611 * However, khubd will ignore the roothub events until
612 * the roothub is registered.
614 xhci_writel(xhci, temp | PORT_POWER,
617 temp = xhci_readl(xhci, port_array[wIndex]);
618 xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
620 case USB_PORT_FEAT_RESET:
621 temp = (temp | PORT_RESET);
622 xhci_writel(xhci, temp, port_array[wIndex]);
624 temp = xhci_readl(xhci, port_array[wIndex]);
625 xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
627 case USB_PORT_FEAT_BH_PORT_RESET:
629 xhci_writel(xhci, temp, port_array[wIndex]);
631 temp = xhci_readl(xhci, port_array[wIndex]);
636 /* unblock any posted writes */
637 temp = xhci_readl(xhci, port_array[wIndex]);
639 case ClearPortFeature:
640 if (!wIndex || wIndex > ports)
643 temp = xhci_readl(xhci, port_array[wIndex]);
644 if (temp == 0xffffffff) {
648 /* FIXME: What new port features do we need to support? */
649 temp = xhci_port_state_to_neutral(temp);
651 case USB_PORT_FEAT_SUSPEND:
652 temp = xhci_readl(xhci, port_array[wIndex]);
653 xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
654 xhci_dbg(xhci, "PORTSC %04x\n", temp);
655 if (temp & PORT_RESET)
657 if (temp & XDEV_U3) {
658 if ((temp & PORT_PE) == 0)
661 temp = xhci_port_state_to_neutral(temp);
662 temp &= ~PORT_PLS_MASK;
663 temp |= PORT_LINK_STROBE | XDEV_RESUME;
664 xhci_writel(xhci, temp,
667 spin_unlock_irqrestore(&xhci->lock,
670 spin_lock_irqsave(&xhci->lock, flags);
672 temp = xhci_readl(xhci,
674 temp = xhci_port_state_to_neutral(temp);
675 temp &= ~PORT_PLS_MASK;
676 temp |= PORT_LINK_STROBE | XDEV_U0;
677 xhci_writel(xhci, temp,
680 bus_state->port_c_suspend |= 1 << wIndex;
682 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
685 xhci_dbg(xhci, "slot_id is zero\n");
688 xhci_ring_device(xhci, slot_id);
690 case USB_PORT_FEAT_C_SUSPEND:
691 bus_state->port_c_suspend &= ~(1 << wIndex);
692 case USB_PORT_FEAT_C_RESET:
693 case USB_PORT_FEAT_C_BH_PORT_RESET:
694 case USB_PORT_FEAT_C_CONNECTION:
695 case USB_PORT_FEAT_C_OVER_CURRENT:
696 case USB_PORT_FEAT_C_ENABLE:
697 case USB_PORT_FEAT_C_PORT_LINK_STATE:
698 xhci_clear_port_change_bit(xhci, wValue, wIndex,
699 port_array[wIndex], temp);
701 case USB_PORT_FEAT_ENABLE:
702 xhci_disable_port(hcd, xhci, wIndex,
703 port_array[wIndex], temp);
711 /* "stall" on error */
714 spin_unlock_irqrestore(&xhci->lock, flags);
719 * Returns 0 if the status hasn't changed, or the number of bytes in buf.
720 * Ports are 0-indexed from the HCD point of view,
721 * and 1-indexed from the USB core pointer of view.
723 * Note that the status change bits will be cleared as soon as a port status
724 * change event is generated, so we use the saved status from that event.
726 int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
732 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
734 __le32 __iomem **port_array;
735 struct xhci_bus_state *bus_state;
737 if (hcd->speed == HCD_USB3) {
738 ports = xhci->num_usb3_ports;
739 port_array = xhci->usb3_ports;
741 ports = xhci->num_usb2_ports;
742 port_array = xhci->usb2_ports;
744 bus_state = &xhci->bus_state[hcd_index(hcd)];
746 /* Initial status is no changes */
747 retval = (ports + 8) / 8;
748 memset(buf, 0, retval);
751 mask = PORT_CSC | PORT_PEC | PORT_OCC | PORT_PLC;
753 spin_lock_irqsave(&xhci->lock, flags);
754 /* For each port, did anything change? If so, set that bit in buf. */
755 for (i = 0; i < ports; i++) {
756 temp = xhci_readl(xhci, port_array[i]);
757 if (temp == 0xffffffff) {
761 if ((temp & mask) != 0 ||
762 (bus_state->port_c_suspend & 1 << i) ||
763 (bus_state->resume_done[i] && time_after_eq(
764 jiffies, bus_state->resume_done[i]))) {
765 buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
769 spin_unlock_irqrestore(&xhci->lock, flags);
770 return status ? retval : 0;
775 int xhci_bus_suspend(struct usb_hcd *hcd)
777 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
778 int max_ports, port_index;
779 __le32 __iomem **port_array;
780 struct xhci_bus_state *bus_state;
783 if (hcd->speed == HCD_USB3) {
784 max_ports = xhci->num_usb3_ports;
785 port_array = xhci->usb3_ports;
786 xhci_dbg(xhci, "suspend USB 3.0 root hub\n");
788 max_ports = xhci->num_usb2_ports;
789 port_array = xhci->usb2_ports;
790 xhci_dbg(xhci, "suspend USB 2.0 root hub\n");
792 bus_state = &xhci->bus_state[hcd_index(hcd)];
794 spin_lock_irqsave(&xhci->lock, flags);
796 if (hcd->self.root_hub->do_remote_wakeup) {
797 port_index = max_ports;
798 while (port_index--) {
799 if (bus_state->resume_done[port_index] != 0) {
800 spin_unlock_irqrestore(&xhci->lock, flags);
801 xhci_dbg(xhci, "suspend failed because "
802 "port %d is resuming\n",
809 port_index = max_ports;
810 bus_state->bus_suspended = 0;
811 while (port_index--) {
812 /* suspend the port if the port is not suspended */
816 t1 = xhci_readl(xhci, port_array[port_index]);
817 t2 = xhci_port_state_to_neutral(t1);
819 if ((t1 & PORT_PE) && !(t1 & PORT_PLS_MASK)) {
820 xhci_dbg(xhci, "port %d not suspended\n", port_index);
821 slot_id = xhci_find_slot_id_by_port(hcd, xhci,
824 spin_unlock_irqrestore(&xhci->lock, flags);
825 xhci_stop_device(xhci, slot_id, 1);
826 spin_lock_irqsave(&xhci->lock, flags);
828 t2 &= ~PORT_PLS_MASK;
829 t2 |= PORT_LINK_STROBE | XDEV_U3;
830 set_bit(port_index, &bus_state->bus_suspended);
832 if (hcd->self.root_hub->do_remote_wakeup) {
833 if (t1 & PORT_CONNECT) {
834 t2 |= PORT_WKOC_E | PORT_WKDISC_E;
835 t2 &= ~PORT_WKCONN_E;
837 t2 |= PORT_WKOC_E | PORT_WKCONN_E;
838 t2 &= ~PORT_WKDISC_E;
841 t2 &= ~PORT_WAKE_BITS;
843 t1 = xhci_port_state_to_neutral(t1);
845 xhci_writel(xhci, t2, port_array[port_index]);
847 if (hcd->speed != HCD_USB3) {
848 /* enable remote wake up for USB 2.0 */
849 __le32 __iomem *addr;
852 /* Add one to the port status register address to get
853 * the port power control register address.
855 addr = port_array[port_index] + 1;
856 tmp = xhci_readl(xhci, addr);
858 xhci_writel(xhci, tmp, addr);
861 hcd->state = HC_STATE_SUSPENDED;
862 bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
863 spin_unlock_irqrestore(&xhci->lock, flags);
867 int xhci_bus_resume(struct usb_hcd *hcd)
869 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
870 int max_ports, port_index;
871 __le32 __iomem **port_array;
872 struct xhci_bus_state *bus_state;
876 if (hcd->speed == HCD_USB3) {
877 max_ports = xhci->num_usb3_ports;
878 port_array = xhci->usb3_ports;
879 xhci_dbg(xhci, "resume USB 3.0 root hub\n");
881 max_ports = xhci->num_usb2_ports;
882 port_array = xhci->usb2_ports;
883 xhci_dbg(xhci, "resume USB 2.0 root hub\n");
885 bus_state = &xhci->bus_state[hcd_index(hcd)];
887 if (time_before(jiffies, bus_state->next_statechange))
890 spin_lock_irqsave(&xhci->lock, flags);
891 if (!HCD_HW_ACCESSIBLE(hcd)) {
892 spin_unlock_irqrestore(&xhci->lock, flags);
897 temp = xhci_readl(xhci, &xhci->op_regs->command);
899 xhci_writel(xhci, temp, &xhci->op_regs->command);
901 port_index = max_ports;
902 while (port_index--) {
903 /* Check whether need resume ports. If needed
904 resume port and disable remote wakeup */
908 temp = xhci_readl(xhci, port_array[port_index]);
909 if (DEV_SUPERSPEED(temp))
910 temp &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
912 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
913 if (test_bit(port_index, &bus_state->bus_suspended) &&
914 (temp & PORT_PLS_MASK)) {
915 if (DEV_SUPERSPEED(temp)) {
916 temp = xhci_port_state_to_neutral(temp);
917 temp &= ~PORT_PLS_MASK;
918 temp |= PORT_LINK_STROBE | XDEV_U0;
919 xhci_writel(xhci, temp, port_array[port_index]);
921 temp = xhci_port_state_to_neutral(temp);
922 temp &= ~PORT_PLS_MASK;
923 temp |= PORT_LINK_STROBE | XDEV_RESUME;
924 xhci_writel(xhci, temp, port_array[port_index]);
926 spin_unlock_irqrestore(&xhci->lock, flags);
928 spin_lock_irqsave(&xhci->lock, flags);
930 temp = xhci_readl(xhci, port_array[port_index]);
931 temp = xhci_port_state_to_neutral(temp);
932 temp &= ~PORT_PLS_MASK;
933 temp |= PORT_LINK_STROBE | XDEV_U0;
934 xhci_writel(xhci, temp, port_array[port_index]);
936 /* wait for the port to enter U0 and report port link
939 spin_unlock_irqrestore(&xhci->lock, flags);
941 spin_lock_irqsave(&xhci->lock, flags);
944 temp = xhci_readl(xhci, port_array[port_index]);
945 if (temp & PORT_PLC) {
946 temp = xhci_port_state_to_neutral(temp);
948 xhci_writel(xhci, temp, port_array[port_index]);
951 slot_id = xhci_find_slot_id_by_port(hcd,
952 xhci, port_index + 1);
954 xhci_ring_device(xhci, slot_id);
956 xhci_writel(xhci, temp, port_array[port_index]);
958 if (hcd->speed != HCD_USB3) {
959 /* disable remote wake up for USB 2.0 */
960 __le32 __iomem *addr;
963 /* Add one to the port status register address to get
964 * the port power control register address.
966 addr = port_array[port_index] + 1;
967 tmp = xhci_readl(xhci, addr);
969 xhci_writel(xhci, tmp, addr);
973 (void) xhci_readl(xhci, &xhci->op_regs->command);
975 bus_state->next_statechange = jiffies + msecs_to_jiffies(5);
977 temp = xhci_readl(xhci, &xhci->op_regs->command);
979 xhci_writel(xhci, temp, &xhci->op_regs->command);
980 temp = xhci_readl(xhci, &xhci->op_regs->command);
982 spin_unlock_irqrestore(&xhci->lock, flags);
986 #endif /* CONFIG_PM */