2 * Driver for 8250/16550-type serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright (C) 2001 Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * A note about mapbase / membase
15 * mapbase is the physical address of the IO port.
16 * membase is an 'ioremapped' cookie.
19 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/delay.h>
30 #include <linux/platform_device.h>
31 #include <linux/tty.h>
32 #include <linux/ratelimit.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial_reg.h>
35 #include <linux/serial_core.h>
36 #include <linux/serial.h>
37 #include <linux/serial_8250.h>
38 #include <linux/nmi.h>
39 #include <linux/mutex.h>
40 #include <linux/slab.h>
53 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
54 * is unsafe when used on edge-triggered interrupts.
56 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
58 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
60 static struct uart_driver serial8250_reg;
62 static int serial_index(struct uart_port *port)
64 return (serial8250_reg.minor - 64) + port->line;
67 static unsigned int skip_txen_test; /* force skip of txen test at init time */
73 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
75 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
79 #define DEBUG_INTR(fmt...) printk(fmt)
81 #define DEBUG_INTR(fmt...) do { } while (0)
84 #define PASS_LIMIT 512
86 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
90 * We default to IRQ0 for the "no irq" hack. Some
91 * machine types want others as well - they're free
92 * to redefine this in their header file.
94 #define is_real_interrupt(irq) ((irq) != 0)
96 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
97 #define CONFIG_SERIAL_DETECT_IRQ 1
99 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
100 #define CONFIG_SERIAL_MANY_PORTS 1
104 * HUB6 is always on. This will be removed once the header
105 * files have been cleaned.
107 #define CONFIG_HUB6 1
109 #include <asm/serial.h>
111 * SERIAL_PORT_DFNS tells us about built-in ports that have no
112 * standard enumeration mechanism. Platforms that can find all
113 * serial ports via mechanisms like ACPI or PCI need not supply it.
115 #ifndef SERIAL_PORT_DFNS
116 #define SERIAL_PORT_DFNS
119 static const struct old_serial_port old_serial_port[] = {
120 SERIAL_PORT_DFNS /* defined in asm/serial.h */
123 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
125 #ifdef CONFIG_SERIAL_8250_RSA
127 #define PORT_RSA_MAX 4
128 static unsigned long probe_rsa[PORT_RSA_MAX];
129 static unsigned int probe_rsa_count;
130 #endif /* CONFIG_SERIAL_8250_RSA */
132 struct uart_8250_port {
133 struct uart_port port;
134 struct timer_list timer; /* "no irq" timer */
135 struct list_head list; /* ports on this IRQ */
136 unsigned short capabilities; /* port capabilities */
137 unsigned short bugs; /* port bugs */
138 unsigned int tx_loadsz; /* transmit fifo load size */
143 unsigned char mcr_mask; /* mask of user bits */
144 unsigned char mcr_force; /* mask of forced bits */
145 unsigned char cur_iotype; /* Running I/O type */
148 * Some bits in registers are cleared on a read, so they must
149 * be saved whenever the register is read but the bits will not
150 * be immediately processed.
152 #define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
153 unsigned char lsr_saved_flags;
154 #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
155 unsigned char msr_saved_flags;
159 struct hlist_node node;
161 spinlock_t lock; /* Protects list not the hash */
162 struct list_head *head;
165 #define NR_IRQ_HASH 32 /* Can be adjusted later */
166 static struct hlist_head irq_lists[NR_IRQ_HASH];
167 static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
170 * Here we define the default xmit fifo size used for each type of UART.
172 static const struct serial8250_config uart_config[] = {
197 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
198 .flags = UART_CAP_FIFO,
209 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
215 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
217 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
223 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
225 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
233 .name = "16C950/954",
236 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
237 /* UART_CAP_EFR breaks billionon CF bluetooth card. */
238 .flags = UART_CAP_FIFO | UART_CAP_SLEEP,
244 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
246 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
252 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
253 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
259 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
260 .flags = UART_CAP_FIFO,
266 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
267 .flags = UART_CAP_FIFO | UART_NATSEMI,
273 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
274 .flags = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE,
280 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
281 .flags = UART_CAP_FIFO,
287 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
288 .flags = UART_CAP_FIFO,
294 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
295 .flags = UART_CAP_FIFO | UART_CAP_AFE,
301 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
302 .flags = UART_CAP_FIFO | UART_CAP_AFE,
308 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
310 .flags = UART_CAP_FIFO | UART_CAP_RTOIE,
316 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
317 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR,
321 #if defined(CONFIG_MIPS_ALCHEMY)
323 /* Au1x00 UART hardware has a weird register layout */
324 static const u8 au_io_in_map[] = {
334 static const u8 au_io_out_map[] = {
342 /* sane hardware needs no mapping */
343 static inline int map_8250_in_reg(struct uart_port *p, int offset)
345 if (p->iotype != UPIO_AU)
347 return au_io_in_map[offset];
350 static inline int map_8250_out_reg(struct uart_port *p, int offset)
352 if (p->iotype != UPIO_AU)
354 return au_io_out_map[offset];
357 #elif defined(CONFIG_SERIAL_8250_RM9K)
381 static inline int map_8250_in_reg(struct uart_port *p, int offset)
383 if (p->iotype != UPIO_RM9000)
385 return regmap_in[offset];
388 static inline int map_8250_out_reg(struct uart_port *p, int offset)
390 if (p->iotype != UPIO_RM9000)
392 return regmap_out[offset];
397 /* sane hardware needs no mapping */
398 #define map_8250_in_reg(up, offset) (offset)
399 #define map_8250_out_reg(up, offset) (offset)
403 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
405 offset = map_8250_in_reg(p, offset) << p->regshift;
406 outb(p->hub6 - 1 + offset, p->iobase);
407 return inb(p->iobase + 1);
410 static void hub6_serial_out(struct uart_port *p, int offset, int value)
412 offset = map_8250_out_reg(p, offset) << p->regshift;
413 outb(p->hub6 - 1 + offset, p->iobase);
414 outb(value, p->iobase + 1);
417 static unsigned int mem_serial_in(struct uart_port *p, int offset)
419 offset = map_8250_in_reg(p, offset) << p->regshift;
420 return readb(p->membase + offset);
423 static void mem_serial_out(struct uart_port *p, int offset, int value)
425 offset = map_8250_out_reg(p, offset) << p->regshift;
426 writeb(value, p->membase + offset);
429 static void mem32_serial_out(struct uart_port *p, int offset, int value)
431 offset = map_8250_out_reg(p, offset) << p->regshift;
432 writel(value, p->membase + offset);
435 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
437 offset = map_8250_in_reg(p, offset) << p->regshift;
438 return readl(p->membase + offset);
441 static unsigned int au_serial_in(struct uart_port *p, int offset)
443 offset = map_8250_in_reg(p, offset) << p->regshift;
444 return __raw_readl(p->membase + offset);
447 static void au_serial_out(struct uart_port *p, int offset, int value)
449 offset = map_8250_out_reg(p, offset) << p->regshift;
450 __raw_writel(value, p->membase + offset);
453 static unsigned int tsi_serial_in(struct uart_port *p, int offset)
456 offset = map_8250_in_reg(p, offset) << p->regshift;
457 if (offset == UART_IIR) {
458 tmp = readl(p->membase + (UART_IIR & ~3));
459 return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
461 return readb(p->membase + offset);
464 static void tsi_serial_out(struct uart_port *p, int offset, int value)
466 offset = map_8250_out_reg(p, offset) << p->regshift;
467 if (!((offset == UART_IER) && (value & UART_IER_UUE)))
468 writeb(value, p->membase + offset);
471 static unsigned int io_serial_in(struct uart_port *p, int offset)
473 offset = map_8250_in_reg(p, offset) << p->regshift;
474 return inb(p->iobase + offset);
477 static void io_serial_out(struct uart_port *p, int offset, int value)
479 offset = map_8250_out_reg(p, offset) << p->regshift;
480 outb(value, p->iobase + offset);
483 static int serial8250_default_handle_irq(struct uart_port *port);
485 static void set_io_from_upio(struct uart_port *p)
487 struct uart_8250_port *up =
488 container_of(p, struct uart_8250_port, port);
491 p->serial_in = hub6_serial_in;
492 p->serial_out = hub6_serial_out;
496 p->serial_in = mem_serial_in;
497 p->serial_out = mem_serial_out;
502 p->serial_in = mem32_serial_in;
503 p->serial_out = mem32_serial_out;
507 p->serial_in = au_serial_in;
508 p->serial_out = au_serial_out;
512 p->serial_in = tsi_serial_in;
513 p->serial_out = tsi_serial_out;
517 p->serial_in = io_serial_in;
518 p->serial_out = io_serial_out;
521 /* Remember loaded iotype */
522 up->cur_iotype = p->iotype;
523 p->handle_irq = serial8250_default_handle_irq;
527 serial_out_sync(struct uart_8250_port *up, int offset, int value)
529 struct uart_port *p = &up->port;
534 p->serial_out(p, offset, value);
535 p->serial_in(p, UART_LCR); /* safe, no side-effects */
538 p->serial_out(p, offset, value);
542 #define serial_in(up, offset) \
543 (up->port.serial_in(&(up)->port, (offset)))
544 #define serial_out(up, offset, value) \
545 (up->port.serial_out(&(up)->port, (offset), (value)))
547 * We used to support using pause I/O for certain machines. We
548 * haven't supported this for a while, but just in case it's badly
549 * needed for certain old 386 machines, I've left these #define's
552 #define serial_inp(up, offset) serial_in(up, offset)
553 #define serial_outp(up, offset, value) serial_out(up, offset, value)
555 /* Uart divisor latch read */
556 static inline int _serial_dl_read(struct uart_8250_port *up)
558 return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;
561 /* Uart divisor latch write */
562 static inline void _serial_dl_write(struct uart_8250_port *up, int value)
564 serial_outp(up, UART_DLL, value & 0xff);
565 serial_outp(up, UART_DLM, value >> 8 & 0xff);
568 #if defined(CONFIG_MIPS_ALCHEMY)
569 /* Au1x00 haven't got a standard divisor latch */
570 static int serial_dl_read(struct uart_8250_port *up)
572 if (up->port.iotype == UPIO_AU)
573 return __raw_readl(up->port.membase + 0x28);
575 return _serial_dl_read(up);
578 static void serial_dl_write(struct uart_8250_port *up, int value)
580 if (up->port.iotype == UPIO_AU)
581 __raw_writel(value, up->port.membase + 0x28);
583 _serial_dl_write(up, value);
585 #elif defined(CONFIG_SERIAL_8250_RM9K)
586 static int serial_dl_read(struct uart_8250_port *up)
588 return (up->port.iotype == UPIO_RM9000) ?
589 (((__raw_readl(up->port.membase + 0x10) << 8) |
590 (__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :
594 static void serial_dl_write(struct uart_8250_port *up, int value)
596 if (up->port.iotype == UPIO_RM9000) {
597 __raw_writel(value, up->port.membase + 0x08);
598 __raw_writel(value >> 8, up->port.membase + 0x10);
600 _serial_dl_write(up, value);
604 #define serial_dl_read(up) _serial_dl_read(up)
605 #define serial_dl_write(up, value) _serial_dl_write(up, value)
611 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
613 serial_out(up, UART_SCR, offset);
614 serial_out(up, UART_ICR, value);
617 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
621 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
622 serial_out(up, UART_SCR, offset);
623 value = serial_in(up, UART_ICR);
624 serial_icr_write(up, UART_ACR, up->acr);
632 static void serial8250_clear_fifos(struct uart_8250_port *p)
634 if (p->capabilities & UART_CAP_FIFO) {
635 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
636 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
637 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
638 serial_outp(p, UART_FCR, 0);
643 * IER sleep support. UARTs which have EFRs need the "extended
644 * capability" bit enabled. Note that on XR16C850s, we need to
645 * reset LCR to write to IER.
647 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
649 if (p->capabilities & UART_CAP_SLEEP) {
650 if (p->capabilities & UART_CAP_EFR) {
651 serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B);
652 serial_outp(p, UART_EFR, UART_EFR_ECB);
653 serial_outp(p, UART_LCR, 0);
655 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
656 if (p->capabilities & UART_CAP_EFR) {
657 serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_B);
658 serial_outp(p, UART_EFR, 0);
659 serial_outp(p, UART_LCR, 0);
664 #ifdef CONFIG_SERIAL_8250_RSA
666 * Attempts to turn on the RSA FIFO. Returns zero on failure.
667 * We set the port uart clock rate if we succeed.
669 static int __enable_rsa(struct uart_8250_port *up)
674 mode = serial_inp(up, UART_RSA_MSR);
675 result = mode & UART_RSA_MSR_FIFO;
678 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
679 mode = serial_inp(up, UART_RSA_MSR);
680 result = mode & UART_RSA_MSR_FIFO;
684 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
689 static void enable_rsa(struct uart_8250_port *up)
691 if (up->port.type == PORT_RSA) {
692 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
693 spin_lock_irq(&up->port.lock);
695 spin_unlock_irq(&up->port.lock);
697 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
698 serial_outp(up, UART_RSA_FRR, 0);
703 * Attempts to turn off the RSA FIFO. Returns zero on failure.
704 * It is unknown why interrupts were disabled in here. However,
705 * the caller is expected to preserve this behaviour by grabbing
706 * the spinlock before calling this function.
708 static void disable_rsa(struct uart_8250_port *up)
713 if (up->port.type == PORT_RSA &&
714 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
715 spin_lock_irq(&up->port.lock);
717 mode = serial_inp(up, UART_RSA_MSR);
718 result = !(mode & UART_RSA_MSR_FIFO);
721 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
722 mode = serial_inp(up, UART_RSA_MSR);
723 result = !(mode & UART_RSA_MSR_FIFO);
727 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
728 spin_unlock_irq(&up->port.lock);
731 #endif /* CONFIG_SERIAL_8250_RSA */
734 * This is a quickie test to see how big the FIFO is.
735 * It doesn't work at all the time, more's the pity.
737 static int size_fifo(struct uart_8250_port *up)
739 unsigned char old_fcr, old_mcr, old_lcr;
740 unsigned short old_dl;
743 old_lcr = serial_inp(up, UART_LCR);
744 serial_outp(up, UART_LCR, 0);
745 old_fcr = serial_inp(up, UART_FCR);
746 old_mcr = serial_inp(up, UART_MCR);
747 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
748 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
749 serial_outp(up, UART_MCR, UART_MCR_LOOP);
750 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
751 old_dl = serial_dl_read(up);
752 serial_dl_write(up, 0x0001);
753 serial_outp(up, UART_LCR, 0x03);
754 for (count = 0; count < 256; count++)
755 serial_outp(up, UART_TX, count);
756 mdelay(20);/* FIXME - schedule_timeout */
757 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
758 (count < 256); count++)
759 serial_inp(up, UART_RX);
760 serial_outp(up, UART_FCR, old_fcr);
761 serial_outp(up, UART_MCR, old_mcr);
762 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
763 serial_dl_write(up, old_dl);
764 serial_outp(up, UART_LCR, old_lcr);
770 * Read UART ID using the divisor method - set DLL and DLM to zero
771 * and the revision will be in DLL and device type in DLM. We
772 * preserve the device state across this.
774 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
776 unsigned char old_dll, old_dlm, old_lcr;
779 old_lcr = serial_inp(p, UART_LCR);
780 serial_outp(p, UART_LCR, UART_LCR_CONF_MODE_A);
782 old_dll = serial_inp(p, UART_DLL);
783 old_dlm = serial_inp(p, UART_DLM);
785 serial_outp(p, UART_DLL, 0);
786 serial_outp(p, UART_DLM, 0);
788 id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
790 serial_outp(p, UART_DLL, old_dll);
791 serial_outp(p, UART_DLM, old_dlm);
792 serial_outp(p, UART_LCR, old_lcr);
798 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
799 * When this function is called we know it is at least a StarTech
800 * 16650 V2, but it might be one of several StarTech UARTs, or one of
801 * its clones. (We treat the broken original StarTech 16650 V1 as a
802 * 16550, and why not? Startech doesn't seem to even acknowledge its
805 * What evil have men's minds wrought...
807 static void autoconfig_has_efr(struct uart_8250_port *up)
809 unsigned int id1, id2, id3, rev;
812 * Everything with an EFR has SLEEP
814 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
817 * First we check to see if it's an Oxford Semiconductor UART.
819 * If we have to do this here because some non-National
820 * Semiconductor clone chips lock up if you try writing to the
821 * LSR register (which serial_icr_read does)
825 * Check for Oxford Semiconductor 16C950.
827 * EFR [4] must be set else this test fails.
829 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
830 * claims that it's needed for 952 dual UART's (which are not
831 * recommended for new designs).
834 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
835 serial_out(up, UART_EFR, UART_EFR_ECB);
836 serial_out(up, UART_LCR, 0x00);
837 id1 = serial_icr_read(up, UART_ID1);
838 id2 = serial_icr_read(up, UART_ID2);
839 id3 = serial_icr_read(up, UART_ID3);
840 rev = serial_icr_read(up, UART_REV);
842 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
844 if (id1 == 0x16 && id2 == 0xC9 &&
845 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
846 up->port.type = PORT_16C950;
849 * Enable work around for the Oxford Semiconductor 952 rev B
850 * chip which causes it to seriously miscalculate baud rates
853 if (id3 == 0x52 && rev == 0x01)
854 up->bugs |= UART_BUG_QUOT;
859 * We check for a XR16C850 by setting DLL and DLM to 0, and then
860 * reading back DLL and DLM. The chip type depends on the DLM
862 * 0x10 - XR16C850 and the DLL contains the chip revision.
866 id1 = autoconfig_read_divisor_id(up);
867 DEBUG_AUTOCONF("850id=%04x ", id1);
870 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
871 up->port.type = PORT_16850;
876 * It wasn't an XR16C850.
878 * We distinguish between the '654 and the '650 by counting
879 * how many bytes are in the FIFO. I'm using this for now,
880 * since that's the technique that was sent to me in the
881 * serial driver update, but I'm not convinced this works.
882 * I've had problems doing this in the past. -TYT
884 if (size_fifo(up) == 64)
885 up->port.type = PORT_16654;
887 up->port.type = PORT_16650V2;
891 * We detected a chip without a FIFO. Only two fall into
892 * this category - the original 8250 and the 16450. The
893 * 16450 has a scratch register (accessible with LCR=0)
895 static void autoconfig_8250(struct uart_8250_port *up)
897 unsigned char scratch, status1, status2;
899 up->port.type = PORT_8250;
901 scratch = serial_in(up, UART_SCR);
902 serial_outp(up, UART_SCR, 0xa5);
903 status1 = serial_in(up, UART_SCR);
904 serial_outp(up, UART_SCR, 0x5a);
905 status2 = serial_in(up, UART_SCR);
906 serial_outp(up, UART_SCR, scratch);
908 if (status1 == 0xa5 && status2 == 0x5a)
909 up->port.type = PORT_16450;
912 static int broken_efr(struct uart_8250_port *up)
915 * Exar ST16C2550 "A2" devices incorrectly detect as
916 * having an EFR, and report an ID of 0x0201. See
917 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html
919 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
925 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
927 unsigned char status;
929 status = serial_in(up, 0x04); /* EXCR2 */
930 #define PRESL(x) ((x) & 0x30)
931 if (PRESL(status) == 0x10) {
932 /* already in high speed mode */
935 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
936 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
937 serial_outp(up, 0x04, status);
943 * We know that the chip has FIFOs. Does it have an EFR? The
944 * EFR is located in the same register position as the IIR and
945 * we know the top two bits of the IIR are currently set. The
946 * EFR should contain zero. Try to read the EFR.
948 static void autoconfig_16550a(struct uart_8250_port *up)
950 unsigned char status1, status2;
951 unsigned int iersave;
953 up->port.type = PORT_16550A;
954 up->capabilities |= UART_CAP_FIFO;
957 * Check for presence of the EFR when DLAB is set.
958 * Only ST16C650V1 UARTs pass this test.
960 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
961 if (serial_in(up, UART_EFR) == 0) {
962 serial_outp(up, UART_EFR, 0xA8);
963 if (serial_in(up, UART_EFR) != 0) {
964 DEBUG_AUTOCONF("EFRv1 ");
965 up->port.type = PORT_16650;
966 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
968 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
970 serial_outp(up, UART_EFR, 0);
975 * Maybe it requires 0xbf to be written to the LCR.
976 * (other ST16C650V2 UARTs, TI16C752A, etc)
978 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
979 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
980 DEBUG_AUTOCONF("EFRv2 ");
981 autoconfig_has_efr(up);
986 * Check for a National Semiconductor SuperIO chip.
987 * Attempt to switch to bank 2, read the value of the LOOP bit
988 * from EXCR1. Switch back to bank 0, change it in MCR. Then
989 * switch back to bank 2, read it from EXCR1 again and check
990 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
992 serial_outp(up, UART_LCR, 0);
993 status1 = serial_in(up, UART_MCR);
994 serial_outp(up, UART_LCR, 0xE0);
995 status2 = serial_in(up, 0x02); /* EXCR1 */
997 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
998 serial_outp(up, UART_LCR, 0);
999 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
1000 serial_outp(up, UART_LCR, 0xE0);
1001 status2 = serial_in(up, 0x02); /* EXCR1 */
1002 serial_outp(up, UART_LCR, 0);
1003 serial_outp(up, UART_MCR, status1);
1005 if ((status2 ^ status1) & UART_MCR_LOOP) {
1006 unsigned short quot;
1008 serial_outp(up, UART_LCR, 0xE0);
1010 quot = serial_dl_read(up);
1013 if (ns16550a_goto_highspeed(up))
1014 serial_dl_write(up, quot);
1016 serial_outp(up, UART_LCR, 0);
1018 up->port.uartclk = 921600*16;
1019 up->port.type = PORT_NS16550A;
1020 up->capabilities |= UART_NATSEMI;
1026 * No EFR. Try to detect a TI16750, which only sets bit 5 of
1027 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
1028 * Try setting it with and without DLAB set. Cheap clones
1029 * set bit 5 without DLAB set.
1031 serial_outp(up, UART_LCR, 0);
1032 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1033 status1 = serial_in(up, UART_IIR) >> 5;
1034 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1035 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_A);
1036 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1037 status2 = serial_in(up, UART_IIR) >> 5;
1038 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1039 serial_outp(up, UART_LCR, 0);
1041 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
1043 if (status1 == 6 && status2 == 7) {
1044 up->port.type = PORT_16750;
1045 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
1050 * Try writing and reading the UART_IER_UUE bit (b6).
1051 * If it works, this is probably one of the Xscale platform's
1053 * We're going to explicitly set the UUE bit to 0 before
1054 * trying to write and read a 1 just to make sure it's not
1055 * already a 1 and maybe locked there before we even start start.
1057 iersave = serial_in(up, UART_IER);
1058 serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
1059 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1061 * OK it's in a known zero state, try writing and reading
1062 * without disturbing the current state of the other bits.
1064 serial_outp(up, UART_IER, iersave | UART_IER_UUE);
1065 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1068 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
1070 DEBUG_AUTOCONF("Xscale ");
1071 up->port.type = PORT_XSCALE;
1072 up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE;
1077 * If we got here we couldn't force the IER_UUE bit to 0.
1078 * Log it and continue.
1080 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1082 serial_outp(up, UART_IER, iersave);
1085 * Exar uarts have EFR in a weird location
1087 if (up->port.flags & UPF_EXAR_EFR) {
1088 up->port.type = PORT_XR17D15X;
1089 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR;
1093 * We distinguish between 16550A and U6 16550A by counting
1094 * how many bytes are in the FIFO.
1096 if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
1097 up->port.type = PORT_U6_16550A;
1098 up->capabilities |= UART_CAP_AFE;
1103 * This routine is called by rs_init() to initialize a specific serial
1104 * port. It determines what type of UART chip this serial port is
1105 * using: 8250, 16450, 16550, 16550A. The important question is
1106 * whether or not this UART is a 16550A or not, since this will
1107 * determine whether or not we can use its FIFO features or not.
1109 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1111 unsigned char status1, scratch, scratch2, scratch3;
1112 unsigned char save_lcr, save_mcr;
1113 unsigned long flags;
1115 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
1118 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1119 serial_index(&up->port), up->port.iobase, up->port.membase);
1122 * We really do need global IRQs disabled here - we're going to
1123 * be frobbing the chips IRQ enable register to see if it exists.
1125 spin_lock_irqsave(&up->port.lock, flags);
1127 up->capabilities = 0;
1130 if (!(up->port.flags & UPF_BUGGY_UART)) {
1132 * Do a simple existence test first; if we fail this,
1133 * there's no point trying anything else.
1135 * 0x80 is used as a nonsense port to prevent against
1136 * false positives due to ISA bus float. The
1137 * assumption is that 0x80 is a non-existent port;
1138 * which should be safe since include/asm/io.h also
1139 * makes this assumption.
1141 * Note: this is safe as long as MCR bit 4 is clear
1142 * and the device is in "PC" mode.
1144 scratch = serial_inp(up, UART_IER);
1145 serial_outp(up, UART_IER, 0);
1150 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1151 * 16C754B) allow only to modify them if an EFR bit is set.
1153 scratch2 = serial_inp(up, UART_IER) & 0x0f;
1154 serial_outp(up, UART_IER, 0x0F);
1158 scratch3 = serial_inp(up, UART_IER) & 0x0f;
1159 serial_outp(up, UART_IER, scratch);
1160 if (scratch2 != 0 || scratch3 != 0x0F) {
1162 * We failed; there's nothing here
1164 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1165 scratch2, scratch3);
1170 save_mcr = serial_in(up, UART_MCR);
1171 save_lcr = serial_in(up, UART_LCR);
1174 * Check to see if a UART is really there. Certain broken
1175 * internal modems based on the Rockwell chipset fail this
1176 * test, because they apparently don't implement the loopback
1177 * test mode. So this test is skipped on the COM 1 through
1178 * COM 4 ports. This *should* be safe, since no board
1179 * manufacturer would be stupid enough to design a board
1180 * that conflicts with COM 1-4 --- we hope!
1182 if (!(up->port.flags & UPF_SKIP_TEST)) {
1183 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1184 status1 = serial_inp(up, UART_MSR) & 0xF0;
1185 serial_outp(up, UART_MCR, save_mcr);
1186 if (status1 != 0x90) {
1187 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1194 * We're pretty sure there's a port here. Lets find out what
1195 * type of port it is. The IIR top two bits allows us to find
1196 * out if it's 8250 or 16450, 16550, 16550A or later. This
1197 * determines what we test for next.
1199 * We also initialise the EFR (if any) to zero for later. The
1200 * EFR occupies the same register location as the FCR and IIR.
1202 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
1203 serial_outp(up, UART_EFR, 0);
1204 serial_outp(up, UART_LCR, 0);
1206 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1207 scratch = serial_in(up, UART_IIR) >> 6;
1209 DEBUG_AUTOCONF("iir=%d ", scratch);
1213 autoconfig_8250(up);
1216 up->port.type = PORT_UNKNOWN;
1219 up->port.type = PORT_16550;
1222 autoconfig_16550a(up);
1226 #ifdef CONFIG_SERIAL_8250_RSA
1228 * Only probe for RSA ports if we got the region.
1230 if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
1233 for (i = 0 ; i < probe_rsa_count; ++i) {
1234 if (probe_rsa[i] == up->port.iobase &&
1236 up->port.type = PORT_RSA;
1243 serial_outp(up, UART_LCR, save_lcr);
1245 if (up->capabilities != uart_config[up->port.type].flags) {
1247 "ttyS%d: detected caps %08x should be %08x\n",
1248 serial_index(&up->port), up->capabilities,
1249 uart_config[up->port.type].flags);
1252 up->port.fifosize = uart_config[up->port.type].fifo_size;
1253 up->capabilities = uart_config[up->port.type].flags;
1254 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
1256 if (up->port.type == PORT_UNKNOWN)
1262 #ifdef CONFIG_SERIAL_8250_RSA
1263 if (up->port.type == PORT_RSA)
1264 serial_outp(up, UART_RSA_FRR, 0);
1266 serial_outp(up, UART_MCR, save_mcr);
1267 serial8250_clear_fifos(up);
1268 serial_in(up, UART_RX);
1269 if (up->capabilities & UART_CAP_UUE)
1270 serial_outp(up, UART_IER, UART_IER_UUE);
1272 serial_outp(up, UART_IER, 0);
1275 spin_unlock_irqrestore(&up->port.lock, flags);
1276 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
1279 static void autoconfig_irq(struct uart_8250_port *up)
1281 unsigned char save_mcr, save_ier;
1282 unsigned char save_ICP = 0;
1283 unsigned int ICP = 0;
1287 if (up->port.flags & UPF_FOURPORT) {
1288 ICP = (up->port.iobase & 0xfe0) | 0x1f;
1289 save_ICP = inb_p(ICP);
1294 /* forget possible initially masked and pending IRQ */
1295 probe_irq_off(probe_irq_on());
1296 save_mcr = serial_inp(up, UART_MCR);
1297 save_ier = serial_inp(up, UART_IER);
1298 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1300 irqs = probe_irq_on();
1301 serial_outp(up, UART_MCR, 0);
1303 if (up->port.flags & UPF_FOURPORT) {
1304 serial_outp(up, UART_MCR,
1305 UART_MCR_DTR | UART_MCR_RTS);
1307 serial_outp(up, UART_MCR,
1308 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1310 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
1311 (void)serial_inp(up, UART_LSR);
1312 (void)serial_inp(up, UART_RX);
1313 (void)serial_inp(up, UART_IIR);
1314 (void)serial_inp(up, UART_MSR);
1315 serial_outp(up, UART_TX, 0xFF);
1317 irq = probe_irq_off(irqs);
1319 serial_outp(up, UART_MCR, save_mcr);
1320 serial_outp(up, UART_IER, save_ier);
1322 if (up->port.flags & UPF_FOURPORT)
1323 outb_p(save_ICP, ICP);
1325 up->port.irq = (irq > 0) ? irq : 0;
1328 static inline void __stop_tx(struct uart_8250_port *p)
1330 if (p->ier & UART_IER_THRI) {
1331 p->ier &= ~UART_IER_THRI;
1332 serial_out(p, UART_IER, p->ier);
1336 static void serial8250_stop_tx(struct uart_port *port)
1338 struct uart_8250_port *up =
1339 container_of(port, struct uart_8250_port, port);
1344 * We really want to stop the transmitter from sending.
1346 if (up->port.type == PORT_16C950) {
1347 up->acr |= UART_ACR_TXDIS;
1348 serial_icr_write(up, UART_ACR, up->acr);
1352 static void transmit_chars(struct uart_8250_port *up);
1354 static void serial8250_start_tx(struct uart_port *port)
1356 struct uart_8250_port *up =
1357 container_of(port, struct uart_8250_port, port);
1359 if (!(up->ier & UART_IER_THRI)) {
1360 up->ier |= UART_IER_THRI;
1361 serial_out(up, UART_IER, up->ier);
1363 if (up->bugs & UART_BUG_TXEN) {
1365 lsr = serial_in(up, UART_LSR);
1366 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1367 if ((up->port.type == PORT_RM9000) ?
1368 (lsr & UART_LSR_THRE) :
1369 (lsr & UART_LSR_TEMT))
1375 * Re-enable the transmitter if we disabled it.
1377 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1378 up->acr &= ~UART_ACR_TXDIS;
1379 serial_icr_write(up, UART_ACR, up->acr);
1383 static void serial8250_stop_rx(struct uart_port *port)
1385 struct uart_8250_port *up =
1386 container_of(port, struct uart_8250_port, port);
1388 up->ier &= ~UART_IER_RLSI;
1389 up->port.read_status_mask &= ~UART_LSR_DR;
1390 serial_out(up, UART_IER, up->ier);
1393 static void serial8250_enable_ms(struct uart_port *port)
1395 struct uart_8250_port *up =
1396 container_of(port, struct uart_8250_port, port);
1398 /* no MSR capabilities */
1399 if (up->bugs & UART_BUG_NOMSR)
1402 up->ier |= UART_IER_MSI;
1403 serial_out(up, UART_IER, up->ier);
1407 * Clear the Tegra rx fifo after a break
1409 * FIXME: This needs to become a port specific callback once we have a
1410 * framework for this
1412 static void clear_rx_fifo(struct uart_8250_port *up)
1414 unsigned int status, tmout = 10000;
1416 status = serial_in(up, UART_LSR);
1417 if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
1418 status = serial_in(up, UART_RX);
1428 receive_chars(struct uart_8250_port *up, unsigned int *status)
1430 struct tty_struct *tty = up->port.state->port.tty;
1431 unsigned char ch, lsr = *status;
1432 int max_count = 256;
1436 if (likely(lsr & UART_LSR_DR))
1437 ch = serial_inp(up, UART_RX);
1440 * Intel 82571 has a Serial Over Lan device that will
1441 * set UART_LSR_BI without setting UART_LSR_DR when
1442 * it receives a break. To avoid reading from the
1443 * receive buffer without UART_LSR_DR bit set, we
1444 * just force the read character to be 0
1449 up->port.icount.rx++;
1451 lsr |= up->lsr_saved_flags;
1452 up->lsr_saved_flags = 0;
1454 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1456 * For statistics only
1458 if (lsr & UART_LSR_BI) {
1459 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1460 up->port.icount.brk++;
1462 * If tegra port then clear the rx fifo to
1463 * accept another break/character.
1465 if (up->port.type == PORT_TEGRA)
1469 * We do the SysRQ and SAK checking
1470 * here because otherwise the break
1471 * may get masked by ignore_status_mask
1472 * or read_status_mask.
1474 if (uart_handle_break(&up->port))
1476 } else if (lsr & UART_LSR_PE)
1477 up->port.icount.parity++;
1478 else if (lsr & UART_LSR_FE)
1479 up->port.icount.frame++;
1480 if (lsr & UART_LSR_OE)
1481 up->port.icount.overrun++;
1484 * Mask off conditions which should be ignored.
1486 lsr &= up->port.read_status_mask;
1488 if (lsr & UART_LSR_BI) {
1489 DEBUG_INTR("handling break....");
1491 } else if (lsr & UART_LSR_PE)
1493 else if (lsr & UART_LSR_FE)
1496 if (uart_handle_sysrq_char(&up->port, ch))
1499 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
1502 lsr = serial_inp(up, UART_LSR);
1503 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
1504 spin_unlock(&up->port.lock);
1505 tty_flip_buffer_push(tty);
1506 spin_lock(&up->port.lock);
1510 static void transmit_chars(struct uart_8250_port *up)
1512 struct circ_buf *xmit = &up->port.state->xmit;
1515 if (up->port.x_char) {
1516 serial_outp(up, UART_TX, up->port.x_char);
1517 up->port.icount.tx++;
1518 up->port.x_char = 0;
1521 if (uart_tx_stopped(&up->port)) {
1522 serial8250_stop_tx(&up->port);
1525 if (uart_circ_empty(xmit)) {
1530 count = up->tx_loadsz;
1532 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1533 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1534 up->port.icount.tx++;
1535 if (uart_circ_empty(xmit))
1537 } while (--count > 0);
1539 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1540 uart_write_wakeup(&up->port);
1542 DEBUG_INTR("THRE...");
1544 if (uart_circ_empty(xmit))
1548 static unsigned int check_modem_status(struct uart_8250_port *up)
1550 unsigned int status = serial_in(up, UART_MSR);
1552 status |= up->msr_saved_flags;
1553 up->msr_saved_flags = 0;
1554 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1555 up->port.state != NULL) {
1556 if (status & UART_MSR_TERI)
1557 up->port.icount.rng++;
1558 if (status & UART_MSR_DDSR)
1559 up->port.icount.dsr++;
1560 if (status & UART_MSR_DDCD)
1561 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
1562 if (status & UART_MSR_DCTS)
1563 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
1565 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
1572 * This handles the interrupt from one port.
1574 static void serial8250_handle_port(struct uart_8250_port *up)
1576 unsigned int status;
1577 unsigned long flags;
1579 spin_lock_irqsave(&up->port.lock, flags);
1581 status = serial_inp(up, UART_LSR);
1583 DEBUG_INTR("status = %x...", status);
1585 if (status & (UART_LSR_DR | UART_LSR_BI))
1586 receive_chars(up, &status);
1587 check_modem_status(up);
1588 if (status & UART_LSR_THRE)
1591 spin_unlock_irqrestore(&up->port.lock, flags);
1594 int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1596 struct uart_8250_port *up =
1597 container_of(port, struct uart_8250_port, port);
1599 if (!(iir & UART_IIR_NO_INT)) {
1600 serial8250_handle_port(up);
1606 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
1608 static int serial8250_default_handle_irq(struct uart_port *port)
1610 struct uart_8250_port *up =
1611 container_of(port, struct uart_8250_port, port);
1612 unsigned int iir = serial_in(up, UART_IIR);
1614 return serial8250_handle_irq(port, iir);
1618 * This is the serial driver's interrupt routine.
1620 * Arjan thinks the old way was overly complex, so it got simplified.
1621 * Alan disagrees, saying that need the complexity to handle the weird
1622 * nature of ISA shared interrupts. (This is a special exception.)
1624 * In order to handle ISA shared interrupts properly, we need to check
1625 * that all ports have been serviced, and therefore the ISA interrupt
1626 * line has been de-asserted.
1628 * This means we need to loop through all ports. checking that they
1629 * don't have an interrupt pending.
1631 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1633 struct irq_info *i = dev_id;
1634 struct list_head *l, *end = NULL;
1635 int pass_counter = 0, handled = 0;
1637 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1639 spin_lock(&i->lock);
1643 struct uart_8250_port *up;
1644 struct uart_port *port;
1646 up = list_entry(l, struct uart_8250_port, list);
1649 if (port->handle_irq(port)) {
1652 } else if (end == NULL)
1657 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1658 /* If we hit this, we're dead. */
1659 printk_ratelimited(KERN_ERR
1660 "serial8250: too much work for irq%d\n", irq);
1665 spin_unlock(&i->lock);
1667 DEBUG_INTR("end.\n");
1669 return IRQ_RETVAL(handled);
1673 * To support ISA shared interrupts, we need to have one interrupt
1674 * handler that ensures that the IRQ line has been deasserted
1675 * before returning. Failing to do this will result in the IRQ
1676 * line being stuck active, and, since ISA irqs are edge triggered,
1677 * no more IRQs will be seen.
1679 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1681 spin_lock_irq(&i->lock);
1683 if (!list_empty(i->head)) {
1684 if (i->head == &up->list)
1685 i->head = i->head->next;
1686 list_del(&up->list);
1688 BUG_ON(i->head != &up->list);
1691 spin_unlock_irq(&i->lock);
1692 /* List empty so throw away the hash node */
1693 if (i->head == NULL) {
1694 hlist_del(&i->node);
1699 static int serial_link_irq_chain(struct uart_8250_port *up)
1701 struct hlist_head *h;
1702 struct hlist_node *n;
1704 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1706 mutex_lock(&hash_mutex);
1708 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1710 hlist_for_each(n, h) {
1711 i = hlist_entry(n, struct irq_info, node);
1712 if (i->irq == up->port.irq)
1717 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1719 mutex_unlock(&hash_mutex);
1722 spin_lock_init(&i->lock);
1723 i->irq = up->port.irq;
1724 hlist_add_head(&i->node, h);
1726 mutex_unlock(&hash_mutex);
1728 spin_lock_irq(&i->lock);
1731 list_add(&up->list, i->head);
1732 spin_unlock_irq(&i->lock);
1736 INIT_LIST_HEAD(&up->list);
1737 i->head = &up->list;
1738 spin_unlock_irq(&i->lock);
1739 irq_flags |= up->port.irqflags;
1740 ret = request_irq(up->port.irq, serial8250_interrupt,
1741 irq_flags, "serial", i);
1743 serial_do_unlink(i, up);
1749 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1752 struct hlist_node *n;
1753 struct hlist_head *h;
1755 mutex_lock(&hash_mutex);
1757 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1759 hlist_for_each(n, h) {
1760 i = hlist_entry(n, struct irq_info, node);
1761 if (i->irq == up->port.irq)
1766 BUG_ON(i->head == NULL);
1768 if (list_empty(i->head))
1769 free_irq(up->port.irq, i);
1771 serial_do_unlink(i, up);
1772 mutex_unlock(&hash_mutex);
1776 * This function is used to handle ports that do not have an
1777 * interrupt. This doesn't work very well for 16450's, but gives
1778 * barely passable results for a 16550A. (Although at the expense
1779 * of much CPU overhead).
1781 static void serial8250_timeout(unsigned long data)
1783 struct uart_8250_port *up = (struct uart_8250_port *)data;
1786 iir = serial_in(up, UART_IIR);
1787 if (!(iir & UART_IIR_NO_INT))
1788 serial8250_handle_port(up);
1789 mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
1792 static void serial8250_backup_timeout(unsigned long data)
1794 struct uart_8250_port *up = (struct uart_8250_port *)data;
1795 unsigned int iir, ier = 0, lsr;
1796 unsigned long flags;
1799 * Must disable interrupts or else we risk racing with the interrupt
1802 if (is_real_interrupt(up->port.irq)) {
1803 ier = serial_in(up, UART_IER);
1804 serial_out(up, UART_IER, 0);
1807 iir = serial_in(up, UART_IIR);
1810 * This should be a safe test for anyone who doesn't trust the
1811 * IIR bits on their UART, but it's specifically designed for
1812 * the "Diva" UART used on the management processor on many HP
1813 * ia64 and parisc boxes.
1815 spin_lock_irqsave(&up->port.lock, flags);
1816 lsr = serial_in(up, UART_LSR);
1817 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1818 spin_unlock_irqrestore(&up->port.lock, flags);
1819 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1820 (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1821 (lsr & UART_LSR_THRE)) {
1822 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1823 iir |= UART_IIR_THRI;
1826 if (!(iir & UART_IIR_NO_INT))
1827 serial8250_handle_port(up);
1829 if (is_real_interrupt(up->port.irq))
1830 serial_out(up, UART_IER, ier);
1832 /* Standard timer interval plus 0.2s to keep the port running */
1833 mod_timer(&up->timer,
1834 jiffies + uart_poll_timeout(&up->port) + HZ / 5);
1837 static unsigned int serial8250_tx_empty(struct uart_port *port)
1839 struct uart_8250_port *up =
1840 container_of(port, struct uart_8250_port, port);
1841 unsigned long flags;
1844 spin_lock_irqsave(&up->port.lock, flags);
1845 lsr = serial_in(up, UART_LSR);
1846 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1847 spin_unlock_irqrestore(&up->port.lock, flags);
1849 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1852 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1854 struct uart_8250_port *up =
1855 container_of(port, struct uart_8250_port, port);
1856 unsigned int status;
1859 status = check_modem_status(up);
1862 if (status & UART_MSR_DCD)
1864 if (status & UART_MSR_RI)
1866 if (status & UART_MSR_DSR)
1868 if (status & UART_MSR_CTS)
1873 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1875 struct uart_8250_port *up =
1876 container_of(port, struct uart_8250_port, port);
1877 unsigned char mcr = 0;
1879 if (mctrl & TIOCM_RTS)
1880 mcr |= UART_MCR_RTS;
1881 if (mctrl & TIOCM_DTR)
1882 mcr |= UART_MCR_DTR;
1883 if (mctrl & TIOCM_OUT1)
1884 mcr |= UART_MCR_OUT1;
1885 if (mctrl & TIOCM_OUT2)
1886 mcr |= UART_MCR_OUT2;
1887 if (mctrl & TIOCM_LOOP)
1888 mcr |= UART_MCR_LOOP;
1890 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1892 serial_out(up, UART_MCR, mcr);
1895 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1897 struct uart_8250_port *up =
1898 container_of(port, struct uart_8250_port, port);
1899 unsigned long flags;
1901 spin_lock_irqsave(&up->port.lock, flags);
1902 if (break_state == -1)
1903 up->lcr |= UART_LCR_SBC;
1905 up->lcr &= ~UART_LCR_SBC;
1906 serial_out(up, UART_LCR, up->lcr);
1907 spin_unlock_irqrestore(&up->port.lock, flags);
1911 * Wait for transmitter & holding register to empty
1913 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1915 unsigned int status, tmout = 10000;
1917 /* Wait up to 10ms for the character(s) to be sent. */
1919 status = serial_in(up, UART_LSR);
1921 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
1923 if ((status & bits) == bits)
1930 /* Wait up to 1s for flow control if necessary */
1931 if (up->port.flags & UPF_CONS_FLOW) {
1933 for (tmout = 1000000; tmout; tmout--) {
1934 unsigned int msr = serial_in(up, UART_MSR);
1935 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1936 if (msr & UART_MSR_CTS)
1939 touch_nmi_watchdog();
1944 #ifdef CONFIG_CONSOLE_POLL
1946 * Console polling routines for writing and reading from the uart while
1947 * in an interrupt or debug context.
1950 static int serial8250_get_poll_char(struct uart_port *port)
1952 struct uart_8250_port *up =
1953 container_of(port, struct uart_8250_port, port);
1954 unsigned char lsr = serial_inp(up, UART_LSR);
1956 if (!(lsr & UART_LSR_DR))
1957 return NO_POLL_CHAR;
1959 return serial_inp(up, UART_RX);
1963 static void serial8250_put_poll_char(struct uart_port *port,
1967 struct uart_8250_port *up =
1968 container_of(port, struct uart_8250_port, port);
1971 * First save the IER then disable the interrupts
1973 ier = serial_in(up, UART_IER);
1974 if (up->capabilities & UART_CAP_UUE)
1975 serial_out(up, UART_IER, UART_IER_UUE);
1977 serial_out(up, UART_IER, 0);
1979 wait_for_xmitr(up, BOTH_EMPTY);
1981 * Send the character out.
1982 * If a LF, also do CR...
1984 serial_out(up, UART_TX, c);
1986 wait_for_xmitr(up, BOTH_EMPTY);
1987 serial_out(up, UART_TX, 13);
1991 * Finally, wait for transmitter to become empty
1992 * and restore the IER
1994 wait_for_xmitr(up, BOTH_EMPTY);
1995 serial_out(up, UART_IER, ier);
1998 #endif /* CONFIG_CONSOLE_POLL */
2000 static int serial8250_startup(struct uart_port *port)
2002 struct uart_8250_port *up =
2003 container_of(port, struct uart_8250_port, port);
2004 unsigned long flags;
2005 unsigned char lsr, iir;
2008 up->port.fifosize = uart_config[up->port.type].fifo_size;
2009 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
2010 up->capabilities = uart_config[up->port.type].flags;
2013 if (up->port.iotype != up->cur_iotype)
2014 set_io_from_upio(port);
2016 if (up->port.type == PORT_16C950) {
2017 /* Wake up and initialize UART */
2019 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
2020 serial_outp(up, UART_EFR, UART_EFR_ECB);
2021 serial_outp(up, UART_IER, 0);
2022 serial_outp(up, UART_LCR, 0);
2023 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
2024 serial_outp(up, UART_LCR, 0xBF);
2025 serial_outp(up, UART_EFR, UART_EFR_ECB);
2026 serial_outp(up, UART_LCR, 0);
2029 #ifdef CONFIG_SERIAL_8250_RSA
2031 * If this is an RSA port, see if we can kick it up to the
2032 * higher speed clock.
2038 * Clear the FIFO buffers and disable them.
2039 * (they will be reenabled in set_termios())
2041 serial8250_clear_fifos(up);
2044 * Clear the interrupt registers.
2046 (void) serial_inp(up, UART_LSR);
2047 (void) serial_inp(up, UART_RX);
2048 (void) serial_inp(up, UART_IIR);
2049 (void) serial_inp(up, UART_MSR);
2052 * At this point, there's no way the LSR could still be 0xff;
2053 * if it is, then bail out, because there's likely no UART
2056 if (!(up->port.flags & UPF_BUGGY_UART) &&
2057 (serial_inp(up, UART_LSR) == 0xff)) {
2058 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
2059 serial_index(&up->port));
2064 * For a XR16C850, we need to set the trigger levels
2066 if (up->port.type == PORT_16850) {
2069 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
2071 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2072 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2073 serial_outp(up, UART_TRG, UART_TRG_96);
2074 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2075 serial_outp(up, UART_TRG, UART_TRG_96);
2077 serial_outp(up, UART_LCR, 0);
2080 if (is_real_interrupt(up->port.irq)) {
2083 * Test for UARTs that do not reassert THRE when the
2084 * transmitter is idle and the interrupt has already
2085 * been cleared. Real 16550s should always reassert
2086 * this interrupt whenever the transmitter is idle and
2087 * the interrupt is enabled. Delays are necessary to
2088 * allow register changes to become visible.
2090 spin_lock_irqsave(&up->port.lock, flags);
2091 if (up->port.irqflags & IRQF_SHARED)
2092 disable_irq_nosync(up->port.irq);
2094 wait_for_xmitr(up, UART_LSR_THRE);
2095 serial_out_sync(up, UART_IER, UART_IER_THRI);
2096 udelay(1); /* allow THRE to set */
2097 iir1 = serial_in(up, UART_IIR);
2098 serial_out(up, UART_IER, 0);
2099 serial_out_sync(up, UART_IER, UART_IER_THRI);
2100 udelay(1); /* allow a working UART time to re-assert THRE */
2101 iir = serial_in(up, UART_IIR);
2102 serial_out(up, UART_IER, 0);
2104 if (up->port.irqflags & IRQF_SHARED)
2105 enable_irq(up->port.irq);
2106 spin_unlock_irqrestore(&up->port.lock, flags);
2109 * If the interrupt is not reasserted, setup a timer to
2110 * kick the UART on a regular basis.
2112 if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {
2113 up->bugs |= UART_BUG_THRE;
2114 pr_debug("ttyS%d - using backup timer\n",
2115 serial_index(port));
2120 * The above check will only give an accurate result the first time
2121 * the port is opened so this value needs to be preserved.
2123 if (up->bugs & UART_BUG_THRE) {
2124 up->timer.function = serial8250_backup_timeout;
2125 up->timer.data = (unsigned long)up;
2126 mod_timer(&up->timer, jiffies +
2127 uart_poll_timeout(port) + HZ / 5);
2131 * If the "interrupt" for this port doesn't correspond with any
2132 * hardware interrupt, we use a timer-based system. The original
2133 * driver used to do this with IRQ0.
2135 if (!is_real_interrupt(up->port.irq)) {
2136 up->timer.data = (unsigned long)up;
2137 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
2139 retval = serial_link_irq_chain(up);
2145 * Now, initialize the UART
2147 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
2149 spin_lock_irqsave(&up->port.lock, flags);
2150 if (up->port.flags & UPF_FOURPORT) {
2151 if (!is_real_interrupt(up->port.irq))
2152 up->port.mctrl |= TIOCM_OUT1;
2155 * Most PC uarts need OUT2 raised to enable interrupts.
2157 if (is_real_interrupt(up->port.irq))
2158 up->port.mctrl |= TIOCM_OUT2;
2160 serial8250_set_mctrl(&up->port, up->port.mctrl);
2162 /* Serial over Lan (SoL) hack:
2163 Intel 8257x Gigabit ethernet chips have a
2164 16550 emulation, to be used for Serial Over Lan.
2165 Those chips take a longer time than a normal
2166 serial device to signalize that a transmission
2167 data was queued. Due to that, the above test generally
2168 fails. One solution would be to delay the reading of
2169 iir. However, this is not reliable, since the timeout
2170 is variable. So, let's just don't test if we receive
2171 TX irq. This way, we'll never enable UART_BUG_TXEN.
2173 if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)
2174 goto dont_test_tx_en;
2177 * Do a quick test to see if we receive an
2178 * interrupt when we enable the TX irq.
2180 serial_outp(up, UART_IER, UART_IER_THRI);
2181 lsr = serial_in(up, UART_LSR);
2182 iir = serial_in(up, UART_IIR);
2183 serial_outp(up, UART_IER, 0);
2185 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2186 if (!(up->bugs & UART_BUG_TXEN)) {
2187 up->bugs |= UART_BUG_TXEN;
2188 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2189 serial_index(port));
2192 up->bugs &= ~UART_BUG_TXEN;
2196 spin_unlock_irqrestore(&up->port.lock, flags);
2199 * Clear the interrupt registers again for luck, and clear the
2200 * saved flags to avoid getting false values from polling
2201 * routines or the previous session.
2203 serial_inp(up, UART_LSR);
2204 serial_inp(up, UART_RX);
2205 serial_inp(up, UART_IIR);
2206 serial_inp(up, UART_MSR);
2207 up->lsr_saved_flags = 0;
2208 up->msr_saved_flags = 0;
2211 * Finally, enable interrupts. Note: Modem status interrupts
2212 * are set via set_termios(), which will be occurring imminently
2213 * anyway, so we don't enable them here.
2215 up->ier = UART_IER_RLSI | UART_IER_RDI;
2216 serial_outp(up, UART_IER, up->ier);
2218 if (up->port.flags & UPF_FOURPORT) {
2221 * Enable interrupts on the AST Fourport board
2223 icp = (up->port.iobase & 0xfe0) | 0x01f;
2231 static void serial8250_shutdown(struct uart_port *port)
2233 struct uart_8250_port *up =
2234 container_of(port, struct uart_8250_port, port);
2235 unsigned long flags;
2238 * Disable interrupts from this port
2241 serial_outp(up, UART_IER, 0);
2243 spin_lock_irqsave(&up->port.lock, flags);
2244 if (up->port.flags & UPF_FOURPORT) {
2245 /* reset interrupts on the AST Fourport board */
2246 inb((up->port.iobase & 0xfe0) | 0x1f);
2247 up->port.mctrl |= TIOCM_OUT1;
2249 up->port.mctrl &= ~TIOCM_OUT2;
2251 serial8250_set_mctrl(&up->port, up->port.mctrl);
2252 spin_unlock_irqrestore(&up->port.lock, flags);
2255 * Disable break condition and FIFOs
2257 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
2258 serial8250_clear_fifos(up);
2260 #ifdef CONFIG_SERIAL_8250_RSA
2262 * Reset the RSA board back to 115kbps compat mode.
2268 * Read data port to reset things, and then unlink from
2271 (void) serial_in(up, UART_RX);
2273 del_timer_sync(&up->timer);
2274 up->timer.function = serial8250_timeout;
2275 if (is_real_interrupt(up->port.irq))
2276 serial_unlink_irq_chain(up);
2279 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
2284 * Handle magic divisors for baud rates above baud_base on
2285 * SMSC SuperIO chips.
2287 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2288 baud == (port->uartclk/4))
2290 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2291 baud == (port->uartclk/8))
2294 quot = uart_get_divisor(port, baud);
2300 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2301 struct ktermios *old)
2303 struct uart_8250_port *up =
2304 container_of(port, struct uart_8250_port, port);
2305 unsigned char cval, fcr = 0;
2306 unsigned long flags;
2307 unsigned int baud, quot;
2309 switch (termios->c_cflag & CSIZE) {
2311 cval = UART_LCR_WLEN5;
2314 cval = UART_LCR_WLEN6;
2317 cval = UART_LCR_WLEN7;
2321 cval = UART_LCR_WLEN8;
2325 if (termios->c_cflag & CSTOPB)
2326 cval |= UART_LCR_STOP;
2327 if (termios->c_cflag & PARENB)
2328 cval |= UART_LCR_PARITY;
2329 if (!(termios->c_cflag & PARODD))
2330 cval |= UART_LCR_EPAR;
2332 if (termios->c_cflag & CMSPAR)
2333 cval |= UART_LCR_SPAR;
2337 * Ask the core to calculate the divisor for us.
2339 baud = uart_get_baud_rate(port, termios, old,
2340 port->uartclk / 16 / 0xffff,
2341 port->uartclk / 16);
2342 quot = serial8250_get_divisor(port, baud);
2345 * Oxford Semi 952 rev B workaround
2347 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2350 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
2352 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
2354 fcr = uart_config[up->port.type].fcr;
2358 * MCR-based auto flow control. When AFE is enabled, RTS will be
2359 * deasserted when the receive FIFO contains more characters than
2360 * the trigger, or the MCR RTS bit is cleared. In the case where
2361 * the remote UART is not using CTS auto flow control, we must
2362 * have sufficient FIFO entries for the latency of the remote
2363 * UART to respond. IOW, at least 32 bytes of FIFO.
2365 if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
2366 up->mcr &= ~UART_MCR_AFE;
2367 if (termios->c_cflag & CRTSCTS)
2368 up->mcr |= UART_MCR_AFE;
2372 * Ok, we're now changing the port state. Do it with
2373 * interrupts disabled.
2375 spin_lock_irqsave(&up->port.lock, flags);
2378 * Update the per-port timeout.
2380 uart_update_timeout(port, termios->c_cflag, baud);
2382 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2383 if (termios->c_iflag & INPCK)
2384 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2385 if (termios->c_iflag & (BRKINT | PARMRK))
2386 up->port.read_status_mask |= UART_LSR_BI;
2389 * Characteres to ignore
2391 up->port.ignore_status_mask = 0;
2392 if (termios->c_iflag & IGNPAR)
2393 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2394 if (termios->c_iflag & IGNBRK) {
2395 up->port.ignore_status_mask |= UART_LSR_BI;
2397 * If we're ignoring parity and break indicators,
2398 * ignore overruns too (for real raw support).
2400 if (termios->c_iflag & IGNPAR)
2401 up->port.ignore_status_mask |= UART_LSR_OE;
2405 * ignore all characters if CREAD is not set
2407 if ((termios->c_cflag & CREAD) == 0)
2408 up->port.ignore_status_mask |= UART_LSR_DR;
2411 * CTS flow control flag and modem status interrupts
2413 up->ier &= ~UART_IER_MSI;
2414 if (!(up->bugs & UART_BUG_NOMSR) &&
2415 UART_ENABLE_MS(&up->port, termios->c_cflag))
2416 up->ier |= UART_IER_MSI;
2417 if (up->capabilities & UART_CAP_UUE)
2418 up->ier |= UART_IER_UUE;
2419 if (up->capabilities & UART_CAP_RTOIE)
2420 up->ier |= UART_IER_RTOIE;
2422 serial_out(up, UART_IER, up->ier);
2424 if (up->capabilities & UART_CAP_EFR) {
2425 unsigned char efr = 0;
2427 * TI16C752/Startech hardware flow control. FIXME:
2428 * - TI16C752 requires control thresholds to be set.
2429 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2431 if (termios->c_cflag & CRTSCTS)
2432 efr |= UART_EFR_CTS;
2434 serial_outp(up, UART_LCR, UART_LCR_CONF_MODE_B);
2435 if (up->port.flags & UPF_EXAR_EFR)
2436 serial_outp(up, UART_XR_EFR, efr);
2438 serial_outp(up, UART_EFR, efr);
2441 #ifdef CONFIG_ARCH_OMAP
2442 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2443 if (cpu_is_omap1510() && is_omap_port(up)) {
2444 if (baud == 115200) {
2446 serial_out(up, UART_OMAP_OSC_12M_SEL, 1);
2448 serial_out(up, UART_OMAP_OSC_12M_SEL, 0);
2452 if (up->capabilities & UART_NATSEMI) {
2453 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
2454 serial_outp(up, UART_LCR, 0xe0);
2456 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
2459 serial_dl_write(up, quot);
2462 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2463 * is written without DLAB set, this mode will be disabled.
2465 if (up->port.type == PORT_16750)
2466 serial_outp(up, UART_FCR, fcr);
2468 serial_outp(up, UART_LCR, cval); /* reset DLAB */
2469 up->lcr = cval; /* Save LCR */
2470 if (up->port.type != PORT_16750) {
2471 if (fcr & UART_FCR_ENABLE_FIFO) {
2472 /* emulated UARTs (Lucent Venus 167x) need two steps */
2473 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
2475 serial_outp(up, UART_FCR, fcr); /* set fcr */
2477 serial8250_set_mctrl(&up->port, up->port.mctrl);
2478 spin_unlock_irqrestore(&up->port.lock, flags);
2479 /* Don't rewrite B0 */
2480 if (tty_termios_baud_rate(termios))
2481 tty_termios_encode_baud_rate(termios, baud, baud);
2483 EXPORT_SYMBOL(serial8250_do_set_termios);
2486 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2487 struct ktermios *old)
2489 if (port->set_termios)
2490 port->set_termios(port, termios, old);
2492 serial8250_do_set_termios(port, termios, old);
2496 serial8250_set_ldisc(struct uart_port *port, int new)
2499 port->flags |= UPF_HARDPPS_CD;
2500 serial8250_enable_ms(port);
2502 port->flags &= ~UPF_HARDPPS_CD;
2506 void serial8250_do_pm(struct uart_port *port, unsigned int state,
2507 unsigned int oldstate)
2509 struct uart_8250_port *p =
2510 container_of(port, struct uart_8250_port, port);
2512 serial8250_set_sleep(p, state != 0);
2514 EXPORT_SYMBOL(serial8250_do_pm);
2517 serial8250_pm(struct uart_port *port, unsigned int state,
2518 unsigned int oldstate)
2521 port->pm(port, state, oldstate);
2523 serial8250_do_pm(port, state, oldstate);
2526 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2528 if (pt->port.iotype == UPIO_AU)
2530 #ifdef CONFIG_ARCH_OMAP
2531 if (is_omap_port(pt))
2532 return 0x16 << pt->port.regshift;
2534 return 8 << pt->port.regshift;
2538 * Resource handling.
2540 static int serial8250_request_std_resource(struct uart_8250_port *up)
2542 unsigned int size = serial8250_port_size(up);
2545 switch (up->port.iotype) {
2550 if (!up->port.mapbase)
2553 if (!request_mem_region(up->port.mapbase, size, "serial")) {
2558 if (up->port.flags & UPF_IOREMAP) {
2559 up->port.membase = ioremap_nocache(up->port.mapbase,
2561 if (!up->port.membase) {
2562 release_mem_region(up->port.mapbase, size);
2570 if (!request_region(up->port.iobase, size, "serial"))
2577 static void serial8250_release_std_resource(struct uart_8250_port *up)
2579 unsigned int size = serial8250_port_size(up);
2581 switch (up->port.iotype) {
2586 if (!up->port.mapbase)
2589 if (up->port.flags & UPF_IOREMAP) {
2590 iounmap(up->port.membase);
2591 up->port.membase = NULL;
2594 release_mem_region(up->port.mapbase, size);
2599 release_region(up->port.iobase, size);
2604 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2606 unsigned long start = UART_RSA_BASE << up->port.regshift;
2607 unsigned int size = 8 << up->port.regshift;
2610 switch (up->port.iotype) {
2613 start += up->port.iobase;
2614 if (request_region(start, size, "serial-rsa"))
2624 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2626 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2627 unsigned int size = 8 << up->port.regshift;
2629 switch (up->port.iotype) {
2632 release_region(up->port.iobase + offset, size);
2637 static void serial8250_release_port(struct uart_port *port)
2639 struct uart_8250_port *up =
2640 container_of(port, struct uart_8250_port, port);
2642 serial8250_release_std_resource(up);
2643 if (up->port.type == PORT_RSA)
2644 serial8250_release_rsa_resource(up);
2647 static int serial8250_request_port(struct uart_port *port)
2649 struct uart_8250_port *up =
2650 container_of(port, struct uart_8250_port, port);
2653 ret = serial8250_request_std_resource(up);
2654 if (ret == 0 && up->port.type == PORT_RSA) {
2655 ret = serial8250_request_rsa_resource(up);
2657 serial8250_release_std_resource(up);
2663 static void serial8250_config_port(struct uart_port *port, int flags)
2665 struct uart_8250_port *up =
2666 container_of(port, struct uart_8250_port, port);
2667 int probeflags = PROBE_ANY;
2671 * Find the region that we can probe for. This in turn
2672 * tells us whether we can probe for the type of port.
2674 ret = serial8250_request_std_resource(up);
2678 ret = serial8250_request_rsa_resource(up);
2680 probeflags &= ~PROBE_RSA;
2682 if (up->port.iotype != up->cur_iotype)
2683 set_io_from_upio(port);
2685 if (flags & UART_CONFIG_TYPE)
2686 autoconfig(up, probeflags);
2688 /* if access method is AU, it is a 16550 with a quirk */
2689 if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
2690 up->bugs |= UART_BUG_NOMSR;
2692 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2695 if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
2696 serial8250_release_rsa_resource(up);
2697 if (up->port.type == PORT_UNKNOWN)
2698 serial8250_release_std_resource(up);
2702 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
2704 if (ser->irq >= nr_irqs || ser->irq < 0 ||
2705 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
2706 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
2707 ser->type == PORT_STARTECH)
2713 serial8250_type(struct uart_port *port)
2715 int type = port->type;
2717 if (type >= ARRAY_SIZE(uart_config))
2719 return uart_config[type].name;
2722 static struct uart_ops serial8250_pops = {
2723 .tx_empty = serial8250_tx_empty,
2724 .set_mctrl = serial8250_set_mctrl,
2725 .get_mctrl = serial8250_get_mctrl,
2726 .stop_tx = serial8250_stop_tx,
2727 .start_tx = serial8250_start_tx,
2728 .stop_rx = serial8250_stop_rx,
2729 .enable_ms = serial8250_enable_ms,
2730 .break_ctl = serial8250_break_ctl,
2731 .startup = serial8250_startup,
2732 .shutdown = serial8250_shutdown,
2733 .set_termios = serial8250_set_termios,
2734 .set_ldisc = serial8250_set_ldisc,
2735 .pm = serial8250_pm,
2736 .type = serial8250_type,
2737 .release_port = serial8250_release_port,
2738 .request_port = serial8250_request_port,
2739 .config_port = serial8250_config_port,
2740 .verify_port = serial8250_verify_port,
2741 #ifdef CONFIG_CONSOLE_POLL
2742 .poll_get_char = serial8250_get_poll_char,
2743 .poll_put_char = serial8250_put_poll_char,
2747 static struct uart_8250_port serial8250_ports[UART_NR];
2749 static void (*serial8250_isa_config)(int port, struct uart_port *up,
2750 unsigned short *capabilities);
2752 void serial8250_set_isa_configurator(
2753 void (*v)(int port, struct uart_port *up, unsigned short *capabilities))
2755 serial8250_isa_config = v;
2757 EXPORT_SYMBOL(serial8250_set_isa_configurator);
2759 static void __init serial8250_isa_init_ports(void)
2761 struct uart_8250_port *up;
2762 static int first = 1;
2769 for (i = 0; i < nr_uarts; i++) {
2770 struct uart_8250_port *up = &serial8250_ports[i];
2773 spin_lock_init(&up->port.lock);
2775 init_timer(&up->timer);
2776 up->timer.function = serial8250_timeout;
2779 * ALPHA_KLUDGE_MCR needs to be killed.
2781 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
2782 up->mcr_force = ALPHA_KLUDGE_MCR;
2784 up->port.ops = &serial8250_pops;
2788 irqflag = IRQF_SHARED;
2790 for (i = 0, up = serial8250_ports;
2791 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
2793 up->port.iobase = old_serial_port[i].port;
2794 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
2795 up->port.irqflags = old_serial_port[i].irqflags;
2796 up->port.uartclk = old_serial_port[i].baud_base * 16;
2797 up->port.flags = old_serial_port[i].flags;
2798 up->port.hub6 = old_serial_port[i].hub6;
2799 up->port.membase = old_serial_port[i].iomem_base;
2800 up->port.iotype = old_serial_port[i].io_type;
2801 up->port.regshift = old_serial_port[i].iomem_reg_shift;
2802 set_io_from_upio(&up->port);
2803 up->port.irqflags |= irqflag;
2804 if (serial8250_isa_config != NULL)
2805 serial8250_isa_config(i, &up->port, &up->capabilities);
2811 serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type)
2813 up->port.type = type;
2814 up->port.fifosize = uart_config[type].fifo_size;
2815 up->capabilities = uart_config[type].flags;
2816 up->tx_loadsz = uart_config[type].tx_loadsz;
2820 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2824 for (i = 0; i < nr_uarts; i++) {
2825 struct uart_8250_port *up = &serial8250_ports[i];
2826 up->cur_iotype = 0xFF;
2829 serial8250_isa_init_ports();
2831 for (i = 0; i < nr_uarts; i++) {
2832 struct uart_8250_port *up = &serial8250_ports[i];
2836 if (up->port.flags & UPF_FIXED_TYPE)
2837 serial8250_init_fixed_type_port(up, up->port.type);
2839 uart_add_one_port(drv, &up->port);
2843 #ifdef CONFIG_SERIAL_8250_CONSOLE
2845 static void serial8250_console_putchar(struct uart_port *port, int ch)
2847 struct uart_8250_port *up =
2848 container_of(port, struct uart_8250_port, port);
2850 wait_for_xmitr(up, UART_LSR_THRE);
2851 serial_out(up, UART_TX, ch);
2855 * Print a string to the serial port trying not to disturb
2856 * any possible real use of the port...
2858 * The console_lock must be held when we get here.
2861 serial8250_console_write(struct console *co, const char *s, unsigned int count)
2863 struct uart_8250_port *up = &serial8250_ports[co->index];
2864 unsigned long flags;
2868 touch_nmi_watchdog();
2870 local_irq_save(flags);
2871 if (up->port.sysrq) {
2872 /* serial8250_handle_port() already took the lock */
2874 } else if (oops_in_progress) {
2875 locked = spin_trylock(&up->port.lock);
2877 spin_lock(&up->port.lock);
2880 * First save the IER then disable the interrupts
2882 ier = serial_in(up, UART_IER);
2884 if (up->capabilities & UART_CAP_UUE)
2885 serial_out(up, UART_IER, UART_IER_UUE);
2887 serial_out(up, UART_IER, 0);
2889 uart_console_write(&up->port, s, count, serial8250_console_putchar);
2892 * Finally, wait for transmitter to become empty
2893 * and restore the IER
2895 wait_for_xmitr(up, BOTH_EMPTY);
2896 serial_out(up, UART_IER, ier);
2899 * The receive handling will happen properly because the
2900 * receive ready bit will still be set; it is not cleared
2901 * on read. However, modem control will not, we must
2902 * call it if we have saved something in the saved flags
2903 * while processing with interrupts off.
2905 if (up->msr_saved_flags)
2906 check_modem_status(up);
2909 spin_unlock(&up->port.lock);
2910 local_irq_restore(flags);
2913 static int __init serial8250_console_setup(struct console *co, char *options)
2915 struct uart_port *port;
2922 * Check whether an invalid uart number has been specified, and
2923 * if so, search for the first available port that does have
2926 if (co->index >= nr_uarts)
2928 port = &serial8250_ports[co->index].port;
2929 if (!port->iobase && !port->membase)
2933 uart_parse_options(options, &baud, &parity, &bits, &flow);
2935 return uart_set_options(port, co, baud, parity, bits, flow);
2938 static int serial8250_console_early_setup(void)
2940 return serial8250_find_port_for_earlycon();
2943 static struct console serial8250_console = {
2945 .write = serial8250_console_write,
2946 .device = uart_console_device,
2947 .setup = serial8250_console_setup,
2948 .early_setup = serial8250_console_early_setup,
2949 .flags = CON_PRINTBUFFER | CON_ANYTIME,
2951 .data = &serial8250_reg,
2954 static int __init serial8250_console_init(void)
2956 if (nr_uarts > UART_NR)
2959 serial8250_isa_init_ports();
2960 register_console(&serial8250_console);
2963 console_initcall(serial8250_console_init);
2965 int serial8250_find_port(struct uart_port *p)
2968 struct uart_port *port;
2970 for (line = 0; line < nr_uarts; line++) {
2971 port = &serial8250_ports[line].port;
2972 if (uart_match_port(p, port))
2978 #define SERIAL8250_CONSOLE &serial8250_console
2980 #define SERIAL8250_CONSOLE NULL
2983 static struct uart_driver serial8250_reg = {
2984 .owner = THIS_MODULE,
2985 .driver_name = "serial",
2989 .cons = SERIAL8250_CONSOLE,
2993 * early_serial_setup - early registration for 8250 ports
2995 * Setup an 8250 port structure prior to console initialisation. Use
2996 * after console initialisation will cause undefined behaviour.
2998 int __init early_serial_setup(struct uart_port *port)
3000 struct uart_port *p;
3002 if (port->line >= ARRAY_SIZE(serial8250_ports))
3005 serial8250_isa_init_ports();
3006 p = &serial8250_ports[port->line].port;
3007 p->iobase = port->iobase;
3008 p->membase = port->membase;
3010 p->irqflags = port->irqflags;
3011 p->uartclk = port->uartclk;
3012 p->fifosize = port->fifosize;
3013 p->regshift = port->regshift;
3014 p->iotype = port->iotype;
3015 p->flags = port->flags;
3016 p->mapbase = port->mapbase;
3017 p->private_data = port->private_data;
3018 p->type = port->type;
3019 p->line = port->line;
3021 set_io_from_upio(p);
3022 if (port->serial_in)
3023 p->serial_in = port->serial_in;
3024 if (port->serial_out)
3025 p->serial_out = port->serial_out;
3026 if (port->handle_irq)
3027 p->handle_irq = port->handle_irq;
3029 p->handle_irq = serial8250_default_handle_irq;
3035 * serial8250_suspend_port - suspend one serial port
3036 * @line: serial line number
3038 * Suspend one serial port.
3040 void serial8250_suspend_port(int line)
3042 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
3046 * serial8250_resume_port - resume one serial port
3047 * @line: serial line number
3049 * Resume one serial port.
3051 void serial8250_resume_port(int line)
3053 struct uart_8250_port *up = &serial8250_ports[line];
3055 if (up->capabilities & UART_NATSEMI) {
3056 /* Ensure it's still in high speed mode */
3057 serial_outp(up, UART_LCR, 0xE0);
3059 ns16550a_goto_highspeed(up);
3061 serial_outp(up, UART_LCR, 0);
3062 up->port.uartclk = 921600*16;
3064 uart_resume_port(&serial8250_reg, &up->port);
3068 * Register a set of serial devices attached to a platform device. The
3069 * list is terminated with a zero flags entry, which means we expect
3070 * all entries to have at least UPF_BOOT_AUTOCONF set.
3072 static int __devinit serial8250_probe(struct platform_device *dev)
3074 struct plat_serial8250_port *p = dev->dev.platform_data;
3075 struct uart_port port;
3076 int ret, i, irqflag = 0;
3078 memset(&port, 0, sizeof(struct uart_port));
3081 irqflag = IRQF_SHARED;
3083 for (i = 0; p && p->flags != 0; p++, i++) {
3084 port.iobase = p->iobase;
3085 port.membase = p->membase;
3087 port.irqflags = p->irqflags;
3088 port.uartclk = p->uartclk;
3089 port.regshift = p->regshift;
3090 port.iotype = p->iotype;
3091 port.flags = p->flags;
3092 port.mapbase = p->mapbase;
3093 port.hub6 = p->hub6;
3094 port.private_data = p->private_data;
3095 port.type = p->type;
3096 port.serial_in = p->serial_in;
3097 port.serial_out = p->serial_out;
3098 port.handle_irq = p->handle_irq;
3099 port.set_termios = p->set_termios;
3101 port.dev = &dev->dev;
3102 port.irqflags |= irqflag;
3103 ret = serial8250_register_port(&port);
3105 dev_err(&dev->dev, "unable to register port at index %d "
3106 "(IO%lx MEM%llx IRQ%d): %d\n", i,
3107 p->iobase, (unsigned long long)p->mapbase,
3115 * Remove serial ports registered against a platform device.
3117 static int __devexit serial8250_remove(struct platform_device *dev)
3121 for (i = 0; i < nr_uarts; i++) {
3122 struct uart_8250_port *up = &serial8250_ports[i];
3124 if (up->port.dev == &dev->dev)
3125 serial8250_unregister_port(i);
3130 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
3134 for (i = 0; i < UART_NR; i++) {
3135 struct uart_8250_port *up = &serial8250_ports[i];
3137 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3138 uart_suspend_port(&serial8250_reg, &up->port);
3144 static int serial8250_resume(struct platform_device *dev)
3148 for (i = 0; i < UART_NR; i++) {
3149 struct uart_8250_port *up = &serial8250_ports[i];
3151 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3152 serial8250_resume_port(i);
3158 static struct platform_driver serial8250_isa_driver = {
3159 .probe = serial8250_probe,
3160 .remove = __devexit_p(serial8250_remove),
3161 .suspend = serial8250_suspend,
3162 .resume = serial8250_resume,
3164 .name = "serial8250",
3165 .owner = THIS_MODULE,
3170 * This "device" covers _all_ ISA 8250-compatible serial devices listed
3171 * in the table in include/asm/serial.h
3173 static struct platform_device *serial8250_isa_devs;
3176 * serial8250_register_port and serial8250_unregister_port allows for
3177 * 16x50 serial ports to be configured at run-time, to support PCMCIA
3178 * modems and PCI multiport cards.
3180 static DEFINE_MUTEX(serial_mutex);
3182 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3187 * First, find a port entry which matches.
3189 for (i = 0; i < nr_uarts; i++)
3190 if (uart_match_port(&serial8250_ports[i].port, port))
3191 return &serial8250_ports[i];
3194 * We didn't find a matching entry, so look for the first
3195 * free entry. We look for one which hasn't been previously
3196 * used (indicated by zero iobase).
3198 for (i = 0; i < nr_uarts; i++)
3199 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3200 serial8250_ports[i].port.iobase == 0)
3201 return &serial8250_ports[i];
3204 * That also failed. Last resort is to find any entry which
3205 * doesn't have a real port associated with it.
3207 for (i = 0; i < nr_uarts; i++)
3208 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3209 return &serial8250_ports[i];
3215 * serial8250_register_port - register a serial port
3216 * @port: serial port template
3218 * Configure the serial port specified by the request. If the
3219 * port exists and is in use, it is hung up and unregistered
3222 * The port is then probed and if necessary the IRQ is autodetected
3223 * If this fails an error is returned.
3225 * On success the port is ready to use and the line number is returned.
3227 int serial8250_register_port(struct uart_port *port)
3229 struct uart_8250_port *uart;
3232 if (port->uartclk == 0)
3235 mutex_lock(&serial_mutex);
3237 uart = serial8250_find_match_or_unused(port);
3239 uart_remove_one_port(&serial8250_reg, &uart->port);
3241 uart->port.iobase = port->iobase;
3242 uart->port.membase = port->membase;
3243 uart->port.irq = port->irq;
3244 uart->port.irqflags = port->irqflags;
3245 uart->port.uartclk = port->uartclk;
3246 uart->port.fifosize = port->fifosize;
3247 uart->port.regshift = port->regshift;
3248 uart->port.iotype = port->iotype;
3249 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
3250 uart->port.mapbase = port->mapbase;
3251 uart->port.private_data = port->private_data;
3253 uart->port.dev = port->dev;
3255 if (port->flags & UPF_FIXED_TYPE)
3256 serial8250_init_fixed_type_port(uart, port->type);
3258 set_io_from_upio(&uart->port);
3259 /* Possibly override default I/O functions. */
3260 if (port->serial_in)
3261 uart->port.serial_in = port->serial_in;
3262 if (port->serial_out)
3263 uart->port.serial_out = port->serial_out;
3264 if (port->handle_irq)
3265 uart->port.handle_irq = port->handle_irq;
3266 /* Possibly override set_termios call */
3267 if (port->set_termios)
3268 uart->port.set_termios = port->set_termios;
3270 uart->port.pm = port->pm;
3272 if (serial8250_isa_config != NULL)
3273 serial8250_isa_config(0, &uart->port,
3274 &uart->capabilities);
3276 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3278 ret = uart->port.line;
3280 mutex_unlock(&serial_mutex);
3284 EXPORT_SYMBOL(serial8250_register_port);
3287 * serial8250_unregister_port - remove a 16x50 serial port at runtime
3288 * @line: serial line number
3290 * Remove one serial port. This may not be called from interrupt
3291 * context. We hand the port back to the our control.
3293 void serial8250_unregister_port(int line)
3295 struct uart_8250_port *uart = &serial8250_ports[line];
3297 mutex_lock(&serial_mutex);
3298 uart_remove_one_port(&serial8250_reg, &uart->port);
3299 if (serial8250_isa_devs) {
3300 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3301 uart->port.type = PORT_UNKNOWN;
3302 uart->port.dev = &serial8250_isa_devs->dev;
3303 uart->capabilities = uart_config[uart->port.type].flags;
3304 uart_add_one_port(&serial8250_reg, &uart->port);
3306 uart->port.dev = NULL;
3308 mutex_unlock(&serial_mutex);
3310 EXPORT_SYMBOL(serial8250_unregister_port);
3312 static int __init serial8250_init(void)
3316 if (nr_uarts > UART_NR)
3319 printk(KERN_INFO "Serial: 8250/16550 driver, "
3320 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3321 share_irqs ? "en" : "dis");
3324 ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3326 serial8250_reg.nr = UART_NR;
3327 ret = uart_register_driver(&serial8250_reg);
3332 serial8250_isa_devs = platform_device_alloc("serial8250",
3333 PLAT8250_DEV_LEGACY);
3334 if (!serial8250_isa_devs) {
3336 goto unreg_uart_drv;
3339 ret = platform_device_add(serial8250_isa_devs);
3343 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3345 ret = platform_driver_register(&serial8250_isa_driver);
3349 platform_device_del(serial8250_isa_devs);
3351 platform_device_put(serial8250_isa_devs);
3354 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3356 uart_unregister_driver(&serial8250_reg);
3362 static void __exit serial8250_exit(void)
3364 struct platform_device *isa_dev = serial8250_isa_devs;
3367 * This tells serial8250_unregister_port() not to re-register
3368 * the ports (thereby making serial8250_isa_driver permanently
3371 serial8250_isa_devs = NULL;
3373 platform_driver_unregister(&serial8250_isa_driver);
3374 platform_device_unregister(isa_dev);
3377 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3379 uart_unregister_driver(&serial8250_reg);
3383 module_init(serial8250_init);
3384 module_exit(serial8250_exit);
3386 EXPORT_SYMBOL(serial8250_suspend_port);
3387 EXPORT_SYMBOL(serial8250_resume_port);
3389 MODULE_LICENSE("GPL");
3390 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3392 module_param(share_irqs, uint, 0644);
3393 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3396 module_param(nr_uarts, uint, 0644);
3397 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3399 module_param(skip_txen_test, uint, 0644);
3400 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
3402 #ifdef CONFIG_SERIAL_8250_RSA
3403 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3404 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3406 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);