drivers/thermal/samsung/exynos_tmu_data.c

   1 /*
   2  * exynos_tmu_data.c - Samsung EXYNOS tmu data file
   3  *
   4  *  Copyright (C) 2013 Samsung Electronics
   5  *  Amit Daniel Kachhap <amit.daniel@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  *
  21  */
  22
  23 #include "exynos_thermal_common.h"
  24 #include "exynos_tmu.h"
  25 #include "exynos_tmu_data.h"
  26
  27 struct exynos_tmu_init_data const exynos4210_default_tmu_data = {
  28         .tmu_data = {
  29                 {
  30                 .threshold = 80,
  31                 .trigger_levels[0] = 5,
  32                 .trigger_levels[1] = 20,
  33                 .trigger_levels[2] = 30,
  34                 .trigger_enable[0] = true,
  35                 .trigger_enable[1] = true,
  36                 .trigger_enable[2] = true,
  37                 .trigger_enable[3] = false,
  38                 .trigger_type[0] = THROTTLE_ACTIVE,
  39                 .trigger_type[1] = THROTTLE_ACTIVE,
  40                 .trigger_type[2] = SW_TRIP,
  41                 .max_trigger_level = 4,
  42                 .non_hw_trigger_levels = 3,
  43                 .gain = 15,
  44                 .reference_voltage = 7,
  45                 .cal_type = TYPE_ONE_POINT_TRIMMING,
  46                 .min_efuse_value = 40,
  47                 .max_efuse_value = 100,
  48                 .first_point_trim = 25,
  49                 .second_point_trim = 85,
  50                 .default_temp_offset = 50,
  51                 .freq_tab[0] = {
  52                         .freq_clip_max = 800 * 1000,
  53                         .temp_level = 85,
  54                         },
  55                 .freq_tab[1] = {
  56                         .freq_clip_max = 200 * 1000,
  57                         .temp_level = 100,
  58                 },
  59                 .freq_tab_count = 2,
  60                 .type = SOC_ARCH_EXYNOS4210,
  61                 },
  62         },
  63         .tmu_count = 1,
  64 };
  65
  66 #define EXYNOS3250_TMU_DATA \
  67         .threshold_falling = 10, \
  68         .trigger_levels[0] = 70, \
  69         .trigger_levels[1] = 95, \
  70         .trigger_levels[2] = 110, \
  71         .trigger_levels[3] = 120, \
  72         .trigger_enable[0] = true, \
  73         .trigger_enable[1] = true, \
  74         .trigger_enable[2] = true, \
  75         .trigger_enable[3] = false, \
  76         .trigger_type[0] = THROTTLE_ACTIVE, \
  77         .trigger_type[1] = THROTTLE_ACTIVE, \
  78         .trigger_type[2] = SW_TRIP, \
  79         .trigger_type[3] = HW_TRIP, \
  80         .max_trigger_level = 4, \
  81         .non_hw_trigger_levels = 3, \
  82         .gain = 8, \
  83         .reference_voltage = 16, \
  84         .noise_cancel_mode = 4, \
  85         .cal_type = TYPE_TWO_POINT_TRIMMING, \
  86         .efuse_value = 55, \
  87         .min_efuse_value = 40, \
  88         .max_efuse_value = 100, \
  89         .first_point_trim = 25, \
  90         .second_point_trim = 85, \
  91         .default_temp_offset = 50, \
  92         .freq_tab[0] = { \
  93                 .freq_clip_max = 800 * 1000, \
  94                 .temp_level = 70, \
  95         }, \
  96         .freq_tab[1] = { \
  97                 .freq_clip_max = 400 * 1000, \
  98                 .temp_level = 95, \
  99         }, \
 100         .freq_tab_count = 2
 101
 102 struct exynos_tmu_init_data const exynos3250_default_tmu_data = {
 103         .tmu_data = {
 104                 {
 105                         EXYNOS3250_TMU_DATA,
 106                         .type = SOC_ARCH_EXYNOS3250,
 107                 },
 108         },
 109         .tmu_count = 1,
 110 };
 111
 112 #define EXYNOS4412_TMU_DATA \
 113         .threshold_falling = 10, \
 114         .trigger_levels[0] = 70, \
 115         .trigger_levels[1] = 95, \
 116         .trigger_levels[2] = 110, \
 117         .trigger_levels[3] = 120, \
 118         .trigger_enable[0] = true, \
 119         .trigger_enable[1] = true, \
 120         .trigger_enable[2] = true, \
 121         .trigger_enable[3] = false, \
 122         .trigger_type[0] = THROTTLE_ACTIVE, \
 123         .trigger_type[1] = THROTTLE_ACTIVE, \
 124         .trigger_type[2] = SW_TRIP, \
 125         .trigger_type[3] = HW_TRIP, \
 126         .max_trigger_level = 4, \
 127         .non_hw_trigger_levels = 3, \
 128         .gain = 8, \
 129         .reference_voltage = 16, \
 130         .noise_cancel_mode = 4, \
 131         .cal_type = TYPE_ONE_POINT_TRIMMING, \
 132         .efuse_value = 55, \
 133         .min_efuse_value = 40, \
 134         .max_efuse_value = 100, \
 135         .first_point_trim = 25, \
 136         .second_point_trim = 85, \
 137         .default_temp_offset = 50, \
 138         .freq_tab[0] = { \
 139                 .freq_clip_max = 1400 * 1000, \
 140                 .temp_level = 70, \
 141         }, \
 142         .freq_tab[1] = { \
 143                 .freq_clip_max = 400 * 1000, \
 144                 .temp_level = 95, \
 145         }, \
 146         .freq_tab_count = 2
 147
 148 struct exynos_tmu_init_data const exynos4412_default_tmu_data = {
 149         .tmu_data = {
 150                 {
 151                         EXYNOS4412_TMU_DATA,
 152                         .type = SOC_ARCH_EXYNOS4412,
 153                 },
 154         },
 155         .tmu_count = 1,
 156 };
 157
 158 struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
 159         .tmu_data = {
 160                 {
 161                         EXYNOS4412_TMU_DATA,
 162                         .type = SOC_ARCH_EXYNOS5250,
 163                 },
 164         },
 165         .tmu_count = 1,
 166 };
 167
 168 #define __EXYNOS5260_TMU_DATA   \
 169         .threshold_falling = 10, \
 170         .trigger_levels[0] = 85, \
 171         .trigger_levels[1] = 103, \
 172         .trigger_levels[2] = 110, \
 173         .trigger_levels[3] = 120, \
 174         .trigger_enable[0] = true, \
 175         .trigger_enable[1] = true, \
 176         .trigger_enable[2] = true, \
 177         .trigger_enable[3] = false, \
 178         .trigger_type[0] = THROTTLE_ACTIVE, \
 179         .trigger_type[1] = THROTTLE_ACTIVE, \
 180         .trigger_type[2] = SW_TRIP, \
 181         .trigger_type[3] = HW_TRIP, \
 182         .max_trigger_level = 4, \
 183         .non_hw_trigger_levels = 3, \
 184         .gain = 8, \
 185         .reference_voltage = 16, \
 186         .noise_cancel_mode = 4, \
 187         .cal_type = TYPE_ONE_POINT_TRIMMING, \
 188         .efuse_value = 55, \
 189         .min_efuse_value = 40, \
 190         .max_efuse_value = 100, \
 191         .first_point_trim = 25, \
 192         .second_point_trim = 85, \
 193         .default_temp_offset = 50, \
 194         .freq_tab[0] = { \
 195                 .freq_clip_max = 800 * 1000, \
 196                 .temp_level = 85, \
 197         }, \
 198         .freq_tab[1] = { \
 199                 .freq_clip_max = 200 * 1000, \
 200                 .temp_level = 103, \
 201         }, \
 202         .freq_tab_count = 2, \
 203
 204 #define EXYNOS5260_TMU_DATA \
 205         __EXYNOS5260_TMU_DATA \
 206         .type = SOC_ARCH_EXYNOS5260
 207
 208 struct exynos_tmu_init_data const exynos5260_default_tmu_data = {
 209         .tmu_data = {
 210                 { EXYNOS5260_TMU_DATA },
 211                 { EXYNOS5260_TMU_DATA },
 212                 { EXYNOS5260_TMU_DATA },
 213                 { EXYNOS5260_TMU_DATA },
 214                 { EXYNOS5260_TMU_DATA },
 215         },
 216         .tmu_count = 5,
 217 };
 218
 219 #define __EXYNOS5420_TMU_DATA   \
 220         .threshold_falling = 10, \
 221         .trigger_levels[0] = 85, \
 222         .trigger_levels[1] = 103, \
 223         .trigger_levels[2] = 110, \
 224         .trigger_levels[3] = 120, \
 225         .trigger_enable[0] = true, \
 226         .trigger_enable[1] = true, \
 227         .trigger_enable[2] = true, \
 228         .trigger_enable[3] = false, \
 229         .trigger_type[0] = THROTTLE_ACTIVE, \
 230         .trigger_type[1] = THROTTLE_ACTIVE, \
 231         .trigger_type[2] = SW_TRIP, \
 232         .trigger_type[3] = HW_TRIP, \
 233         .max_trigger_level = 4, \
 234         .non_hw_trigger_levels = 3, \
 235         .gain = 8, \
 236         .reference_voltage = 16, \
 237         .noise_cancel_mode = 4, \
 238         .cal_type = TYPE_ONE_POINT_TRIMMING, \
 239         .efuse_value = 55, \
 240         .min_efuse_value = 40, \
 241         .max_efuse_value = 100, \
 242         .first_point_trim = 25, \
 243         .second_point_trim = 85, \
 244         .default_temp_offset = 50, \
 245         .freq_tab[0] = { \
 246                 .freq_clip_max = 800 * 1000, \
 247                 .temp_level = 85, \
 248         }, \
 249         .freq_tab[1] = { \
 250                 .freq_clip_max = 200 * 1000, \
 251                 .temp_level = 103, \
 252         }, \
 253         .freq_tab_count = 2, \
 254
 255 #define EXYNOS5420_TMU_DATA \
 256         __EXYNOS5420_TMU_DATA \
 257         .type = SOC_ARCH_EXYNOS5420
 258
 259 #define EXYNOS5420_TMU_DATA_SHARED \
 260         __EXYNOS5420_TMU_DATA \
 261         .type = SOC_ARCH_EXYNOS5420_TRIMINFO
 262
 263 struct exynos_tmu_init_data const exynos5420_default_tmu_data = {
 264         .tmu_data = {
 265                 { EXYNOS5420_TMU_DATA },
 266                 { EXYNOS5420_TMU_DATA },
 267                 { EXYNOS5420_TMU_DATA_SHARED },
 268                 { EXYNOS5420_TMU_DATA_SHARED },
 269                 { EXYNOS5420_TMU_DATA_SHARED },
 270         },
 271         .tmu_count = 5,
 272 };
 273
 274 #define EXYNOS5440_TMU_DATA \
 275         .trigger_levels[0] = 100, \
 276         .trigger_levels[4] = 105, \
 277         .trigger_enable[0] = 1, \
 278         .trigger_type[0] = SW_TRIP, \
 279         .trigger_type[4] = HW_TRIP, \
 280         .max_trigger_level = 5, \
 281         .non_hw_trigger_levels = 1, \
 282         .gain = 5, \
 283         .reference_voltage = 16, \
 284         .noise_cancel_mode = 4, \
 285         .cal_type = TYPE_ONE_POINT_TRIMMING, \
 286         .efuse_value = 0x5b2d, \
 287         .min_efuse_value = 16, \
 288         .max_efuse_value = 76, \
 289         .first_point_trim = 25, \
 290         .second_point_trim = 70, \
 291         .default_temp_offset = 25, \
 292         .type = SOC_ARCH_EXYNOS5440
 293
 294 struct exynos_tmu_init_data const exynos5440_default_tmu_data = {
 295         .tmu_data = {
 296                 { EXYNOS5440_TMU_DATA } ,
 297                 { EXYNOS5440_TMU_DATA } ,
 298                 { EXYNOS5440_TMU_DATA } ,
 299         },
 300         .tmu_count = 3,
 301 };