2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
31 Miniport generic portion header file
35 -------- ---------- ----------------------------------------------
36 Paul Lin 2002-08-01 created
37 John Chang 2004-08-20 RT2561/2661 use scatter-gather scheme
38 Jan Lee 2006-09-15 RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
40 #include "../rt_config.h"
43 //#define BIN_IN_FILE /* use *.bin firmware */
45 UCHAR BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
46 ULONG BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
47 0x00000010, 0x00000020, 0x00000040, 0x00000080,
48 0x00000100, 0x00000200, 0x00000400, 0x00000800,
49 0x00001000, 0x00002000, 0x00004000, 0x00008000,
50 0x00010000, 0x00020000, 0x00040000, 0x00080000,
51 0x00100000, 0x00200000, 0x00400000, 0x00800000,
52 0x01000000, 0x02000000, 0x04000000, 0x08000000,
53 0x10000000, 0x20000000, 0x40000000, 0x80000000};
55 char* CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
57 const unsigned short ccitt_16Table[] = {
58 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
59 0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
60 0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
61 0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
62 0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
63 0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
64 0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
65 0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
66 0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
67 0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
68 0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
69 0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
70 0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
71 0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
72 0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
73 0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
74 0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
75 0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
76 0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
77 0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
78 0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
79 0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
80 0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
81 0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
82 0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
83 0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
84 0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
85 0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
86 0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
87 0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
88 0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
89 0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
91 #define ByteCRC16(v, crc) \
92 (unsigned short)((crc << 8) ^ ccitt_16Table[((crc >> 8) ^ (v)) & 255])
94 unsigned char BitReverse(unsigned char x)
100 if(x & 0x80) Temp |= 0x80;
109 // BBP register initialization set
111 REG_PAIR BBPRegTable[] = {
112 {BBP_R65, 0x2C}, // fix rssi issue
113 {BBP_R66, 0x38}, // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
115 {BBP_R70, 0xa}, // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
120 {BBP_R84, 0x99}, // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
121 {BBP_R86, 0x00}, // middle range issue, Rory @2008-01-28
122 {BBP_R91, 0x04}, // middle range issue, Rory @2008-01-28
123 {BBP_R92, 0x00}, // middle range issue, Rory @2008-01-28
124 {BBP_R103, 0x00}, // near range high-power issue, requested from Gary @2008-0528
125 {BBP_R105, 0x05}, // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
127 #define NUM_BBP_REG_PARMS (sizeof(BBPRegTable) / sizeof(REG_PAIR))
130 // RF register initialization set
133 REG_PAIR RT30xx_RFRegTable[] = {
155 #define NUM_RF_REG_PARMS (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR))
159 // ASIC register initialization sets
162 RTMP_REG_PAIR MACRegTable[] = {
163 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
164 {BCN_OFFSET0, 0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
165 {BCN_OFFSET1, 0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
166 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
167 {BCN_OFFSET0, 0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
168 {BCN_OFFSET1, 0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
170 #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
171 #endif // HW_BEACON_OFFSET //
173 {LEGACY_BASIC_RATE, 0x0000013f}, // Basic rate set bitmap
174 {HT_BASIC_RATE, 0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
175 {MAC_SYS_CTRL, 0x00}, // 0x1004, , default Disable RX
176 {RX_FILTR_CFG, 0x17f97}, //0x1400 , RX filter control,
177 {BKOFF_SLOT_CFG, 0x209}, // default set short slot time, CC_DELAY_TIME should be 2
178 {TX_SW_CFG0, 0x0}, // Gary,2008-05-21 for CWC test
179 {TX_SW_CFG1, 0x80606}, // Gary,2006-08-23
180 {TX_LINK_CFG, 0x1020}, // Gary,2006-08-23
181 //{TX_TIMEOUT_CFG, 0x00182090}, // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT
182 {TX_TIMEOUT_CFG, 0x000a2090}, // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
183 {MAX_LEN_CFG, MAX_AGGREGATION_SIZE | 0x00001000}, // 0x3018, MAX frame length. Max PSDU = 16kbytes.
184 {LED_CFG, 0x7f031e46}, // Gary, 2006-08-23
185 {PBF_MAX_PCNT, 0x1F3FBF9F}, //0x1F3f7f9f}, //Jan, 2006/04/20
186 //{TX_RTY_CFG, 0x6bb80408}, // Jan, 2006/11/16
187 {TX_RTY_CFG, 0x47d01f0f}, // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
188 {AUTO_RSP_CFG, 0x00000013}, // Initial Auto_Responder, because QA will turn off Auto-Responder
189 {CCK_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
190 {OFDM_PROT_CFG, 0x05740003 /*0x01740003*/}, // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
192 {PBF_CFG, 0xf40006}, // Only enable Queue 2
193 {MM40_PROT_CFG, 0x3F44084}, // Initial Auto_Responder, because QA will turn off Auto-Responder
194 {WPDMA_GLO_CFG, 0x00000030},
196 {GF20_PROT_CFG, 0x01744004}, // set 19:18 --> Short NAV for MIMO PS
197 {GF40_PROT_CFG, 0x03F44084},
198 {MM20_PROT_CFG, 0x01744004},
199 {TXOP_CTRL_CFG, 0x0000583f, /*0x0000243f*/ /*0x000024bf*/}, //Extension channel backoff.
200 {TX_RTS_CFG, 0x00092b20},
202 {EXP_ACK_TIME, 0x002400ca}, // default value
204 // {EXP_ACK_TIME, 0x005400ca}, // suggested by Gray @ 20070323 for 11n intel-sta throughput
205 //#endif // end - WIFI_TEST //
206 {TXOP_HLDR_ET, 0x00000002},
208 /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
209 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
210 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
211 will always lost. So we change the SIFS of CCK from 10us to 16us. */
212 {XIFS_TIME_CFG, 0x33a41010},
213 {PWR_PIN_CFG, 0x00000003}, // patch for 2880-E
217 #ifdef CONFIG_STA_SUPPORT
218 RTMP_REG_PAIR STAMACRegTable[] = {
219 {WMM_AIFSN_CFG, 0x00002273},
220 {WMM_CWMIN_CFG, 0x00002344},
221 {WMM_CWMAX_CFG, 0x000034aa},
223 #endif // CONFIG_STA_SUPPORT //
225 #define NUM_MAC_REG_PARMS (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
226 #ifdef CONFIG_STA_SUPPORT
227 #define NUM_STA_MAC_REG_PARMS (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
228 #endif // CONFIG_STA_SUPPORT //
232 // RT2870 Firmware Spec only used 1 oct for version expression
234 #define FIRMWARE_MINOR_VERSION 7
238 // New 8k byte firmware size for RT3071/RT3072
239 #define FIRMWAREIMAGE_MAX_LENGTH 0x2000
240 #define FIRMWAREIMAGE_LENGTH (sizeof (FirmwareImage) / sizeof(UCHAR))
241 #define FIRMWARE_MAJOR_VERSION 0
243 #define FIRMWAREIMAGEV1_LENGTH 0x1000
244 #define FIRMWAREIMAGEV2_LENGTH 0x1000
249 ========================================================================
252 Allocate RTMP_ADAPTER data block and do some initialization
255 Adapter Pointer to our adapter
265 ========================================================================
267 NDIS_STATUS RTMPAllocAdapterBlock(
269 OUT PRTMP_ADAPTER *ppAdapter)
274 UCHAR *pBeaconBuf = NULL;
276 DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
282 // Allocate RTMP_ADAPTER memory block
283 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
284 if (pBeaconBuf == NULL)
286 Status = NDIS_STATUS_FAILURE;
287 DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
291 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
292 if (Status != NDIS_STATUS_SUCCESS)
294 DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
297 pAd->BeaconBuf = pBeaconBuf;
298 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
302 NdisAllocateSpinLock(&pAd->MgmtRingLock);
304 for (index =0 ; index < NUM_OF_TX_RING; index++)
306 NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
307 NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
308 pAd->DeQueueRunning[index] = FALSE;
311 NdisAllocateSpinLock(&pAd->irq_lock);
315 if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
320 DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
325 ========================================================================
328 Read initial Tx power per MCS and BW from EEPROM
331 Adapter Pointer to our adapter
340 ========================================================================
342 VOID RTMPReadTxPwrPerRate(
343 IN PRTMP_ADAPTER pAd)
345 ULONG data, Adata, Gdata;
346 USHORT i, value, value2;
347 INT Apwrdelta, Gpwrdelta;
349 BOOLEAN bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
352 // Get power delta for 20MHz and 40MHz.
354 DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
355 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
359 if ((value2 & 0xff) != 0xff)
362 Gpwrdelta = (value2&0xf);
365 bGpwrdeltaMinus = FALSE;
367 bGpwrdeltaMinus = TRUE;
369 if ((value2 & 0xff00) != 0xff00)
371 if ((value2 & 0x8000))
372 Apwrdelta = ((value2&0xf00)>>8);
374 if ((value2 & 0x4000))
375 bApwrdeltaMinus = FALSE;
377 bApwrdeltaMinus = TRUE;
379 DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
382 // Get Txpower per MCS for 20MHz in 2.4G.
386 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
388 if (bApwrdeltaMinus == FALSE)
390 t1 = (value&0xf)+(Apwrdelta);
393 t2 = ((value&0xf0)>>4)+(Apwrdelta);
396 t3 = ((value&0xf00)>>8)+(Apwrdelta);
399 t4 = ((value&0xf000)>>12)+(Apwrdelta);
405 if ((value&0xf) > Apwrdelta)
406 t1 = (value&0xf)-(Apwrdelta);
409 if (((value&0xf0)>>4) > Apwrdelta)
410 t2 = ((value&0xf0)>>4)-(Apwrdelta);
413 if (((value&0xf00)>>8) > Apwrdelta)
414 t3 = ((value&0xf00)>>8)-(Apwrdelta);
417 if (((value&0xf000)>>12) > Apwrdelta)
418 t4 = ((value&0xf000)>>12)-(Apwrdelta);
422 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
423 if (bGpwrdeltaMinus == FALSE)
425 t1 = (value&0xf)+(Gpwrdelta);
428 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
431 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
434 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
440 if ((value&0xf) > Gpwrdelta)
441 t1 = (value&0xf)-(Gpwrdelta);
444 if (((value&0xf0)>>4) > Gpwrdelta)
445 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
448 if (((value&0xf00)>>8) > Gpwrdelta)
449 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
452 if (((value&0xf000)>>12) > Gpwrdelta)
453 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
457 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
459 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
460 if (bApwrdeltaMinus == FALSE)
462 t1 = (value&0xf)+(Apwrdelta);
465 t2 = ((value&0xf0)>>4)+(Apwrdelta);
468 t3 = ((value&0xf00)>>8)+(Apwrdelta);
471 t4 = ((value&0xf000)>>12)+(Apwrdelta);
477 if ((value&0xf) > Apwrdelta)
478 t1 = (value&0xf)-(Apwrdelta);
481 if (((value&0xf0)>>4) > Apwrdelta)
482 t2 = ((value&0xf0)>>4)-(Apwrdelta);
485 if (((value&0xf00)>>8) > Apwrdelta)
486 t3 = ((value&0xf00)>>8)-(Apwrdelta);
489 if (((value&0xf000)>>12) > Apwrdelta)
490 t4 = ((value&0xf000)>>12)-(Apwrdelta);
494 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
495 if (bGpwrdeltaMinus == FALSE)
497 t1 = (value&0xf)+(Gpwrdelta);
500 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
503 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
506 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
512 if ((value&0xf) > Gpwrdelta)
513 t1 = (value&0xf)-(Gpwrdelta);
516 if (((value&0xf0)>>4) > Gpwrdelta)
517 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
520 if (((value&0xf00)>>8) > Gpwrdelta)
521 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
524 if (((value&0xf000)>>12) > Gpwrdelta)
525 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
529 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
532 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
533 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
535 if (data != 0xffffffff)
536 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
537 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx, Adata = %lx, Gdata = %lx \n", data, Adata, Gdata));
541 // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
546 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
547 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
555 // Get Txpower per MCS for 40MHz in 2.4G.
561 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
562 if (bGpwrdeltaMinus == FALSE)
564 t1 = (value&0xf)+(Gpwrdelta);
567 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
570 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
573 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
579 if ((value&0xf) > Gpwrdelta)
580 t1 = (value&0xf)-(Gpwrdelta);
583 if (((value&0xf0)>>4) > Gpwrdelta)
584 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
587 if (((value&0xf00)>>8) > Gpwrdelta)
588 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
591 if (((value&0xf000)>>12) > Gpwrdelta)
592 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
596 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
598 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
599 if (bGpwrdeltaMinus == FALSE)
601 t1 = (value&0xf)+(Gpwrdelta);
604 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
607 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
610 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
616 if ((value&0xf) > Gpwrdelta)
617 t1 = (value&0xf)-(Gpwrdelta);
620 if (((value&0xf0)>>4) > Gpwrdelta)
621 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
624 if (((value&0xf00)>>8) > Gpwrdelta)
625 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
628 if (((value&0xf000)>>12) > Gpwrdelta)
629 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
633 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
636 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
638 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
640 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
645 // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
650 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
651 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
659 // Get Txpower per MCS for 20MHz in 5G.
665 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
666 if (bApwrdeltaMinus == FALSE)
668 t1 = (value&0xf)+(Apwrdelta);
671 t2 = ((value&0xf0)>>4)+(Apwrdelta);
674 t3 = ((value&0xf00)>>8)+(Apwrdelta);
677 t4 = ((value&0xf000)>>12)+(Apwrdelta);
683 if ((value&0xf) > Apwrdelta)
684 t1 = (value&0xf)-(Apwrdelta);
687 if (((value&0xf0)>>4) > Apwrdelta)
688 t2 = ((value&0xf0)>>4)-(Apwrdelta);
691 if (((value&0xf00)>>8) > Apwrdelta)
692 t3 = ((value&0xf00)>>8)-(Apwrdelta);
695 if (((value&0xf000)>>12) > Apwrdelta)
696 t4 = ((value&0xf000)>>12)-(Apwrdelta);
700 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
702 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
703 if (bApwrdeltaMinus == FALSE)
705 t1 = (value&0xf)+(Apwrdelta);
708 t2 = ((value&0xf0)>>4)+(Apwrdelta);
711 t3 = ((value&0xf00)>>8)+(Apwrdelta);
714 t4 = ((value&0xf000)>>12)+(Apwrdelta);
720 if ((value&0xf) > Apwrdelta)
721 t1 = (value&0xf)-(Apwrdelta);
724 if (((value&0xf0)>>4) > Apwrdelta)
725 t2 = ((value&0xf0)>>4)-(Apwrdelta);
728 if (((value&0xf00)>>8) > Apwrdelta)
729 t3 = ((value&0xf00)>>8)-(Apwrdelta);
732 if (((value&0xf000)>>12) > Apwrdelta)
733 t4 = ((value&0xf000)>>12)-(Apwrdelta);
737 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
740 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
742 pAd->Tx20MPwrCfgABand[i] = Adata;
744 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
749 // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
754 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
755 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
763 // Get Txpower per MCS for 40MHz in 5G.
769 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
770 if (bApwrdeltaMinus == FALSE)
772 t1 = (value&0xf)+(Apwrdelta);
775 t2 = ((value&0xf0)>>4)+(Apwrdelta);
778 t3 = ((value&0xf00)>>8)+(Apwrdelta);
781 t4 = ((value&0xf000)>>12)+(Apwrdelta);
787 if ((value&0xf) > Apwrdelta)
788 t1 = (value&0xf)-(Apwrdelta);
791 if (((value&0xf0)>>4) > Apwrdelta)
792 t2 = ((value&0xf0)>>4)-(Apwrdelta);
795 if (((value&0xf00)>>8) > Apwrdelta)
796 t3 = ((value&0xf00)>>8)-(Apwrdelta);
799 if (((value&0xf000)>>12) > Apwrdelta)
800 t4 = ((value&0xf000)>>12)-(Apwrdelta);
804 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
806 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
807 if (bApwrdeltaMinus == FALSE)
809 t1 = (value&0xf)+(Apwrdelta);
812 t2 = ((value&0xf0)>>4)+(Apwrdelta);
815 t3 = ((value&0xf00)>>8)+(Apwrdelta);
818 t4 = ((value&0xf000)>>12)+(Apwrdelta);
824 if ((value&0xf) > Apwrdelta)
825 t1 = (value&0xf)-(Apwrdelta);
828 if (((value&0xf0)>>4) > Apwrdelta)
829 t2 = ((value&0xf0)>>4)-(Apwrdelta);
832 if (((value&0xf00)>>8) > Apwrdelta)
833 t3 = ((value&0xf00)>>8)-(Apwrdelta);
836 if (((value&0xf000)>>12) > Apwrdelta)
837 t4 = ((value&0xf000)>>12)-(Apwrdelta);
841 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
844 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
846 pAd->Tx40MPwrCfgABand[i+1] = Adata;
848 DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
855 ========================================================================
858 Read initial channel power parameters from EEPROM
861 Adapter Pointer to our adapter
870 ========================================================================
872 VOID RTMPReadChannelPwr(
873 IN PRTMP_ADAPTER pAd)
876 EEPROM_TX_PWR_STRUC Power;
877 EEPROM_TX_PWR_STRUC Power2;
879 // Read Tx power value for all channels
880 // Value from 1 - 0x7f. Default value is 24.
881 // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
882 // : 5.5G 0xF9 (-7) ~ 0x0F (15)
884 // 0. 11b/g, ch1 - ch 14
885 for (i = 0; i < 7; i++)
887 // Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2);
888 // Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2);
889 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
890 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
891 pAd->TxPower[i * 2].Channel = i * 2 + 1;
892 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
894 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
895 pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
897 pAd->TxPower[i * 2].Power = Power.field.Byte0;
899 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
900 pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
902 pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
904 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
905 pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
907 pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
909 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
910 pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
912 pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
915 // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
916 // 1.1 Fill up channel
918 for (i = 0; i < 4; i++)
920 pAd->TxPower[3 * i + choffset + 0].Channel = 36 + i * 8 + 0;
921 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
922 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
924 pAd->TxPower[3 * i + choffset + 1].Channel = 36 + i * 8 + 2;
925 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
926 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
928 pAd->TxPower[3 * i + choffset + 2].Channel = 36 + i * 8 + 4;
929 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
930 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
934 for (i = 0; i < 6; i++)
936 // Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2);
937 // Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2);
938 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
939 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
941 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
942 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
944 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
945 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
947 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
948 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
950 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
951 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
954 // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
955 // 2.1 Fill up channel
957 for (i = 0; i < 5; i++)
959 pAd->TxPower[3 * i + choffset + 0].Channel = 100 + i * 8 + 0;
960 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
961 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
963 pAd->TxPower[3 * i + choffset + 1].Channel = 100 + i * 8 + 2;
964 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
965 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
967 pAd->TxPower[3 * i + choffset + 2].Channel = 100 + i * 8 + 4;
968 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
969 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
971 pAd->TxPower[3 * 5 + choffset + 0].Channel = 140;
972 pAd->TxPower[3 * 5 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
973 pAd->TxPower[3 * 5 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
976 for (i = 0; i < 8; i++)
978 // Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2);
979 // Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2);
980 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
981 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
983 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
984 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
986 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
987 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
989 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
990 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
992 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
993 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
996 // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
997 // 3.1 Fill up channel
998 choffset = 14 + 12 + 16;
999 for (i = 0; i < 2; i++)
1001 pAd->TxPower[3 * i + choffset + 0].Channel = 149 + i * 8 + 0;
1002 pAd->TxPower[3 * i + choffset + 0].Power = DEFAULT_RF_TX_POWER;
1003 pAd->TxPower[3 * i + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
1005 pAd->TxPower[3 * i + choffset + 1].Channel = 149 + i * 8 + 2;
1006 pAd->TxPower[3 * i + choffset + 1].Power = DEFAULT_RF_TX_POWER;
1007 pAd->TxPower[3 * i + choffset + 1].Power2 = DEFAULT_RF_TX_POWER;
1009 pAd->TxPower[3 * i + choffset + 2].Channel = 149 + i * 8 + 4;
1010 pAd->TxPower[3 * i + choffset + 2].Power = DEFAULT_RF_TX_POWER;
1011 pAd->TxPower[3 * i + choffset + 2].Power2 = DEFAULT_RF_TX_POWER;
1013 pAd->TxPower[3 * 2 + choffset + 0].Channel = 165;
1014 pAd->TxPower[3 * 2 + choffset + 0].Power = DEFAULT_RF_TX_POWER;
1015 pAd->TxPower[3 * 2 + choffset + 0].Power2 = DEFAULT_RF_TX_POWER;
1017 // 3.2 Fill up power
1018 for (i = 0; i < 4; i++)
1020 // Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2);
1021 // Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2);
1022 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
1023 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
1025 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
1026 pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
1028 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
1029 pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
1031 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
1032 pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
1034 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
1035 pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
1038 // 4. Print and Debug
1039 choffset = 14 + 12 + 16 + 7;
1044 ========================================================================
1046 Routine Description:
1047 Read the following from the registry
1048 1. All the parameters
1052 Adapter Pointer to our adapter
1053 WrapperConfigurationContext For use by NdisOpenConfiguration
1058 NDIS_STATUS_RESOURCES
1060 IRQL = PASSIVE_LEVEL
1064 ========================================================================
1066 NDIS_STATUS NICReadRegParameters(
1067 IN PRTMP_ADAPTER pAd,
1068 IN NDIS_HANDLE WrapperConfigurationContext
1071 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1072 DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1079 ========================================================================
1081 Routine Description:
1082 For RF filter calibration purpose
1085 pAd Pointer to our adapter
1090 IRQL = PASSIVE_LEVEL
1092 ========================================================================
1094 VOID RTUSBFilterCalibration(
1095 IN PRTMP_ADAPTER pAd)
1097 UCHAR R55x = 0, value, FilterTarget = 0x1E, BBPValue;
1098 UINT loop = 0, count = 0, loopcnt = 0, ReTry = 0;
1099 UCHAR RF_R24_Value = 0;
1101 // Give bbp filter initial value
1102 pAd->Mlme.CaliBW20RfR24 = 0x16;
1103 pAd->Mlme.CaliBW40RfR24 = 0x36; //Bit[5] must be 1 for BW 40
1107 if (loop == 1) //BandWidth = 40 MHz
1109 // Write 0x27 to RF_R24 to program filter
1110 RF_R24_Value = 0x27;
1111 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1112 FilterTarget = 0x19;
1114 // when calibrate BW40, BBP mask must set to BW40.
1115 RTUSBReadBBPRegister(pAd, BBP_R4, &BBPValue);
1118 RTUSBWriteBBPRegister(pAd, BBP_R4, BBPValue);
1120 else //BandWidth = 20 MHz
1122 // Write 0x07 to RF_R24 to program filter
1123 RF_R24_Value = 0x07;
1124 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1125 FilterTarget = 0x16;
1128 // Write 0x01 to RF_R22 to enable baseband loopback mode
1129 RT30xxReadRFRegister(pAd, RF_R22, &value);
1131 RT30xxWriteRFRegister(pAd, RF_R22, value);
1133 // Write 0x00 to BBP_R24 to set power & frequency of passband test tone
1134 RTUSBWriteBBPRegister(pAd, BBP_R24, 0);
1138 // Write 0x90 to BBP_R25 to transmit test tone
1139 RTUSBWriteBBPRegister(pAd, BBP_R25, 0x90);
1141 RTMPusecDelay(1000);
1142 // Read BBP_R55[6:0] for received power, set R55x = BBP_R55[6:0]
1143 RTUSBReadBBPRegister(pAd, BBP_R55, &value);
1144 R55x = value & 0xFF;
1146 } while ((ReTry++ < 100) && (R55x == 0));
1148 // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone
1149 RTUSBWriteBBPRegister(pAd, BBP_R24, 0x06);
1153 // Write 0x90 to BBP_R25 to transmit test tone
1154 RTUSBWriteBBPRegister(pAd, BBP_R25, 0x90);
1156 //We need to wait for calibration
1157 RTMPusecDelay(1000);
1158 RTUSBReadBBPRegister(pAd, BBP_R55, &value);
1160 if ((R55x - value) < FilterTarget)
1164 else if ((R55x - value) == FilterTarget)
1174 // prevent infinite loop cause driver hang.
1175 if (loopcnt++ > 100)
1177 DBGPRINT(RT_DEBUG_ERROR, ("RTUSBFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt));
1181 // Write RF_R24 to program filter
1182 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1187 RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0));
1190 // Store for future usage
1195 //BandWidth = 20 MHz
1196 pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value;
1200 //BandWidth = 40 MHz
1201 pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value;
1208 RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value);
1215 // Set back to initial state
1217 RTUSBWriteBBPRegister(pAd, BBP_R24, 0);
1219 RT30xxReadRFRegister(pAd, RF_R22, &value);
1221 RT30xxWriteRFRegister(pAd, RF_R22, value);
1223 // set BBP back to BW20
1224 RTUSBReadBBPRegister(pAd, BBP_R4, &BBPValue);
1226 RTUSBWriteBBPRegister(pAd, BBP_R4, BBPValue);
1228 DBGPRINT(RT_DEBUG_TRACE, ("RTUSBFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24));
1232 VOID NICInitRT30xxRFRegisters(IN PRTMP_ADAPTER pAd)
1235 // Driver must read EEPROM to get RfIcType before initial RF registers
1236 // Initialize RF register to default value
1237 if (IS_RT3070(pAd) && ((pAd->RfIcType == RFIC_3020) ||(pAd->RfIcType == RFIC_2020)))
1239 // Init RF calibration
1240 // Driver should toggle RF R30 bit7 before init RF registers
1242 RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg);
1244 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1245 RTMPusecDelay(1000);
1247 RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg);
1249 // Initialize RF register to default value
1250 for (i = 0; i < NUM_RF_REG_PARMS; i++)
1252 RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value);
1255 //For RF filter Calibration
1256 RTUSBFilterCalibration(pAd);
1264 ========================================================================
1266 Routine Description:
1267 Read initial parameters from EEPROM
1270 Adapter Pointer to our adapter
1275 IRQL = PASSIVE_LEVEL
1279 ========================================================================
1281 VOID NICReadEEPROMParameters(
1282 IN PRTMP_ADAPTER pAd,
1286 USHORT i, value, value2;
1288 EEPROM_TX_PWR_STRUC Power;
1289 EEPROM_VERSION_STRUC Version;
1290 EEPROM_ANTENNA_STRUC Antenna;
1291 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1293 DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1295 // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1296 RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1297 DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1299 if((data & 0x30) == 0)
1300 pAd->EEPROMAddressNum = 6; // 93C46
1301 else if((data & 0x30) == 0x10)
1302 pAd->EEPROMAddressNum = 8; // 93C66
1304 pAd->EEPROMAddressNum = 8; // 93C86
1305 DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1307 // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1308 // MAC address registers according to E2PROM setting
1309 if (mac_addr == NULL ||
1310 strlen(mac_addr) != 17 ||
1311 mac_addr[2] != ':' || mac_addr[5] != ':' || mac_addr[8] != ':' ||
1312 mac_addr[11] != ':' || mac_addr[14] != ':')
1314 USHORT Addr01,Addr23,Addr45 ;
1316 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1317 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1318 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1320 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1321 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1322 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1323 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1324 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1325 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1327 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1336 for (j=0; j<MAC_ADDR_LEN; j++)
1338 AtoH(macptr, &pAd->PermanentAddress[j], 1);
1342 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1348 USHORT Addr01,Addr23,Addr45 ;
1350 Addr01=RTMP_EEPROM_READ16(pAd, 0x04);
1351 Addr23=RTMP_EEPROM_READ16(pAd, 0x06);
1352 Addr45=RTMP_EEPROM_READ16(pAd, 0x08);
1354 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1355 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1356 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1357 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1358 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1359 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1361 //more conveninet to test mbssid, so ap's bssid &0xf1
1362 if (pAd->PermanentAddress[0] == 0xff)
1363 pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1365 //if (pAd->PermanentAddress[5] == 0xff)
1366 // pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1368 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1369 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1370 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1371 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1372 if (pAd->bLocalAdminMAC == FALSE)
1376 COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1377 csr2.field.Byte0 = pAd->CurrentAddress[0];
1378 csr2.field.Byte1 = pAd->CurrentAddress[1];
1379 csr2.field.Byte2 = pAd->CurrentAddress[2];
1380 csr2.field.Byte3 = pAd->CurrentAddress[3];
1381 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1383 csr3.field.Byte4 = pAd->CurrentAddress[4];
1384 csr3.field.Byte5 = pAd->CurrentAddress[5];
1385 csr3.field.U2MeMask = 0xff;
1386 RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1387 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1388 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1389 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1390 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1394 // if not return early. cause fail at emulation.
1395 // Init the channel number for TX channel power
1396 RTMPReadChannelPwr(pAd);
1398 // if E2PROM version mismatch with driver's expectation, then skip
1399 // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1400 RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1401 pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1402 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1404 if (Version.field.Version > VALID_EEPROM_VERSION)
1406 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1407 /*pAd->SystemErrorBitmap |= 0x00000001;
1409 // hard-code default value when no proper E2PROM installed
1410 pAd->bAutoTxAgcA = FALSE;
1411 pAd->bAutoTxAgcG = FALSE;
1413 // Default the channel power
1414 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1415 pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1417 // Default the channel power
1418 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1419 pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1421 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1422 pAd->EEPROMDefaultValue[i] = 0xffff;
1426 // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1427 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1428 pAd->EEPROMDefaultValue[0] = value;
1430 RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1431 pAd->EEPROMDefaultValue[1] = value;
1433 RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1434 pAd->EEPROMDefaultValue[2] = value;
1436 for(i = 0; i < 8; i++)
1438 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1439 pAd->EEPROMDefaultValue[i+3] = value;
1442 // We have to parse NIC configuration 0 at here.
1443 // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1444 // Therefore, we have to read TxAutoAgc control beforehand.
1445 // Read Tx AGC control bit
1446 Antenna.word = pAd->EEPROMDefaultValue[0];
1447 if (Antenna.word == 0xFFFF)
1450 Antenna.field.RfIcType = RFIC_2820;
1451 Antenna.field.TxPath = 1;
1452 Antenna.field.RxPath = 2;
1453 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1456 // Choose the desired Tx&Rx stream.
1457 if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1458 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1460 if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1462 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1464 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1465 (pAd->CommonCfg.RxStream > 2))
1467 // only 2 Rx streams for RT2860 series
1468 pAd->CommonCfg.RxStream = 2;
1473 // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1479 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1483 #ifdef CONFIG_STA_SUPPORT
1484 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1486 NicConfig2.word = 0;
1487 if ((NicConfig2.word & 0x00ff) == 0xff)
1489 NicConfig2.word &= 0xff00;
1492 if ((NicConfig2.word >> 8) == 0xff)
1494 NicConfig2.word &= 0x00ff;
1497 #endif // CONFIG_STA_SUPPORT //
1499 if (NicConfig2.field.DynamicTxAgcControl == 1)
1500 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1502 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1504 DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1506 // Save the antenna for future use
1507 pAd->Antenna.word = Antenna.word;
1510 // Reset PhyMode if we don't support 802.11a
1511 // Only RFIC_2850 & RFIC_2750 support 802.11a
1513 if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1515 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1516 (pAd->CommonCfg.PhyMode == PHY_11A))
1517 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1518 #ifdef DOT11_N_SUPPORT
1519 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED) ||
1520 (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED) ||
1521 (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED) ||
1522 (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1523 pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1524 #endif // DOT11_N_SUPPORT //
1527 // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1530 /* these are tempature reference value (0x00 ~ 0xFE)
1531 ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1532 TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1533 TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1534 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1535 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1536 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1537 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1538 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1539 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1540 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1541 pAd->TssiRefG = Power.field.Byte0; /* reference value [0] */
1542 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1543 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1544 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1545 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1546 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1547 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1548 pAd->TxAgcStepG = Power.field.Byte1;
1549 pAd->TxAgcCompensateG = 0;
1550 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1551 pAd->TssiPlusBoundaryG[0] = pAd->TssiRefG;
1553 // Disable TxAgc if the based value is not right
1554 if (pAd->TssiRefG == 0xff)
1555 pAd->bAutoTxAgcG = FALSE;
1557 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1558 pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1560 pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1561 pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1565 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1566 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1567 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1568 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1569 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1570 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1571 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1572 pAd->TssiRefA = Power.field.Byte0;
1573 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1574 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1575 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1576 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1577 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1578 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1579 pAd->TxAgcStepA = Power.field.Byte1;
1580 pAd->TxAgcCompensateA = 0;
1581 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1582 pAd->TssiPlusBoundaryA[0] = pAd->TssiRefA;
1584 // Disable TxAgc if the based value is not right
1585 if (pAd->TssiRefA == 0xff)
1586 pAd->bAutoTxAgcA = FALSE;
1588 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1589 pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1591 pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1592 pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1594 pAd->BbpRssiToDbmDelta = 0x0;
1596 // Read frequency offset setting for RF
1597 RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1598 if ((value & 0x00FF) != 0x00FF)
1599 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1601 pAd->RfFreqOffset = 0;
1602 DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1604 //CountryRegion byte offset (38h)
1605 value = pAd->EEPROMDefaultValue[2] >> 8; // 2.4G band
1606 value2 = pAd->EEPROMDefaultValue[2] & 0x00FF; // 5G band
1608 if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1610 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1611 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1612 TmpPhy = pAd->CommonCfg.PhyMode;
1613 pAd->CommonCfg.PhyMode = 0xff;
1614 RTMPSetPhyMode(pAd, TmpPhy);
1615 #ifdef DOT11_N_SUPPORT
1617 #endif // DOT11_N_SUPPORT //
1621 // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1622 // The valid value are (-10 ~ 10)
1624 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1625 pAd->BGRssiOffset0 = value & 0x00ff;
1626 pAd->BGRssiOffset1 = (value >> 8);
1627 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1628 pAd->BGRssiOffset2 = value & 0x00ff;
1629 pAd->ALNAGain1 = (value >> 8);
1630 RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1631 pAd->BLNAGain = value & 0x00ff;
1632 pAd->ALNAGain0 = (value >> 8);
1634 // Validate 11b/g RSSI_0 offset.
1635 if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1636 pAd->BGRssiOffset0 = 0;
1638 // Validate 11b/g RSSI_1 offset.
1639 if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1640 pAd->BGRssiOffset1 = 0;
1642 // Validate 11b/g RSSI_2 offset.
1643 if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1644 pAd->BGRssiOffset2 = 0;
1646 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1647 pAd->ARssiOffset0 = value & 0x00ff;
1648 pAd->ARssiOffset1 = (value >> 8);
1649 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1650 pAd->ARssiOffset2 = value & 0x00ff;
1651 pAd->ALNAGain2 = (value >> 8);
1653 if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1654 pAd->ALNAGain1 = pAd->ALNAGain0;
1655 if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1656 pAd->ALNAGain2 = pAd->ALNAGain0;
1658 // Validate 11a RSSI_0 offset.
1659 if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1660 pAd->ARssiOffset0 = 0;
1662 // Validate 11a RSSI_1 offset.
1663 if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1664 pAd->ARssiOffset1 = 0;
1666 //Validate 11a RSSI_2 offset.
1667 if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1668 pAd->ARssiOffset2 = 0;
1673 RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1674 pAd->LedCntl.word = (value&0xff00) >> 8;
1675 RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1677 RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1679 RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1682 RTMPReadTxPwrPerRate(pAd);
1685 //pAd->CommonCfg.DefineMaxTxPwr = RTMP_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR);
1686 RT28xx_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR, pAd->CommonCfg.DefineMaxTxPwr);
1687 #endif // SINGLE_SKU //
1689 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1693 ========================================================================
1695 Routine Description:
1696 Set default value from EEPROM
1699 Adapter Pointer to our adapter
1704 IRQL = PASSIVE_LEVEL
1708 ========================================================================
1710 VOID NICInitAsicFromEEPROM(
1711 IN PRTMP_ADAPTER pAd)
1713 #ifdef CONFIG_STA_SUPPORT
1716 #endif // CONFIG_STA_SUPPORT //
1718 EEPROM_ANTENNA_STRUC Antenna;
1719 EEPROM_NIC_CONFIG2_STRUC NicConfig2;
1722 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1723 for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1725 UCHAR BbpRegIdx, BbpValue;
1727 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1729 BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1730 BbpValue = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1731 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1735 Antenna.word = pAd->Antenna.word;
1736 pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1737 pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1739 NicConfig2.word = pAd->EEPROMDefaultValue[1];
1742 // Save the antenna for future use
1743 pAd->NicConfig2.word = NicConfig2.word;
1746 // Send LED Setting to MCU.
1748 if (pAd->LedCntl.word == 0xFF)
1750 pAd->LedCntl.word = 0x01;
1759 AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1760 AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1761 AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1762 pAd->LedIndicatorStregth = 0xFF;
1763 RTMPSetSignalLED(pAd, -100); // Force signal strength Led to be turned off, before link up
1765 #ifdef CONFIG_STA_SUPPORT
1766 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1768 // Read Hardware controlled Radio state enable bit
1769 if (NicConfig2.field.HardwareRadioControl == 1)
1771 pAd->StaCfg.bHardwareRadio = TRUE;
1773 // Read GPIO pin2 as Hardware controlled radio state
1774 RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1775 if ((data & 0x04) == 0)
1777 pAd->StaCfg.bHwRadio = FALSE;
1778 pAd->StaCfg.bRadio = FALSE;
1779 // RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1780 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1784 pAd->StaCfg.bHardwareRadio = FALSE;
1786 if (pAd->StaCfg.bRadio == FALSE)
1788 RTMPSetLED(pAd, LED_RADIO_OFF);
1792 RTMPSetLED(pAd, LED_RADIO_ON);
1795 #endif // CONFIG_STA_SUPPORT //
1797 // Turn off patching for cardbus controller
1798 if (NicConfig2.field.CardbusAcceleration == 1)
1800 // pAd->bTest1 = TRUE;
1803 if (NicConfig2.field.DynamicTxAgcControl == 1)
1804 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1806 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1808 // Since BBP has been progamed, to make sure BBP setting will be
1809 // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1811 pAd->CommonCfg.BandState = UNKNOWN_BAND;
1813 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1815 if(pAd->Antenna.field.RxPath == 3)
1819 else if(pAd->Antenna.field.RxPath == 2)
1823 else if(pAd->Antenna.field.RxPath == 1)
1827 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1829 #ifdef CONFIG_STA_SUPPORT
1830 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1832 // Handle the difference when 1T
1833 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1834 if(pAd->Antenna.field.TxPath == 1)
1838 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1840 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1842 #endif // CONFIG_STA_SUPPORT //
1843 DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1844 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1848 ========================================================================
1850 Routine Description:
1851 Initialize NIC hardware
1854 Adapter Pointer to our adapter
1859 IRQL = PASSIVE_LEVEL
1863 ========================================================================
1865 NDIS_STATUS NICInitializeAdapter(
1866 IN PRTMP_ADAPTER pAd,
1867 IN BOOLEAN bHardReset)
1869 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
1870 WPDMA_GLO_CFG_STRUC GloCfg;
1871 // INT_MASK_CSR_STRUC IntMask;
1873 AC_TXOP_CSR0_STRUC csr0;
1875 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1877 // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1882 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1883 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
1886 RTMPusecDelay(1000);
1889 DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1890 GloCfg.word &= 0xff0;
1891 GloCfg.field.EnTXWriteBackDDONE =1;
1892 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1894 // Record HW Beacon offset
1895 pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1896 pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1897 pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1898 pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1899 pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1900 pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1901 pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1902 pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1905 // write all shared Ring's base address into ASIC
1908 // asic simulation sequence put this ahead before loading firmware.
1909 // pbf hardware reset
1911 // Initialze ASIC for TX & Rx operation
1912 if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1916 NICLoadFirmware(pAd);
1919 return NDIS_STATUS_FAILURE;
1927 RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1928 if (pAd->CommonCfg.PhyMode == PHY_11B)
1930 csr0.field.Ac0Txop = 192; // AC_VI: 192*32us ~= 6ms
1931 csr0.field.Ac1Txop = 96; // AC_VO: 96*32us ~= 3ms
1935 csr0.field.Ac0Txop = 96; // AC_VI: 96*32us ~= 3ms
1936 csr0.field.Ac1Txop = 48; // AC_VO: 48*32us ~= 1.5ms
1938 RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1945 // Status = NICLoadFirmware(pAd);
1947 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1952 ========================================================================
1954 Routine Description:
1958 Adapter Pointer to our adapter
1963 IRQL = PASSIVE_LEVEL
1967 ========================================================================
1969 NDIS_STATUS NICInitializeAsic(
1970 IN PRTMP_ADAPTER pAd,
1971 IN BOOLEAN bHardReset)
1975 UINT32 MacCsr12 = 0, Counter = 0;
1984 DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1989 // Make sure MAC gets ready after NICLoadFirmware().
1993 //To avoid hang-on issue when interface up in kernel 2.4,
1994 //we use a local variable "MacCsr0" instead of using "pAd->MACVersion" directly.
1997 RTMP_IO_READ32(pAd, MAC_CSR0, &MacCsr0);
1999 if ((MacCsr0 != 0x00) && (MacCsr0 != 0xFFFFFFFF))
2003 } while (Index++ < 100);
2005 pAd->MACVersion = MacCsr0;
2006 DBGPRINT(RT_DEBUG_TRACE, ("MAC_CSR0 [ Ver:Rev=0x%08x]\n", pAd->MACVersion));
2007 // turn on bit13 (set to zero) after rt2860D. This is to solve high-current issue.
2008 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacCsr12);
2009 MacCsr12 &= (~0x2000);
2010 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacCsr12);
2012 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
2013 RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0x0);
2014 Status = RTUSBVenderReset(pAd);
2016 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2018 // Initialize MAC register to default value
2019 for(Index=0; Index<NUM_MAC_REG_PARMS; Index++)
2021 RTMP_IO_WRITE32(pAd, (USHORT)MACRegTable[Index].Register, MACRegTable[Index].Value);
2026 // According to Frank Hsu (from Gary Tsao)
2027 RTMP_IO_WRITE32(pAd, (USHORT)TX_SW_CFG0, 0x00000400);
2029 // Initialize RT3070 serial MAC registers which is different from RT2870 serial
2030 RTUSBWriteMACRegister(pAd, TX_SW_CFG1, 0);
2031 RTUSBWriteMACRegister(pAd, TX_SW_CFG2, 0);
2035 #ifdef CONFIG_STA_SUPPORT
2036 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2038 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
2040 RTMP_IO_WRITE32(pAd, (USHORT)STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
2043 #endif // CONFIG_STA_SUPPORT //
2047 // Before program BBP, we need to wait BBP/RF get wake up.
2052 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
2054 if ((MacCsr12 & 0x03) == 0) // if BB.RF is stable
2057 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG = Busy = %x\n", MacCsr12));
2058 RTMPusecDelay(1000);
2059 } while (Index++ < 100);
2061 // The commands to firmware should be after these commands, these commands will init firmware
2062 // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
2063 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
2064 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2065 RTMPusecDelay(1000);
2067 // Read BBP register, make sure BBP is up and running before write new data
2071 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
2072 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
2073 } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
2074 //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
2076 if ((R0 == 0xff) || (R0 == 0x00))
2077 return NDIS_STATUS_FAILURE;
2079 // Initialize BBP register to default value
2080 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
2082 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
2085 // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
2086 if ((pAd->MACVersion&0xffff) != 0x0101)
2087 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
2090 //write RT3070 BBP wchich different with 2870 after write RT2870 BBP
2093 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0a);
2094 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x99);
2095 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R105, 0x05);
2099 if (pAd->MACVersion == 0x28600100)
2101 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2102 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2105 if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
2107 // enlarge MAX_LEN_CFG
2109 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
2112 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
2117 UCHAR MAC_Value[]={0xff,0xff,0xff,0xff,0xff,0xff,0xff,0,0};
2119 //Initialize WCID table
2121 for(Index =0 ;Index < 254;Index++)
2123 RTUSBMultiWrite(pAd, (USHORT)(MAC_WCID_BASE + Index * 8), MAC_Value, 8);
2128 // Add radio off control
2129 #ifdef CONFIG_STA_SUPPORT
2130 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2132 if (pAd->StaCfg.bRadio == FALSE)
2134 // RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
2135 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
2136 DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
2139 #endif // CONFIG_STA_SUPPORT //
2141 // Clear raw counters
2142 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2143 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2144 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2145 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2146 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2147 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2149 // ASIC will keep garbage value after boot
2150 // Clear all seared key table when initial
2151 // This routine can be ignored in radio-ON/OFF operation.
2154 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
2156 RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
2159 // Clear all pairwise key table when initial
2160 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
2162 RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
2166 // assert HOST ready bit
2167 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x0); // 2004-09-14 asked by Mark
2168 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x4);
2170 // It isn't necessary to clear this space when not hard reset.
2171 if (bHardReset == TRUE)
2173 // clear all on-chip BEACON frame space
2174 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2176 for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2177 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2181 AsicDisableSync(pAd);
2182 // Clear raw counters
2183 RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
2184 RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
2185 RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
2186 RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
2187 RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
2188 RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
2189 // Default PCI clock cycle per ms is different as default setting, which is based on PCI.
2190 RTMP_IO_READ32(pAd, USB_CYC_CFG, &Counter);
2191 Counter&=0xffffff00;
2193 RTMP_IO_WRITE32(pAd, USB_CYC_CFG, Counter);
2196 #ifdef CONFIG_STA_SUPPORT
2197 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2199 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2200 if ((pAd->MACVersion&0xffff) != 0x0101)
2201 RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2203 #endif // CONFIG_STA_SUPPORT //
2205 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2206 return NDIS_STATUS_SUCCESS;
2210 ========================================================================
2212 Routine Description:
2216 Adapter Pointer to our adapter
2221 IRQL = PASSIVE_LEVEL
2224 Reset NIC to initial state AS IS system boot up time.
2226 ========================================================================
2229 IN PRTMP_ADAPTER pAd)
2232 DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2234 // Abort Tx, prevent ASIC from writing to Host memory
2235 //RTMP_IO_WRITE32(pAd, TX_CNTL_CSR, 0x001f0000);
2237 // Disable Rx, register value supposed will remain after reset
2238 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2239 Value &= (0xfffffff3);
2240 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2242 // Issue reset and clear from reset state
2243 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2244 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2246 DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2250 ========================================================================
2252 Routine Description:
2253 Check ASIC registers and find any reason the system might hang
2256 Adapter Pointer to our adapter
2261 IRQL = DISPATCH_LEVEL
2263 ========================================================================
2265 BOOLEAN NICCheckForHang(
2266 IN PRTMP_ADAPTER pAd)
2271 VOID NICUpdateFifoStaCounters(
2272 IN PRTMP_ADAPTER pAd)
2274 TX_STA_FIFO_STRUC StaFifo;
2275 MAC_TABLE_ENTRY *pEntry;
2277 UCHAR pid = 0, wcid = 0;
2282 /* Nothing to do in ATE mode */
2285 #endif // RALINK_ATE //
2289 RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2291 if (StaFifo.field.bValid == 0)
2294 wcid = (UCHAR)StaFifo.field.wcid;
2297 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2298 if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2304 /* PID store Tx MCS Rate */
2305 pid = (UCHAR)StaFifo.field.PidType;
2307 pEntry = &pAd->MacTab.Content[wcid];
2309 pEntry->DebugFIFOCount++;
2311 #ifdef DOT11_N_SUPPORT
2312 if (StaFifo.field.TxBF) // 3*3
2313 pEntry->TxBFCount++;
2314 #endif // DOT11_N_SUPPORT //
2316 #ifdef UAPSD_AP_SUPPORT
2317 UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2318 #endif // UAPSD_AP_SUPPORT //
2320 if (!StaFifo.field.TxSuccess)
2322 pEntry->FIFOCount++;
2323 pEntry->OneSecTxFailCount++;
2325 if (pEntry->FIFOCount >= 1)
2327 DBGPRINT(RT_DEBUG_TRACE, ("#"));
2329 SendRefreshBAR(pAd, pEntry);
2330 pEntry->NoBADataCountDown = 64;
2332 #ifdef DOT11_N_SUPPORT
2333 pEntry->NoBADataCountDown = 64;
2334 #endif // DOT11_N_SUPPORT //
2336 if(pEntry->PsMode == PWR_ACTIVE)
2338 #ifdef DOT11_N_SUPPORT
2340 for (tid=0; tid<NUM_OF_TID; tid++)
2342 BAOriSessionTearDown(pAd, pEntry->Aid, tid, FALSE, FALSE);
2344 #endif // DOT11_N_SUPPORT //
2346 // Update the continuous transmission counter except PS mode
2347 pEntry->ContinueTxFailCnt++;
2351 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2352 // this tx error happened due to sta just go to sleep.
2353 pEntry->FIFOCount = 0;
2354 pEntry->ContinueTxFailCnt = 0;
2357 //pEntry->FIFOCount = 0;
2359 //pEntry->bSendBAR = TRUE;
2363 #ifdef DOT11_N_SUPPORT
2364 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2366 pEntry->NoBADataCountDown--;
2367 if (pEntry->NoBADataCountDown==0)
2369 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2372 #endif // DOT11_N_SUPPORT //
2373 pEntry->FIFOCount = 0;
2374 pEntry->OneSecTxNoRetryOkCount++;
2375 // update NoDataIdleCount when sucessful send packet to STA.
2376 pEntry->NoDataIdleCount = 0;
2377 pEntry->ContinueTxFailCnt = 0;
2380 succMCS = StaFifo.field.SuccessRate & 0x7F;
2382 reTry = pid - succMCS;
2384 if (StaFifo.field.TxSuccess)
2386 pEntry->TXMCSExpected[pid]++;
2389 pEntry->TXMCSSuccessful[pid]++;
2393 pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2398 pEntry->TXMCSFailed[pid]++;
2403 if ((pid >= 12) && succMCS <=7)
2407 pEntry->OneSecTxRetryOkCount += reTry;
2411 // ASIC store 16 stack
2412 } while ( i < (2*TX_RING_SIZE) );
2417 ========================================================================
2419 Routine Description:
2420 Read statistical counters from hardware registers and record them
2421 in software variables for later on query
2424 pAd Pointer to our adapter
2429 IRQL = DISPATCH_LEVEL
2431 ========================================================================
2433 VOID NICUpdateRawCounters(
2434 IN PRTMP_ADAPTER pAd)
2437 RX_STA_CNT0_STRUC RxStaCnt0;
2438 RX_STA_CNT1_STRUC RxStaCnt1;
2439 RX_STA_CNT2_STRUC RxStaCnt2;
2440 TX_STA_CNT0_STRUC TxStaCnt0;
2441 TX_STA_CNT1_STRUC StaTx1;
2442 TX_STA_CNT2_STRUC StaTx2;
2443 TX_AGG_CNT_STRUC TxAggCnt;
2444 TX_AGG_CNT0_STRUC TxAggCnt0;
2445 TX_AGG_CNT1_STRUC TxAggCnt1;
2446 TX_AGG_CNT2_STRUC TxAggCnt2;
2447 TX_AGG_CNT3_STRUC TxAggCnt3;
2448 TX_AGG_CNT4_STRUC TxAggCnt4;
2449 TX_AGG_CNT5_STRUC TxAggCnt5;
2450 TX_AGG_CNT6_STRUC TxAggCnt6;
2451 TX_AGG_CNT7_STRUC TxAggCnt7;
2454 RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2455 RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2458 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2459 // Update RX PLCP error counter
2460 pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2461 // Update False CCA counter
2462 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2465 // Update FCS counters
2466 OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2467 pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2468 if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2469 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2471 // Add FCS error count to private counters
2472 pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2473 OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2474 pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2475 if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2476 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2478 // Update Duplicate Rcv check
2479 pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2480 pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2481 // Update RX Overflow counter
2482 pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2484 //pAd->RalinkCounters.RxCount = 0;
2486 if (pAd->RalinkCounters.RxCount != pAd->watchDogRxCnt)
2488 pAd->watchDogRxCnt = pAd->RalinkCounters.RxCount;
2489 pAd->watchDogRxOverFlowCnt = 0;
2493 if (RxStaCnt2.field.RxFifoOverflowCount)
2494 pAd->watchDogRxOverFlowCnt++;
2496 pAd->watchDogRxOverFlowCnt = 0;
2501 //if (!OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) ||
2502 // (OPSTATUS_TEST_FLAG(pAd, fOP_STATUS_TX_RATE_SWITCH_ENABLED) && (pAd->MacTab.Size != 1)))
2503 if (!pAd->bUpdateBcnCntDone)
2505 // Update BEACON sent count
2506 RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2507 RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2508 RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2509 pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2510 pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2511 pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2512 pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2513 pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2514 pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2515 pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2519 Retry = StaTx1.field.TxRetransmit;
2520 Fail = TxStaCnt0.field.TxFailCount;
2522 OneSecTransmitCount = pAd->WlanCounters.TransmittedFragmentCount.u.LowPart- pAd->WlanCounters.LastTransmittedFragmentCount.u.LowPart;
2523 if ((OneSecTransmitCount+Retry + Fail) > 0)
2524 TxErrorRatio = (( Retry + Fail) *100) / (OneSecTransmitCount+Retry + Fail);
2526 if ((OneSecTransmitCount+Retry + Fail) > 0)
2527 TxErrorRatio = (( Retry + Fail) *100) / (OneSecTransmitCount+Retry + Fail);
2528 DBGPRINT(RT_DEBUG_INFO, ("TX ERROR Rate = %ld %%, Retry = %ld, Fail = %ld, Total = %ld \n",TxErrorRatio, Retry, Fail, (OneSecTransmitCount+Retry + Fail)));
2529 pAd->WlanCounters.LastTransmittedFragmentCount.u.LowPart = pAd->WlanCounters.TransmittedFragmentCount.u.LowPart;
2532 //if (pAd->bStaFifoTest == TRUE)
2534 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2535 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2536 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2537 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2538 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2539 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2540 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2541 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2542 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2543 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2544 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2545 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2546 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2548 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2549 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2550 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2551 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2553 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2554 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2555 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2556 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2558 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2559 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2560 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2561 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2563 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2564 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2566 // Calculate the transmitted A-MPDU count
2567 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2568 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2570 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2571 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2573 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2574 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2576 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2577 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2579 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2580 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2582 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2583 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2585 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2586 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2588 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2589 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2594 RtmpDiagStruct *pDiag;
2595 COUNTER_RALINK *pRalinkCounters;
2596 UCHAR ArrayCurIdx, i;
2598 pDiag = &pAd->DiagStruct;
2599 pRalinkCounters = &pAd->RalinkCounters;
2600 ArrayCurIdx = pDiag->ArrayCurIdx;
2602 if (pDiag->inited == 0)
2604 NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2605 pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2611 pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2612 pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2613 pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2614 pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2615 pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2616 pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2617 pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2618 pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2619 pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2620 pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2621 pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2622 pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2623 pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2624 pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2625 pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2626 pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2627 pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2628 pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2629 pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2631 pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2633 INC_RING_INDEX(pDiag->ArrayCurIdx, DIAGNOSE_TIME);
2634 ArrayCurIdx = pDiag->ArrayCurIdx;
2635 for (i =0; i < 9; i++)
2637 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2638 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2639 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2640 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2642 pDiag->TxDataCnt[ArrayCurIdx] = 0;
2643 pDiag->TxFailCnt[ArrayCurIdx] = 0;
2644 pDiag->RxDataCnt[ArrayCurIdx] = 0;
2645 pDiag->RxCrcErrCnt[ArrayCurIdx] = 0;
2646 // for (i = 9; i < 16; i++)
2647 for (i = 9; i < 24; i++) // 3*3
2649 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2650 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2651 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2654 if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2655 INC_RING_INDEX(pDiag->ArrayStartIdx, DIAGNOSE_TIME);
2659 #endif // DBG_DIAGNOSE //
2666 ========================================================================
2668 Routine Description:
2669 Reset NIC from error
2672 Adapter Pointer to our adapter
2677 IRQL = PASSIVE_LEVEL
2680 Reset NIC from error state
2682 ========================================================================
2684 VOID NICResetFromError(
2685 IN PRTMP_ADAPTER pAd)
2687 // Reset BBP (according to alex, reset ASIC will force reset BBP
2688 // Therefore, skip the reset BBP
2689 // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2691 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2692 // Remove ASIC from reset state
2693 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2695 NICInitializeAdapter(pAd, FALSE);
2696 NICInitAsicFromEEPROM(pAd);
2698 // Switch to current channel, since during reset process, the connection should remains on.
2699 AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2700 AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2704 ========================================================================
2706 Routine Description:
2707 erase 8051 firmware image in MAC ASIC
2710 Adapter Pointer to our adapter
2712 IRQL = PASSIVE_LEVEL
2714 ========================================================================
2716 VOID NICEraseFirmware(
2717 IN PRTMP_ADAPTER pAd)
2721 for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2722 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2724 }/* End of NICEraseFirmware */
2727 ========================================================================
2729 Routine Description:
2730 Load 8051 firmware RT2561.BIN file into MAC ASIC
2733 Adapter Pointer to our adapter
2736 NDIS_STATUS_SUCCESS firmware image load ok
2737 NDIS_STATUS_FAILURE image not found
2739 IRQL = PASSIVE_LEVEL
2741 ========================================================================
2743 NDIS_STATUS NICLoadFirmware(
2744 IN PRTMP_ADAPTER pAd)
2747 #define NICLF_DEFAULT_USE() \
2748 flg_default_firm_use = TRUE; \
2749 printk("%s - Use default firmware!\n", __func__);
2751 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
2754 INT retval, orgfsuid, orgfsgid, i;
2756 PUCHAR pFirmwareImage;
2757 UINT FileLength = 0;
2761 BOOLEAN flg_default_firm_use = FALSE;
2764 DBGPRINT(RT_DEBUG_TRACE, ("===> %s\n", __func__));
2767 pFirmwareImage = NULL;
2768 src = RTMP_FIRMWARE_FILE_NAME;
2770 /* save uid and gid used for filesystem access.
2771 set user and group to 0 (root) */
2772 orgfsuid = current->fsuid;
2773 orgfsgid = current->fsgid;
2774 current->fsuid = current->fsgid = 0;
2778 pAd->FirmwareVersion = (FIRMWARE_MAJOR_VERSION << 8) + \
2779 FIRMWARE_MINOR_VERSION;
2782 /* allocate firmware buffer */
2783 pFirmwareImage = kmalloc(MAX_FIRMWARE_IMAGE_SIZE, MEM_ALLOC_FLAG);
2784 if (pFirmwareImage == NULL)
2786 /* allocate fail, use default firmware array in firmware.h */
2787 printk("%s - Allocate memory fail!\n", __func__);
2788 NICLF_DEFAULT_USE();
2792 /* allocate ok! zero the firmware buffer */
2793 memset(pFirmwareImage, 0x00, MAX_FIRMWARE_IMAGE_SIZE);
2797 /* if ok, read firmware file from *.bin file */
2798 if (flg_default_firm_use == FALSE)
2802 /* open the bin file */
2803 srcf = filp_open(src, O_RDONLY, 0);
2807 printk("%s - Error %ld opening %s\n",
2808 __func__, -PTR_ERR(srcf), src);
2809 NICLF_DEFAULT_USE();
2813 /* the object must have a read method */
2814 if ((srcf->f_op == NULL) || (srcf->f_op->read == NULL))
2816 printk("%s - %s does not have a write method\n", __func__, src);
2817 NICLF_DEFAULT_USE();
2821 /* read the firmware from the file *.bin */
2822 FileLength = srcf->f_op->read(srcf,
2824 MAX_FIRMWARE_IMAGE_SIZE,
2827 if (FileLength != MAX_FIRMWARE_IMAGE_SIZE)
2829 printk("%s: error file length (=%d) in RT2860AP.BIN\n",
2830 __func__, FileLength);
2831 NICLF_DEFAULT_USE();
2836 PUCHAR ptr = pFirmwareImage;
2837 USHORT crc = 0xffff;
2840 /* calculate firmware CRC */
2841 for(i=0; i<(MAX_FIRMWARE_IMAGE_SIZE-2); i++, ptr++)
2842 crc = ByteCRC16(BitReverse(*ptr), crc);
2845 if ((pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2] != \
2846 (UCHAR)BitReverse((UCHAR)(crc>>8))) ||
2847 (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1] != \
2848 (UCHAR)BitReverse((UCHAR)crc)))
2851 printk("%s: CRC = 0x%02x 0x%02x "
2852 "error, should be 0x%02x 0x%02x\n",
2854 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2],
2855 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1],
2856 (UCHAR)(crc>>8), (UCHAR)(crc));
2857 NICLF_DEFAULT_USE();
2862 /* firmware is ok */
2863 pAd->FirmwareVersion = \
2864 (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4] << 8) +
2865 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3];
2867 /* check if firmware version of the file is too old */
2868 if ((pAd->FirmwareVersion) < \
2869 ((FIRMWARE_MAJOR_VERSION << 8) +
2870 FIRMWARE_MINOR_VERSION))
2872 printk("%s: firmware version too old!\n", __func__);
2873 NICLF_DEFAULT_USE();
2878 DBGPRINT(RT_DEBUG_TRACE,
2879 ("NICLoadFirmware: CRC ok, ver=%d.%d\n",
2880 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4],
2881 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3]));
2882 } /* End of if (FileLength == MAX_FIRMWARE_IMAGE_SIZE) */
2886 /* close firmware file */
2891 retval = filp_close(srcf, NULL);
2894 DBGPRINT(RT_DEBUG_ERROR,
2895 ("--> Error %d closing %s\n", -retval, src));
2901 /* write firmware to ASIC */
2902 if (flg_default_firm_use == TRUE)
2904 /* use default fimeware, free allocated buffer */
2905 if (pFirmwareImage != NULL)
2906 kfree(pFirmwareImage);
2909 /* use default *.bin array */
2910 pFirmwareImage = FirmwareImage;
2911 FileLength = sizeof(FirmwareImage);
2914 /* enable Host program ram write selection */
2915 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x10000);
2917 for(i=0; i<FileLength; i+=4)
2919 firm = pFirmwareImage[i] +
2920 (pFirmwareImage[i+3] << 24) +
2921 (pFirmwareImage[i+2] << 16) +
2922 (pFirmwareImage[i+1] << 8);
2924 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, firm);
2927 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00000);
2928 RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00001);
2930 /* initialize BBP R/W access agent */
2931 RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0);
2932 RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2934 if (flg_default_firm_use == FALSE)
2936 /* use file firmware, free allocated buffer */
2937 if (pFirmwareImage != NULL)
2938 kfree(pFirmwareImage);
2943 current->fsuid = orgfsuid;
2944 current->fsgid = orgfsgid;
2947 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
2948 PUCHAR pFirmwareImage;
2949 ULONG FileLength, Index;
2953 UINT32 Version = (pAd->MACVersion >> 16);
2956 pFirmwareImage = FirmwareImage;
2957 FileLength = sizeof(FirmwareImage);
2959 // New 8k byte firmware size for RT3071/RT3072
2960 //printk("Usb Chip\n");
2961 if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_MAX_LENGTH)
2962 //The firmware image consists of two parts. One is the origianl and the other is the new.
2965 if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070))
2966 { // Use Firmware V2.
2967 //printk("KH:Use New Version,part2\n");
2968 pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV1_LENGTH];
2969 FileLength = FIRMWAREIMAGEV2_LENGTH;
2973 //printk("KH:Use New Version,part1\n");
2974 pFirmwareImage = FirmwareImage;
2975 FileLength = FIRMWAREIMAGEV1_LENGTH;
2980 DBGPRINT(RT_DEBUG_ERROR, ("KH: bin file should be 8KB.\n"));
2981 Status = NDIS_STATUS_FAILURE;
2987 /* enable Host program ram write selection */
2988 RT28XX_FIRMUD_INIT(pAd);
2990 for(i=0; i<FileLength; i+=4)
2992 firm = pFirmwareImage[i] +
2993 (pFirmwareImage[i+3] << 24) +
2994 (pFirmwareImage[i+2] << 16) +
2995 (pFirmwareImage[i+1] << 8);
2997 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, firm);
3000 RT28XX_FIRMUD_END(pAd);
3002 RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
3007 /* check if MCU is ready */
3011 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
3016 RTMPusecDelay(1000);
3017 } while (Index++ < 1000);
3021 Status = NDIS_STATUS_FAILURE;
3022 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
3026 DBGPRINT(RT_DEBUG_TRACE,
3027 ("<=== %s (src=%s, status=%d)\n", __func__, src, Status));
3029 DBGPRINT(RT_DEBUG_TRACE,
3030 ("<=== %s (status=%d)\n", __func__, Status));
3033 } /* End of NICLoadFirmware */
3037 ========================================================================
3039 Routine Description:
3040 Load Tx rate switching parameters
3043 Adapter Pointer to our adapter
3046 NDIS_STATUS_SUCCESS firmware image load ok
3047 NDIS_STATUS_FAILURE image not found
3049 IRQL = PASSIVE_LEVEL
3052 1. (B0: Valid Item number) (B1:Initial item from zero)
3053 2. Item Number(Dec) Mode(Hex) Current MCS(Dec) TrainUp(Dec) TrainDown(Dec)
3055 ========================================================================
3057 NDIS_STATUS NICLoadRateSwitchingParams(
3058 IN PRTMP_ADAPTER pAd)
3063 NDIS_HANDLE FileHandle;
3064 UINT FileLength = 0, i, j;
3065 PUCHAR pFirmwareImage;
3066 NDIS_STRING FileName;
3067 NDIS_PHYSICAL_ADDRESS HighestAcceptableMax = NDIS_PHYSICAL_ADDRESS_CONST(-1, -1);
3069 DBGPRINT(RT_DEBUG_TRACE,("===> NICLoadRateSwitchingParams \n"));
3070 pAd->CommonCfg.TxRateTableSize = 0;
3072 if ((pAd->DeviceID == NIC2860_PCI_DEVICE_ID) || (pAd->DeviceID == NIC2860_PCIe_DEVICE_ID))
3074 NdisInitializeString(&FileName,"rate.bin");
3075 DBGPRINT(RT_DEBUG_TRACE, ("NICLoadRateSwitchingParams: load file - rate.bin for tx rate switch \n"));
3079 DBGPRINT_ERR(("NICLoadRateSwitchingParams: wrong DeviceID = 0x%04x, can't find Tx rate switch parameters file\n", pAd->DeviceID));
3080 return NDIS_STATUS_SUCCESS;
3082 NdisOpenFile(&Status, &FileHandle, &FileLength, &FileName, HighestAcceptableMax);
3083 NdisFreeString(FileName);
3085 if (Status != NDIS_STATUS_SUCCESS)
3087 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadRateSwitchingParams: NdisOpenFile() failed, used RateSwitchTable instead\n"));
3088 return NDIS_STATUS_SUCCESS;
3091 if ((FileLength == 0) || (FileLength > (MAX_STEP_OF_TX_RATE_SWITCH+1)*16))
3093 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadRateSwitchingParams: file size is not reasonable, used RateSwitchTable instead\n"));
3095 NdisCloseFile(FileHandle);
3096 return NDIS_STATUS_SUCCESS;
3101 // NDIS_STATUS_SUCCESS means
3102 // The handle at FileHandle is valid for a subsequent call to NdisMapFile.
3104 NdisMapFile(&Status, &pFirmwareImage, FileHandle);
3105 DBGPRINT(RT_DEBUG_TRACE, ("NdisMapFile FileLength=%d\n", FileLength));
3108 for (i=0, j=0; i<FileLength; i++)
3110 if ((i%16) <= 4) // trim reserved field
3112 if (i%16 == 1) // deal with DEC and HEX, only row0 is Hex, others are Dec
3114 RateSwitchTable[j] = *(pFirmwareImage + i);
3118 RateSwitchTable[j] = (*(pFirmwareImage + i)>>4) * 10 + (*(pFirmwareImage + i) & 0x0F);
3125 pAd->CommonCfg.TxRateTableSize = RateSwitchTable[0]; // backup table size
3127 if (Status == NDIS_STATUS_SUCCESS)
3129 NdisUnmapFile(FileHandle);
3130 NdisCloseFile(FileHandle);
3133 DBGPRINT(RT_DEBUG_TRACE,("<=== NICLoadRateSwitchingParams(Valid TxRateTable item number=%d)\n", pAd->CommonCfg.TxRateTableSize));
3135 return NDIS_STATUS_SUCCESS;
3139 ========================================================================
3141 Routine Description:
3142 if pSrc1 all zero with length Length, return 0.
3143 If not all zero, return 1
3152 IRQL = DISPATCH_LEVEL
3156 ========================================================================
3158 ULONG RTMPNotAllZero(
3165 pMem1 = (PUCHAR) pSrc1;
3167 for (Index = 0; Index < Length; Index++)
3169 if (pMem1[Index] != 0x0)
3175 if (Index == Length)
3186 ========================================================================
3188 Routine Description:
3189 Compare two memory block
3192 pSrc1 Pointer to first memory address
3193 pSrc2 Pointer to second memory address
3197 1: pSrc1 memory is larger
3198 2: pSrc2 memory is larger
3200 IRQL = DISPATCH_LEVEL
3204 ========================================================================
3206 ULONG RTMPCompareMemory(
3215 pMem1 = (PUCHAR) pSrc1;
3216 pMem2 = (PUCHAR) pSrc2;
3218 for (Index = 0; Index < Length; Index++)
3220 if (pMem1[Index] > pMem2[Index])
3222 else if (pMem1[Index] < pMem2[Index])
3231 ========================================================================
3233 Routine Description:
3234 Zero out memory block
3237 pSrc1 Pointer to memory address
3243 IRQL = PASSIVE_LEVEL
3244 IRQL = DISPATCH_LEVEL
3248 ========================================================================
3250 VOID RTMPZeroMemory(
3257 pMem = (PUCHAR) pSrc;
3259 for (Index = 0; Index < Length; Index++)
3265 VOID RTMPFillMemory(
3273 pMem = (PUCHAR) pSrc;
3275 for (Index = 0; Index < Length; Index++)
3282 ========================================================================
3284 Routine Description:
3285 Copy data from memory block 1 to memory block 2
3288 pDest Pointer to destination memory address
3289 pSrc Pointer to source memory address
3295 IRQL = PASSIVE_LEVEL
3296 IRQL = DISPATCH_LEVEL
3300 ========================================================================
3302 VOID RTMPMoveMemory(
3311 ASSERT((Length==0) || (pDest && pSrc));
3313 pMem1 = (PUCHAR) pDest;
3314 pMem2 = (PUCHAR) pSrc;
3316 for (Index = 0; Index < Length; Index++)
3318 pMem1[Index] = pMem2[Index];
3323 ========================================================================
3325 Routine Description:
3326 Initialize port configuration structure
3329 Adapter Pointer to our adapter
3334 IRQL = PASSIVE_LEVEL
3338 ========================================================================
3341 IN PRTMP_ADAPTER pAd)
3343 // EDCA_PARM DefaultEdcaParm;
3344 UINT key_index, bss_index;
3346 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3349 // part I. intialize common configuration
3352 pAd->BulkOutReq = 0;
3354 pAd->BulkOutComplete = 0;
3355 pAd->BulkOutCompleteOther = 0;
3356 pAd->BulkOutCompleteCancel = 0;
3358 pAd->BulkInComplete = 0;
3359 pAd->BulkInCompleteFail = 0;
3361 //pAd->QuickTimerP = 100;
3362 //pAd->TurnAggrBulkInCount = 0;
3363 pAd->bUsbTxBulkAggre = 0;
3365 // init as unsed value to ensure driver will set to MCU once.
3366 pAd->LedIndicatorStregth = 0xFF;
3368 pAd->CommonCfg.MaxPktOneTxBulk = 2;
3369 pAd->CommonCfg.TxBulkFactor = 1;
3370 pAd->CommonCfg.RxBulkFactor =1;
3372 pAd->CommonCfg.TxPower = 100; //mW
3374 NdisZeroMemory(&pAd->CommonCfg.IOTestParm, sizeof(pAd->CommonCfg.IOTestParm));
3377 for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3379 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3381 pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3382 pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3386 pAd->Antenna.word = 0;
3387 pAd->CommonCfg.BBPCurrentBW = BW_20;
3389 pAd->LedCntl.word = 0;
3391 pAd->bAutoTxAgcA = FALSE; // Default is OFF
3392 pAd->bAutoTxAgcG = FALSE; // Default is OFF
3393 pAd->RfIcType = RFIC_2820;
3395 // Init timer for reset complete event
3396 pAd->CommonCfg.CentralChannel = 1;
3397 pAd->bForcePrintTX = FALSE;
3398 pAd->bForcePrintRX = FALSE;
3399 pAd->bStaFifoTest = FALSE;
3400 pAd->bProtectionTest = FALSE;
3401 pAd->bHCCATest = FALSE;
3402 pAd->bGenOneHCCA = FALSE;
3403 pAd->CommonCfg.Dsifs = 10; // in units of usec
3404 pAd->CommonCfg.TxPower = 100; //mW
3405 pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3406 pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3407 pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3408 pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3409 pAd->CommonCfg.RtsThreshold = 2347;
3410 pAd->CommonCfg.FragmentThreshold = 2346;
3411 pAd->CommonCfg.UseBGProtection = 0; // 0: AUTO
3412 pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3413 pAd->CommonCfg.PhyMode = 0xff; // unknown
3414 pAd->CommonCfg.BandState = UNKNOWN_BAND;
3415 pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3416 pAd->CommonCfg.RadarDetect.CSCount = 0;
3417 pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3418 pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3419 pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3420 pAd->CommonCfg.bAPSDCapable = FALSE;
3421 pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3422 pAd->CommonCfg.TriggerTimerCount = 0;
3423 pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3424 pAd->CommonCfg.bCountryFlag = FALSE;
3425 pAd->CommonCfg.TxStream = 0;
3426 pAd->CommonCfg.RxStream = 0;
3428 NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3430 #ifdef DOT11_N_SUPPORT
3431 NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3432 pAd->HTCEnable = FALSE;
3433 pAd->bBroadComHT = FALSE;
3434 pAd->CommonCfg.bRdg = FALSE;
3436 #ifdef DOT11N_DRAFT3
3437 pAd->CommonCfg.Dot11OBssScanPassiveDwell = dot11OBSSScanPassiveDwell; // Unit : TU. 5~1000
3438 pAd->CommonCfg.Dot11OBssScanActiveDwell = dot11OBSSScanActiveDwell; // Unit : TU. 10~1000
3439 pAd->CommonCfg.Dot11BssWidthTriggerScanInt = dot11BSSWidthTriggerScanInterval; // Unit : Second
3440 pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = dot11OBSSScanPassiveTotalPerChannel; // Unit : TU. 200~10000
3441 pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = dot11OBSSScanActiveTotalPerChannel; // Unit : TU. 20~10000
3442 pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = dot11BSSWidthChannelTransactionDelayFactor;
3443 pAd->CommonCfg.Dot11OBssScanActivityThre = dot11BSSScanActivityThreshold; // Unit : percentage
3444 pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
3445 #endif // DOT11N_DRAFT3 //
3447 NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3448 pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3449 pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3450 pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3451 pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3452 pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3453 DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3455 pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3456 BATableInit(pAd, &pAd->BATable);
3458 pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3459 pAd->CommonCfg.bHTProtect = 1;
3460 pAd->CommonCfg.bMIMOPSEnable = TRUE;
3461 pAd->CommonCfg.bBADecline = FALSE;
3462 pAd->CommonCfg.bDisableReordering = FALSE;
3464 pAd->CommonCfg.TxBASize = 7;
3466 pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3467 #endif // DOT11_N_SUPPORT //
3469 //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3470 //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3471 //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3472 //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3473 pAd->CommonCfg.TxRate = RATE_6;
3475 pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3476 pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3477 pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3479 pAd->CommonCfg.BeaconPeriod = 100; // in mSec
3482 // part II. intialize STA specific configuration
3484 #ifdef CONFIG_STA_SUPPORT
3485 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3487 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3488 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3489 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3490 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3492 pAd->StaCfg.Psm = PWR_ACTIVE;
3494 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3495 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3496 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3497 pAd->StaCfg.bMixCipher = FALSE;
3498 pAd->StaCfg.DefaultKeyId = 0;
3500 // 802.1x port control
3501 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3502 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3503 pAd->StaCfg.LastMicErrorTime = 0;
3504 pAd->StaCfg.MicErrCnt = 0;
3505 pAd->StaCfg.bBlockAssoc = FALSE;
3506 pAd->StaCfg.WpaState = SS_NOTUSE;
3508 pAd->CommonCfg.NdisRadioStateOff = FALSE; // New to support microsoft disable radio with OID command
3510 pAd->StaCfg.RssiTrigger = 0;
3511 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3512 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3513 pAd->StaCfg.AtimWin = 0;
3514 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3515 pAd->StaCfg.BssType = BSS_INFRA; // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3516 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3517 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3518 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3520 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3521 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3524 #ifdef EXT_BUILD_CHANNEL_LIST
3525 pAd->StaCfg.IEEE80211dClientMode = Rt802_11_D_None;
3526 #endif // EXT_BUILD_CHANNEL_LIST //
3527 #endif // CONFIG_STA_SUPPORT //
3529 // global variables mXXXX used in MAC protocol state machines
3530 OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3531 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3532 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3534 // PHY specification
3535 pAd->CommonCfg.PhyMode = PHY_11BG_MIXED; // default PHY mode
3536 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED); // CCK use LONG preamble
3538 #ifdef CONFIG_STA_SUPPORT
3539 IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3541 // user desired power mode
3542 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3543 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3544 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3547 // CCX v1.0 releated init value
3548 RTMPInitTimer(pAd, &pAd->StaCfg.LeapAuthTimer, GET_TIMER_FUNCTION(LeapAuthTimeout), pAd, FALSE);
3549 pAd->StaCfg.LeapAuthMode = CISCO_AuthModeLEAPNone;
3550 pAd->StaCfg.bCkipOn = FALSE;
3551 #endif // LEAP_SUPPORT //
3553 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3554 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3557 pAd->StaCfg.ScanCnt = 0;
3559 // CCX 2.0 control flag init
3560 pAd->StaCfg.CCXEnable = FALSE;
3561 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3562 pAd->StaCfg.CCXQosECWMin = 4;
3563 pAd->StaCfg.CCXQosECWMax = 10;
3565 pAd->StaCfg.bHwRadio = TRUE; // Default Hardware Radio status is On
3566 pAd->StaCfg.bSwRadio = TRUE; // Default Software Radio status is On
3567 pAd->StaCfg.bRadio = TRUE; // bHwRadio && bSwRadio
3568 pAd->StaCfg.bHardwareRadio = FALSE; // Default is OFF
3569 pAd->StaCfg.bShowHiddenSSID = FALSE; // Default no show
3571 // Nitro mode control
3572 pAd->StaCfg.bAutoReconnect = TRUE;
3574 // Save the init time as last scan time, the system should do scan after 2 seconds.
3575 // This patch is for driver wake up from standby mode, system will do scan right away.
3576 pAd->StaCfg.LastScanTime = 0;
3577 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3578 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3579 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3580 #ifdef WPA_SUPPLICANT_SUPPORT
3581 pAd->StaCfg.IEEE8021X = FALSE;
3582 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3583 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3584 #ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
3585 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3586 #endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
3587 #endif // WPA_SUPPLICANT_SUPPORT //
3590 #endif // CONFIG_STA_SUPPORT //
3592 // Default for extra information is not valid
3593 pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3595 // Default Config change flag
3596 pAd->bConfigChanged = FALSE;
3599 // part III. AP configurations
3606 // dynamic BBP R66:sensibity tuning to overcome background noise
3607 pAd->BbpTuning.bEnable = TRUE;
3608 pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3609 pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3610 pAd->BbpTuning.R66Delta = 4;
3611 pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3614 // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3615 // if not initial this value, the default value will be 0.
3617 pAd->BbpTuning.R66CurrentValue = 0x38;
3619 pAd->Bbp94 = BBPR94_DEFAULT;
3620 pAd->BbpForCCK = FALSE;
3622 // Default is FALSE for test bit 1
3623 //pAd->bTest1 = FALSE;
3625 // initialize MAC table and allocate spin lock
3626 NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3627 InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3628 NdisAllocateSpinLock(&pAd->MacTabLock);
3630 //RTMPInitTimer(pAd, &pAd->RECBATimer, RECBATimerTimeout, pAd, TRUE);
3631 //RTMPSetTimer(&pAd->RECBATimer, REORDER_EXEC_INTV);
3634 NdisZeroMemory(&pAd->ate, sizeof(ATE_INFO));
3635 pAd->ate.Mode = ATE_STOP;
3636 pAd->ate.TxCount = 200;/* to exceed TX_RING_SIZE ... */
3637 pAd->ate.TxLength = 1024;
3638 pAd->ate.TxWI.ShortGI = 0;// LONG GI : 800 ns
3639 pAd->ate.TxWI.PHYMODE = MODE_CCK;
3640 pAd->ate.TxWI.MCS = 3;
3641 pAd->ate.TxWI.BW = BW_20;
3642 pAd->ate.Channel = 1;
3643 pAd->ate.QID = QID_AC_BE;
3644 pAd->ate.Addr1[0] = 0x00;
3645 pAd->ate.Addr1[1] = 0x11;
3646 pAd->ate.Addr1[2] = 0x22;
3647 pAd->ate.Addr1[3] = 0xAA;
3648 pAd->ate.Addr1[4] = 0xBB;
3649 pAd->ate.Addr1[5] = 0xCC;
3650 NdisMoveMemory(pAd->ate.Addr2, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3651 NdisMoveMemory(pAd->ate.Addr3, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3652 pAd->ate.bRxFer = 0;
3653 pAd->ate.bQATxStart = FALSE;
3654 pAd->ate.bQARxStart = FALSE;
3655 #ifdef RALINK_28xx_QA
3656 //pAd->ate.Repeat = 0;
3657 pAd->ate.TxStatus = 0;
3658 pAd->ate.AtePid = NULL;
3659 #endif // RALINK_28xx_QA //
3660 #endif // RALINK_ATE //
3663 pAd->CommonCfg.bWiFiTest = FALSE;
3666 DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3669 // IRQL = PASSIVE_LEVEL
3672 if (ch >= '0' && ch <= '9') return (ch - '0'); // Handle numerals
3673 if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA); // Handle capitol hex digits
3674 if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA); // Handle small hex digits
3679 // FUNCTION: AtoH(char *, UCHAR *, int)
3681 // PURPOSE: Converts ascii string to network order hex
3684 // src - pointer to input ascii string
3685 // dest - pointer to output hex
3686 // destlen - size of dest
3690 // 2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3691 // into upper nibble and 2nd ascii byte of pair into lower nibble.
3693 // IRQL = PASSIVE_LEVEL
3695 void AtoH(char * src, UCHAR * dest, int destlen)
3701 destTemp = (PUCHAR) dest;
3705 *destTemp = BtoH(*srcptr++) << 4; // Put 1st ascii byte in upper nibble.
3706 *destTemp += BtoH(*srcptr++); // Add 2nd ascii byte to above.
3711 VOID RTMPPatchMacBbpBug(
3712 IN PRTMP_ADAPTER pAd)
3716 // Initialize BBP register to default value
3717 for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3719 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3722 // Initialize RF register to default value
3723 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3724 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3726 // Re-init BBP register from EEPROM value
3727 NICInitAsicFromEEPROM(pAd);
3731 ========================================================================
3733 Routine Description:
3737 pAd Pointer to our adapter
3738 pTimer Timer structure
3739 pTimerFunc Function to execute when timer expired
3740 Repeat Ture for period timer
3747 ========================================================================
3750 IN PRTMP_ADAPTER pAd,
3751 IN PRALINK_TIMER_STRUCT pTimer,
3752 IN PVOID pTimerFunc,
3757 // Set Valid to TRUE for later used.
3758 // It will crash if we cancel a timer or set a timer
3759 // that we haven't initialize before.
3761 pTimer->Valid = TRUE;
3763 pTimer->PeriodicType = Repeat;
3764 pTimer->State = FALSE;
3765 pTimer->cookie = (ULONG) pData;
3771 RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj, pTimerFunc, (PVOID) pTimer);
3775 ========================================================================
3777 Routine Description:
3781 pTimer Timer structure
3782 Value Timer value in milliseconds
3788 To use this routine, must call RTMPInitTimer before.
3790 ========================================================================
3793 IN PRALINK_TIMER_STRUCT pTimer,
3798 pTimer->TimerValue = Value;
3799 pTimer->State = FALSE;
3800 if (pTimer->PeriodicType == TRUE)
3802 pTimer->Repeat = TRUE;
3803 RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3807 pTimer->Repeat = FALSE;
3808 RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3813 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3819 ========================================================================
3821 Routine Description:
3825 pTimer Timer structure
3826 Value Timer value in milliseconds
3832 To use this routine, must call RTMPInitTimer before.
3834 ========================================================================
3837 IN PRALINK_TIMER_STRUCT pTimer,
3844 pTimer->TimerValue = Value;
3845 pTimer->State = FALSE;
3846 if (pTimer->PeriodicType == TRUE)
3848 RTMPCancelTimer(pTimer, &Cancel);
3849 RTMPSetTimer(pTimer, Value);
3853 RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3858 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3863 ========================================================================
3865 Routine Description:
3866 Cancel timer objects
3869 Adapter Pointer to our adapter
3874 IRQL = PASSIVE_LEVEL
3875 IRQL = DISPATCH_LEVEL
3878 1.) To use this routine, must call RTMPInitTimer before.
3879 2.) Reset NIC to initial state AS IS system boot up time.
3881 ========================================================================
3883 VOID RTMPCancelTimer(
3884 IN PRALINK_TIMER_STRUCT pTimer,
3885 OUT BOOLEAN *pCancelled)
3889 if (pTimer->State == FALSE)
3890 pTimer->Repeat = FALSE;
3891 RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3893 if (*pCancelled == TRUE)
3894 pTimer->State = TRUE;
3897 // We need to go-through the TimerQ to findout this timer handler and remove it if
3898 // it's still waiting for execution.
3900 RT2870_TimerQ_Remove(pTimer->pAd, pTimer);
3906 // NdisMCancelTimer just canced the timer and not mean release the timer.
3907 // And don't set the "Valid" to False. So that we can use this timer again.
3909 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3914 ========================================================================
3916 Routine Description:
3920 pAd Pointer to our adapter
3926 IRQL = PASSIVE_LEVEL
3927 IRQL = DISPATCH_LEVEL
3931 ========================================================================
3934 IN PRTMP_ADAPTER pAd,
3941 // In ATE mode of RT2860 AP/STA, we have erased 8051 firmware.
3942 // So LED mode is not supported when ATE is running.
3946 #endif // RALINK_ATE //
3948 LowByte = pAd->LedCntl.field.LedMode&0x7f;
3953 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3954 pAd->LedIndicatorStregth = 0;
3957 if (pAd->CommonCfg.Channel > 14)
3961 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3965 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3968 LowByte = 0; // Driver sets MAC register and MAC controls LED
3971 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3975 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3977 case LED_ON_SITE_SURVEY:
3979 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3983 AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3986 DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3991 // Keep LED status for LED SiteSurvey mode.
3992 // After SiteSurvey, we will set the LED mode to previous status.
3994 if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3995 pAd->LedStatus = Status;
3997 DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
4001 ========================================================================
4003 Routine Description:
4004 Set LED Signal Stregth
4007 pAd Pointer to our adapter
4013 IRQL = PASSIVE_LEVEL
4016 Can be run on any IRQL level.
4018 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
4025 ========================================================================
4027 VOID RTMPSetSignalLED(
4028 IN PRTMP_ADAPTER pAd,
4029 IN NDIS_802_11_RSSI Dbm)
4034 // if not Signal Stregth, then do nothing.
4036 if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
4043 else if (Dbm <= -81)
4045 else if (Dbm <= -71)
4047 else if (Dbm <= -67)
4049 else if (Dbm <= -57)
4055 // Update Signal Stregth to firmware if changed.
4057 if (pAd->LedIndicatorStregth != nLed)
4059 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
4060 pAd->LedIndicatorStregth = nLed;
4065 ========================================================================
4067 Routine Description:
4071 pAd Pointer to our adapter
4076 IRQL <= DISPATCH_LEVEL
4079 Before Enable RX, make sure you have enabled Interrupt.
4080 ========================================================================
4082 VOID RTMPEnableRxTx(
4083 IN PRTMP_ADAPTER pAd)
4085 // WPDMA_GLO_CFG_STRUC GloCfg;
4088 DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
4092 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x4);
4095 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
4096 if ((GloCfg.field.TxDMABusy == 0) && (GloCfg.field.RxDMABusy == 0))
4099 DBGPRINT(RT_DEBUG_TRACE, ("==> DMABusy\n"));
4100 RTMPusecDelay(1000);
4105 RT28XX_DMA_WRITE_INIT(GloCfg);
4106 DBGPRINT(RT_DEBUG_TRACE, ("<== WRITE DMA offset 0x208 = 0x%x\n", GloCfg.word));
4107 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
4109 RT28XX_DMA_POST_WRITE(pAd);
4112 RT28XXDMAEnable(pAd);
4115 // enable RX of MAC block
4116 if (pAd->OpMode == OPMODE_AP)
4118 UINT32 rx_filter_flag = APNORMAL;
4121 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag); // enable RX of DMA block
4125 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL); // Staion not drop control frame will fail WiFi Certification.
4128 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
4129 DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));