drivers/staging/gma500/psb_drv.c

   1 /**************************************************************************
   2  * Copyright (c) 2007-2011, Intel Corporation.
   3  * All Rights Reserved.
   4  * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
   5  * All Rights Reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms and conditions of the GNU General Public License,
   9  * version 2, as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  **************************************************************************/
  21
  22 #include <drm/drmP.h>
  23 #include <drm/drm.h>
  24 #include "psb_drm.h"
  25 #include "psb_drv.h"
  26 #include "framebuffer.h"
  27 #include "psb_reg.h"
  28 #include "psb_intel_reg.h"
  29 #include "intel_bios.h"
  30 #include "mid_bios.h"
  31 #include "mdfld_dsi_dbi.h"
  32 #include <drm/drm_pciids.h>
  33 #include "power.h"
  34 #include <linux/cpu.h>
  35 #include <linux/notifier.h>
  36 #include <linux/spinlock.h>
  37 #include <linux/pm_runtime.h>
  38 #include <acpi/video.h>
  39
  40 static int drm_psb_trap_pagefaults;
  41
  42 int drm_psb_no_fb;
  43
  44 static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  45
  46 MODULE_PARM_DESC(no_fb, "Disable FBdev");
  47 MODULE_PARM_DESC(trap_pagefaults, "Error and reset on MMU pagefaults");
  48 module_param_named(no_fb, drm_psb_no_fb, int, 0600);
  49 module_param_named(trap_pagefaults, drm_psb_trap_pagefaults, int, 0600);
  50
  51
  52 static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {
  53         { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  54         { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  55 #if defined(CONFIG_DRM_PSB_MRST)
  56         { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  57         { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  58         { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  59         { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  60         { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  61         { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  62         { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  63         { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mrst_chip_ops},
  64 #endif
  65 #if defined(CONFIG_DRM_PSB_MFLD)
  66         { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  67         { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  68         { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  69         { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  70         { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  71         { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  72         { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  73         { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
  74 #endif
  75 #if defined(CONFIG_DRM_PSB_CDV)
  76         { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  77         { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  78         { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  79         { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  80         { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  81         { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  82         { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  83         { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
  84 #endif
  85         { 0, 0, 0}
  86 };
  87 MODULE_DEVICE_TABLE(pci, pciidlist);
  88
  89 /*
  90  * Standard IOCTLs.
  91  */
  92
  93 #define DRM_IOCTL_PSB_SIZES     \
  94                 DRM_IOR(DRM_PSB_SIZES + DRM_COMMAND_BASE, \
  95                         struct drm_psb_sizes_arg)
  96 #define DRM_IOCTL_PSB_FUSE_REG  \
  97                 DRM_IOWR(DRM_PSB_FUSE_REG + DRM_COMMAND_BASE, uint32_t)
  98 #define DRM_IOCTL_PSB_DC_STATE  \
  99                 DRM_IOW(DRM_PSB_DC_STATE + DRM_COMMAND_BASE, \
 100                         struct drm_psb_dc_state_arg)
 101 #define DRM_IOCTL_PSB_ADB       \
 102                 DRM_IOWR(DRM_PSB_ADB + DRM_COMMAND_BASE, uint32_t)
 103 #define DRM_IOCTL_PSB_MODE_OPERATION    \
 104                 DRM_IOWR(DRM_PSB_MODE_OPERATION + DRM_COMMAND_BASE, \
 105                          struct drm_psb_mode_operation_arg)
 106 #define DRM_IOCTL_PSB_STOLEN_MEMORY     \
 107                 DRM_IOWR(DRM_PSB_STOLEN_MEMORY + DRM_COMMAND_BASE, \
 108                          struct drm_psb_stolen_memory_arg)
 109 #define DRM_IOCTL_PSB_REGISTER_RW       \
 110                 DRM_IOWR(DRM_PSB_REGISTER_RW + DRM_COMMAND_BASE, \
 111                          struct drm_psb_register_rw_arg)
 112 #define DRM_IOCTL_PSB_DPST      \
 113                 DRM_IOWR(DRM_PSB_DPST + DRM_COMMAND_BASE, \
 114                          uint32_t)
 115 #define DRM_IOCTL_PSB_GAMMA     \
 116                 DRM_IOWR(DRM_PSB_GAMMA + DRM_COMMAND_BASE, \
 117                          struct drm_psb_dpst_lut_arg)
 118 #define DRM_IOCTL_PSB_DPST_BL   \
 119                 DRM_IOWR(DRM_PSB_DPST_BL + DRM_COMMAND_BASE, \
 120                          uint32_t)
 121 #define DRM_IOCTL_PSB_GET_PIPE_FROM_CRTC_ID     \
 122                 DRM_IOWR(DRM_PSB_GET_PIPE_FROM_CRTC_ID + DRM_COMMAND_BASE, \
 123                          struct drm_psb_get_pipe_from_crtc_id_arg)
 124 #define DRM_IOCTL_PSB_GEM_CREATE        \
 125                 DRM_IOWR(DRM_PSB_GEM_CREATE + DRM_COMMAND_BASE, \
 126                          struct drm_psb_gem_create)
 127 #define DRM_IOCTL_PSB_2D_OP     \
 128                 DRM_IOW(DRM_PSB_2D_OP + DRM_COMMAND_BASE, \
 129                          struct drm_psb_2d_op)
 130 #define DRM_IOCTL_PSB_GEM_MMAP  \
 131                 DRM_IOWR(DRM_PSB_GEM_MMAP + DRM_COMMAND_BASE, \
 132                          struct drm_psb_gem_mmap)
 133
 134 static int psb_sizes_ioctl(struct drm_device *dev, void *data,
 135                            struct drm_file *file_priv);
 136 static int psb_dc_state_ioctl(struct drm_device *dev, void * data,
 137                               struct drm_file *file_priv);
 138 static int psb_adb_ioctl(struct drm_device *dev, void *data,
 139                          struct drm_file *file_priv);
 140 static int psb_mode_operation_ioctl(struct drm_device *dev, void *data,
 141                                     struct drm_file *file_priv);
 142 static int psb_stolen_memory_ioctl(struct drm_device *dev, void *data,
 143                                    struct drm_file *file_priv);
 144 static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
 145                                  struct drm_file *file_priv);
 146 static int psb_dpst_ioctl(struct drm_device *dev, void *data,
 147                           struct drm_file *file_priv);
 148 static int psb_gamma_ioctl(struct drm_device *dev, void *data,
 149                            struct drm_file *file_priv);
 150 static int psb_dpst_bl_ioctl(struct drm_device *dev, void *data,
 151                              struct drm_file *file_priv);
 152
 153 #define PSB_IOCTL_DEF(ioctl, func, flags) \
 154         [DRM_IOCTL_NR(ioctl) - DRM_COMMAND_BASE] = {ioctl, flags, func}
 155
 156 static struct drm_ioctl_desc psb_ioctls[] = {
 157         PSB_IOCTL_DEF(DRM_IOCTL_PSB_SIZES, psb_sizes_ioctl, DRM_AUTH),
 158         PSB_IOCTL_DEF(DRM_IOCTL_PSB_DC_STATE, psb_dc_state_ioctl, DRM_AUTH),
 159         PSB_IOCTL_DEF(DRM_IOCTL_PSB_ADB, psb_adb_ioctl, DRM_AUTH),
 160         PSB_IOCTL_DEF(DRM_IOCTL_PSB_MODE_OPERATION, psb_mode_operation_ioctl,
 161                       DRM_AUTH),
 162         PSB_IOCTL_DEF(DRM_IOCTL_PSB_STOLEN_MEMORY, psb_stolen_memory_ioctl,
 163                       DRM_AUTH),
 164         PSB_IOCTL_DEF(DRM_IOCTL_PSB_REGISTER_RW, psb_register_rw_ioctl,
 165                       DRM_AUTH),
 166         PSB_IOCTL_DEF(DRM_IOCTL_PSB_DPST, psb_dpst_ioctl, DRM_AUTH),
 167         PSB_IOCTL_DEF(DRM_IOCTL_PSB_GAMMA, psb_gamma_ioctl, DRM_AUTH),
 168         PSB_IOCTL_DEF(DRM_IOCTL_PSB_DPST_BL, psb_dpst_bl_ioctl, DRM_AUTH),
 169         PSB_IOCTL_DEF(DRM_IOCTL_PSB_GET_PIPE_FROM_CRTC_ID,
 170                                         psb_intel_get_pipe_from_crtc_id, 0),
 171         PSB_IOCTL_DEF(DRM_IOCTL_PSB_GEM_CREATE, psb_gem_create_ioctl,
 172                                                 DRM_UNLOCKED | DRM_AUTH),
 173         PSB_IOCTL_DEF(DRM_IOCTL_PSB_2D_OP, psb_accel_ioctl,
 174                                                 DRM_UNLOCKED| DRM_AUTH),
 175         PSB_IOCTL_DEF(DRM_IOCTL_PSB_GEM_MMAP, psb_gem_mmap_ioctl,
 176                                                 DRM_UNLOCKED | DRM_AUTH),
 177 };
 178
 179 static void psb_lastclose(struct drm_device *dev)
 180 {
 181         return;
 182 }
 183
 184 static void psb_do_takedown(struct drm_device *dev)
 185 {
 186         /* FIXME: do we need to clean up the gtt here ? */
 187 }
 188
 189 static int psb_do_init(struct drm_device *dev)
 190 {
 191         struct drm_psb_private *dev_priv = dev->dev_private;
 192         struct psb_gtt *pg = &dev_priv->gtt;
 193
 194         uint32_t stolen_gtt;
 195
 196         int ret = -ENOMEM;
 197
 198         if (pg->mmu_gatt_start & 0x0FFFFFFF) {
 199                 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
 200                 ret = -EINVAL;
 201                 goto out_err;
 202         }
 203
 204
 205         stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
 206         stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
 207         stolen_gtt =
 208             (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
 209
 210         dev_priv->gatt_free_offset = pg->mmu_gatt_start +
 211             (stolen_gtt << PAGE_SHIFT) * 1024;
 212
 213         if (1 || drm_debug) {
 214                 uint32_t core_id = PSB_RSGX32(PSB_CR_CORE_ID);
 215                 uint32_t core_rev = PSB_RSGX32(PSB_CR_CORE_REVISION);
 216                 DRM_INFO("SGX core id = 0x%08x\n", core_id);
 217                 DRM_INFO("SGX core rev major = 0x%02x, minor = 0x%02x\n",
 218                          (core_rev & _PSB_CC_REVISION_MAJOR_MASK) >>
 219                          _PSB_CC_REVISION_MAJOR_SHIFT,
 220                          (core_rev & _PSB_CC_REVISION_MINOR_MASK) >>
 221                          _PSB_CC_REVISION_MINOR_SHIFT);
 222                 DRM_INFO
 223                     ("SGX core rev maintenance = 0x%02x, designer = 0x%02x\n",
 224                      (core_rev & _PSB_CC_REVISION_MAINTENANCE_MASK) >>
 225                      _PSB_CC_REVISION_MAINTENANCE_SHIFT,
 226                      (core_rev & _PSB_CC_REVISION_DESIGNER_MASK) >>
 227                      _PSB_CC_REVISION_DESIGNER_SHIFT);
 228         }
 229
 230
 231         spin_lock_init(&dev_priv->irqmask_lock);
 232         mutex_init(&dev_priv->mutex_2d);
 233
 234         PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
 235         PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
 236         PSB_RSGX32(PSB_CR_BIF_BANK1);
 237         PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_MMU_ER_MASK,
 238                                                         PSB_CR_BIF_CTRL);
 239         psb_spank(dev_priv);
 240
 241         /* mmu_gatt ?? */
 242         PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
 243         return 0;
 244 out_err:
 245         psb_do_takedown(dev);
 246         return ret;
 247 }
 248
 249 static int psb_driver_unload(struct drm_device *dev)
 250 {
 251         struct drm_psb_private *dev_priv = dev->dev_private;
 252
 253         /* Kill vblank etc here */
 254
 255         gma_backlight_exit(dev);
 256
 257         if (drm_psb_no_fb == 0)
 258                 psb_modeset_cleanup(dev);
 259
 260         if (dev_priv) {
 261                 psb_lid_timer_takedown(dev_priv);
 262                 gma_intel_opregion_exit(dev);
 263
 264                 psb_do_takedown(dev);
 265
 266
 267                 if (dev_priv->pf_pd) {
 268                         psb_mmu_free_pagedir(dev_priv->pf_pd);
 269                         dev_priv->pf_pd = NULL;
 270                 }
 271                 if (dev_priv->mmu) {
 272                         struct psb_gtt *pg = &dev_priv->gtt;
 273
 274                         down_read(&pg->sem);
 275                         psb_mmu_remove_pfn_sequence(
 276                                 psb_mmu_get_default_pd
 277                                 (dev_priv->mmu),
 278                                 pg->mmu_gatt_start,
 279                                 dev_priv->vram_stolen_size >> PAGE_SHIFT);
 280                         up_read(&pg->sem);
 281                         psb_mmu_driver_takedown(dev_priv->mmu);
 282                         dev_priv->mmu = NULL;
 283                 }
 284                 psb_gtt_takedown(dev);
 285                 if (dev_priv->scratch_page) {
 286                         __free_page(dev_priv->scratch_page);
 287                         dev_priv->scratch_page = NULL;
 288                 }
 289                 if (dev_priv->vdc_reg) {
 290                         iounmap(dev_priv->vdc_reg);
 291                         dev_priv->vdc_reg = NULL;
 292                 }
 293                 if (dev_priv->sgx_reg) {
 294                         iounmap(dev_priv->sgx_reg);
 295                         dev_priv->sgx_reg = NULL;
 296                 }
 297
 298                 kfree(dev_priv);
 299                 dev->dev_private = NULL;
 300
 301                 /*destroy VBT data*/
 302                 psb_intel_destroy_bios(dev);
 303         }
 304
 305         gma_power_uninit(dev);
 306
 307         return 0;
 308 }
 309
 310
 311 static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
 312 {
 313         struct drm_psb_private *dev_priv;
 314         unsigned long resource_start;
 315         struct psb_gtt *pg;
 316         unsigned long irqflags;
 317         int ret = -ENOMEM;
 318         uint32_t tt_pages;
 319         struct drm_connector *connector;
 320         struct psb_intel_output *psb_intel_output;
 321
 322         dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
 323         if (dev_priv == NULL)
 324                 return -ENOMEM;
 325
 326         dev_priv->ops = (struct psb_ops *)chipset;
 327         dev_priv->dev = dev;
 328         dev->dev_private = (void *) dev_priv;
 329
 330         dev_priv->num_pipe = dev_priv->ops->pipes;
 331
 332         resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
 333
 334         dev_priv->vdc_reg =
 335             ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
 336         if (!dev_priv->vdc_reg)
 337                 goto out_err;
 338
 339         dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
 340                                                         PSB_SGX_SIZE);
 341         if (!dev_priv->sgx_reg)
 342                 goto out_err;
 343
 344         ret = dev_priv->ops->chip_setup(dev);
 345         if (ret)
 346                 goto out_err;
 347
 348         /* Init OSPM support */
 349         gma_power_init(dev);
 350
 351         ret = -ENOMEM;
 352
 353         dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
 354         if (!dev_priv->scratch_page)
 355                 goto out_err;
 356
 357         set_pages_uc(dev_priv->scratch_page, 1);
 358
 359         ret = psb_gtt_init(dev, 0);
 360         if (ret)
 361                 goto out_err;
 362
 363         dev_priv->mmu = psb_mmu_driver_init((void *)0,
 364                                         drm_psb_trap_pagefaults, 0,
 365                                         dev_priv);
 366         if (!dev_priv->mmu)
 367                 goto out_err;
 368
 369         pg = &dev_priv->gtt;
 370
 371         tt_pages = (pg->gatt_pages < PSB_TT_PRIV0_PLIMIT) ?
 372                 (pg->gatt_pages) : PSB_TT_PRIV0_PLIMIT;
 373
 374
 375         dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
 376         if (!dev_priv->pf_pd)
 377                 goto out_err;
 378
 379         psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
 380         psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
 381
 382         ret = psb_do_init(dev);
 383         if (ret)
 384                 return ret;
 385
 386         PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
 387         PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
 388
 389 /*      igd_opregion_init(&dev_priv->opregion_dev); */
 390         acpi_video_register();
 391         if (dev_priv->lid_state)
 392                 psb_lid_timer_init(dev_priv);
 393
 394         ret = drm_vblank_init(dev, dev_priv->num_pipe);
 395         if (ret)
 396                 goto out_err;
 397
 398         /*
 399          * Install interrupt handlers prior to powering off SGX or else we will
 400          * crash.
 401          */
 402         dev_priv->vdc_irq_mask = 0;
 403         dev_priv->pipestat[0] = 0;
 404         dev_priv->pipestat[1] = 0;
 405         dev_priv->pipestat[2] = 0;
 406         spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
 407         PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
 408         PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
 409         PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
 410         spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
 411         if (drm_core_check_feature(dev, DRIVER_MODESET))
 412                 drm_irq_install(dev);
 413
 414         dev->vblank_disable_allowed = 1;
 415
 416         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
 417
 418         dev->driver->get_vblank_counter = psb_get_vblank_counter;
 419
 420 #if defined(CONFIG_DRM_PSB_MFLD)
 421         /* FIXME: this is not the right place for this stuff ! */
 422         if (IS_MFLD(dev)) {
 423 #ifdef CONFIG_MDFLD_DSI_DPU
 424                 /*init dpu info*/
 425                 mdfld_dbi_dpu_init(dev);
 426 #else
 427                 mdfld_dbi_dsr_init(dev);
 428 #endif /*CONFIG_MDFLD_DSI_DPU*/
 429                 /* INIT_WORK(&dev_priv->te_work, mdfld_te_handler_work);*/
 430         }
 431 #endif
 432         if (drm_psb_no_fb == 0) {
 433                 psb_modeset_init(dev);
 434                 psb_fbdev_init(dev);
 435                 drm_kms_helper_poll_init(dev);
 436         }
 437
 438         /* Only add backlight support if we have LVDS output */
 439         list_for_each_entry(connector, &dev->mode_config.connector_list,
 440                             head) {
 441                 psb_intel_output = to_psb_intel_output(connector);
 442
 443                 switch (psb_intel_output->type) {
 444                 case INTEL_OUTPUT_LVDS:
 445                         ret = gma_backlight_init(dev);
 446                         break;
 447                 }
 448         }
 449
 450         if (ret)
 451                 return ret;
 452 #if 0
 453         /*enable runtime pm at last*/
 454         pm_runtime_enable(&dev->pdev->dev);
 455         pm_runtime_set_active(&dev->pdev->dev);
 456 #endif
 457         /*Intel drm driver load is done, continue doing pvr load*/
 458         return 0;
 459 out_err:
 460         psb_driver_unload(dev);
 461         return ret;
 462 }
 463
 464 int psb_driver_device_is_agp(struct drm_device *dev)
 465 {
 466         return 0;
 467 }
 468
 469
 470 static int psb_sizes_ioctl(struct drm_device *dev, void *data,
 471                            struct drm_file *file_priv)
 472 {
 473         struct drm_psb_private *dev_priv = psb_priv(dev);
 474         struct drm_psb_sizes_arg *arg =
 475                 (struct drm_psb_sizes_arg *) data;
 476
 477         *arg = dev_priv->sizes;
 478         return 0;
 479 }
 480
 481 static int psb_dc_state_ioctl(struct drm_device *dev, void * data,
 482                                 struct drm_file *file_priv)
 483 {
 484         uint32_t flags;
 485         uint32_t obj_id;
 486         struct drm_mode_object *obj;
 487         struct drm_connector *connector;
 488         struct drm_crtc *crtc;
 489         struct drm_psb_dc_state_arg *arg =
 490                 (struct drm_psb_dc_state_arg *)data;
 491
 492
 493         /* Double check MRST case */
 494         if (IS_MRST(dev) || IS_MFLD(dev))
 495                 return -EOPNOTSUPP;
 496
 497         flags = arg->flags;
 498         obj_id = arg->obj_id;
 499
 500         if (flags & PSB_DC_CRTC_MASK) {
 501                 obj = drm_mode_object_find(dev, obj_id,
 502                                 DRM_MODE_OBJECT_CRTC);
 503                 if (!obj) {
 504                         dev_dbg(dev->dev, "Invalid CRTC object.\n");
 505                         return -EINVAL;
 506                 }
 507
 508                 crtc = obj_to_crtc(obj);
 509
 510                 mutex_lock(&dev->mode_config.mutex);
 511                 if (drm_helper_crtc_in_use(crtc)) {
 512                         if (flags & PSB_DC_CRTC_SAVE)
 513                                 crtc->funcs->save(crtc);
 514                         else
 515                                 crtc->funcs->restore(crtc);
 516                 }
 517                 mutex_unlock(&dev->mode_config.mutex);
 518
 519                 return 0;
 520         } else if (flags & PSB_DC_OUTPUT_MASK) {
 521                 obj = drm_mode_object_find(dev, obj_id,
 522                                 DRM_MODE_OBJECT_CONNECTOR);
 523                 if (!obj) {
 524                         dev_dbg(dev->dev, "Invalid connector id.\n");
 525                         return -EINVAL;
 526                 }
 527
 528                 connector = obj_to_connector(obj);
 529                 if (flags & PSB_DC_OUTPUT_SAVE)
 530                         connector->funcs->save(connector);
 531                 else
 532                         connector->funcs->restore(connector);
 533
 534                 return 0;
 535         }
 536         return -EINVAL;
 537 }
 538
 539 static inline void get_brightness(struct backlight_device *bd)
 540 {
 541 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
 542         if (bd) {
 543                 bd->props.brightness = bd->ops->get_brightness(bd);
 544                 backlight_update_status(bd);
 545         }
 546 #endif
 547 }
 548
 549 static int psb_dpst_bl_ioctl(struct drm_device *dev, void *data,
 550                        struct drm_file *file_priv)
 551 {
 552         struct drm_psb_private *dev_priv = psb_priv(dev);
 553         uint32_t *arg = data;
 554
 555         dev_priv->blc_adj2 = *arg;
 556         get_brightness(dev_priv->backlight_device);
 557         return 0;
 558 }
 559
 560 static int psb_adb_ioctl(struct drm_device *dev, void *data,
 561                         struct drm_file *file_priv)
 562 {
 563         struct drm_psb_private *dev_priv = psb_priv(dev);
 564         uint32_t *arg = data;
 565
 566         dev_priv->blc_adj1 = *arg;
 567         get_brightness(dev_priv->backlight_device);
 568         return 0;
 569 }
 570
 571 /* return the current mode to the dpst module */
 572 static int psb_dpst_ioctl(struct drm_device *dev, void *data,
 573                           struct drm_file *file_priv)
 574 {
 575         struct drm_psb_private *dev_priv = psb_priv(dev);
 576         uint32_t *arg = data;
 577         uint32_t x;
 578         uint32_t y;
 579         uint32_t reg;
 580
 581         if (!gma_power_begin(dev, 0))
 582                 return -EIO;
 583
 584         reg = PSB_RVDC32(PIPEASRC);
 585
 586         gma_power_end(dev);
 587
 588         /* horizontal is the left 16 bits */
 589         x = reg >> 16;
 590         /* vertical is the right 16 bits */
 591         y = reg & 0x0000ffff;
 592
 593         /* the values are the image size minus one */
 594         x++;
 595         y++;
 596
 597         *arg = (x << 16) | y;
 598
 599         return 0;
 600 }
 601 static int psb_gamma_ioctl(struct drm_device *dev, void *data,
 602                            struct drm_file *file_priv)
 603 {
 604         struct drm_psb_dpst_lut_arg *lut_arg = data;
 605         struct drm_mode_object *obj;
 606         struct drm_crtc *crtc;
 607         struct drm_connector *connector;
 608         struct psb_intel_crtc *psb_intel_crtc;
 609         int i = 0;
 610         int32_t obj_id;
 611
 612         obj_id = lut_arg->output_id;
 613         obj = drm_mode_object_find(dev, obj_id, DRM_MODE_OBJECT_CONNECTOR);
 614         if (!obj) {
 615                 dev_dbg(dev->dev, "Invalid Connector object.\n");
 616                 return -EINVAL;
 617         }
 618
 619         connector = obj_to_connector(obj);
 620         crtc = connector->encoder->crtc;
 621         psb_intel_crtc = to_psb_intel_crtc(crtc);
 622
 623         for (i = 0; i < 256; i++)
 624                 psb_intel_crtc->lut_adj[i] = lut_arg->lut[i];
 625
 626         psb_intel_crtc_load_lut(crtc);
 627
 628         return 0;
 629 }
 630
 631 static int psb_mode_operation_ioctl(struct drm_device *dev, void *data,
 632                                 struct drm_file *file_priv)
 633 {
 634         uint32_t obj_id;
 635         uint16_t op;
 636         struct drm_mode_modeinfo *umode;
 637         struct drm_display_mode *mode = NULL;
 638         struct drm_psb_mode_operation_arg *arg;
 639         struct drm_mode_object *obj;
 640         struct drm_connector *connector;
 641         struct drm_framebuffer *drm_fb;
 642         struct psb_framebuffer *psb_fb;
 643         struct drm_connector_helper_funcs *connector_funcs;
 644         int ret = 0;
 645         int resp = MODE_OK;
 646         struct drm_psb_private *dev_priv = psb_priv(dev);
 647
 648         arg = (struct drm_psb_mode_operation_arg *)data;
 649         obj_id = arg->obj_id;
 650         op = arg->operation;
 651
 652         switch (op) {
 653         case PSB_MODE_OPERATION_SET_DC_BASE:
 654                 obj = drm_mode_object_find(dev, obj_id, DRM_MODE_OBJECT_FB);
 655                 if (!obj) {
 656                         dev_dbg(dev->dev, "Invalid FB id %d\n", obj_id);
 657                         return -EINVAL;
 658                 }
 659
 660                 drm_fb = obj_to_fb(obj);
 661                 psb_fb = to_psb_fb(drm_fb);
 662
 663                 if (gma_power_begin(dev, 0)) {
 664                         REG_WRITE(DSPASURF, psb_fb->gtt->offset);
 665                         REG_READ(DSPASURF);
 666                         gma_power_end(dev);
 667                 } else {
 668                         dev_priv->saveDSPASURF = psb_fb->gtt->offset;
 669                 }
 670
 671                 return 0;
 672         case PSB_MODE_OPERATION_MODE_VALID:
 673                 umode = &arg->mode;
 674
 675                 mutex_lock(&dev->mode_config.mutex);
 676
 677                 obj = drm_mode_object_find(dev, obj_id,
 678                                         DRM_MODE_OBJECT_CONNECTOR);
 679                 if (!obj) {
 680                         ret = -EINVAL;
 681                         goto mode_op_out;
 682                 }
 683
 684                 connector = obj_to_connector(obj);
 685
 686                 mode = drm_mode_create(dev);
 687                 if (!mode) {
 688                         ret = -ENOMEM;
 689                         goto mode_op_out;
 690                 }
 691
 692                 /* drm_crtc_convert_umode(mode, umode); */
 693                 {
 694                         mode->clock = umode->clock;
 695                         mode->hdisplay = umode->hdisplay;
 696                         mode->hsync_start = umode->hsync_start;
 697                         mode->hsync_end = umode->hsync_end;
 698                         mode->htotal = umode->htotal;
 699                         mode->hskew = umode->hskew;
 700                         mode->vdisplay = umode->vdisplay;
 701                         mode->vsync_start = umode->vsync_start;
 702                         mode->vsync_end = umode->vsync_end;
 703                         mode->vtotal = umode->vtotal;
 704                         mode->vscan = umode->vscan;
 705                         mode->vrefresh = umode->vrefresh;
 706                         mode->flags = umode->flags;
 707                         mode->type = umode->type;
 708                         strncpy(mode->name, umode->name, DRM_DISPLAY_MODE_LEN);
 709                         mode->name[DRM_DISPLAY_MODE_LEN-1] = 0;
 710                 }
 711
 712                 connector_funcs = (struct drm_connector_helper_funcs *)
 713                                    connector->helper_private;
 714
 715                 if (connector_funcs->mode_valid) {
 716                         resp = connector_funcs->mode_valid(connector, mode);
 717                         arg->data = (void *)resp;
 718                 }
 719
 720                 /*do some clean up work*/
 721                 if (mode)
 722                         drm_mode_destroy(dev, mode);
 723 mode_op_out:
 724                 mutex_unlock(&dev->mode_config.mutex);
 725                 return ret;
 726
 727         default:
 728                 dev_dbg(dev->dev, "Unsupported psb mode operation\n");
 729                 return -EOPNOTSUPP;
 730         }
 731
 732         return 0;
 733 }
 734
 735 static int psb_stolen_memory_ioctl(struct drm_device *dev, void *data,
 736                                    struct drm_file *file_priv)
 737 {
 738         struct drm_psb_private *dev_priv = psb_priv(dev);
 739         struct drm_psb_stolen_memory_arg *arg = data;
 740
 741         arg->base = dev_priv->stolen_base;
 742         arg->size = dev_priv->vram_stolen_size;
 743
 744         return 0;
 745 }
 746
 747 /* FIXME: needs Medfield changes */
 748 static int psb_register_rw_ioctl(struct drm_device *dev, void *data,
 749                                  struct drm_file *file_priv)
 750 {
 751         struct drm_psb_private *dev_priv = psb_priv(dev);
 752         struct drm_psb_register_rw_arg *arg = data;
 753         bool usage = arg->b_force_hw_on ? true : false;
 754
 755         if (arg->display_write_mask != 0) {
 756                 if (gma_power_begin(dev, usage)) {
 757                         if (arg->display_write_mask & REGRWBITS_PFIT_CONTROLS)
 758                                 PSB_WVDC32(arg->display.pfit_controls,
 759                                            PFIT_CONTROL);
 760                         if (arg->display_write_mask &
 761                             REGRWBITS_PFIT_AUTOSCALE_RATIOS)
 762                                 PSB_WVDC32(arg->display.pfit_autoscale_ratios,
 763                                            PFIT_AUTO_RATIOS);
 764                         if (arg->display_write_mask &
 765                             REGRWBITS_PFIT_PROGRAMMED_SCALE_RATIOS)
 766                                 PSB_WVDC32(
 767                                    arg->display.pfit_programmed_scale_ratios,
 768                                    PFIT_PGM_RATIOS);
 769                         if (arg->display_write_mask & REGRWBITS_PIPEASRC)
 770                                 PSB_WVDC32(arg->display.pipeasrc,
 771                                            PIPEASRC);
 772                         if (arg->display_write_mask & REGRWBITS_PIPEBSRC)
 773                                 PSB_WVDC32(arg->display.pipebsrc,
 774                                            PIPEBSRC);
 775                         if (arg->display_write_mask & REGRWBITS_VTOTAL_A)
 776                                 PSB_WVDC32(arg->display.vtotal_a,
 777                                            VTOTAL_A);
 778                         if (arg->display_write_mask & REGRWBITS_VTOTAL_B)
 779                                 PSB_WVDC32(arg->display.vtotal_b,
 780                                            VTOTAL_B);
 781                         gma_power_end(dev);
 782                 } else {
 783                         if (arg->display_write_mask & REGRWBITS_PFIT_CONTROLS)
 784                                 dev_priv->savePFIT_CONTROL =
 785                                                 arg->display.pfit_controls;
 786                         if (arg->display_write_mask &
 787                             REGRWBITS_PFIT_AUTOSCALE_RATIOS)
 788                                 dev_priv->savePFIT_AUTO_RATIOS =
 789                                         arg->display.pfit_autoscale_ratios;
 790                         if (arg->display_write_mask &
 791                             REGRWBITS_PFIT_PROGRAMMED_SCALE_RATIOS)
 792                                 dev_priv->savePFIT_PGM_RATIOS =
 793                                    arg->display.pfit_programmed_scale_ratios;
 794                         if (arg->display_write_mask & REGRWBITS_PIPEASRC)
 795                                 dev_priv->savePIPEASRC = arg->display.pipeasrc;
 796                         if (arg->display_write_mask & REGRWBITS_PIPEBSRC)
 797                                 dev_priv->savePIPEBSRC = arg->display.pipebsrc;
 798                         if (arg->display_write_mask & REGRWBITS_VTOTAL_A)
 799                                 dev_priv->saveVTOTAL_A = arg->display.vtotal_a;
 800                         if (arg->display_write_mask & REGRWBITS_VTOTAL_B)
 801                                 dev_priv->saveVTOTAL_B = arg->display.vtotal_b;
 802                 }
 803         }
 804
 805         if (arg->display_read_mask != 0) {
 806                 if (gma_power_begin(dev, usage)) {
 807                         if (arg->display_read_mask &
 808                             REGRWBITS_PFIT_CONTROLS)
 809                                 arg->display.pfit_controls =
 810                                                 PSB_RVDC32(PFIT_CONTROL);
 811                         if (arg->display_read_mask &
 812                             REGRWBITS_PFIT_AUTOSCALE_RATIOS)
 813                                 arg->display.pfit_autoscale_ratios =
 814                                                 PSB_RVDC32(PFIT_AUTO_RATIOS);
 815                         if (arg->display_read_mask &
 816                             REGRWBITS_PFIT_PROGRAMMED_SCALE_RATIOS)
 817                                 arg->display.pfit_programmed_scale_ratios =
 818                                                 PSB_RVDC32(PFIT_PGM_RATIOS);
 819                         if (arg->display_read_mask & REGRWBITS_PIPEASRC)
 820                                 arg->display.pipeasrc = PSB_RVDC32(PIPEASRC);
 821                         if (arg->display_read_mask & REGRWBITS_PIPEBSRC)
 822                                 arg->display.pipebsrc = PSB_RVDC32(PIPEBSRC);
 823                         if (arg->display_read_mask & REGRWBITS_VTOTAL_A)
 824                                 arg->display.vtotal_a = PSB_RVDC32(VTOTAL_A);
 825                         if (arg->display_read_mask & REGRWBITS_VTOTAL_B)
 826                                 arg->display.vtotal_b = PSB_RVDC32(VTOTAL_B);
 827                         gma_power_end(dev);
 828                 } else {
 829                         if (arg->display_read_mask &
 830                             REGRWBITS_PFIT_CONTROLS)
 831                                 arg->display.pfit_controls =
 832                                                 dev_priv->savePFIT_CONTROL;
 833                         if (arg->display_read_mask &
 834                             REGRWBITS_PFIT_AUTOSCALE_RATIOS)
 835                                 arg->display.pfit_autoscale_ratios =
 836                                                 dev_priv->savePFIT_AUTO_RATIOS;
 837                         if (arg->display_read_mask &
 838                             REGRWBITS_PFIT_PROGRAMMED_SCALE_RATIOS)
 839                                 arg->display.pfit_programmed_scale_ratios =
 840                                                 dev_priv->savePFIT_PGM_RATIOS;
 841                         if (arg->display_read_mask & REGRWBITS_PIPEASRC)
 842                                 arg->display.pipeasrc = dev_priv->savePIPEASRC;
 843                         if (arg->display_read_mask & REGRWBITS_PIPEBSRC)
 844                                 arg->display.pipebsrc = dev_priv->savePIPEBSRC;
 845                         if (arg->display_read_mask & REGRWBITS_VTOTAL_A)
 846                                 arg->display.vtotal_a = dev_priv->saveVTOTAL_A;
 847                         if (arg->display_read_mask & REGRWBITS_VTOTAL_B)
 848                                 arg->display.vtotal_b = dev_priv->saveVTOTAL_B;
 849                 }
 850         }
 851
 852         if (arg->overlay_write_mask != 0) {
 853                 if (gma_power_begin(dev, usage)) {
 854                         if (arg->overlay_write_mask & OV_REGRWBITS_OGAM_ALL) {
 855                                 PSB_WVDC32(arg->overlay.OGAMC5, OV_OGAMC5);
 856                                 PSB_WVDC32(arg->overlay.OGAMC4, OV_OGAMC4);
 857                                 PSB_WVDC32(arg->overlay.OGAMC3, OV_OGAMC3);
 858                                 PSB_WVDC32(arg->overlay.OGAMC2, OV_OGAMC2);
 859                                 PSB_WVDC32(arg->overlay.OGAMC1, OV_OGAMC1);
 860                                 PSB_WVDC32(arg->overlay.OGAMC0, OV_OGAMC0);
 861                         }
 862                         if (arg->overlay_write_mask & OVC_REGRWBITS_OGAM_ALL) {
 863                                 PSB_WVDC32(arg->overlay.OGAMC5, OVC_OGAMC5);
 864                                 PSB_WVDC32(arg->overlay.OGAMC4, OVC_OGAMC4);
 865                                 PSB_WVDC32(arg->overlay.OGAMC3, OVC_OGAMC3);
 866                                 PSB_WVDC32(arg->overlay.OGAMC2, OVC_OGAMC2);
 867                                 PSB_WVDC32(arg->overlay.OGAMC1, OVC_OGAMC1);
 868                                 PSB_WVDC32(arg->overlay.OGAMC0, OVC_OGAMC0);
 869                         }
 870
 871                         if (arg->overlay_write_mask & OV_REGRWBITS_OVADD) {
 872                                 PSB_WVDC32(arg->overlay.OVADD, OV_OVADD);
 873
 874                                 if (arg->overlay.b_wait_vblank) {
 875                                         /* Wait for 20ms.*/
 876                                         unsigned long vblank_timeout = jiffies
 877                                                                 + HZ/50;
 878                                         uint32_t temp;
 879                                         while (time_before_eq(jiffies,
 880                                                         vblank_timeout)) {
 881                                                 temp = PSB_RVDC32(OV_DOVASTA);
 882                                                 if ((temp & (0x1 << 31)) != 0)
 883                                                         break;
 884                                                 cpu_relax();
 885                                         }
 886                                 }
 887                         }
 888                         if (arg->overlay_write_mask & OVC_REGRWBITS_OVADD) {
 889                                 PSB_WVDC32(arg->overlay.OVADD, OVC_OVADD);
 890                                 if (arg->overlay.b_wait_vblank) {
 891                                         /* Wait for 20ms.*/
 892                                         unsigned long vblank_timeout =
 893                                                         jiffies + HZ/50;
 894                                         uint32_t temp;
 895                                         while (time_before_eq(jiffies,
 896                                                         vblank_timeout)) {
 897                                                 temp = PSB_RVDC32(OVC_DOVCSTA);
 898                                                 if ((temp & (0x1 << 31)) != 0)
 899                                                         break;
 900                                                 cpu_relax();
 901                                         }
 902                                 }
 903                         }
 904                         gma_power_end(dev);
 905                 } else {
 906                         if (arg->overlay_write_mask & OV_REGRWBITS_OGAM_ALL) {
 907                                 dev_priv->saveOV_OGAMC5 = arg->overlay.OGAMC5;
 908                                 dev_priv->saveOV_OGAMC4 = arg->overlay.OGAMC4;
 909                                 dev_priv->saveOV_OGAMC3 = arg->overlay.OGAMC3;
 910                                 dev_priv->saveOV_OGAMC2 = arg->overlay.OGAMC2;
 911                                 dev_priv->saveOV_OGAMC1 = arg->overlay.OGAMC1;
 912                                 dev_priv->saveOV_OGAMC0 = arg->overlay.OGAMC0;
 913                         }
 914                         if (arg->overlay_write_mask & OVC_REGRWBITS_OGAM_ALL) {
 915                                 dev_priv->saveOVC_OGAMC5 = arg->overlay.OGAMC5;
 916                                 dev_priv->saveOVC_OGAMC4 = arg->overlay.OGAMC4;
 917                                 dev_priv->saveOVC_OGAMC3 = arg->overlay.OGAMC3;
 918                                 dev_priv->saveOVC_OGAMC2 = arg->overlay.OGAMC2;
 919                                 dev_priv->saveOVC_OGAMC1 = arg->overlay.OGAMC1;
 920                                 dev_priv->saveOVC_OGAMC0 = arg->overlay.OGAMC0;
 921                         }
 922                         if (arg->overlay_write_mask & OV_REGRWBITS_OVADD)
 923                                 dev_priv->saveOV_OVADD = arg->overlay.OVADD;
 924                         if (arg->overlay_write_mask & OVC_REGRWBITS_OVADD)
 925                                 dev_priv->saveOVC_OVADD = arg->overlay.OVADD;
 926                 }
 927         }
 928
 929         if (arg->overlay_read_mask != 0) {
 930                 if (gma_power_begin(dev, usage)) {
 931                         if (arg->overlay_read_mask & OV_REGRWBITS_OGAM_ALL) {
 932                                 arg->overlay.OGAMC5 = PSB_RVDC32(OV_OGAMC5);
 933                                 arg->overlay.OGAMC4 = PSB_RVDC32(OV_OGAMC4);
 934                                 arg->overlay.OGAMC3 = PSB_RVDC32(OV_OGAMC3);
 935                                 arg->overlay.OGAMC2 = PSB_RVDC32(OV_OGAMC2);
 936                                 arg->overlay.OGAMC1 = PSB_RVDC32(OV_OGAMC1);
 937                                 arg->overlay.OGAMC0 = PSB_RVDC32(OV_OGAMC0);
 938                         }
 939                         if (arg->overlay_read_mask & OVC_REGRWBITS_OGAM_ALL) {
 940                                 arg->overlay.OGAMC5 = PSB_RVDC32(OVC_OGAMC5);
 941                                 arg->overlay.OGAMC4 = PSB_RVDC32(OVC_OGAMC4);
 942                                 arg->overlay.OGAMC3 = PSB_RVDC32(OVC_OGAMC3);
 943                                 arg->overlay.OGAMC2 = PSB_RVDC32(OVC_OGAMC2);
 944                                 arg->overlay.OGAMC1 = PSB_RVDC32(OVC_OGAMC1);
 945                                 arg->overlay.OGAMC0 = PSB_RVDC32(OVC_OGAMC0);
 946                         }
 947                         if (arg->overlay_read_mask & OV_REGRWBITS_OVADD)
 948                                 arg->overlay.OVADD = PSB_RVDC32(OV_OVADD);
 949                         if (arg->overlay_read_mask & OVC_REGRWBITS_OVADD)
 950                                 arg->overlay.OVADD = PSB_RVDC32(OVC_OVADD);
 951                         gma_power_end(dev);
 952                 } else {
 953                         if (arg->overlay_read_mask & OV_REGRWBITS_OGAM_ALL) {
 954                                 arg->overlay.OGAMC5 = dev_priv->saveOV_OGAMC5;
 955                                 arg->overlay.OGAMC4 = dev_priv->saveOV_OGAMC4;
 956                                 arg->overlay.OGAMC3 = dev_priv->saveOV_OGAMC3;
 957                                 arg->overlay.OGAMC2 = dev_priv->saveOV_OGAMC2;
 958                                 arg->overlay.OGAMC1 = dev_priv->saveOV_OGAMC1;
 959                                 arg->overlay.OGAMC0 = dev_priv->saveOV_OGAMC0;
 960                         }
 961                         if (arg->overlay_read_mask & OVC_REGRWBITS_OGAM_ALL) {
 962                                 arg->overlay.OGAMC5 = dev_priv->saveOVC_OGAMC5;
 963                                 arg->overlay.OGAMC4 = dev_priv->saveOVC_OGAMC4;
 964                                 arg->overlay.OGAMC3 = dev_priv->saveOVC_OGAMC3;
 965                                 arg->overlay.OGAMC2 = dev_priv->saveOVC_OGAMC2;
 966                                 arg->overlay.OGAMC1 = dev_priv->saveOVC_OGAMC1;
 967                                 arg->overlay.OGAMC0 = dev_priv->saveOVC_OGAMC0;
 968                         }
 969                         if (arg->overlay_read_mask & OV_REGRWBITS_OVADD)
 970                                 arg->overlay.OVADD = dev_priv->saveOV_OVADD;
 971                         if (arg->overlay_read_mask & OVC_REGRWBITS_OVADD)
 972                                 arg->overlay.OVADD = dev_priv->saveOVC_OVADD;
 973                 }
 974         }
 975
 976         if (arg->sprite_enable_mask != 0) {
 977                 if (gma_power_begin(dev, usage)) {
 978                         PSB_WVDC32(0x1F3E, DSPARB);
 979                         PSB_WVDC32(arg->sprite.dspa_control
 980                                         | PSB_RVDC32(DSPACNTR), DSPACNTR);
 981                         PSB_WVDC32(arg->sprite.dspa_key_value, DSPAKEYVAL);
 982                         PSB_WVDC32(arg->sprite.dspa_key_mask, DSPAKEYMASK);
 983                         PSB_WVDC32(PSB_RVDC32(DSPASURF), DSPASURF);
 984                         PSB_RVDC32(DSPASURF);
 985                         PSB_WVDC32(arg->sprite.dspc_control, DSPCCNTR);
 986                         PSB_WVDC32(arg->sprite.dspc_stride, DSPCSTRIDE);
 987                         PSB_WVDC32(arg->sprite.dspc_position, DSPCPOS);
 988                         PSB_WVDC32(arg->sprite.dspc_linear_offset, DSPCLINOFF);
 989                         PSB_WVDC32(arg->sprite.dspc_size, DSPCSIZE);
 990                         PSB_WVDC32(arg->sprite.dspc_surface, DSPCSURF);
 991                         PSB_RVDC32(DSPCSURF);
 992                         gma_power_end(dev);
 993                 }
 994         }
 995
 996         if (arg->sprite_disable_mask != 0) {
 997                 if (gma_power_begin(dev, usage)) {
 998                         PSB_WVDC32(0x3F3E, DSPARB);
 999                         PSB_WVDC32(0x0, DSPCCNTR);
1000                         PSB_WVDC32(arg->sprite.dspc_surface, DSPCSURF);
1001                         PSB_RVDC32(DSPCSURF);
1002                         gma_power_end(dev);
1003                 }
1004         }
1005
1006         if (arg->subpicture_enable_mask != 0) {
1007                 if (gma_power_begin(dev, usage)) {
1008                         uint32_t temp;
1009                         if (arg->subpicture_enable_mask & REGRWBITS_DSPACNTR) {
1010                                 temp =  PSB_RVDC32(DSPACNTR);
1011                                 temp &= ~DISPPLANE_PIXFORMAT_MASK;
1012                                 temp &= ~DISPPLANE_BOTTOM;
1013                                 temp |= DISPPLANE_32BPP;
1014                                 PSB_WVDC32(temp, DSPACNTR);
1015
1016                                 temp =  PSB_RVDC32(DSPABASE);
1017                                 PSB_WVDC32(temp, DSPABASE);
1018                                 PSB_RVDC32(DSPABASE);
1019                                 temp =  PSB_RVDC32(DSPASURF);
1020                                 PSB_WVDC32(temp, DSPASURF);
1021                                 PSB_RVDC32(DSPASURF);
1022                         }
1023                         if (arg->subpicture_enable_mask & REGRWBITS_DSPBCNTR) {
1024                                 temp =  PSB_RVDC32(DSPBCNTR);
1025                                 temp &= ~DISPPLANE_PIXFORMAT_MASK;
1026                                 temp &= ~DISPPLANE_BOTTOM;
1027                                 temp |= DISPPLANE_32BPP;
1028                                 PSB_WVDC32(temp, DSPBCNTR);
1029
1030                                 temp =  PSB_RVDC32(DSPBBASE);
1031                                 PSB_WVDC32(temp, DSPBBASE);
1032                                 PSB_RVDC32(DSPBBASE);
1033                                 temp =  PSB_RVDC32(DSPBSURF);
1034                                 PSB_WVDC32(temp, DSPBSURF);
1035                                 PSB_RVDC32(DSPBSURF);
1036                         }
1037                         if (arg->subpicture_enable_mask & REGRWBITS_DSPCCNTR) {
1038                                 temp =  PSB_RVDC32(DSPCCNTR);
1039                                 temp &= ~DISPPLANE_PIXFORMAT_MASK;
1040                                 temp &= ~DISPPLANE_BOTTOM;
1041                                 temp |= DISPPLANE_32BPP;
1042                                 PSB_WVDC32(temp, DSPCCNTR);
1043
1044                                 temp =  PSB_RVDC32(DSPCBASE);
1045                                 PSB_WVDC32(temp, DSPCBASE);
1046                                 PSB_RVDC32(DSPCBASE);
1047                                 temp =  PSB_RVDC32(DSPCSURF);
1048                                 PSB_WVDC32(temp, DSPCSURF);
1049                                 PSB_RVDC32(DSPCSURF);
1050                         }
1051                         gma_power_end(dev);
1052                 }
1053         }
1054
1055         if (arg->subpicture_disable_mask != 0) {
1056                 if (gma_power_begin(dev, usage)) {
1057                         uint32_t temp;
1058                         if (arg->subpicture_disable_mask & REGRWBITS_DSPACNTR) {
1059                                 temp =  PSB_RVDC32(DSPACNTR);
1060                                 temp &= ~DISPPLANE_PIXFORMAT_MASK;
1061                                 temp |= DISPPLANE_32BPP_NO_ALPHA;
1062                                 PSB_WVDC32(temp, DSPACNTR);
1063
1064                                 temp =  PSB_RVDC32(DSPABASE);
1065                                 PSB_WVDC32(temp, DSPABASE);
1066                                 PSB_RVDC32(DSPABASE);
1067                                 temp =  PSB_RVDC32(DSPASURF);
1068                                 PSB_WVDC32(temp, DSPASURF);
1069                                 PSB_RVDC32(DSPASURF);
1070                         }
1071                         if (arg->subpicture_disable_mask & REGRWBITS_DSPBCNTR) {
1072                                 temp =  PSB_RVDC32(DSPBCNTR);
1073                                 temp &= ~DISPPLANE_PIXFORMAT_MASK;
1074                                 temp |= DISPPLANE_32BPP_NO_ALPHA;
1075                                 PSB_WVDC32(temp, DSPBCNTR);
1076
1077                                 temp =  PSB_RVDC32(DSPBBASE);
1078                                 PSB_WVDC32(temp, DSPBBASE);
1079                                 PSB_RVDC32(DSPBBASE);
1080                                 temp =  PSB_RVDC32(DSPBSURF);
1081                                 PSB_WVDC32(temp, DSPBSURF);
1082                                 PSB_RVDC32(DSPBSURF);
1083                         }
1084                         if (arg->subpicture_disable_mask & REGRWBITS_DSPCCNTR) {
1085                                 temp =  PSB_RVDC32(DSPCCNTR);
1086                                 temp &= ~DISPPLANE_PIXFORMAT_MASK;
1087                                 temp |= DISPPLANE_32BPP_NO_ALPHA;
1088                                 PSB_WVDC32(temp, DSPCCNTR);
1089
1090                                 temp =  PSB_RVDC32(DSPCBASE);
1091                                 PSB_WVDC32(temp, DSPCBASE);
1092                                 PSB_RVDC32(DSPCBASE);
1093                                 temp =  PSB_RVDC32(DSPCSURF);
1094                                 PSB_WVDC32(temp, DSPCSURF);
1095                                 PSB_RVDC32(DSPCSURF);
1096                         }
1097                         gma_power_end(dev);
1098                 }
1099         }
1100
1101         return 0;
1102 }
1103
1104 static int psb_driver_open(struct drm_device *dev, struct drm_file *priv)
1105 {
1106         return 0;
1107 }
1108
1109 static void psb_driver_close(struct drm_device *dev, struct drm_file *priv)
1110 {
1111 }
1112
1113 static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
1114                                unsigned long arg)
1115 {
1116         struct drm_file *file_priv = filp->private_data;
1117         struct drm_device *dev = file_priv->minor->dev;
1118         struct drm_psb_private *dev_priv = dev->dev_private;
1119         static unsigned int runtime_allowed;
1120
1121         if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
1122                 runtime_allowed++;
1123                 pm_runtime_allow(&dev->pdev->dev);
1124                 dev_priv->rpm_enabled = 1;
1125         }
1126         return drm_ioctl(filp, cmd, arg);
1127         /* FIXME: do we need to wrap the other side of this */
1128 }
1129
1130
1131 /* When a client dies:
1132  *    - Check for and clean up flipped page state
1133  */
1134 void psb_driver_preclose(struct drm_device *dev, struct drm_file *priv)
1135 {
1136 }
1137
1138 static void psb_remove(struct pci_dev *pdev)
1139 {
1140         struct drm_device *dev = pci_get_drvdata(pdev);
1141         drm_put_dev(dev);
1142 }
1143
1144 static const struct dev_pm_ops psb_pm_ops = {
1145         .resume = gma_power_resume,
1146         .suspend = gma_power_suspend,
1147         .runtime_suspend = psb_runtime_suspend,
1148         .runtime_resume = psb_runtime_resume,
1149         .runtime_idle = psb_runtime_idle,
1150 };
1151
1152 static struct vm_operations_struct psb_gem_vm_ops = {
1153         .fault = psb_gem_fault,
1154         .open = drm_gem_vm_open,
1155         .close = drm_gem_vm_close,
1156 };
1157
1158 static struct drm_driver driver = {
1159         .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \
1160                            DRIVER_IRQ_VBL | DRIVER_MODESET | DRIVER_GEM ,
1161         .load = psb_driver_load,
1162         .unload = psb_driver_unload,
1163
1164         .ioctls = psb_ioctls,
1165         .num_ioctls = DRM_ARRAY_SIZE(psb_ioctls),
1166         .device_is_agp = psb_driver_device_is_agp,
1167         .irq_preinstall = psb_irq_preinstall,
1168         .irq_postinstall = psb_irq_postinstall,
1169         .irq_uninstall = psb_irq_uninstall,
1170         .irq_handler = psb_irq_handler,
1171         .enable_vblank = psb_enable_vblank,
1172         .disable_vblank = psb_disable_vblank,
1173         .get_vblank_counter = psb_get_vblank_counter,
1174         .lastclose = psb_lastclose,
1175         .open = psb_driver_open,
1176         .preclose = psb_driver_preclose,
1177         .postclose = psb_driver_close,
1178         .reclaim_buffers = drm_core_reclaim_buffers,
1179
1180         .gem_init_object = psb_gem_init_object,
1181         .gem_free_object = psb_gem_free_object,
1182         .gem_vm_ops = &psb_gem_vm_ops,
1183         .dumb_create = psb_gem_dumb_create,
1184         .dumb_map_offset = psb_gem_dumb_map_gtt,
1185         .dumb_destroy = psb_gem_dumb_destroy,
1186
1187         .fops = {
1188                  .owner = THIS_MODULE,
1189                  .open = drm_open,
1190                  .release = drm_release,
1191                  .unlocked_ioctl = psb_unlocked_ioctl,
1192                  .mmap = drm_gem_mmap,
1193                  .poll = drm_poll,
1194                  .fasync = drm_fasync,
1195                  .read = drm_read,
1196          },
1197         .name = DRIVER_NAME,
1198         .desc = DRIVER_DESC,
1199         .date = PSB_DRM_DRIVER_DATE,
1200         .major = PSB_DRM_DRIVER_MAJOR,
1201         .minor = PSB_DRM_DRIVER_MINOR,
1202         .patchlevel = PSB_DRM_DRIVER_PATCHLEVEL
1203 };
1204
1205 static struct pci_driver psb_pci_driver = {
1206         .name = DRIVER_NAME,
1207         .id_table = pciidlist,
1208         .probe = psb_probe,
1209         .remove = psb_remove,
1210         .driver.pm = &psb_pm_ops,
1211 };
1212
1213 static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1214 {
1215         /* MLD Added this from Inaky's patch */
1216         if (pci_enable_msi(pdev))
1217                 dev_warn(&pdev->dev, "Enable MSI failed!\n");
1218         return drm_get_pci_dev(pdev, ent, &driver);
1219 }
1220
1221 static int __init psb_init(void)
1222 {
1223         return drm_pci_init(&driver, &psb_pci_driver);
1224 }
1225
1226 static void __exit psb_exit(void)
1227 {
1228         drm_pci_exit(&driver, &psb_pci_driver);
1229 }
1230
1231 late_initcall(psb_init);
1232 module_exit(psb_exit);
1233
1234 MODULE_AUTHOR("Alan Cox <alan@linux.intel.com> and others");
1235 MODULE_DESCRIPTION(DRIVER_DESC);
1236 MODULE_LICENSE("GPL");