1 /* Copyright (C) 2003-2005 SBE, Inc.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation; either version 2 of the License, or
6 * (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16 #include <linux/slab.h>
18 #include <asm/byteorder.h>
19 #include <linux/netdevice.h>
20 #include <linux/delay.h>
21 #include <linux/hdlc.h>
22 #include "pmcc4_sysdep.h"
23 #include "sbecom_inline_linux.h"
28 #ifdef SBE_INCLUDE_SYMBOLS
34 #if defined(CONFIG_SBE_HDLC_V7) || defined(CONFIG_SBE_WAN256T3_HDLC_V7) || \
35 defined(CONFIG_SBE_HDLC_V7_MODULE) || defined(CONFIG_SBE_WAN256T3_HDLC_V7_MODULE)
42 #define V7(x) (x ## _v7)
43 extern int hdlc_netif_rx_v7 (hdlc_device *, struct sk_buff *);
44 extern int register_hdlc_device_v7 (hdlc_device *);
45 extern int unregister_hdlc_device_v7 (hdlc_device *);
52 #ifndef USE_MAX_INT_DELAY
58 extern int drvr_state;
63 pci_read_32 (u_int32_t *p)
70 if (log_level >= LOG_DEBUG)
71 printk ("pci_read : %x = %x\n", (u_int32_t) p, v);
74 FLUSH_PCI_READ (); /* */
75 return le32_to_cpu (*p);
80 pci_write_32 (u_int32_t *p, u_int32_t v)
83 if (log_level >= LOG_DEBUG)
84 printk ("pci_write: %x = %x\n", (u_int32_t) p, v);
87 FLUSH_PCI_WRITE (); /* This routine is called from routines
88 * which do multiple register writes
89 * which themselves need flushing between
90 * writes in order to guarantee write
91 * ordering. It is less code-cumbersome
92 * to flush here-in then to investigate
93 * and code the many other register
94 * writing routines. */
100 pci_flush_write (ci_t * ci)
102 volatile u_int32_t v;
104 /* issue a PCI read to flush PCI write thru bridge */
105 v = *(u_int32_t *) &ci->reg->glcd; /* any address would do */
108 * return nothing, this just reads PCI bridge interface to flush
109 * previously written data
115 watchdog_func (unsigned long arg)
117 struct watchdog *wd = (void *) arg;
119 if (drvr_state != SBE_DRVR_AVAILABLE)
121 if (log_level >= LOG_MONITOR)
122 pr_warning("%s: drvr not available (%x)\n", __func__, drvr_state);
125 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
126 /* Initialize the tq entry only the first time */
130 wd->tq.routine = wd->func;
132 wd->tq.data = wd->softc;
134 schedule_task (&wd->tq);
136 schedule_work (&wd->work);
138 mod_timer (&wd->h, jiffies + wd->ticks);
141 int OS_init_watchdog(struct watchdog *wdp, void (*f) (void *), void *c, int usec)
145 wdp->ticks = (HZ) * (usec / 1000) / 1000;
146 INIT_WORK(&wdp->work, (void *)f);
147 init_timer (&wdp->h);
149 ci_t *ci = (ci_t *) c;
151 wdp->h.data = (unsigned long) &ci->wd;
153 wdp->h.function = watchdog_func;
158 OS_uwait (int usec, char *description)
164 mdelay (usec / 1000);
165 /* now delay residual */
166 tmp = (usec / 1000) * 1000; /* round */
167 tmp = usec - tmp; /* residual */
169 { /* wait on residual */
178 /* dummy short delay routine called as a subroutine so that compiler
179 * does not optimize/remove its intent (a short delay)
183 OS_uwait_dummy (void)
185 #ifndef USE_MAX_INT_DELAY
194 OS_sem_init (void *sem, int state)
199 init_MUTEX_LOCKED ((struct semaphore *) sem);
202 init_MUTEX ((struct semaphore *) sem);
204 default: /* otherwise, set sem.count to state's
206 sema_init (sem, state);
213 sd_line_is_ok (void *user)
215 struct net_device *ndev = (struct net_device *) user;
217 return (netif_carrier_ok (ndev));
221 sd_line_is_up (void *user)
223 struct net_device *ndev = (struct net_device *) user;
225 netif_carrier_on (ndev);
230 sd_line_is_down (void *user)
232 struct net_device *ndev = (struct net_device *) user;
234 netif_carrier_off (ndev);
239 sd_disable_xmit (void *user)
241 struct net_device *dev = (struct net_device *) user;
243 netif_stop_queue (dev);
248 sd_enable_xmit (void *user)
250 struct net_device *dev = (struct net_device *) user;
252 netif_wake_queue (dev);
257 sd_queue_stopped (void *user)
259 struct net_device *ndev = (struct net_device *) user;
261 return (netif_queue_stopped (ndev));
264 void sd_recv_consume(void *token, size_t len, void *user)
266 struct net_device *ndev = user;
267 struct sk_buff *skb = token;
271 skb->protocol = hdlc_type_trans(skb, ndev);
277 ** Read some reserved location w/in the COMET chip as a usable
278 ** VMETRO trigger point or other trace marking event.
283 extern ci_t *CI; /* dummy pointer to board ZERO's data */
285 VMETRO_TRACE (void *x)
287 u_int32_t y = (u_int32_t) x;
289 pci_write_32 ((u_int32_t *) &CI->cpldbase->leds, y);
294 VMETRO_TRIGGER (ci_t * ci, int x)
297 volatile u_int32_t data;
299 comet = ci->port[0].cometbase; /* default to COMET # 0 */
305 data = pci_read_32 ((u_int32_t *) &comet->__res24); /* 0x90 */
308 data = pci_read_32 ((u_int32_t *) &comet->__res25); /* 0x94 */
311 data = pci_read_32 ((u_int32_t *) &comet->__res26); /* 0x98 */
314 data = pci_read_32 ((u_int32_t *) &comet->__res27); /* 0x9C */
317 data = pci_read_32 ((u_int32_t *) &comet->__res88); /* 0x220 */
320 data = pci_read_32 ((u_int32_t *) &comet->__res89); /* 0x224 */
323 data = pci_read_32 ((u_int32_t *) &comet->__res8A); /* 0x228 */
326 data = pci_read_32 ((u_int32_t *) &comet->__res8B); /* 0x22C */
329 data = pci_read_32 ((u_int32_t *) &comet->__resA0); /* 0x280 */
332 data = pci_read_32 ((u_int32_t *) &comet->__resA1); /* 0x284 */
335 data = pci_read_32 ((u_int32_t *) &comet->__resA2); /* 0x288 */
338 data = pci_read_32 ((u_int32_t *) &comet->__resA3); /* 0x28C */
341 data = pci_read_32 ((u_int32_t *) &comet->__resA4); /* 0x290 */
344 data = pci_read_32 ((u_int32_t *) &comet->__resA5); /* 0x294 */
347 data = pci_read_32 ((u_int32_t *) &comet->__resA6); /* 0x298 */
350 data = pci_read_32 ((u_int32_t *) &comet->__resA7); /* 0x29C */
353 data = pci_read_32 ((u_int32_t *) &comet->__res74); /* 0x1D0 */
356 data = pci_read_32 ((u_int32_t *) &comet->__res75); /* 0x1D4 */
359 data = pci_read_32 ((u_int32_t *) &comet->__res76); /* 0x1D8 */
362 data = pci_read_32 ((u_int32_t *) &comet->__res77); /* 0x1DC */
368 /*** End-of-File ***/