f2339a5f8ddf3d4c21797204afef1faeb88cb561
[pandora-kernel.git] / drivers / staging / brcm80211 / brcmsmac / main.c
1 /*
2  * Copyright (c) 2010 Broadcom Corporation
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/pci_ids.h>
18 #include <linux/if_ether.h>
19 #include <net/mac80211.h>
20 #include <brcm_hw_ids.h>
21 #include <aiutils.h>
22 #include <chipcommon.h>
23 #include "rate.h"
24 #include "scb.h"
25 #include "phy/phy_hal.h"
26 #include "channel.h"
27 #include "antsel.h"
28 #include "stf.h"
29 #include "ampdu.h"
30 #include "mac80211_if.h"
31 #include "ucode_loader.h"
32 #include "main.h"
33
34 /*
35  * Indication for txflowcontrol that all priority bits in
36  * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
37  */
38 #define ALLPRIO         -1
39
40 /*
41  * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
42  */
43 #define SSID_FMT_BUF_LEN        ((4 * IEEE80211_MAX_SSID_LEN) + 1)
44
45 /* watchdog timer, in unit of ms */
46 #define TIMER_INTERVAL_WATCHDOG 1000
47 /* radio monitor timer, in unit of ms */
48 #define TIMER_INTERVAL_RADIOCHK 800
49
50 /* Max MPC timeout, in unit of watchdog */
51 #ifndef BRCMS_MPC_MAX_DELAYCNT
52 #define BRCMS_MPC_MAX_DELAYCNT  10
53 #endif
54
55 /* Min MPC timeout, in unit of watchdog */
56 #define BRCMS_MPC_MIN_DELAYCNT  1
57 #define BRCMS_MPC_THRESHOLD     3       /* MPC count threshold level */
58
59 /* beacon interval, in unit of 1024TU */
60 #define BEACON_INTERVAL_DEFAULT 100
61 /* DTIM interval, in unit of beacon interval */
62 #define DTIM_INTERVAL_DEFAULT   3
63
64 /* Scale down delays to accommodate QT slow speed */
65 /* beacon interval, in unit of 1024TU */
66 #define BEACON_INTERVAL_DEF_QT  20
67 /* DTIM interval, in unit of beacon interval */
68 #define DTIM_INTERVAL_DEF_QT    1
69
70 #define TBTT_ALIGN_LEEWAY_US    100     /* min leeway before first TBTT in us */
71
72 /* n-mode support capability */
73 /* 2x2 includes both 1x1 & 2x2 devices
74  * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
75  * control it independently
76  */
77 #define WL_11N_2x2                      1
78 #define WL_11N_3x3                      3
79 #define WL_11N_4x4                      4
80
81 /* define 11n feature disable flags */
82 #define WLFEATURE_DISABLE_11N           0x00000001
83 #define WLFEATURE_DISABLE_11N_STBC_TX   0x00000002
84 #define WLFEATURE_DISABLE_11N_STBC_RX   0x00000004
85 #define WLFEATURE_DISABLE_11N_SGI_TX    0x00000008
86 #define WLFEATURE_DISABLE_11N_SGI_RX    0x00000010
87 #define WLFEATURE_DISABLE_11N_AMPDU_TX  0x00000020
88 #define WLFEATURE_DISABLE_11N_AMPDU_RX  0x00000040
89 #define WLFEATURE_DISABLE_11N_GF        0x00000080
90
91 #define EDCF_ACI_MASK                0x60
92 #define EDCF_ACI_SHIFT               5
93 #define EDCF_ECWMIN_MASK             0x0f
94 #define EDCF_ECWMAX_SHIFT            4
95 #define EDCF_AIFSN_MASK              0x0f
96 #define EDCF_AIFSN_MAX               15
97 #define EDCF_ECWMAX_MASK             0xf0
98
99 #define EDCF_AC_BE_TXOP_STA          0x0000
100 #define EDCF_AC_BK_TXOP_STA          0x0000
101 #define EDCF_AC_VO_ACI_STA           0x62
102 #define EDCF_AC_VO_ECW_STA           0x32
103 #define EDCF_AC_VI_ACI_STA           0x42
104 #define EDCF_AC_VI_ECW_STA           0x43
105 #define EDCF_AC_BK_ECW_STA           0xA4
106 #define EDCF_AC_VI_TXOP_STA          0x005e
107 #define EDCF_AC_VO_TXOP_STA          0x002f
108 #define EDCF_AC_BE_ACI_STA           0x03
109 #define EDCF_AC_BE_ECW_STA           0xA4
110 #define EDCF_AC_BK_ACI_STA           0x27
111 #define EDCF_AC_VO_TXOP_AP           0x002f
112
113 #define EDCF_TXOP2USEC(txop)         ((txop) << 5)
114 #define EDCF_ECW2CW(exp)             ((1 << (exp)) - 1)
115
116 #define APHY_SYMBOL_TIME        4
117 #define APHY_PREAMBLE_TIME      16
118 #define APHY_SIGNAL_TIME        4
119 #define APHY_SIFS_TIME          16
120 #define APHY_SERVICE_NBITS      16
121 #define APHY_TAIL_NBITS         6
122 #define BPHY_SIFS_TIME          10
123 #define BPHY_PLCP_SHORT_TIME    96
124
125 #define PREN_PREAMBLE           24
126 #define PREN_MM_EXT             12
127 #define PREN_PREAMBLE_EXT       4
128
129 #define DOT11_MAC_HDR_LEN               24
130 #define DOT11_ACK_LEN           10
131 #define DOT11_BA_LEN            4
132 #define DOT11_OFDM_SIGNAL_EXTENSION     6
133 #define DOT11_MIN_FRAG_LEN              256
134 #define DOT11_RTS_LEN           16
135 #define DOT11_CTS_LEN           10
136 #define DOT11_BA_BITMAP_LEN             128
137 #define DOT11_MIN_BEACON_PERIOD         1
138 #define DOT11_MAX_BEACON_PERIOD         0xFFFF
139 #define DOT11_MAXNUMFRAGS       16
140 #define DOT11_MAX_FRAG_LEN              2346
141
142 #define BPHY_PLCP_TIME          192
143 #define RIFS_11N_TIME           2
144
145 #define WME_VER                 1
146 #define WME_SUBTYPE_PARAM_IE    1
147 #define WME_TYPE                2
148 #define WME_OUI                 "\x00\x50\xf2"
149
150 #define AC_BE                   0
151 #define AC_BK                   1
152 #define AC_VI                   2
153 #define AC_VO                   3
154
155 #define BCN_TMPL_LEN            512     /* length of the BCN template area */
156
157 /* brcms_bss_info flag bit values */
158 #define BRCMS_BSS_HT            0x0020  /* BSS is HT (MIMO) capable */
159
160 /* Flags used in brcms_c_txq_info.stopped */
161 /* per prio flow control bits */
162 #define TXQ_STOP_FOR_PRIOFC_MASK        0x000000FF
163 /* stop txq enqueue for packet drain */
164 #define TXQ_STOP_FOR_PKT_DRAIN          0x00000100
165 /* stop txq enqueue for ampdu flow control */
166 #define TXQ_STOP_FOR_AMPDU_FLOW_CNTRL   0x00000200
167
168 #define BRCMS_HWRXOFF           38      /* chip rx buffer offset */
169
170 /* Find basic rate for a given rate */
171 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
172 {
173         if (is_mcs_rate(rspec))
174                 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
175                        .leg_ofdm];
176         return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
177 }
178
179 static u16 frametype(u32 rspec, u8 mimoframe)
180 {
181         if (is_mcs_rate(rspec))
182                 return mimoframe;
183         return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
184 }
185
186 /* rfdisable delay timer 500 ms, runs of ALP clock */
187 #define RFDISABLE_DEFAULT       10000000
188
189 #define BRCMS_TEMPSENSE_PERIOD          10      /* 10 second timeout */
190
191 /* precedences numbers for wlc queues. These are twice as may levels as
192  * 802.1D priorities.
193  * Odd numbers are used for HI priority traffic at same precedence levels
194  * These constants are used ONLY by wlc_prio2prec_map.  Do not use them
195  * elsewhere.
196  */
197 #define _BRCMS_PREC_NONE                0       /* None = - */
198 #define _BRCMS_PREC_BK          2       /* BK - Background */
199 #define _BRCMS_PREC_BE          4       /* BE - Best-effort */
200 #define _BRCMS_PREC_EE          6       /* EE - Excellent-effort */
201 #define _BRCMS_PREC_CL          8       /* CL - Controlled Load */
202 #define _BRCMS_PREC_VI          10      /* Vi - Video */
203 #define _BRCMS_PREC_VO          12      /* Vo - Voice */
204 #define _BRCMS_PREC_NC          14      /* NC - Network Control */
205
206 /* The BSS is generating beacons in HW */
207 #define BRCMS_BSSCFG_HW_BCN     0x20
208
209 #define SYNTHPU_DLY_APHY_US     3700    /* a phy synthpu_dly time in us */
210 #define SYNTHPU_DLY_BPHY_US     1050    /* b/g phy synthpu_dly time in us */
211 #define SYNTHPU_DLY_NPHY_US     2048    /* n phy REV3 synthpu_dly time in us */
212 #define SYNTHPU_DLY_LPPHY_US    300     /* lpphy synthpu_dly time in us */
213
214 #define SYNTHPU_DLY_PHY_US_QT   100     /* QT synthpu_dly time in us */
215
216 #define ANTCNT                  10      /* vanilla M_MAX_ANTCNT value */
217
218 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
219 #define EDCF_SHORT_S            0
220 #define EDCF_SFB_S              4
221 #define EDCF_LONG_S             8
222 #define EDCF_LFB_S              12
223 #define EDCF_SHORT_M            BITFIELD_MASK(4)
224 #define EDCF_SFB_M              BITFIELD_MASK(4)
225 #define EDCF_LONG_M             BITFIELD_MASK(4)
226 #define EDCF_LFB_M              BITFIELD_MASK(4)
227
228 #define RETRY_SHORT_DEF                 7       /* Default Short retry Limit */
229 #define RETRY_SHORT_MAX                 255     /* Maximum Short retry Limit */
230 #define RETRY_LONG_DEF                  4       /* Default Long retry count */
231 #define RETRY_SHORT_FB                  3 /* Short count for fallback rate */
232 #define RETRY_LONG_FB                   2 /* Long count for fallback rate */
233
234 #define APHY_CWMIN              15
235 #define PHY_CWMAX               1023
236
237 #define EDCF_AIFSN_MIN               1
238
239 #define FRAGNUM_MASK            0xF
240
241 #define APHY_SLOT_TIME          9
242 #define BPHY_SLOT_TIME          20
243
244 #define WL_SPURAVOID_OFF        0
245 #define WL_SPURAVOID_ON1        1
246 #define WL_SPURAVOID_ON2        2
247
248 /* invalid core flags, use the saved coreflags */
249 #define BRCMS_USE_COREFLAGS     0xffffffff
250
251 /* values for PLCPHdr_override */
252 #define BRCMS_PLCP_AUTO -1
253 #define BRCMS_PLCP_SHORT        0
254 #define BRCMS_PLCP_LONG 1
255
256 /* values for g_protection_override and n_protection_override */
257 #define BRCMS_PROTECTION_AUTO           -1
258 #define BRCMS_PROTECTION_OFF            0
259 #define BRCMS_PROTECTION_ON             1
260 #define BRCMS_PROTECTION_MMHDR_ONLY     2
261 #define BRCMS_PROTECTION_CTS_ONLY               3
262
263 /* values for g_protection_control and n_protection_control */
264 #define BRCMS_PROTECTION_CTL_OFF                0
265 #define BRCMS_PROTECTION_CTL_LOCAL      1
266 #define BRCMS_PROTECTION_CTL_OVERLAP    2
267
268 /* values for n_protection */
269 #define BRCMS_N_PROTECTION_OFF          0
270 #define BRCMS_N_PROTECTION_OPTIONAL     1
271 #define BRCMS_N_PROTECTION_20IN40               2
272 #define BRCMS_N_PROTECTION_MIXEDMODE    3
273
274 /* values for band specific 40MHz capabilities */
275 #define BRCMS_N_BW_20ALL                        0
276 #define BRCMS_N_BW_40ALL                        1
277 #define BRCMS_N_BW_20IN2G_40IN5G                2
278
279 /* bitflags for SGI support (sgi_rx iovar) */
280 #define BRCMS_N_SGI_20                  0x01
281 #define BRCMS_N_SGI_40                  0x02
282
283 /* defines used by the nrate iovar */
284 /* MSC in use,indicates b0-6 holds an mcs */
285 #define NRATE_MCS_INUSE 0x00000080
286 /* rate/mcs value */
287 #define NRATE_RATE_MASK 0x0000007f
288 /* stf mode mask: siso, cdd, stbc, sdm */
289 #define NRATE_STF_MASK  0x0000ff00
290 /* stf mode shift */
291 #define NRATE_STF_SHIFT 8
292 /* bit indicates override both rate & mode */
293 #define NRATE_OVERRIDE  0x80000000
294 /* bit indicate to override mcs only */
295 #define NRATE_OVERRIDE_MCS_ONLY 0x40000000
296 #define NRATE_SGI_MASK  0x00800000      /* sgi mode */
297 #define NRATE_SGI_SHIFT 23      /* sgi mode */
298 #define NRATE_LDPC_CODING 0x00400000    /* bit indicates adv coding in use */
299 #define NRATE_LDPC_SHIFT 22     /* ldpc shift */
300
301 #define NRATE_STF_SISO  0       /* stf mode SISO */
302 #define NRATE_STF_CDD   1       /* stf mode CDD */
303 #define NRATE_STF_STBC  2       /* stf mode STBC */
304 #define NRATE_STF_SDM   3       /* stf mode SDM */
305
306 #define MAX_DMA_SEGS 4
307
308 /* Max # of entries in Tx FIFO based on 4kb page size */
309 #define NTXD            256
310 /* Max # of entries in Rx FIFO based on 4kb page size */
311 #define NRXD            256
312
313 /* try to keep this # rbufs posted to the chip */
314 #define NRXBUFPOST      32
315
316 /* data msg txq hiwat mark */
317 #define BRCMS_DATAHIWAT         50
318
319 /* bounded rx loops */
320 #define RXBND           8 /* max # frames to process in brcms_c_recv() */
321 #define TXSBND          8 /* max # tx status to process in wlc_txstatus() */
322
323 /*
324  * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
325  */
326 #define SSID_FMT_BUF_LEN        ((4 * IEEE80211_MAX_SSID_LEN) + 1)
327
328 /*
329  * The following table lists the buffer memory allocated to xmt fifos in HW.
330  * the size is in units of 256bytes(one block), total size is HW dependent
331  * ucode has default fifo partition, sw can overwrite if necessary
332  *
333  * This is documented in twiki under the topic UcodeTxFifo. Please ensure
334  * the twiki is updated before making changes.
335  */
336
337 /* Starting corerev for the fifo size table */
338 #define XMTFIFOTBL_STARTREV     20
339
340 struct d11init {
341         __le16 addr;
342         __le16 size;
343         __le32 value;
344 };
345
346 /* currently the best mechanism for determining SIFS is the band in use */
347 static u16 get_sifs(struct brcms_band *band)
348 {
349         return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
350                                  BPHY_SIFS_TIME;
351 }
352
353
354 /*
355  * Detect Card removed.
356  * Even checking an sbconfig register read will not false trigger when the core
357  * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
358  * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
359  * reg with fixed 0/1 pattern (some platforms return all 0).
360  * If clocks are present, call the sb routine which will figure out if the
361  * device is removed.
362  */
363 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
364 {
365         if (!wlc->hw->clk)
366                 return ai_deviceremoved(wlc->hw->sih);
367         return (R_REG(&wlc->hw->regs->maccontrol) &
368                 (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
369 }
370
371 /* sum the individual fifo tx pending packet counts */
372 static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
373 {
374         return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
375                wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
376 }
377
378 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
379 {
380         return wlc->pub->_nbands > 1 && !wlc->bandlocked;
381 }
382
383 static int brcms_chspec_bw(u16 chanspec)
384 {
385         if (CHSPEC_IS40(chanspec))
386                 return BRCMS_40_MHZ;
387         if (CHSPEC_IS20(chanspec))
388                 return BRCMS_20_MHZ;
389
390         return BRCMS_10_MHZ;
391 }
392
393 struct edcf_acparam {
394         u8 ACI;
395         u8 ECW;
396         u16 TXOP;
397 } __packed;
398
399 const u8 prio2fifo[NUMPRIO] = {
400         TX_AC_BE_FIFO,          /* 0    BE      AC_BE   Best Effort */
401         TX_AC_BK_FIFO,          /* 1    BK      AC_BK   Background */
402         TX_AC_BK_FIFO,          /* 2    --      AC_BK   Background */
403         TX_AC_BE_FIFO,          /* 3    EE      AC_BE   Best Effort */
404         TX_AC_VI_FIFO,          /* 4    CL      AC_VI   Video */
405         TX_AC_VI_FIFO,          /* 5    VI      AC_VI   Video */
406         TX_AC_VO_FIFO,          /* 6    VO      AC_VO   Voice */
407         TX_AC_VO_FIFO           /* 7    NC      AC_VO   Voice */
408 };
409
410 /* debug/trace */
411 uint brcm_msg_level =
412 #if defined(BCMDBG)
413         LOG_ERROR_VAL;
414 #else
415         0;
416 #endif                          /* BCMDBG */
417
418 /* TX FIFO number to WME/802.1E Access Category */
419 static const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE };
420
421 /* WME/802.1E Access Category to TX FIFO number */
422 static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 };
423
424 /* 802.1D Priority to precedence queue mapping */
425 const u8 wlc_prio2prec_map[] = {
426         _BRCMS_PREC_BE,         /* 0 BE - Best-effort */
427         _BRCMS_PREC_BK,         /* 1 BK - Background */
428         _BRCMS_PREC_NONE,               /* 2 None = - */
429         _BRCMS_PREC_EE,         /* 3 EE - Excellent-effort */
430         _BRCMS_PREC_CL,         /* 4 CL - Controlled Load */
431         _BRCMS_PREC_VI,         /* 5 Vi - Video */
432         _BRCMS_PREC_VO,         /* 6 Vo - Voice */
433         _BRCMS_PREC_NC,         /* 7 NC - Network Control */
434 };
435
436 static const u16 xmtfifo_sz[][NFIFO] = {
437         /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
438         {20, 192, 192, 21, 17, 5},
439         /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
440         {9, 58, 22, 14, 14, 5},
441         /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
442         {20, 192, 192, 21, 17, 5},
443         /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
444         {20, 192, 192, 21, 17, 5},
445         /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
446         {9, 58, 22, 14, 14, 5},
447 };
448
449 static const u8 acbitmap2maxprio[] = {
450         PRIO_8021D_BE, PRIO_8021D_BE, PRIO_8021D_BK, PRIO_8021D_BK,
451         PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI,
452         PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO,
453         PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO
454 };
455
456 #ifdef BCMDBG
457 static const char * const fifo_names[] = {
458         "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
459 #else
460 static const char fifo_names[6][0];
461 #endif
462
463 #ifdef BCMDBG
464 /* pointer to most recently allocated wl/wlc */
465 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
466 #endif
467
468 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
469 {
470         if (cfg == NULL)
471                 return;
472
473         kfree(cfg->current_bss);
474         kfree(cfg);
475 }
476
477 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
478 {
479         if (wlc == NULL)
480                 return;
481
482         brcms_c_bsscfg_mfree(wlc->bsscfg);
483         kfree(wlc->pub);
484         kfree(wlc->modulecb);
485         kfree(wlc->default_bss);
486         kfree(wlc->protection);
487         kfree(wlc->stf);
488         kfree(wlc->bandstate[0]);
489         kfree(wlc->corestate->macstat_snapshot);
490         kfree(wlc->corestate);
491         kfree(wlc->hw->bandstate[0]);
492         kfree(wlc->hw);
493
494         /* free the wlc */
495         kfree(wlc);
496         wlc = NULL;
497 }
498
499 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
500 {
501         struct brcms_bss_cfg *cfg;
502
503         cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
504         if (cfg == NULL)
505                 goto fail;
506
507         cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
508         if (cfg->current_bss == NULL)
509                 goto fail;
510
511         return cfg;
512
513  fail:
514         brcms_c_bsscfg_mfree(cfg);
515         return NULL;
516 }
517
518 static struct brcms_c_info *
519 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
520 {
521         struct brcms_c_info *wlc;
522
523         wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
524         if (wlc == NULL) {
525                 *err = 1002;
526                 goto fail;
527         }
528
529         /* allocate struct brcms_c_pub state structure */
530         wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
531         if (wlc->pub == NULL) {
532                 *err = 1003;
533                 goto fail;
534         }
535         wlc->pub->wlc = wlc;
536
537         /* allocate struct brcms_hardware state structure */
538
539         wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
540         if (wlc->hw == NULL) {
541                 *err = 1005;
542                 goto fail;
543         }
544         wlc->hw->wlc = wlc;
545
546         wlc->hw->bandstate[0] =
547                 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
548         if (wlc->hw->bandstate[0] == NULL) {
549                 *err = 1006;
550                 goto fail;
551         } else {
552                 int i;
553
554                 for (i = 1; i < MAXBANDS; i++)
555                         wlc->hw->bandstate[i] = (struct brcms_hw_band *)
556                             ((unsigned long)wlc->hw->bandstate[0] +
557                              (sizeof(struct brcms_hw_band) * i));
558         }
559
560         wlc->modulecb =
561                 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
562         if (wlc->modulecb == NULL) {
563                 *err = 1009;
564                 goto fail;
565         }
566
567         wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
568         if (wlc->default_bss == NULL) {
569                 *err = 1010;
570                 goto fail;
571         }
572
573         wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
574         if (wlc->bsscfg == NULL) {
575                 *err = 1011;
576                 goto fail;
577         }
578
579         wlc->protection = kzalloc(sizeof(struct brcms_protection),
580                                   GFP_ATOMIC);
581         if (wlc->protection == NULL) {
582                 *err = 1016;
583                 goto fail;
584         }
585
586         wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
587         if (wlc->stf == NULL) {
588                 *err = 1017;
589                 goto fail;
590         }
591
592         wlc->bandstate[0] =
593                 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
594         if (wlc->bandstate[0] == NULL) {
595                 *err = 1025;
596                 goto fail;
597         } else {
598                 int i;
599
600                 for (i = 1; i < MAXBANDS; i++)
601                         wlc->bandstate[i] = (struct brcms_band *)
602                                 ((unsigned long)wlc->bandstate[0]
603                                 + (sizeof(struct brcms_band)*i));
604         }
605
606         wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
607         if (wlc->corestate == NULL) {
608                 *err = 1026;
609                 goto fail;
610         }
611
612         wlc->corestate->macstat_snapshot =
613                 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
614         if (wlc->corestate->macstat_snapshot == NULL) {
615                 *err = 1027;
616                 goto fail;
617         }
618
619         return wlc;
620
621  fail:
622         brcms_c_detach_mfree(wlc);
623         return NULL;
624 }
625
626 /*
627  * Update the slot timing for standard 11b/g (20us slots)
628  * or shortslot 11g (9us slots)
629  * The PSM needs to be suspended for this call.
630  */
631 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
632                                         bool shortslot)
633 {
634         struct d11regs __iomem *regs;
635
636         regs = wlc_hw->regs;
637
638         if (shortslot) {
639                 /* 11g short slot: 11a timing */
640                 W_REG(&regs->ifs_slot, 0x0207); /* APHY_SLOT_TIME */
641                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
642         } else {
643                 /* 11g long slot: 11b timing */
644                 W_REG(&regs->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */
645                 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
646         }
647 }
648
649 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
650                                 const struct d11init *inits)
651 {
652         int i;
653         u8 __iomem *base;
654         u8 __iomem *addr;
655         u16 size;
656         u32 value;
657
658         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
659
660         base = (u8 __iomem *)wlc_hw->regs;
661
662         for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
663                 size = le16_to_cpu(inits[i].size);
664                 addr = base + le16_to_cpu(inits[i].addr);
665                 value = le32_to_cpu(inits[i].value);
666                 if (size == 2)
667                         W_REG((u16 __iomem *)addr, value);
668                 else if (size == 4)
669                         W_REG((u32 __iomem *)addr, value);
670                 else
671                         break;
672         }
673 }
674
675 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
676 {
677         u8 idx;
678         u16 addr[] = {
679                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
680                 M_HOST_FLAGS5
681         };
682
683         for (idx = 0; idx < MHFMAX; idx++)
684                 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
685 }
686
687 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
688 {
689         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
690         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
691
692         /* init microcode host flags */
693         brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
694
695         /* do band-specific ucode IHR, SHM, and SCR inits */
696         if (D11REV_IS(wlc_hw->corerev, 23)) {
697                 if (BRCMS_ISNPHY(wlc_hw->band))
698                         brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
699                 else
700                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
701                                   " %d\n", __func__, wlc_hw->unit,
702                                   wlc_hw->corerev);
703         } else {
704                 if (D11REV_IS(wlc_hw->corerev, 24)) {
705                         if (BRCMS_ISLCNPHY(wlc_hw->band))
706                                 brcms_c_write_inits(wlc_hw,
707                                                     ucode->d11lcn0bsinitvals24);
708                         else
709                                 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
710                                           " core rev %d\n", __func__,
711                                           wlc_hw->unit, wlc_hw->corerev);
712                 } else {
713                         wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
714                                 __func__, wlc_hw->unit, wlc_hw->corerev);
715                 }
716         }
717 }
718
719 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
720 {
721         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
722
723         wlc_hw->phyclk = clk;
724
725         if (OFF == clk) {       /* clear gmode bit, put phy into reset */
726
727                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE),
728                                (SICF_PRST | SICF_FGC));
729                 udelay(1);
730                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST);
731                 udelay(1);
732
733         } else {                /* take phy out of reset */
734
735                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC);
736                 udelay(1);
737                 ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0);
738                 udelay(1);
739
740         }
741 }
742
743 /* switch to new band but leave it inactive */
744 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
745 {
746         struct brcms_hardware *wlc_hw = wlc->hw;
747         u32 macintmask;
748
749         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
750
751         WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
752
753         /* disable interrupts */
754         macintmask = brcms_intrsoff(wlc->wl);
755
756         /* radio off */
757         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
758
759         brcms_b_core_phy_clk(wlc_hw, OFF);
760
761         brcms_c_setxband(wlc_hw, bandunit);
762
763         return macintmask;
764 }
765
766 /* Process received frames */
767 /*
768  * Return true if more frames need to be processed. false otherwise.
769  * Param 'bound' indicates max. # frames to process before break out.
770  */
771 static bool
772 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
773 {
774         struct sk_buff *p;
775         struct sk_buff *head = NULL;
776         struct sk_buff *tail = NULL;
777         uint n = 0;
778         uint bound_limit = bound ? RXBND : -1;
779
780         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
781         /* gather received frames */
782         while ((p = dma_rx(wlc_hw->di[fifo]))) {
783
784                 if (!tail)
785                         head = tail = p;
786                 else {
787                         tail->prev = p;
788                         tail = p;
789                 }
790
791                 /* !give others some time to run! */
792                 if (++n >= bound_limit)
793                         break;
794         }
795
796         /* post more rbufs */
797         dma_rxfill(wlc_hw->di[fifo]);
798
799         /* process each frame */
800         while ((p = head) != NULL) {
801                 struct d11rxhdr_le *rxh_le;
802                 struct d11rxhdr *rxh;
803                 head = head->prev;
804                 p->prev = NULL;
805
806                 rxh_le = (struct d11rxhdr_le *)p->data;
807                 rxh = (struct d11rxhdr *)p->data;
808
809                 /* fixup rx header endianness */
810                 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
811                 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
812                 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
813                 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
814                 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
815                 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
816                 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
817                 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
818                 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
819                 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
820                 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
821
822                 brcms_c_recv(wlc_hw->wlc, p);
823         }
824
825         return n >= bound_limit;
826 }
827
828 /* process an individual struct tx_status */
829 static bool
830 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
831 {
832         struct sk_buff *p;
833         uint queue;
834         struct d11txh *txh;
835         struct scb *scb = NULL;
836         bool free_pdu;
837         int tx_rts, tx_frame_count, tx_rts_count;
838         uint totlen, supr_status;
839         bool lastframe;
840         struct ieee80211_hdr *h;
841         u16 mcl;
842         struct ieee80211_tx_info *tx_info;
843         struct ieee80211_tx_rate *txrate;
844         int i;
845
846         /* discard intermediate indications for ucode with one legitimate case:
847          *   e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
848          *   but the subsequent tx of DATA failed. so it will start rts/cts
849          *   from the beginning (resetting the rts transmission count)
850          */
851         if (!(txs->status & TX_STATUS_AMPDU)
852             && (txs->status & TX_STATUS_INTERMEDIATE)) {
853                 wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n",
854                           __func__);
855                 return false;
856         }
857
858         queue = txs->frameid & TXFID_QUEUE_MASK;
859         if (queue >= NFIFO) {
860                 p = NULL;
861                 goto fatal;
862         }
863
864         p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
865         if (p == NULL)
866                 goto fatal;
867
868         txh = (struct d11txh *) (p->data);
869         mcl = le16_to_cpu(txh->MacTxControlLow);
870
871         if (txs->phyerr) {
872                 if (brcm_msg_level & LOG_ERROR_VAL) {
873                         wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
874                                   txs->phyerr, txh->MainRates);
875                         brcms_c_print_txdesc(txh);
876                 }
877                 brcms_c_print_txstatus(txs);
878         }
879
880         if (txs->frameid != le16_to_cpu(txh->TxFrameID))
881                 goto fatal;
882         tx_info = IEEE80211_SKB_CB(p);
883         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
884
885         if (tx_info->control.sta)
886                 scb = &wlc->pri_scb;
887
888         if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
889                 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
890                 return false;
891         }
892
893         supr_status = txs->status & TX_STATUS_SUPR_MASK;
894         if (supr_status == TX_STATUS_SUPR_BADCH)
895                 BCMMSG(wlc->wiphy,
896                        "%s: Pkt tx suppressed, possibly channel %d\n",
897                        __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
898
899         tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
900         tx_frame_count =
901             (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
902         tx_rts_count =
903             (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
904
905         lastframe = !ieee80211_has_morefrags(h->frame_control);
906
907         if (!lastframe) {
908                 wiphy_err(wlc->wiphy, "Not last frame!\n");
909         } else {
910                 /*
911                  * Set information to be consumed by Minstrel ht.
912                  *
913                  * The "fallback limit" is the number of tx attempts a given
914                  * MPDU is sent at the "primary" rate. Tx attempts beyond that
915                  * limit are sent at the "secondary" rate.
916                  * A 'short frame' does not exceed RTS treshold.
917                  */
918                 u16 sfbl,       /* Short Frame Rate Fallback Limit */
919                     lfbl,       /* Long Frame Rate Fallback Limit */
920                     fbl;
921
922                 if (queue < AC_COUNT) {
923                         sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
924                                       EDCF_SFB);
925                         lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
926                                       EDCF_LFB);
927                 } else {
928                         sfbl = wlc->SFBL;
929                         lfbl = wlc->LFBL;
930                 }
931
932                 txrate = tx_info->status.rates;
933                 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
934                         fbl = lfbl;
935                 else
936                         fbl = sfbl;
937
938                 ieee80211_tx_info_clear_status(tx_info);
939
940                 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
941                         /*
942                          * rate selection requested a fallback rate
943                          * and we used it
944                          */
945                         txrate[0].count = fbl;
946                         txrate[1].count = tx_frame_count - fbl;
947                 } else {
948                         /*
949                          * rate selection did not request fallback rate, or
950                          * we didn't need it
951                          */
952                         txrate[0].count = tx_frame_count;
953                         /*
954                          * rc80211_minstrel.c:minstrel_tx_status() expects
955                          * unused rates to be marked with idx = -1
956                          */
957                         txrate[1].idx = -1;
958                         txrate[1].count = 0;
959                 }
960
961                 /* clear the rest of the rates */
962                 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
963                         txrate[i].idx = -1;
964                         txrate[i].count = 0;
965                 }
966
967                 if (txs->status & TX_STATUS_ACK_RCV)
968                         tx_info->flags |= IEEE80211_TX_STAT_ACK;
969         }
970
971         totlen = brcmu_pkttotlen(p);
972         free_pdu = true;
973
974         brcms_c_txfifo_complete(wlc, queue, 1);
975
976         if (lastframe) {
977                 p->next = NULL;
978                 p->prev = NULL;
979                 /* remove PLCP & Broadcom tx descriptor header */
980                 skb_pull(p, D11_PHY_HDR_LEN);
981                 skb_pull(p, D11_TXH_LEN);
982                 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
983         } else {
984                 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
985                           "tx_status\n", __func__);
986         }
987
988         return false;
989
990  fatal:
991         if (p)
992                 brcmu_pkt_buf_free_skb(p);
993
994         return true;
995
996 }
997
998 /* process tx completion events in BMAC
999  * Return true if more tx status need to be processed. false otherwise.
1000  */
1001 static bool
1002 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
1003 {
1004         bool morepending = false;
1005         struct brcms_c_info *wlc = wlc_hw->wlc;
1006         struct d11regs __iomem *regs;
1007         struct tx_status txstatus, *txs;
1008         u32 s1, s2;
1009         uint n = 0;
1010         /*
1011          * Param 'max_tx_num' indicates max. # tx status to process before
1012          * break out.
1013          */
1014         uint max_tx_num = bound ? TXSBND : -1;
1015
1016         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
1017
1018         txs = &txstatus;
1019         regs = wlc_hw->regs;
1020         *fatal = false;
1021         while (!(*fatal)
1022                && (s1 = R_REG(&regs->frmtxstatus)) & TXS_V) {
1023
1024                 if (s1 == 0xffffffff) {
1025                         wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1026                                 wlc_hw->unit, __func__);
1027                         return morepending;
1028                 }
1029
1030                 s2 = R_REG(&regs->frmtxstatus2);
1031
1032                 txs->status = s1 & TXS_STATUS_MASK;
1033                 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1034                 txs->sequence = s2 & TXS_SEQ_MASK;
1035                 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1036                 txs->lasttxtime = 0;
1037
1038                 *fatal = brcms_c_dotxstatus(wlc_hw->wlc, txs);
1039
1040                 /* !give others some time to run! */
1041                 if (++n >= max_tx_num)
1042                         break;
1043         }
1044
1045         if (*fatal)
1046                 return 0;
1047
1048         if (n >= max_tx_num)
1049                 morepending = true;
1050
1051         if (!pktq_empty(&wlc->pkt_queue->q))
1052                 brcms_c_send_q(wlc);
1053
1054         return morepending;
1055 }
1056
1057 /* second-level interrupt processing
1058  *   Return true if another dpc needs to be re-scheduled. false otherwise.
1059  *   Param 'bounded' indicates if applicable loops should be bounded.
1060  */
1061 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
1062 {
1063         u32 macintstatus;
1064         struct brcms_hardware *wlc_hw = wlc->hw;
1065         struct d11regs __iomem *regs = wlc_hw->regs;
1066         struct wiphy *wiphy = wlc->wiphy;
1067
1068         if (brcms_deviceremoved(wlc)) {
1069                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
1070                           __func__);
1071                 brcms_down(wlc->wl);
1072                 return false;
1073         }
1074
1075         /* grab and clear the saved software intstatus bits */
1076         macintstatus = wlc->macintstatus;
1077         wlc->macintstatus = 0;
1078
1079         BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
1080                wlc_hw->unit, macintstatus);
1081
1082         WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
1083
1084         /* tx status */
1085         if (macintstatus & MI_TFS) {
1086                 bool fatal;
1087                 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
1088                         wlc->macintstatus |= MI_TFS;
1089                 if (fatal) {
1090                         wiphy_err(wiphy, "MI_TFS: fatal\n");
1091                         goto fatal;
1092                 }
1093         }
1094
1095         if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
1096                 brcms_c_tbtt(wlc);
1097
1098         /* ATIM window end */
1099         if (macintstatus & MI_ATIMWINEND) {
1100                 BCMMSG(wlc->wiphy, "end of ATIM window\n");
1101                 OR_REG(&regs->maccommand, wlc->qvalid);
1102                 wlc->qvalid = 0;
1103         }
1104
1105         /*
1106          * received data or control frame, MI_DMAINT is
1107          * indication of RX_FIFO interrupt
1108          */
1109         if (macintstatus & MI_DMAINT)
1110                 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
1111                         wlc->macintstatus |= MI_DMAINT;
1112
1113         /* noise sample collected */
1114         if (macintstatus & MI_BG_NOISE)
1115                 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
1116
1117         if (macintstatus & MI_GP0) {
1118                 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
1119                         "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
1120
1121                 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
1122                                         __func__, wlc_hw->sih->chip,
1123                                         wlc_hw->sih->chiprev);
1124                 /* big hammer */
1125                 brcms_init(wlc->wl);
1126         }
1127
1128         /* gptimer timeout */
1129         if (macintstatus & MI_TO)
1130                 W_REG(&regs->gptimer, 0);
1131
1132         if (macintstatus & MI_RFDISABLE) {
1133                 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
1134                        " RF Disable Input\n", wlc_hw->unit);
1135                 brcms_rfkill_set_hw_state(wlc->wl);
1136         }
1137
1138         /* send any enq'd tx packets. Just makes sure to jump start tx */
1139         if (!pktq_empty(&wlc->pkt_queue->q))
1140                 brcms_c_send_q(wlc);
1141
1142         /* it isn't done and needs to be resched if macintstatus is non-zero */
1143         return wlc->macintstatus != 0;
1144
1145  fatal:
1146         brcms_init(wlc->wl);
1147         return wlc->macintstatus != 0;
1148 }
1149
1150 /* set initial host flags value */
1151 static void
1152 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1153 {
1154         struct brcms_hardware *wlc_hw = wlc->hw;
1155
1156         memset(mhfs, 0, MHFMAX * sizeof(u16));
1157
1158         mhfs[MHF2] |= mhf2_init;
1159
1160         /* prohibit use of slowclock on multifunction boards */
1161         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1162                 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1163
1164         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1165                 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1166                 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1167         }
1168 }
1169
1170 static struct dma64regs __iomem *
1171 dmareg(struct brcms_hardware *hw, uint direction, uint fifonum)
1172 {
1173         if (direction == DMA_TX)
1174                 return &(hw->regs->fifo64regs[fifonum].dmaxmt);
1175         return &(hw->regs->fifo64regs[fifonum].dmarcv);
1176 }
1177
1178 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1179 {
1180         uint i;
1181         char name[8];
1182         /*
1183          * ucode host flag 2 needed for pio mode, independent of band and fifo
1184          */
1185         u16 pio_mhf2 = 0;
1186         struct brcms_hardware *wlc_hw = wlc->hw;
1187         uint unit = wlc_hw->unit;
1188         struct wiphy *wiphy = wlc->wiphy;
1189
1190         /* name and offsets for dma_attach */
1191         snprintf(name, sizeof(name), "wl%d", unit);
1192
1193         if (wlc_hw->di[0] == NULL) {    /* Init FIFOs */
1194                 int dma_attach_err = 0;
1195
1196                 /*
1197                  * FIFO 0
1198                  * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1199                  * RX: RX_FIFO (RX data packets)
1200                  */
1201                 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih,
1202                                            (wme ? dmareg(wlc_hw, DMA_TX, 0) :
1203                                             NULL), dmareg(wlc_hw, DMA_RX, 0),
1204                                            (wme ? NTXD : 0), NRXD,
1205                                            RXBUFSZ, -1, NRXBUFPOST,
1206                                            BRCMS_HWRXOFF, &brcm_msg_level);
1207                 dma_attach_err |= (NULL == wlc_hw->di[0]);
1208
1209                 /*
1210                  * FIFO 1
1211                  * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1212                  *   (legacy) TX_DATA_FIFO (TX data packets)
1213                  * RX: UNUSED
1214                  */
1215                 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih,
1216                                            dmareg(wlc_hw, DMA_TX, 1), NULL,
1217                                            NTXD, 0, 0, -1, 0, 0,
1218                                            &brcm_msg_level);
1219                 dma_attach_err |= (NULL == wlc_hw->di[1]);
1220
1221                 /*
1222                  * FIFO 2
1223                  * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1224                  * RX: UNUSED
1225                  */
1226                 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih,
1227                                            dmareg(wlc_hw, DMA_TX, 2), NULL,
1228                                            NTXD, 0, 0, -1, 0, 0,
1229                                            &brcm_msg_level);
1230                 dma_attach_err |= (NULL == wlc_hw->di[2]);
1231                 /*
1232                  * FIFO 3
1233                  * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1234                  *   (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1235                  */
1236                 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih,
1237                                            dmareg(wlc_hw, DMA_TX, 3),
1238                                            NULL, NTXD, 0, 0, -1,
1239                                            0, 0, &brcm_msg_level);
1240                 dma_attach_err |= (NULL == wlc_hw->di[3]);
1241 /* Cleaner to leave this as if with AP defined */
1242
1243                 if (dma_attach_err) {
1244                         wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1245                                   "\n", unit);
1246                         return false;
1247                 }
1248
1249                 /* get pointer to dma engine tx flow control variable */
1250                 for (i = 0; i < NFIFO; i++)
1251                         if (wlc_hw->di[i])
1252                                 wlc_hw->txavail[i] =
1253                                     (uint *) dma_getvar(wlc_hw->di[i],
1254                                                         "&txavail");
1255         }
1256
1257         /* initial ucode host flags */
1258         brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1259
1260         return true;
1261 }
1262
1263 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1264 {
1265         uint j;
1266
1267         for (j = 0; j < NFIFO; j++) {
1268                 if (wlc_hw->di[j]) {
1269                         dma_detach(wlc_hw->di[j]);
1270                         wlc_hw->di[j] = NULL;
1271                 }
1272         }
1273 }
1274
1275 /*
1276  * Initialize brcms_c_info default values ...
1277  * may get overrides later in this function
1278  *  BMAC_NOTES, move low out and resolve the dangling ones
1279  */
1280 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1281 {
1282         struct brcms_c_info *wlc = wlc_hw->wlc;
1283
1284         /* set default sw macintmask value */
1285         wlc->defmacintmask = DEF_MACINTMASK;
1286
1287         /* various 802.11g modes */
1288         wlc_hw->shortslot = false;
1289
1290         wlc_hw->SFBL = RETRY_SHORT_FB;
1291         wlc_hw->LFBL = RETRY_LONG_FB;
1292
1293         /* default mac retry limits */
1294         wlc_hw->SRL = RETRY_SHORT_DEF;
1295         wlc_hw->LRL = RETRY_LONG_DEF;
1296         wlc_hw->chanspec = ch20mhz_chspec(1);
1297 }
1298
1299 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1300 {
1301         /* delay before first read of ucode state */
1302         udelay(40);
1303
1304         /* wait until ucode is no longer asleep */
1305         SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1306                   DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1307 }
1308
1309 /* control chip clock to save power, enable dynamic clock or force fast clock */
1310 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)
1311 {
1312         if (wlc_hw->sih->cccaps & CC_CAP_PMU) {
1313                 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1314                  * on backplane, but mac core will still run on ALP(not HT) when
1315                  * it enters powersave mode, which means the FCA bit may not be
1316                  * set. Should wakeup mac if driver wants it to run on HT.
1317                  */
1318
1319                 if (wlc_hw->clk) {
1320                         if (mode == CLK_FAST) {
1321                                 OR_REG(&wlc_hw->regs->clk_ctl_st,
1322                                        CCS_FORCEHT);
1323
1324                                 udelay(64);
1325
1326                                 SPINWAIT(((R_REG
1327                                            (&wlc_hw->regs->
1328                                             clk_ctl_st) & CCS_HTAVAIL) == 0),
1329                                          PMU_MAX_TRANSITION_DLY);
1330                                 WARN_ON(!(R_REG
1331                                           (&wlc_hw->regs->
1332                                            clk_ctl_st) & CCS_HTAVAIL));
1333                         } else {
1334                                 if ((wlc_hw->sih->pmurev == 0) &&
1335                                     (R_REG
1336                                      (&wlc_hw->regs->
1337                                       clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ)))
1338                                         SPINWAIT(((R_REG
1339                                                    (&wlc_hw->regs->
1340                                                     clk_ctl_st) & CCS_HTAVAIL)
1341                                                   == 0),
1342                                                  PMU_MAX_TRANSITION_DLY);
1343                                 AND_REG(&wlc_hw->regs->clk_ctl_st,
1344                                         ~CCS_FORCEHT);
1345                         }
1346                 }
1347                 wlc_hw->forcefastclk = (mode == CLK_FAST);
1348         } else {
1349
1350                 /* old chips w/o PMU, force HT through cc,
1351                  * then use FCA to verify mac is running fast clock
1352                  */
1353
1354                 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1355
1356                 /* check fast clock is available (if core is not in reset) */
1357                 if (wlc_hw->forcefastclk && wlc_hw->clk)
1358                         WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) &
1359                                   SISF_FCLKA));
1360
1361                 /*
1362                  * keep the ucode wake bit on if forcefastclk is on since we
1363                  * do not want ucode to put us back to slow clock when it dozes
1364                  * for PM mode. Code below matches the wake override bit with
1365                  * current forcefastclk state. Only setting bit in wake_override
1366                  * instead of waking ucode immediately since old code had this
1367                  * behavior. Older code set wlc->forcefastclk but only had the
1368                  * wake happen if the wakup_ucode work (protected by an up
1369                  * check) was executed just below.
1370                  */
1371                 if (wlc_hw->forcefastclk)
1372                         mboolset(wlc_hw->wake_override,
1373                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1374                 else
1375                         mboolclr(wlc_hw->wake_override,
1376                                  BRCMS_WAKE_OVERRIDE_FORCEFAST);
1377         }
1378 }
1379
1380 /* set or clear ucode host flag bits
1381  * it has an optimization for no-change write
1382  * it only writes through shared memory when the core has clock;
1383  * pre-CLK changes should use wlc_write_mhf to get around the optimization
1384  *
1385  *
1386  * bands values are: BRCM_BAND_AUTO <--- Current band only
1387  *                   BRCM_BAND_5G   <--- 5G band only
1388  *                   BRCM_BAND_2G   <--- 2G band only
1389  *                   BRCM_BAND_ALL  <--- All bands
1390  */
1391 void
1392 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1393              int bands)
1394 {
1395         u16 save;
1396         u16 addr[MHFMAX] = {
1397                 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1398                 M_HOST_FLAGS5
1399         };
1400         struct brcms_hw_band *band;
1401
1402         if ((val & ~mask) || idx >= MHFMAX)
1403                 return; /* error condition */
1404
1405         switch (bands) {
1406                 /* Current band only or all bands,
1407                  * then set the band to current band
1408                  */
1409         case BRCM_BAND_AUTO:
1410         case BRCM_BAND_ALL:
1411                 band = wlc_hw->band;
1412                 break;
1413         case BRCM_BAND_5G:
1414                 band = wlc_hw->bandstate[BAND_5G_INDEX];
1415                 break;
1416         case BRCM_BAND_2G:
1417                 band = wlc_hw->bandstate[BAND_2G_INDEX];
1418                 break;
1419         default:
1420                 band = NULL;    /* error condition */
1421         }
1422
1423         if (band) {
1424                 save = band->mhfs[idx];
1425                 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1426
1427                 /* optimization: only write through if changed, and
1428                  * changed band is the current band
1429                  */
1430                 if (wlc_hw->clk && (band->mhfs[idx] != save)
1431                     && (band == wlc_hw->band))
1432                         brcms_b_write_shm(wlc_hw, addr[idx],
1433                                            (u16) band->mhfs[idx]);
1434         }
1435
1436         if (bands == BRCM_BAND_ALL) {
1437                 wlc_hw->bandstate[0]->mhfs[idx] =
1438                     (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1439                 wlc_hw->bandstate[1]->mhfs[idx] =
1440                     (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1441         }
1442 }
1443
1444 /* set the maccontrol register to desired reset state and
1445  * initialize the sw cache of the register
1446  */
1447 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1448 {
1449         /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1450         wlc_hw->maccontrol = 0;
1451         wlc_hw->suspended_fifos = 0;
1452         wlc_hw->wake_override = 0;
1453         wlc_hw->mute_override = 0;
1454         brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1455 }
1456
1457 /*
1458  * write the software state of maccontrol and
1459  * overrides to the maccontrol register
1460  */
1461 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1462 {
1463         u32 maccontrol = wlc_hw->maccontrol;
1464
1465         /* OR in the wake bit if overridden */
1466         if (wlc_hw->wake_override)
1467                 maccontrol |= MCTL_WAKE;
1468
1469         /* set AP and INFRA bits for mute if needed */
1470         if (wlc_hw->mute_override) {
1471                 maccontrol &= ~(MCTL_AP);
1472                 maccontrol |= MCTL_INFRA;
1473         }
1474
1475         W_REG(&wlc_hw->regs->maccontrol, maccontrol);
1476 }
1477
1478 /* set or clear maccontrol bits */
1479 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1480 {
1481         u32 maccontrol;
1482         u32 new_maccontrol;
1483
1484         if (val & ~mask)
1485                 return; /* error condition */
1486         maccontrol = wlc_hw->maccontrol;
1487         new_maccontrol = (maccontrol & ~mask) | val;
1488
1489         /* if the new maccontrol value is the same as the old, nothing to do */
1490         if (new_maccontrol == maccontrol)
1491                 return;
1492
1493         /* something changed, cache the new value */
1494         wlc_hw->maccontrol = new_maccontrol;
1495
1496         /* write the new values with overrides applied */
1497         brcms_c_mctrl_write(wlc_hw);
1498 }
1499
1500 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1501                                  u32 override_bit)
1502 {
1503         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1504                 mboolset(wlc_hw->wake_override, override_bit);
1505                 return;
1506         }
1507
1508         mboolset(wlc_hw->wake_override, override_bit);
1509
1510         brcms_c_mctrl_write(wlc_hw);
1511         brcms_b_wait_for_wake(wlc_hw);
1512 }
1513
1514 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1515                                    u32 override_bit)
1516 {
1517         mboolclr(wlc_hw->wake_override, override_bit);
1518
1519         if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1520                 return;
1521
1522         brcms_c_mctrl_write(wlc_hw);
1523 }
1524
1525 /* When driver needs ucode to stop beaconing, it has to make sure that
1526  * MCTL_AP is clear and MCTL_INFRA is set
1527  * Mode           MCTL_AP        MCTL_INFRA
1528  * AP                1              1
1529  * STA               0              1 <--- This will ensure no beacons
1530  * IBSS              0              0
1531  */
1532 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1533 {
1534         wlc_hw->mute_override = 1;
1535
1536         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1537          * override, then there is no change to write
1538          */
1539         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1540                 return;
1541
1542         brcms_c_mctrl_write(wlc_hw);
1543 }
1544
1545 /* Clear the override on AP and INFRA bits */
1546 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1547 {
1548         if (wlc_hw->mute_override == 0)
1549                 return;
1550
1551         wlc_hw->mute_override = 0;
1552
1553         /* if maccontrol already has AP == 0 and INFRA == 1 without this
1554          * override, then there is no change to write
1555          */
1556         if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1557                 return;
1558
1559         brcms_c_mctrl_write(wlc_hw);
1560 }
1561
1562 /*
1563  * Write a MAC address to the given match reg offset in the RXE match engine.
1564  */
1565 static void
1566 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1567                        const u8 *addr)
1568 {
1569         struct d11regs __iomem *regs;
1570         u16 mac_l;
1571         u16 mac_m;
1572         u16 mac_h;
1573
1574         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1575                  wlc_hw->unit);
1576
1577         regs = wlc_hw->regs;
1578         mac_l = addr[0] | (addr[1] << 8);
1579         mac_m = addr[2] | (addr[3] << 8);
1580         mac_h = addr[4] | (addr[5] << 8);
1581
1582         /* enter the MAC addr into the RXE match registers */
1583         W_REG(&regs->rcm_ctl, RCM_INC_DATA | match_reg_offset);
1584         W_REG(&regs->rcm_mat_data, mac_l);
1585         W_REG(&regs->rcm_mat_data, mac_m);
1586         W_REG(&regs->rcm_mat_data, mac_h);
1587
1588 }
1589
1590 void
1591 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1592                             void *buf)
1593 {
1594         struct d11regs __iomem *regs;
1595         u32 word;
1596         __le32 word_le;
1597         __be32 word_be;
1598         bool be_bit;
1599         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1600
1601         regs = wlc_hw->regs;
1602         W_REG(&regs->tplatewrptr, offset);
1603
1604         /* if MCTL_BIGEND bit set in mac control register,
1605          * the chip swaps data in fifo, as well as data in
1606          * template ram
1607          */
1608         be_bit = (R_REG(&regs->maccontrol) & MCTL_BIGEND) != 0;
1609
1610         while (len > 0) {
1611                 memcpy(&word, buf, sizeof(u32));
1612
1613                 if (be_bit) {
1614                         word_be = cpu_to_be32(word);
1615                         word = *(u32 *)&word_be;
1616                 } else {
1617                         word_le = cpu_to_le32(word);
1618                         word = *(u32 *)&word_le;
1619                 }
1620
1621                 W_REG(&regs->tplatewrdata, word);
1622
1623                 buf = (u8 *) buf + sizeof(u32);
1624                 len -= sizeof(u32);
1625         }
1626 }
1627
1628 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1629 {
1630         wlc_hw->band->CWmin = newmin;
1631
1632         W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1633         (void)R_REG(&wlc_hw->regs->objaddr);
1634         W_REG(&wlc_hw->regs->objdata, newmin);
1635 }
1636
1637 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1638 {
1639         wlc_hw->band->CWmax = newmax;
1640
1641         W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1642         (void)R_REG(&wlc_hw->regs->objaddr);
1643         W_REG(&wlc_hw->regs->objdata, newmax);
1644 }
1645
1646 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1647 {
1648         bool fastclk;
1649
1650         /* request FAST clock if not on */
1651         fastclk = wlc_hw->forcefastclk;
1652         if (!fastclk)
1653                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1654
1655         wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1656
1657         brcms_b_phy_reset(wlc_hw);
1658         wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1659
1660         /* restore the clk */
1661         if (!fastclk)
1662                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
1663 }
1664
1665 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1666 {
1667         u16 v;
1668         struct brcms_c_info *wlc = wlc_hw->wlc;
1669         /* update SYNTHPU_DLY */
1670
1671         if (BRCMS_ISLCNPHY(wlc->band))
1672                 v = SYNTHPU_DLY_LPPHY_US;
1673         else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1674                 v = SYNTHPU_DLY_NPHY_US;
1675         else
1676                 v = SYNTHPU_DLY_BPHY_US;
1677
1678         brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1679 }
1680
1681 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1682 {
1683         u16 phyctl;
1684         u16 phytxant = wlc_hw->bmac_phytxant;
1685         u16 mask = PHY_TXC_ANT_MASK;
1686
1687         /* set the Probe Response frame phy control word */
1688         phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1689         phyctl = (phyctl & ~mask) | phytxant;
1690         brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1691
1692         /* set the Response (ACK/CTS) frame phy control word */
1693         phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1694         phyctl = (phyctl & ~mask) | phytxant;
1695         brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1696 }
1697
1698 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1699                                          u8 rate)
1700 {
1701         uint i;
1702         u8 plcp_rate = 0;
1703         struct plcp_signal_rate_lookup {
1704                 u8 rate;
1705                 u8 signal_rate;
1706         };
1707         /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1708         const struct plcp_signal_rate_lookup rate_lookup[] = {
1709                 {BRCM_RATE_6M, 0xB},
1710                 {BRCM_RATE_9M, 0xF},
1711                 {BRCM_RATE_12M, 0xA},
1712                 {BRCM_RATE_18M, 0xE},
1713                 {BRCM_RATE_24M, 0x9},
1714                 {BRCM_RATE_36M, 0xD},
1715                 {BRCM_RATE_48M, 0x8},
1716                 {BRCM_RATE_54M, 0xC}
1717         };
1718
1719         for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1720                 if (rate == rate_lookup[i].rate) {
1721                         plcp_rate = rate_lookup[i].signal_rate;
1722                         break;
1723                 }
1724         }
1725
1726         /* Find the SHM pointer to the rate table entry by looking in the
1727          * Direct-map Table
1728          */
1729         return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1730 }
1731
1732 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1733 {
1734         u8 rate;
1735         u8 rates[8] = {
1736                 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1737                 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1738         };
1739         u16 entry_ptr;
1740         u16 pctl1;
1741         uint i;
1742
1743         if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1744                 return;
1745
1746         /* walk the phy rate table and update the entries */
1747         for (i = 0; i < ARRAY_SIZE(rates); i++) {
1748                 rate = rates[i];
1749
1750                 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1751
1752                 /* read the SHM Rate Table entry OFDM PCTL1 values */
1753                 pctl1 =
1754                     brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1755
1756                 /* modify the value */
1757                 pctl1 &= ~PHY_TXC1_MODE_MASK;
1758                 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1759
1760                 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1761                 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1762                                    pctl1);
1763         }
1764 }
1765
1766 /* band-specific init */
1767 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1768 {
1769         struct brcms_hardware *wlc_hw = wlc->hw;
1770
1771         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1772                 wlc_hw->band->bandunit);
1773
1774         brcms_c_ucode_bsinit(wlc_hw);
1775
1776         wlc_phy_init(wlc_hw->band->pi, chanspec);
1777
1778         brcms_c_ucode_txant_set(wlc_hw);
1779
1780         /*
1781          * cwmin is band-specific, update hardware
1782          * with value for current band
1783          */
1784         brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1785         brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1786
1787         brcms_b_update_slot_timing(wlc_hw,
1788                                    wlc_hw->band->bandtype == BRCM_BAND_5G ?
1789                                    true : wlc_hw->shortslot);
1790
1791         /* write phytype and phyvers */
1792         brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1793         brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1794
1795         /*
1796          * initialize the txphyctl1 rate table since
1797          * shmem is shared between bands
1798          */
1799         brcms_upd_ofdm_pctl1_table(wlc_hw);
1800
1801         brcms_b_upd_synthpu(wlc_hw);
1802 }
1803
1804 /* Perform a soft reset of the PHY PLL */
1805 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1806 {
1807         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1808
1809         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1810                    offsetof(struct chipcregs, chipcontrol_addr), ~0, 0);
1811         udelay(1);
1812         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1813                    offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1814         udelay(1);
1815         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1816                    offsetof(struct chipcregs, chipcontrol_data), 0x4, 4);
1817         udelay(1);
1818         ai_corereg(wlc_hw->sih, SI_CC_IDX,
1819                    offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1820         udelay(1);
1821 }
1822
1823 /* light way to turn on phy clock without reset for NPHY only
1824  *  refer to brcms_b_core_phy_clk for full version
1825  */
1826 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1827 {
1828         /* support(necessary for NPHY and HYPHY) only */
1829         if (!BRCMS_ISNPHY(wlc_hw->band))
1830                 return;
1831
1832         if (ON == clk)
1833                 ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC);
1834         else
1835                 ai_core_cflags(wlc_hw->sih, SICF_FGC, 0);
1836
1837 }
1838
1839 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1840 {
1841         if (ON == clk)
1842                 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE);
1843         else
1844                 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0);
1845 }
1846
1847 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1848 {
1849         struct brcms_phy_pub *pih = wlc_hw->band->pi;
1850         u32 phy_bw_clkbits;
1851         bool phy_in_reset = false;
1852
1853         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1854
1855         if (pih == NULL)
1856                 return;
1857
1858         phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1859
1860         /* Specific reset sequence required for NPHY rev 3 and 4 */
1861         if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1862             NREV_LE(wlc_hw->band->phyrev, 4)) {
1863                 /* Set the PHY bandwidth */
1864                 ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits);
1865
1866                 udelay(1);
1867
1868                 /* Perform a soft reset of the PHY PLL */
1869                 brcms_b_core_phypll_reset(wlc_hw);
1870
1871                 /* reset the PHY */
1872                 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE),
1873                                (SICF_PRST | SICF_PCLKE));
1874                 phy_in_reset = true;
1875         } else {
1876                 ai_core_cflags(wlc_hw->sih,
1877                                (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1878                                (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1879         }
1880
1881         udelay(2);
1882         brcms_b_core_phy_clk(wlc_hw, ON);
1883
1884         if (pih)
1885                 wlc_phy_anacore(pih, ON);
1886 }
1887
1888 /* switch to and initialize new band */
1889 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1890                             u16 chanspec) {
1891         struct brcms_c_info *wlc = wlc_hw->wlc;
1892         u32 macintmask;
1893
1894         /* Enable the d11 core before accessing it */
1895         if (!ai_iscoreup(wlc_hw->sih)) {
1896                 ai_core_reset(wlc_hw->sih, 0, 0);
1897                 brcms_c_mctrl_reset(wlc_hw);
1898         }
1899
1900         macintmask = brcms_c_setband_inact(wlc, bandunit);
1901
1902         if (!wlc_hw->up)
1903                 return;
1904
1905         brcms_b_core_phy_clk(wlc_hw, ON);
1906
1907         /* band-specific initializations */
1908         brcms_b_bsinit(wlc, chanspec);
1909
1910         /*
1911          * If there are any pending software interrupt bits,
1912          * then replace these with a harmless nonzero value
1913          * so brcms_c_dpc() will re-enable interrupts when done.
1914          */
1915         if (wlc->macintstatus)
1916                 wlc->macintstatus = MI_DMAINT;
1917
1918         /* restore macintmask */
1919         brcms_intrsrestore(wlc->wl, macintmask);
1920
1921         /* ucode should still be suspended.. */
1922         WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
1923 }
1924
1925 /* low-level band switch utility routine */
1926 void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
1927 {
1928         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1929                 bandunit);
1930
1931         wlc_hw->band = wlc_hw->bandstate[bandunit];
1932
1933         /*
1934          * BMAC_NOTE:
1935          *   until we eliminate need for wlc->band refs in low level code
1936          */
1937         wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
1938
1939         /* set gmode core flag */
1940         if (wlc_hw->sbclk && !wlc_hw->noreset)
1941                 ai_core_cflags(wlc_hw->sih, SICF_GMODE,
1942                                ((bandunit == 0) ? SICF_GMODE : 0));
1943 }
1944
1945 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1946 {
1947
1948         /* reject unsupported corerev */
1949         if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1950                 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1951                           wlc_hw->corerev);
1952                 return false;
1953         }
1954
1955         return true;
1956 }
1957
1958 /* Validate some board info parameters */
1959 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1960 {
1961         uint boardrev = wlc_hw->boardrev;
1962
1963         /* 4 bits each for board type, major, minor, and tiny version */
1964         uint brt = (boardrev & 0xf000) >> 12;
1965         uint b0 = (boardrev & 0xf00) >> 8;
1966         uint b1 = (boardrev & 0xf0) >> 4;
1967         uint b2 = boardrev & 0xf;
1968
1969         /* voards from other vendors are always considered valid */
1970         if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM)
1971                 return true;
1972
1973         /* do some boardrev sanity checks when boardvendor is Broadcom */
1974         if (boardrev == 0)
1975                 return false;
1976
1977         if (boardrev <= 0xff)
1978                 return true;
1979
1980         if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
1981                 || (b2 > 9))
1982                 return false;
1983
1984         return true;
1985 }
1986
1987 static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw)
1988 {
1989         const char *varname = "macaddr";
1990         char *macaddr;
1991
1992         /* If macaddr exists, use it (Sromrev4, CIS, ...). */
1993         macaddr = getvar(wlc_hw->sih, varname);
1994         if (macaddr != NULL)
1995                 return macaddr;
1996
1997         if (wlc_hw->_nbands > 1)
1998                 varname = "et1macaddr";
1999         else
2000                 varname = "il0macaddr";
2001
2002         macaddr = getvar(wlc_hw->sih, varname);
2003         if (macaddr == NULL)
2004                 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr "
2005                           "getvar(%s) not found\n", wlc_hw->unit, varname);
2006
2007         return macaddr;
2008 }
2009
2010 /* power both the pll and external oscillator on/off */
2011 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
2012 {
2013         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
2014
2015         /*
2016          * dont power down if plldown is false or
2017          * we must poll hw radio disable
2018          */
2019         if (!want && wlc_hw->pllreq)
2020                 return;
2021
2022         if (wlc_hw->sih)
2023                 ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want);
2024
2025         wlc_hw->sbclk = want;
2026         if (!wlc_hw->sbclk) {
2027                 wlc_hw->clk = false;
2028                 if (wlc_hw->band && wlc_hw->band->pi)
2029                         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2030         }
2031 }
2032
2033 /*
2034  * Return true if radio is disabled, otherwise false.
2035  * hw radio disable signal is an external pin, users activate it asynchronously
2036  * this function could be called when driver is down and w/o clock
2037  * it operates on different registers depending on corerev and boardflag.
2038  */
2039 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
2040 {
2041         bool v, clk, xtal;
2042         u32 resetbits = 0, flags = 0;
2043
2044         xtal = wlc_hw->sbclk;
2045         if (!xtal)
2046                 brcms_b_xtal(wlc_hw, ON);
2047
2048         /* may need to take core out of reset first */
2049         clk = wlc_hw->clk;
2050         if (!clk) {
2051                 /*
2052                  * mac no longer enables phyclk automatically when driver
2053                  * accesses phyreg throughput mac. This can be skipped since
2054                  * only mac reg is accessed below
2055                  */
2056                 flags |= SICF_PCLKE;
2057
2058                 /*
2059                  * AI chip doesn't restore bar0win2 on
2060                  * hibernation/resume, need sw fixup
2061                  */
2062                 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2063                     (wlc_hw->sih->chip == BCM43225_CHIP_ID))
2064                         wlc_hw->regs = (struct d11regs __iomem *)
2065                                         ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
2066                 ai_core_reset(wlc_hw->sih, flags, resetbits);
2067                 brcms_c_mctrl_reset(wlc_hw);
2068         }
2069
2070         v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0);
2071
2072         /* put core back into reset */
2073         if (!clk)
2074                 ai_core_disable(wlc_hw->sih, 0);
2075
2076         if (!xtal)
2077                 brcms_b_xtal(wlc_hw, OFF);
2078
2079         return v;
2080 }
2081
2082 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
2083 {
2084         struct dma_pub *di = wlc_hw->di[fifo];
2085         return dma_rxreset(di);
2086 }
2087
2088 /* d11 core reset
2089  *   ensure fask clock during reset
2090  *   reset dma
2091  *   reset d11(out of reset)
2092  *   reset phy(out of reset)
2093  *   clear software macintstatus for fresh new start
2094  * one testing hack wlc_hw->noreset will bypass the d11/phy reset
2095  */
2096 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
2097 {
2098         struct d11regs __iomem *regs;
2099         uint i;
2100         bool fastclk;
2101         u32 resetbits = 0;
2102
2103         if (flags == BRCMS_USE_COREFLAGS)
2104                 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
2105
2106         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2107
2108         regs = wlc_hw->regs;
2109
2110         /* request FAST clock if not on  */
2111         fastclk = wlc_hw->forcefastclk;
2112         if (!fastclk)
2113                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2114
2115         /* reset the dma engines except first time thru */
2116         if (ai_iscoreup(wlc_hw->sih)) {
2117                 for (i = 0; i < NFIFO; i++)
2118                         if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2119                                 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
2120                                           "dma_txreset[%d]: cannot stop dma\n",
2121                                            wlc_hw->unit, __func__, i);
2122
2123                 if ((wlc_hw->di[RX_FIFO])
2124                     && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
2125                         wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
2126                                   "[%d]: cannot stop dma\n",
2127                                   wlc_hw->unit, __func__, RX_FIFO);
2128         }
2129         /* if noreset, just stop the psm and return */
2130         if (wlc_hw->noreset) {
2131                 wlc_hw->wlc->macintstatus = 0;  /* skip wl_dpc after down */
2132                 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2133                 return;
2134         }
2135
2136         /*
2137          * mac no longer enables phyclk automatically when driver accesses
2138          * phyreg throughput mac, AND phy_reset is skipped at early stage when
2139          * band->pi is invalid. need to enable PHY CLK
2140          */
2141         flags |= SICF_PCLKE;
2142
2143         /*
2144          * reset the core
2145          * In chips with PMU, the fastclk request goes through d11 core
2146          * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2147          *
2148          * This adds some delay and we can optimize it by also requesting
2149          * fastclk through chipcommon during this period if necessary. But
2150          * that has to work coordinate with other driver like mips/arm since
2151          * they may touch chipcommon as well.
2152          */
2153         wlc_hw->clk = false;
2154         ai_core_reset(wlc_hw->sih, flags, resetbits);
2155         wlc_hw->clk = true;
2156         if (wlc_hw->band && wlc_hw->band->pi)
2157                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2158
2159         brcms_c_mctrl_reset(wlc_hw);
2160
2161         if (wlc_hw->sih->cccaps & CC_CAP_PMU)
2162                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2163
2164         brcms_b_phy_reset(wlc_hw);
2165
2166         /* turn on PHY_PLL */
2167         brcms_b_core_phypll_ctl(wlc_hw, true);
2168
2169         /* clear sw intstatus */
2170         wlc_hw->wlc->macintstatus = 0;
2171
2172         /* restore the clk setting */
2173         if (!fastclk)
2174                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
2175 }
2176
2177 /* txfifo sizes needs to be modified(increased) since the newer cores
2178  * have more memory.
2179  */
2180 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2181 {
2182         struct d11regs __iomem *regs = wlc_hw->regs;
2183         u16 fifo_nu;
2184         u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2185         u16 txfifo_def, txfifo_def1;
2186         u16 txfifo_cmd;
2187
2188         /* tx fifos start at TXFIFO_START_BLK from the Base address */
2189         txfifo_startblk = TXFIFO_START_BLK;
2190
2191         /* sequence of operations:  reset fifo, set fifo size, reset fifo */
2192         for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2193
2194                 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2195                 txfifo_def = (txfifo_startblk & 0xff) |
2196                     (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2197                 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2198                     ((((txfifo_endblk -
2199                         1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2200                 txfifo_cmd =
2201                     TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2202
2203                 W_REG(&regs->xmtfifocmd, txfifo_cmd);
2204                 W_REG(&regs->xmtfifodef, txfifo_def);
2205                 W_REG(&regs->xmtfifodef1, txfifo_def1);
2206
2207                 W_REG(&regs->xmtfifocmd, txfifo_cmd);
2208
2209                 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2210         }
2211         /*
2212          * need to propagate to shm location to be in sync since ucode/hw won't
2213          * do this
2214          */
2215         brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2216                            wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2217         brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2218                            wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2219         brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2220                            ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2221                             xmtfifo_sz[TX_AC_BK_FIFO]));
2222         brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2223                            ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2224                             xmtfifo_sz[TX_BCMC_FIFO]));
2225 }
2226
2227 /* This function is used for changing the tsf frac register
2228  * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2229  * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2230  * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2231  * HTPHY Formula is 2^26/freq(MHz) e.g.
2232  * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2233  *  - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2234  * For spuron: 123MHz -> 2^26/123    = 545600.5
2235  *  - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2236  * For spur off: 120MHz -> 2^26/120    = 559240.5
2237  *  - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2238  */
2239
2240 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2241 {
2242         struct d11regs __iomem *regs = wlc_hw->regs;
2243
2244         if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2245             (wlc_hw->sih->chip == BCM43225_CHIP_ID)) {
2246                 if (spurmode == WL_SPURAVOID_ON2) {     /* 126Mhz */
2247                         W_REG(&regs->tsf_clk_frac_l, 0x2082);
2248                         W_REG(&regs->tsf_clk_frac_h, 0x8);
2249                 } else if (spurmode == WL_SPURAVOID_ON1) {      /* 123Mhz */
2250                         W_REG(&regs->tsf_clk_frac_l, 0x5341);
2251                         W_REG(&regs->tsf_clk_frac_h, 0x8);
2252                 } else {        /* 120Mhz */
2253                         W_REG(&regs->tsf_clk_frac_l, 0x8889);
2254                         W_REG(&regs->tsf_clk_frac_h, 0x8);
2255                 }
2256         } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2257                 if (spurmode == WL_SPURAVOID_ON1) {     /* 82Mhz */
2258                         W_REG(&regs->tsf_clk_frac_l, 0x7CE0);
2259                         W_REG(&regs->tsf_clk_frac_h, 0xC);
2260                 } else {        /* 80Mhz */
2261                         W_REG(&regs->tsf_clk_frac_l, 0xCCCD);
2262                         W_REG(&regs->tsf_clk_frac_h, 0xC);
2263                 }
2264         }
2265 }
2266
2267 /* Initialize GPIOs that are controlled by D11 core */
2268 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2269 {
2270         struct brcms_hardware *wlc_hw = wlc->hw;
2271         struct d11regs __iomem *regs;
2272         u32 gc, gm;
2273
2274         regs = wlc_hw->regs;
2275
2276         /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2277         brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2278
2279         /*
2280          * Common GPIO setup:
2281          *      G0 = LED 0 = WLAN Activity
2282          *      G1 = LED 1 = WLAN 2.4 GHz Radio State
2283          *      G2 = LED 2 = WLAN 5 GHz Radio State
2284          *      G4 = radio disable input (HI enabled, LO disabled)
2285          */
2286
2287         gc = gm = 0;
2288
2289         /* Allocate GPIOs for mimo antenna diversity feature */
2290         if (wlc_hw->antsel_type == ANTSEL_2x3) {
2291                 /* Enable antenna diversity, use 2x3 mode */
2292                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2293                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2294                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2295                              MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2296
2297                 /* init superswitch control */
2298                 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2299
2300         } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2301                 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2302                 /*
2303                  * The board itself is powered by these GPIOs
2304                  * (when not sending pattern) so set them high
2305                  */
2306                 OR_REG(&regs->psm_gpio_oe,
2307                        (BOARD_GPIO_12 | BOARD_GPIO_13));
2308                 OR_REG(&regs->psm_gpio_out,
2309                        (BOARD_GPIO_12 | BOARD_GPIO_13));
2310
2311                 /* Enable antenna diversity, use 2x4 mode */
2312                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2313                              MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2314                 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2315                              BRCM_BAND_ALL);
2316
2317                 /* Configure the desired clock to be 4Mhz */
2318                 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2319                                    ANTSEL_CLKDIV_4MHZ);
2320         }
2321
2322         /*
2323          * gpio 9 controls the PA. ucode is responsible
2324          * for wiggling out and oe
2325          */
2326         if (wlc_hw->boardflags & BFL_PACTRL)
2327                 gm |= gc |= BOARD_GPIO_PACTRL;
2328
2329         /* apply to gpiocontrol register */
2330         ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
2331 }
2332
2333 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2334                               const __le32 ucode[], const size_t nbytes)
2335 {
2336         struct d11regs __iomem *regs = wlc_hw->regs;
2337         uint i;
2338         uint count;
2339
2340         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2341
2342         count = (nbytes / sizeof(u32));
2343
2344         W_REG(&regs->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL));
2345         (void)R_REG(&regs->objaddr);
2346         for (i = 0; i < count; i++)
2347                 W_REG(&regs->objdata, le32_to_cpu(ucode[i]));
2348
2349 }
2350
2351 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2352 {
2353         struct brcms_c_info *wlc;
2354         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2355
2356         wlc = wlc_hw->wlc;
2357
2358         if (wlc_hw->ucode_loaded)
2359                 return;
2360
2361         if (D11REV_IS(wlc_hw->corerev, 23)) {
2362                 if (BRCMS_ISNPHY(wlc_hw->band)) {
2363                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2364                                           ucode->bcm43xx_16_mimosz);
2365                         wlc_hw->ucode_loaded = true;
2366                 } else
2367                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2368                                   "corerev %d\n",
2369                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2370         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2371                 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2372                         brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2373                                           ucode->bcm43xx_24_lcnsz);
2374                         wlc_hw->ucode_loaded = true;
2375                 } else {
2376                         wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2377                                   "corerev %d\n",
2378                                   __func__, wlc_hw->unit, wlc_hw->corerev);
2379                 }
2380         }
2381 }
2382
2383 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2384 {
2385         /* update sw state */
2386         wlc_hw->bmac_phytxant = phytxant;
2387
2388         /* push to ucode if up */
2389         if (!wlc_hw->up)
2390                 return;
2391         brcms_c_ucode_txant_set(wlc_hw);
2392
2393 }
2394
2395 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2396 {
2397         return (u16) wlc_hw->wlc->stf->txant;
2398 }
2399
2400 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2401 {
2402         wlc_hw->antsel_type = antsel_type;
2403
2404         /* Update the antsel type for phy module to use */
2405         wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2406 }
2407
2408 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2409 {
2410         bool fatal = false;
2411         uint unit;
2412         uint intstatus, idx;
2413         struct d11regs __iomem *regs = wlc_hw->regs;
2414         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2415
2416         unit = wlc_hw->unit;
2417
2418         for (idx = 0; idx < NFIFO; idx++) {
2419                 /* read intstatus register and ignore any non-error bits */
2420                 intstatus =
2421                     R_REG(&regs->intctrlregs[idx].intstatus) & I_ERRORS;
2422                 if (!intstatus)
2423                         continue;
2424
2425                 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2426                         unit, idx, intstatus);
2427
2428                 if (intstatus & I_RO) {
2429                         wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2430                                   "overflow\n", unit, idx);
2431                         fatal = true;
2432                 }
2433
2434                 if (intstatus & I_PC) {
2435                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2436                                  unit, idx);
2437                         fatal = true;
2438                 }
2439
2440                 if (intstatus & I_PD) {
2441                         wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2442                                   idx);
2443                         fatal = true;
2444                 }
2445
2446                 if (intstatus & I_DE) {
2447                         wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2448                                   "error\n", unit, idx);
2449                         fatal = true;
2450                 }
2451
2452                 if (intstatus & I_RU)
2453                         wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2454                                   "underflow\n", idx, unit);
2455
2456                 if (intstatus & I_XU) {
2457                         wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2458                                   "underflow\n", idx, unit);
2459                         fatal = true;
2460                 }
2461
2462                 if (fatal) {
2463                         brcms_c_fatal_error(wlc_hw->wlc);       /* big hammer */
2464                         break;
2465                 } else
2466                         W_REG(&regs->intctrlregs[idx].intstatus,
2467                               intstatus);
2468         }
2469 }
2470
2471 void brcms_c_intrson(struct brcms_c_info *wlc)
2472 {
2473         struct brcms_hardware *wlc_hw = wlc->hw;
2474         wlc->macintmask = wlc->defmacintmask;
2475         W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2476 }
2477
2478 /*
2479  * callback for siutils.c, which has only wlc handler, no wl they both check
2480  * up, not only because there is no need to off/restore d11 interrupt but also
2481  * because per-port code may require sync with valid interrupt.
2482  */
2483 static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc)
2484 {
2485         if (!wlc->hw->up)
2486                 return 0;
2487
2488         return brcms_intrsoff(wlc->wl);
2489 }
2490
2491 static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2492 {
2493         if (!wlc->hw->up)
2494                 return;
2495
2496         brcms_intrsrestore(wlc->wl, macintmask);
2497 }
2498
2499 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2500 {
2501         struct brcms_hardware *wlc_hw = wlc->hw;
2502         u32 macintmask;
2503
2504         if (!wlc_hw->clk)
2505                 return 0;
2506
2507         macintmask = wlc->macintmask;   /* isr can still happen */
2508
2509         W_REG(&wlc_hw->regs->macintmask, 0);
2510         (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */
2511         udelay(1);              /* ensure int line is no longer driven */
2512         wlc->macintmask = 0;
2513
2514         /* return previous macintmask; resolve race between us and our isr */
2515         return wlc->macintstatus ? 0 : macintmask;
2516 }
2517
2518 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2519 {
2520         struct brcms_hardware *wlc_hw = wlc->hw;
2521         if (!wlc_hw->clk)
2522                 return;
2523
2524         wlc->macintmask = macintmask;
2525         W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2526 }
2527
2528 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2529                                     uint tx_fifo)
2530 {
2531         u8 fifo = 1 << tx_fifo;
2532
2533         /* Two clients of this code, 11h Quiet period and scanning. */
2534
2535         /* only suspend if not already suspended */
2536         if ((wlc_hw->suspended_fifos & fifo) == fifo)
2537                 return;
2538
2539         /* force the core awake only if not already */
2540         if (wlc_hw->suspended_fifos == 0)
2541                 brcms_c_ucode_wake_override_set(wlc_hw,
2542                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2543
2544         wlc_hw->suspended_fifos |= fifo;
2545
2546         if (wlc_hw->di[tx_fifo]) {
2547                 /*
2548                  * Suspending AMPDU transmissions in the middle can cause
2549                  * underflow which may result in mismatch between ucode and
2550                  * driver so suspend the mac before suspending the FIFO
2551                  */
2552                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2553                         brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2554
2555                 dma_txsuspend(wlc_hw->di[tx_fifo]);
2556
2557                 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2558                         brcms_c_enable_mac(wlc_hw->wlc);
2559         }
2560 }
2561
2562 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2563                                    uint tx_fifo)
2564 {
2565         /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2566          * but need to be done here for PIO otherwise the watchdog will catch
2567          * the inconsistency and fire
2568          */
2569         /* Two clients of this code, 11h Quiet period and scanning. */
2570         if (wlc_hw->di[tx_fifo])
2571                 dma_txresume(wlc_hw->di[tx_fifo]);
2572
2573         /* allow core to sleep again */
2574         if (wlc_hw->suspended_fifos == 0)
2575                 return;
2576         else {
2577                 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2578                 if (wlc_hw->suspended_fifos == 0)
2579                         brcms_c_ucode_wake_override_clear(wlc_hw,
2580                                                 BRCMS_WAKE_OVERRIDE_TXFIFO);
2581         }
2582 }
2583
2584 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool on, u32 flags)
2585 {
2586         const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2587
2588         if (on) {
2589                 /* suspend tx fifos */
2590                 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2591                 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2592                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2593                 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2594
2595                 /* zero the address match register so we do not send ACKs */
2596                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2597                                        null_ether_addr);
2598         } else {
2599                 /* resume tx fifos */
2600                 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2601                 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2602                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2603                 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2604
2605                 /* Restore address */
2606                 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2607                                        wlc_hw->etheraddr);
2608         }
2609
2610         wlc_phy_mute_upd(wlc_hw->band->pi, on, flags);
2611
2612         if (on)
2613                 brcms_c_ucode_mute_override_set(wlc_hw);
2614         else
2615                 brcms_c_ucode_mute_override_clear(wlc_hw);
2616 }
2617
2618 /*
2619  * Read and clear macintmask and macintstatus and intstatus registers.
2620  * This routine should be called with interrupts off
2621  * Return:
2622  *   -1 if brcms_deviceremoved(wlc) evaluates to true;
2623  *   0 if the interrupt is not for us, or we are in some special cases;
2624  *   device interrupt status bits otherwise.
2625  */
2626 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2627 {
2628         struct brcms_hardware *wlc_hw = wlc->hw;
2629         struct d11regs __iomem *regs = wlc_hw->regs;
2630         u32 macintstatus;
2631
2632         /* macintstatus includes a DMA interrupt summary bit */
2633         macintstatus = R_REG(&regs->macintstatus);
2634
2635         BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2636                  macintstatus);
2637
2638         /* detect cardbus removed, in power down(suspend) and in reset */
2639         if (brcms_deviceremoved(wlc))
2640                 return -1;
2641
2642         /* brcms_deviceremoved() succeeds even when the core is still resetting,
2643          * handle that case here.
2644          */
2645         if (macintstatus == 0xffffffff)
2646                 return 0;
2647
2648         /* defer unsolicited interrupts */
2649         macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2650
2651         /* if not for us */
2652         if (macintstatus == 0)
2653                 return 0;
2654
2655         /* interrupts are already turned off for CFE build
2656          * Caution: For CFE Turning off the interrupts again has some undesired
2657          * consequences
2658          */
2659         /* turn off the interrupts */
2660         W_REG(&regs->macintmask, 0);
2661         (void)R_REG(&regs->macintmask); /* sync readback */
2662         wlc->macintmask = 0;
2663
2664         /* clear device interrupts */
2665         W_REG(&regs->macintstatus, macintstatus);
2666
2667         /* MI_DMAINT is indication of non-zero intstatus */
2668         if (macintstatus & MI_DMAINT)
2669                 /*
2670                  * only fifo interrupt enabled is I_RI in
2671                  * RX_FIFO. If MI_DMAINT is set, assume it
2672                  * is set and clear the interrupt.
2673                  */
2674                 W_REG(&regs->intctrlregs[RX_FIFO].intstatus,
2675                       DEF_RXINTMASK);
2676
2677         return macintstatus;
2678 }
2679
2680 /* Update wlc->macintstatus and wlc->intstatus[]. */
2681 /* Return true if they are updated successfully. false otherwise */
2682 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2683 {
2684         u32 macintstatus;
2685
2686         /* read and clear macintstatus and intstatus registers */
2687         macintstatus = wlc_intstatus(wlc, false);
2688
2689         /* device is removed */
2690         if (macintstatus == 0xffffffff)
2691                 return false;
2692
2693         /* update interrupt status in software */
2694         wlc->macintstatus |= macintstatus;
2695
2696         return true;
2697 }
2698
2699 /*
2700  * First-level interrupt processing.
2701  * Return true if this was our interrupt, false otherwise.
2702  * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2703  * false otherwise.
2704  */
2705 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2706 {
2707         struct brcms_hardware *wlc_hw = wlc->hw;
2708         u32 macintstatus;
2709
2710         *wantdpc = false;
2711
2712         if (!wlc_hw->up || !wlc->macintmask)
2713                 return false;
2714
2715         /* read and clear macintstatus and intstatus registers */
2716         macintstatus = wlc_intstatus(wlc, true);
2717
2718         if (macintstatus == 0xffffffff)
2719                 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2720                           " path\n");
2721
2722         /* it is not for us */
2723         if (macintstatus == 0)
2724                 return false;
2725
2726         *wantdpc = true;
2727
2728         /* save interrupt status bits */
2729         wlc->macintstatus = macintstatus;
2730
2731         return true;
2732
2733 }
2734
2735 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2736 {
2737         struct brcms_hardware *wlc_hw = wlc->hw;
2738         struct d11regs __iomem *regs = wlc_hw->regs;
2739         u32 mc, mi;
2740         struct wiphy *wiphy = wlc->wiphy;
2741
2742         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2743                 wlc_hw->band->bandunit);
2744
2745         /*
2746          * Track overlapping suspend requests
2747          */
2748         wlc_hw->mac_suspend_depth++;
2749         if (wlc_hw->mac_suspend_depth > 1)
2750                 return;
2751
2752         /* force the core awake */
2753         brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2754
2755         mc = R_REG(&regs->maccontrol);
2756
2757         if (mc == 0xffffffff) {
2758                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2759                           __func__);
2760                 brcms_down(wlc->wl);
2761                 return;
2762         }
2763         WARN_ON(mc & MCTL_PSM_JMP_0);
2764         WARN_ON(!(mc & MCTL_PSM_RUN));
2765         WARN_ON(!(mc & MCTL_EN_MAC));
2766
2767         mi = R_REG(&regs->macintstatus);
2768         if (mi == 0xffffffff) {
2769                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2770                           __func__);
2771                 brcms_down(wlc->wl);
2772                 return;
2773         }
2774         WARN_ON(mi & MI_MACSSPNDD);
2775
2776         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2777
2778         SPINWAIT(!(R_REG(&regs->macintstatus) & MI_MACSSPNDD),
2779                  BRCMS_MAX_MAC_SUSPEND);
2780
2781         if (!(R_REG(&regs->macintstatus) & MI_MACSSPNDD)) {
2782                 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2783                           " and MI_MACSSPNDD is still not on.\n",
2784                           wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2785                 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2786                           "psm_brc 0x%04x\n", wlc_hw->unit,
2787                           R_REG(&regs->psmdebug),
2788                           R_REG(&regs->phydebug),
2789                           R_REG(&regs->psm_brc));
2790         }
2791
2792         mc = R_REG(&regs->maccontrol);
2793         if (mc == 0xffffffff) {
2794                 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2795                           __func__);
2796                 brcms_down(wlc->wl);
2797                 return;
2798         }
2799         WARN_ON(mc & MCTL_PSM_JMP_0);
2800         WARN_ON(!(mc & MCTL_PSM_RUN));
2801         WARN_ON(mc & MCTL_EN_MAC);
2802 }
2803
2804 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2805 {
2806         struct brcms_hardware *wlc_hw = wlc->hw;
2807         struct d11regs __iomem *regs = wlc_hw->regs;
2808         u32 mc, mi;
2809
2810         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2811                 wlc->band->bandunit);
2812
2813         /*
2814          * Track overlapping suspend requests
2815          */
2816         wlc_hw->mac_suspend_depth--;
2817         if (wlc_hw->mac_suspend_depth > 0)
2818                 return;
2819
2820         mc = R_REG(&regs->maccontrol);
2821         WARN_ON(mc & MCTL_PSM_JMP_0);
2822         WARN_ON(mc & MCTL_EN_MAC);
2823         WARN_ON(!(mc & MCTL_PSM_RUN));
2824
2825         brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2826         W_REG(&regs->macintstatus, MI_MACSSPNDD);
2827
2828         mc = R_REG(&regs->maccontrol);
2829         WARN_ON(mc & MCTL_PSM_JMP_0);
2830         WARN_ON(!(mc & MCTL_EN_MAC));
2831         WARN_ON(!(mc & MCTL_PSM_RUN));
2832
2833         mi = R_REG(&regs->macintstatus);
2834         WARN_ON(mi & MI_MACSSPNDD);
2835
2836         brcms_c_ucode_wake_override_clear(wlc_hw,
2837                                           BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2838 }
2839
2840 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2841 {
2842         wlc_hw->hw_stf_ss_opmode = stf_mode;
2843
2844         if (wlc_hw->clk)
2845                 brcms_upd_ofdm_pctl1_table(wlc_hw);
2846 }
2847
2848 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2849 {
2850         struct d11regs __iomem *regs;
2851         u32 w, val;
2852         struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2853
2854         BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2855
2856         regs = wlc_hw->regs;
2857
2858         /* Validate dchip register access */
2859
2860         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2861         (void)R_REG(&regs->objaddr);
2862         w = R_REG(&regs->objdata);
2863
2864         /* Can we write and read back a 32bit register? */
2865         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2866         (void)R_REG(&regs->objaddr);
2867         W_REG(&regs->objdata, (u32) 0xaa5555aa);
2868
2869         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2870         (void)R_REG(&regs->objaddr);
2871         val = R_REG(&regs->objdata);
2872         if (val != (u32) 0xaa5555aa) {
2873                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2874                           "expected 0xaa5555aa\n", wlc_hw->unit, val);
2875                 return false;
2876         }
2877
2878         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2879         (void)R_REG(&regs->objaddr);
2880         W_REG(&regs->objdata, (u32) 0x55aaaa55);
2881
2882         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2883         (void)R_REG(&regs->objaddr);
2884         val = R_REG(&regs->objdata);
2885         if (val != (u32) 0x55aaaa55) {
2886                 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2887                           "expected 0x55aaaa55\n", wlc_hw->unit, val);
2888                 return false;
2889         }
2890
2891         W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2892         (void)R_REG(&regs->objaddr);
2893         W_REG(&regs->objdata, w);
2894
2895         /* clear CFPStart */
2896         W_REG(&regs->tsf_cfpstart, 0);
2897
2898         w = R_REG(&regs->maccontrol);
2899         if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2900             (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2901                 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2902                           "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2903                           (MCTL_IHR_EN | MCTL_WAKE),
2904                           (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2905                 return false;
2906         }
2907
2908         return true;
2909 }
2910
2911 #define PHYPLL_WAIT_US  100000
2912
2913 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2914 {
2915         struct d11regs __iomem *regs;
2916         u32 tmp;
2917
2918         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2919
2920         tmp = 0;
2921         regs = wlc_hw->regs;
2922
2923         if (on) {
2924                 if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
2925                         OR_REG(&regs->clk_ctl_st,
2926                                (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL |
2927                                 CCS_ERSRC_REQ_PHYPLL));
2928                         SPINWAIT((R_REG(&regs->clk_ctl_st) &
2929                                   (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT),
2930                                  PHYPLL_WAIT_US);
2931
2932                         tmp = R_REG(&regs->clk_ctl_st);
2933                         if ((tmp & (CCS_ERSRC_AVAIL_HT)) !=
2934                             (CCS_ERSRC_AVAIL_HT))
2935                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2936                                           " PLL failed\n", __func__);
2937                 } else {
2938                         OR_REG(&regs->clk_ctl_st,
2939                                (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL));
2940                         SPINWAIT((R_REG(&regs->clk_ctl_st) &
2941                                   (CCS_ERSRC_AVAIL_D11PLL |
2942                                    CCS_ERSRC_AVAIL_PHYPLL)) !=
2943                                  (CCS_ERSRC_AVAIL_D11PLL |
2944                                   CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2945
2946                         tmp = R_REG(&regs->clk_ctl_st);
2947                         if ((tmp &
2948                              (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2949                             !=
2950                             (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2951                                 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2952                                           "PHY PLL failed\n", __func__);
2953                 }
2954         } else {
2955                 /*
2956                  * Since the PLL may be shared, other cores can still
2957                  * be requesting it; so we'll deassert the request but
2958                  * not wait for status to comply.
2959                  */
2960                 AND_REG(&regs->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL);
2961                 tmp = R_REG(&regs->clk_ctl_st);
2962         }
2963 }
2964
2965 void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2966 {
2967         bool dev_gone;
2968
2969         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2970
2971         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
2972
2973         if (dev_gone)
2974                 return;
2975
2976         if (wlc_hw->noreset)
2977                 return;
2978
2979         /* radio off */
2980         wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
2981
2982         /* turn off analog core */
2983         wlc_phy_anacore(wlc_hw->band->pi, OFF);
2984
2985         /* turn off PHYPLL to save power */
2986         brcms_b_core_phypll_ctl(wlc_hw, false);
2987
2988         wlc_hw->clk = false;
2989         ai_core_disable(wlc_hw->sih, 0);
2990         wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2991 }
2992
2993 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
2994 {
2995         struct brcms_hardware *wlc_hw = wlc->hw;
2996         uint i;
2997
2998         /* free any posted tx packets */
2999         for (i = 0; i < NFIFO; i++)
3000                 if (wlc_hw->di[i]) {
3001                         dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
3002                         wlc->core->txpktpend[i] = 0;
3003                         BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
3004                 }
3005
3006         /* free any posted rx packets */
3007         dma_rxreclaim(wlc_hw->di[RX_FIFO]);
3008 }
3009
3010 static u16
3011 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
3012 {
3013         struct d11regs __iomem *regs = wlc_hw->regs;
3014         u16 __iomem *objdata_lo = (u16 __iomem *)&regs->objdata;
3015         u16 __iomem *objdata_hi = objdata_lo + 1;
3016         u16 v;
3017
3018         W_REG(&regs->objaddr, sel | (offset >> 2));
3019         (void)R_REG(&regs->objaddr);
3020         if (offset & 2)
3021                 v = R_REG(objdata_hi);
3022         else
3023                 v = R_REG(objdata_lo);
3024
3025         return v;
3026 }
3027
3028 static void
3029 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
3030                      u32 sel)
3031 {
3032         struct d11regs __iomem *regs = wlc_hw->regs;
3033         u16 __iomem *objdata_lo = (u16 __iomem *)&regs->objdata;
3034         u16 __iomem *objdata_hi = objdata_lo + 1;
3035
3036         W_REG(&regs->objaddr, sel | (offset >> 2));
3037         (void)R_REG(&regs->objaddr);
3038         if (offset & 2)
3039                 W_REG(objdata_hi, v);
3040         else
3041                 W_REG(objdata_lo, v);
3042 }
3043
3044 /*
3045  * Read a single u16 from shared memory.
3046  * SHM 'offset' needs to be an even address
3047  */
3048 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
3049 {
3050         return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
3051 }
3052
3053 /*
3054  * Write a single u16 to shared memory.
3055  * SHM 'offset' needs to be an even address
3056  */
3057 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
3058 {
3059         brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
3060 }
3061
3062 /*
3063  * Copy a buffer to shared memory of specified type .
3064  * SHM 'offset' needs to be an even address and
3065  * Buffer length 'len' must be an even number of bytes
3066  * 'sel' selects the type of memory
3067  */
3068 void
3069 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
3070                       const void *buf, int len, u32 sel)
3071 {
3072         u16 v;
3073         const u8 *p = (const u8 *)buf;
3074         int i;
3075
3076         if (len <= 0 || (offset & 1) || (len & 1))
3077                 return;
3078
3079         for (i = 0; i < len; i += 2) {
3080                 v = p[i] | (p[i + 1] << 8);
3081                 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
3082         }
3083 }
3084
3085 /*
3086  * Copy a piece of shared memory of specified type to a buffer .
3087  * SHM 'offset' needs to be an even address and
3088  * Buffer length 'len' must be an even number of bytes
3089  * 'sel' selects the type of memory
3090  */
3091 void
3092 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
3093                          int len, u32 sel)
3094 {
3095         u16 v;
3096         u8 *p = (u8 *) buf;
3097         int i;
3098
3099         if (len <= 0 || (offset & 1) || (len & 1))
3100                 return;
3101
3102         for (i = 0; i < len; i += 2) {
3103                 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
3104                 p[i] = v & 0xFF;
3105                 p[i + 1] = (v >> 8) & 0xFF;
3106         }
3107 }
3108
3109 static void brcms_b_copyfrom_vars(struct brcms_hardware *wlc_hw, char **buf,
3110                            uint *len)
3111 {
3112         BCMMSG(wlc_hw->wlc->wiphy, "nvram vars totlen=%d\n",
3113                 wlc_hw->vars_size);
3114
3115         *buf = wlc_hw->vars;
3116         *len = wlc_hw->vars_size;
3117 }
3118
3119 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
3120                                    u16 SRL, u16 LRL)
3121 {
3122         wlc_hw->SRL = SRL;
3123         wlc_hw->LRL = LRL;
3124
3125         /* write retry limit to SCR, shouldn't need to suspend */
3126         if (wlc_hw->up) {
3127                 W_REG(&wlc_hw->regs->objaddr,
3128                       OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3129                 (void)R_REG(&wlc_hw->regs->objaddr);
3130                 W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL);
3131                 W_REG(&wlc_hw->regs->objaddr,
3132                       OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3133                 (void)R_REG(&wlc_hw->regs->objaddr);
3134                 W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL);
3135         }
3136 }
3137
3138 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3139 {
3140         if (set) {
3141                 if (mboolisset(wlc_hw->pllreq, req_bit))
3142                         return;
3143
3144                 mboolset(wlc_hw->pllreq, req_bit);
3145
3146                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3147                         if (!wlc_hw->sbclk)
3148                                 brcms_b_xtal(wlc_hw, ON);
3149                 }
3150         } else {
3151                 if (!mboolisset(wlc_hw->pllreq, req_bit))
3152                         return;
3153
3154                 mboolclr(wlc_hw->pllreq, req_bit);
3155
3156                 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3157                         if (wlc_hw->sbclk)
3158                                 brcms_b_xtal(wlc_hw, OFF);
3159                 }
3160         }
3161 }
3162
3163 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3164 {
3165         wlc_hw->antsel_avail = antsel_avail;
3166 }
3167
3168 /*
3169  * conditions under which the PM bit should be set in outgoing frames
3170  * and STAY_AWAKE is meaningful
3171  */
3172 bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3173 {
3174         struct brcms_bss_cfg *cfg = wlc->bsscfg;
3175
3176         /* disallow PS when one of the following global conditions meets */
3177         if (!wlc->pub->associated)
3178                 return false;
3179
3180         /* disallow PS when one of these meets when not scanning */
3181         if (wlc->monitor)
3182                 return false;
3183
3184         if (cfg->associated) {
3185                 /*
3186                  * disallow PS when one of the following
3187                  * bsscfg specific conditions meets
3188                  */
3189                 if (!cfg->BSS)
3190                         return false;
3191
3192                 return false;
3193         }
3194
3195         return true;
3196 }
3197
3198 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3199 {
3200         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3201
3202         /* reset the core */
3203         if (!brcms_deviceremoved(wlc_hw->wlc))
3204                 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3205
3206         /* purge the dma rings */
3207         brcms_c_flushqueues(wlc_hw->wlc);
3208 }
3209
3210 void brcms_c_reset(struct brcms_c_info *wlc)
3211 {
3212         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3213
3214         /* slurp up hw mac counters before core reset */
3215         brcms_c_statsupd(wlc);
3216
3217         /* reset our snapshot of macstat counters */
3218         memset((char *)wlc->core->macstat_snapshot, 0,
3219                 sizeof(struct macstat));
3220
3221         brcms_b_reset(wlc->hw);
3222 }
3223
3224 void brcms_c_fatal_error(struct brcms_c_info *wlc)
3225 {
3226         wiphy_err(wlc->wiphy, "wl%d: fatal error, reinitializing\n",
3227                   wlc->pub->unit);
3228         brcms_init(wlc->wl);
3229 }
3230
3231 /* Return the channel the driver should initialize during brcms_c_init.
3232  * the channel may have to be changed from the currently configured channel
3233  * if other configurations are in conflict (bandlocked, 11n mode disabled,
3234  * invalid channel for current country, etc.)
3235  */
3236 static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc)
3237 {
3238         u16 chanspec =
3239             1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE |
3240             WL_CHANSPEC_BAND_2G;
3241
3242         return chanspec;
3243 }
3244
3245 void brcms_c_init_scb(struct scb *scb)
3246 {
3247         int i;
3248
3249         memset(scb, 0, sizeof(struct scb));
3250         scb->flags = SCB_WMECAP | SCB_HTCAP;
3251         for (i = 0; i < NUMPRIO; i++) {
3252                 scb->seqnum[i] = 0;
3253                 scb->seqctl[i] = 0xFFFF;
3254         }
3255
3256         scb->seqctl_nonqos = 0xFFFF;
3257         scb->magic = SCB_MAGIC;
3258 }
3259
3260 /* d11 core init
3261  *   reset PSM
3262  *   download ucode/PCM
3263  *   let ucode run to suspended
3264  *   download ucode inits
3265  *   config other core registers
3266  *   init dma
3267  */
3268 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3269 {
3270         struct brcms_hardware *wlc_hw = wlc->hw;
3271         struct d11regs __iomem *regs;
3272         u32 sflags;
3273         uint bcnint_us;
3274         uint i = 0;
3275         bool fifosz_fixup = false;
3276         int err = 0;
3277         u16 buf[NFIFO];
3278         struct wiphy *wiphy = wlc->wiphy;
3279         struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3280
3281         regs = wlc_hw->regs;
3282
3283         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3284
3285         /* reset PSM */
3286         brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3287
3288         brcms_ucode_download(wlc_hw);
3289         /*
3290          * FIFOSZ fixup. driver wants to controls the fifo allocation.
3291          */
3292         fifosz_fixup = true;
3293
3294         /* let the PSM run to the suspended state, set mode to BSS STA */
3295         W_REG(&regs->macintstatus, -1);
3296         brcms_b_mctrl(wlc_hw, ~0,
3297                        (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3298
3299         /* wait for ucode to self-suspend after auto-init */
3300         SPINWAIT(((R_REG(&regs->macintstatus) & MI_MACSSPNDD) == 0),
3301                  1000 * 1000);
3302         if ((R_REG(&regs->macintstatus) & MI_MACSSPNDD) == 0)
3303                 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3304                           "suspend!\n", wlc_hw->unit);
3305
3306         brcms_c_gpio_init(wlc);
3307
3308         sflags = ai_core_sflags(wlc_hw->sih, 0, 0);
3309
3310         if (D11REV_IS(wlc_hw->corerev, 23)) {
3311                 if (BRCMS_ISNPHY(wlc_hw->band))
3312                         brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3313                 else
3314                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3315                                   " %d\n", __func__, wlc_hw->unit,
3316                                   wlc_hw->corerev);
3317         } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3318                 if (BRCMS_ISLCNPHY(wlc_hw->band))
3319                         brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3320                 else
3321                         wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3322                                   " %d\n", __func__, wlc_hw->unit,
3323                                   wlc_hw->corerev);
3324         } else {
3325                 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3326                           __func__, wlc_hw->unit, wlc_hw->corerev);
3327         }
3328
3329         /* For old ucode, txfifo sizes needs to be modified(increased) */
3330         if (fifosz_fixup == true)
3331                 brcms_b_corerev_fifofixup(wlc_hw);
3332
3333         /* check txfifo allocations match between ucode and driver */
3334         buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3335         if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3336                 i = TX_AC_BE_FIFO;
3337                 err = -1;
3338         }
3339         buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3340         if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3341                 i = TX_AC_VI_FIFO;
3342                 err = -1;
3343         }
3344         buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3345         buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3346         buf[TX_AC_BK_FIFO] &= 0xff;
3347         if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3348                 i = TX_AC_BK_FIFO;
3349                 err = -1;
3350         }
3351         if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3352                 i = TX_AC_VO_FIFO;
3353                 err = -1;
3354         }
3355         buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3356         buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3357         buf[TX_BCMC_FIFO] &= 0xff;
3358         if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3359                 i = TX_BCMC_FIFO;
3360                 err = -1;
3361         }
3362         if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3363                 i = TX_ATIM_FIFO;
3364                 err = -1;
3365         }
3366         if (err != 0)
3367                 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3368                           " driver size %d index %d\n", buf[i],
3369                           wlc_hw->xmtfifo_sz[i], i);
3370
3371         /* make sure we can still talk to the mac */
3372         WARN_ON(R_REG(&regs->maccontrol) == 0xffffffff);
3373
3374         /* band-specific inits done by wlc_bsinit() */
3375
3376         /* Set up frame burst size and antenna swap threshold init values */
3377         brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3378         brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3379
3380         /* enable one rx interrupt per received frame */
3381         W_REG(&regs->intrcvlazy[0], (1 << IRL_FC_SHIFT));
3382
3383         /* set the station mode (BSS STA) */
3384         brcms_b_mctrl(wlc_hw,
3385                        (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3386                        (MCTL_INFRA | MCTL_DISCARD_PMQ));
3387
3388         /* set up Beacon interval */
3389         bcnint_us = 0x8000 << 10;
3390         W_REG(&regs->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT));
3391         W_REG(&regs->tsf_cfpstart, bcnint_us);
3392         W_REG(&regs->macintstatus, MI_GP1);
3393
3394         /* write interrupt mask */
3395         W_REG(&regs->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK);
3396
3397         /* allow the MAC to control the PHY clock (dynamic on/off) */
3398         brcms_b_macphyclk_set(wlc_hw, ON);
3399
3400         /* program dynamic clock control fast powerup delay register */
3401         wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3402         W_REG(&regs->scc_fastpwrup_dly, wlc->fastpwrup_dly);
3403
3404         /* tell the ucode the corerev */
3405         brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3406
3407         /* tell the ucode MAC capabilities */
3408         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3409                            (u16) (wlc_hw->machwcap & 0xffff));
3410         brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3411                            (u16) ((wlc_hw->
3412                                       machwcap >> 16) & 0xffff));
3413
3414         /* write retry limits to SCR, this done after PSM init */
3415         W_REG(&regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3416         (void)R_REG(&regs->objaddr);
3417         W_REG(&regs->objdata, wlc_hw->SRL);
3418         W_REG(&regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3419         (void)R_REG(&regs->objaddr);
3420         W_REG(&regs->objdata, wlc_hw->LRL);
3421
3422         /* write rate fallback retry limits */
3423         brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3424         brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3425
3426         AND_REG(&regs->ifs_ctl, 0x0FFF);
3427         W_REG(&regs->ifs_aifsn, EDCF_AIFSN_MIN);
3428
3429         /* init the tx dma engines */
3430         for (i = 0; i < NFIFO; i++) {
3431                 if (wlc_hw->di[i])
3432                         dma_txinit(wlc_hw->di[i]);
3433         }
3434
3435         /* init the rx dma engine(s) and post receive buffers */
3436         dma_rxinit(wlc_hw->di[RX_FIFO]);
3437         dma_rxfill(wlc_hw->di[RX_FIFO]);
3438 }
3439
3440 void
3441 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec,
3442                           bool mute) {
3443         u32 macintmask;
3444         bool fastclk;
3445         struct brcms_c_info *wlc = wlc_hw->wlc;
3446
3447         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3448
3449         /* request FAST clock if not on */
3450         fastclk = wlc_hw->forcefastclk;
3451         if (!fastclk)
3452                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
3453
3454         /* disable interrupts */
3455         macintmask = brcms_intrsoff(wlc->wl);
3456
3457         /* set up the specified band and chanspec */
3458         brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3459         wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3460
3461         /* do one-time phy inits and calibration */
3462         wlc_phy_cal_init(wlc_hw->band->pi);
3463
3464         /* core-specific initialization */
3465         brcms_b_coreinit(wlc);
3466
3467         /* suspend the tx fifos and mute the phy for preism cac time */
3468         if (mute)
3469                 brcms_b_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM);
3470
3471         /* band-specific inits */
3472         brcms_b_bsinit(wlc, chanspec);
3473
3474         /* restore macintmask */
3475         brcms_intrsrestore(wlc->wl, macintmask);
3476
3477         /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3478          * is suspended and brcms_c_enable_mac() will clear this override bit.
3479          */
3480         mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3481
3482         /*
3483          * initialize mac_suspend_depth to 1 to match ucode
3484          * initial suspended state
3485          */
3486         wlc_hw->mac_suspend_depth = 1;
3487
3488         /* restore the clk */
3489         if (!fastclk)
3490                 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
3491 }
3492
3493 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3494                                      u16 chanspec)
3495 {
3496         /* Save our copy of the chanspec */
3497         wlc->chanspec = chanspec;
3498
3499         /* Set the chanspec and power limits for this locale */
3500         brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3501
3502         if (wlc->stf->ss_algosel_auto)
3503                 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3504                                             chanspec);
3505
3506         brcms_c_stf_ss_update(wlc, wlc->band);
3507
3508 }
3509
3510 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3511                                      u16 chanspec)
3512 {
3513         struct brcms_c_rateset default_rateset;
3514         uint parkband;
3515         uint i, band_order[2];
3516
3517         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3518         /*
3519          * We might have been bandlocked during down and the chip
3520          * power-cycled (hibernate). Figure out the right band to park on
3521          */
3522         if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3523                 /* updated in brcms_c_bandlock() */
3524                 parkband = wlc->band->bandunit;
3525                 band_order[0] = band_order[1] = parkband;
3526         } else {
3527                 /* park on the band of the specified chanspec */
3528                 parkband = chspec_bandunit(chanspec);
3529
3530                 /* order so that parkband initialize last */
3531                 band_order[0] = parkband ^ 1;
3532                 band_order[1] = parkband;
3533         }
3534
3535         /* make each band operational, software state init */
3536         for (i = 0; i < wlc->pub->_nbands; i++) {
3537                 uint j = band_order[i];
3538
3539                 wlc->band = wlc->bandstate[j];
3540
3541                 brcms_default_rateset(wlc, &default_rateset);
3542
3543                 /* fill in hw_rate */
3544                 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3545                                    false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3546                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3547
3548                 /* init basic rate lookup */
3549                 brcms_c_rate_lookup_init(wlc, &default_rateset);
3550         }
3551
3552         /* sync up phy/radio chanspec */
3553         brcms_c_set_phy_chanspec(wlc, chanspec);
3554 }
3555
3556 /*
3557  * ucode, hwmac update
3558  *    Channel dependent updates for ucode and hw
3559  */
3560 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3561 {
3562         /* enable or disable any active IBSSs depending on whether or not
3563          * we are on the home channel
3564          */
3565         if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3566                 if (wlc->pub->associated) {
3567                         /*
3568                          * BMAC_NOTE: This is something that should be fixed
3569                          * in ucode inits. I think that the ucode inits set
3570                          * up the bcn templates and shm values with a bogus
3571                          * beacon. This should not be done in the inits. If
3572                          * ucode needs to set up a beacon for testing, the
3573                          * test routines should write it down, not expect the
3574                          * inits to populate a bogus beacon.
3575                          */
3576                         if (BRCMS_PHY_11N_CAP(wlc->band))
3577                                 brcms_b_write_shm(wlc->hw,
3578                                                 M_BCN_TXTSF_OFFSET, 0);
3579                 }
3580         } else {
3581                 /* disable an active IBSS if we are not on the home channel */
3582         }
3583
3584         /* update the various promisc bits */
3585         brcms_c_mac_bcn_promisc(wlc);
3586         brcms_c_mac_promisc(wlc);
3587 }
3588
3589 /* band-specific init */
3590 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3591 {
3592         BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3593                  wlc->pub->unit, wlc->band->bandunit);
3594
3595         /* write ucode ACK/CTS rate table */
3596         brcms_c_set_ratetable(wlc);
3597
3598         /* update some band specific mac configuration */
3599         brcms_c_ucode_mac_upd(wlc);
3600
3601         /* init antenna selection */
3602         brcms_c_antsel_init(wlc->asi);
3603
3604 }
3605
3606 /* formula:  IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3607 static int
3608 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3609                    bool writeToShm)
3610 {
3611         int idle_busy_ratio_x_16 = 0;
3612         uint offset =
3613             isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3614             M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3615         if (duty_cycle > 100 || duty_cycle < 0) {
3616                 wiphy_err(wlc->wiphy, "wl%d:  duty cycle value off limit\n",
3617                           wlc->pub->unit);
3618                 return -EINVAL;
3619         }
3620         if (duty_cycle)
3621                 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3622         /* Only write to shared memory  when wl is up */
3623         if (writeToShm)
3624                 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3625
3626         if (isOFDM)
3627                 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3628         else
3629                 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3630
3631         return 0;
3632 }
3633
3634 /*
3635  * Initialize the base precedence map for dequeueing
3636  * from txq based on WME settings
3637  */
3638 static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3639 {
3640         wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3641         memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3642
3643         wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3644         wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3645         wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3646         wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3647 }
3648
3649 static void
3650 brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc,
3651                              struct brcms_txq_info *qi, bool on, int prio)
3652 {
3653         /* transmit flowcontrol is not yet implemented */
3654 }
3655
3656 static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc)
3657 {
3658         struct brcms_txq_info *qi;
3659
3660         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
3661                 if (qi->stopped) {
3662                         brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
3663                         qi->stopped = 0;
3664                 }
3665         }
3666 }
3667
3668 void brcms_c_init(struct brcms_c_info *wlc)
3669 {
3670         struct d11regs __iomem *regs;
3671         u16 chanspec;
3672         bool mute = false;
3673
3674         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3675
3676         regs = wlc->regs;
3677
3678         /*
3679          * This will happen if a big-hammer was executed. In
3680          * that case, we want to go back to the channel that
3681          * we were on and not new channel
3682          */
3683         if (wlc->pub->associated)
3684                 chanspec = wlc->home_chanspec;
3685         else
3686                 chanspec = brcms_c_init_chanspec(wlc);
3687
3688         brcms_b_init(wlc->hw, chanspec, mute);
3689
3690         /* update beacon listen interval */
3691         brcms_c_bcn_li_upd(wlc);
3692
3693         /* write ethernet address to core */
3694         brcms_c_set_mac(wlc->bsscfg);
3695         brcms_c_set_bssid(wlc->bsscfg);
3696
3697         /* Update tsf_cfprep if associated and up */
3698         if (wlc->pub->associated && wlc->bsscfg->up) {
3699                 u32 bi;
3700
3701                 /* get beacon period and convert to uS */
3702                 bi = wlc->bsscfg->current_bss->beacon_period << 10;
3703                 /*
3704                  * update since init path would reset
3705                  * to default value
3706                  */
3707                 W_REG(&regs->tsf_cfprep,
3708                       (bi << CFPREP_CBI_SHIFT));
3709
3710                 /* Update maccontrol PM related bits */
3711                 brcms_c_set_ps_ctrl(wlc);
3712         }
3713
3714         brcms_c_bandinit_ordered(wlc, chanspec);
3715
3716         /* init probe response timeout */
3717         brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
3718
3719         /* init max burst txop (framebursting) */
3720         brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
3721                       (wlc->
3722                        _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
3723
3724         /* initialize maximum allowed duty cycle */
3725         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
3726         brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
3727
3728         /*
3729          * Update some shared memory locations related to
3730          * max AMPDU size allowed to received
3731          */
3732         brcms_c_ampdu_shm_upd(wlc->ampdu);
3733
3734         /* band-specific inits */
3735         brcms_c_bsinit(wlc);
3736
3737         /* Enable EDCF mode (while the MAC is suspended) */
3738         OR_REG(&regs->ifs_ctl, IFS_USEEDCF);
3739         brcms_c_edcf_setparams(wlc, false);
3740
3741         /* Init precedence maps for empty FIFOs */
3742         brcms_c_tx_prec_map_init(wlc);
3743
3744         /* read the ucode version if we have not yet done so */
3745         if (wlc->ucode_rev == 0) {
3746                 wlc->ucode_rev =
3747                     brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
3748                 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
3749         }
3750
3751         /* ..now really unleash hell (allow the MAC out of suspend) */
3752         brcms_c_enable_mac(wlc);
3753
3754         /* clear tx flow control */
3755         brcms_c_txflowcontrol_reset(wlc);
3756
3757         /* enable the RF Disable Delay timer */
3758         W_REG(&wlc->regs->rfdisabledly, RFDISABLE_DEFAULT);
3759
3760         /* initialize mpc delay */
3761         wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
3762
3763         /*
3764          * Initialize WME parameters; if they haven't been set by some other
3765          * mechanism (IOVar, etc) then read them from the hardware.
3766          */
3767         if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
3768                 /* Uninitialized; read from HW */
3769                 int ac;
3770
3771                 for (ac = 0; ac < AC_COUNT; ac++)
3772                         wlc->wme_retries[ac] =
3773                             brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
3774         }
3775 }
3776
3777 void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc, bool promisc)
3778 {
3779         wlc->bcnmisc_monitor = promisc;
3780         brcms_c_mac_bcn_promisc(wlc);
3781 }
3782
3783 void brcms_c_mac_bcn_promisc(struct brcms_c_info *wlc)
3784 {
3785         if (wlc->bcnmisc_monitor)
3786                 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC);
3787         else
3788                 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, 0);
3789 }
3790
3791 /* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */
3792 void brcms_c_mac_promisc(struct brcms_c_info *wlc)
3793 {
3794         u32 promisc_bits = 0;
3795
3796         /*
3797          * promiscuous mode just sets MCTL_PROMISC
3798          * Note: APs get all BSS traffic without the need to set
3799          * the MCTL_PROMISC bit since all BSS data traffic is
3800          * directed at the AP
3801          */
3802         if (wlc->pub->promisc)
3803                 promisc_bits |= MCTL_PROMISC;
3804
3805         /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL
3806          * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is
3807          * handled in brcms_c_mac_bcn_promisc()
3808          */
3809         if (wlc->monitor)
3810                 promisc_bits |= MCTL_PROMISC | MCTL_KEEPCONTROL;
3811
3812         brcms_b_mctrl(wlc->hw, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits);
3813 }
3814
3815 /* push sw hps and wake state through hardware */
3816 void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3817 {
3818         u32 v1, v2;
3819         bool hps;
3820         bool awake_before;
3821
3822         hps = brcms_c_ps_allowed(wlc);
3823
3824         BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3825
3826         v1 = R_REG(&wlc->regs->maccontrol);
3827         v2 = MCTL_WAKE;
3828         if (hps)
3829                 v2 |= MCTL_HPS;
3830
3831         brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3832
3833         awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3834
3835         if (!awake_before)
3836                 brcms_b_wait_for_wake(wlc->hw);
3837
3838 }
3839
3840 /*
3841  * Write this BSS config's MAC address to core.
3842  * Updates RXE match engine.
3843  */
3844 int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3845 {
3846         int err = 0;
3847         struct brcms_c_info *wlc = bsscfg->wlc;
3848
3849         /* enter the MAC addr into the RXE match registers */
3850         brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3851
3852         brcms_c_ampdu_macaddr_upd(wlc);
3853
3854         return err;
3855 }
3856
3857 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3858  * Updates RXE match engine.
3859  */
3860 void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3861 {
3862         /* we need to update BSSID in RXE match registers */
3863         brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3864 }
3865
3866 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3867 {
3868         wlc_hw->shortslot = shortslot;
3869
3870         if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3871                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3872                 brcms_b_update_slot_timing(wlc_hw, shortslot);
3873                 brcms_c_enable_mac(wlc_hw->wlc);
3874         }
3875 }
3876
3877 /*
3878  * Suspend the the MAC and update the slot timing
3879  * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3880  */
3881 void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3882 {
3883         /* use the override if it is set */
3884         if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3885                 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3886
3887         if (wlc->shortslot == shortslot)
3888                 return;
3889
3890         wlc->shortslot = shortslot;
3891
3892         brcms_b_set_shortslot(wlc->hw, shortslot);
3893 }
3894
3895 void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3896 {
3897         if (wlc->home_chanspec != chanspec) {
3898                 wlc->home_chanspec = chanspec;
3899
3900                 if (wlc->bsscfg->associated)
3901                         wlc->bsscfg->current_bss->chanspec = chanspec;
3902         }
3903 }
3904
3905 void
3906 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3907                       bool mute, struct txpwr_limits *txpwr)
3908 {
3909         uint bandunit;
3910
3911         BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3912
3913         wlc_hw->chanspec = chanspec;
3914
3915         /* Switch bands if necessary */
3916         if (wlc_hw->_nbands > 1) {
3917                 bandunit = chspec_bandunit(chanspec);
3918                 if (wlc_hw->band->bandunit != bandunit) {
3919                         /* brcms_b_setband disables other bandunit,
3920                          *  use light band switch if not up yet
3921                          */
3922                         if (wlc_hw->up) {
3923                                 wlc_phy_chanspec_radio_set(wlc_hw->
3924                                                            bandstate[bandunit]->
3925                                                            pi, chanspec);
3926                                 brcms_b_setband(wlc_hw, bandunit, chanspec);
3927                         } else {
3928                                 brcms_c_setxband(wlc_hw, bandunit);
3929                         }
3930                 }
3931         }
3932
3933         wlc_phy_initcal_enable(wlc_hw->band->pi, !mute);
3934
3935         if (!wlc_hw->up) {
3936                 if (wlc_hw->clk)
3937                         wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3938                                                   chanspec);
3939                 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3940         } else {
3941                 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3942                 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3943
3944                 /* Update muting of the channel */
3945                 brcms_b_mute(wlc_hw, mute, 0);
3946         }
3947 }
3948
3949 /* switch to and initialize new band */
3950 static void brcms_c_setband(struct brcms_c_info *wlc,
3951                                            uint bandunit)
3952 {
3953         wlc->band = wlc->bandstate[bandunit];
3954
3955         if (!wlc->pub->up)
3956                 return;
3957
3958         /* wait for at least one beacon before entering sleeping state */
3959         brcms_c_set_ps_ctrl(wlc);
3960
3961         /* band-specific initializations */
3962         brcms_c_bsinit(wlc);
3963 }
3964
3965 void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3966 {
3967         uint bandunit;
3968         bool switchband = false;
3969         u16 old_chanspec = wlc->chanspec;
3970
3971         if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
3972                 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
3973                           wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
3974                 return;
3975         }
3976
3977         /* Switch bands if necessary */
3978         if (wlc->pub->_nbands > 1) {
3979                 bandunit = chspec_bandunit(chanspec);
3980                 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
3981                         switchband = true;
3982                         if (wlc->bandlocked) {
3983                                 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
3984                                           "band is locked!\n",
3985                                           wlc->pub->unit, __func__,
3986                                           CHSPEC_CHANNEL(chanspec));
3987                                 return;
3988                         }
3989                         /*
3990                          * should the setband call come after the
3991                          * brcms_b_chanspec() ? if the setband updates
3992                          * (brcms_c_bsinit) use low level calls to inspect and
3993                          * set state, the state inspected may be from the wrong
3994                          * band, or the following brcms_b_set_chanspec() may
3995                          * undo the work.
3996                          */
3997                         brcms_c_setband(wlc, bandunit);
3998                 }
3999         }
4000
4001         /* sync up phy/radio chanspec */
4002         brcms_c_set_phy_chanspec(wlc, chanspec);
4003
4004         /* init antenna selection */
4005         if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
4006                 brcms_c_antsel_init(wlc->asi);
4007
4008                 /* Fix the hardware rateset based on bw.
4009                  * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
4010                  */
4011                 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
4012                         wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
4013         }
4014
4015         /* update some mac configuration since chanspec changed */
4016         brcms_c_ucode_mac_upd(wlc);
4017 }
4018
4019 u32 brcms_c_lowest_basic_rspec(struct brcms_c_info *wlc,
4020                                       struct brcms_c_rateset *rs)
4021 {
4022         u32 lowest_basic_rspec;
4023         uint i;
4024
4025         /* Use the lowest basic rate */
4026         lowest_basic_rspec = rs->rates[0] & BRCMS_RATE_MASK;
4027         for (i = 0; i < rs->count; i++) {
4028                 if (rs->rates[i] & BRCMS_RATE_FLAG) {
4029                         lowest_basic_rspec = rs->rates[i] & BRCMS_RATE_MASK;
4030                         break;
4031                 }
4032         }
4033
4034         /*
4035          * pick siso/cdd as default for OFDM (note no basic
4036          * rate MCSs are supported yet)
4037          */
4038         if (is_ofdm_rate(lowest_basic_rspec))
4039                 lowest_basic_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
4040
4041         return lowest_basic_rspec;
4042 }
4043
4044 /*
4045  * This function changes the phytxctl for beacon based on current
4046  * beacon ratespec AND txant setting as per this table:
4047  *  ratespec     CCK            ant = wlc->stf->txant
4048  *              OFDM            ant = 3
4049  */
4050 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
4051                                        u32 bcn_rspec)
4052 {
4053         u16 phyctl;
4054         u16 phytxant = wlc->stf->phytxant;
4055         u16 mask = PHY_TXC_ANT_MASK;
4056
4057         /* for non-siso rates or default setting, use the available chains */
4058         if (BRCMS_PHY_11N_CAP(wlc->band))
4059                 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
4060
4061         phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
4062         phyctl = (phyctl & ~mask) | phytxant;
4063         brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
4064 }
4065
4066 /*
4067  * centralized protection config change function to simplify debugging, no
4068  * consistency checking this should be called only on changes to avoid overhead
4069  * in periodic function
4070  */
4071 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4072 {
4073         BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4074
4075         switch (idx) {
4076         case BRCMS_PROT_G_SPEC:
4077                 wlc->protection->_g = (bool) val;
4078                 break;
4079         case BRCMS_PROT_G_OVR:
4080                 wlc->protection->g_override = (s8) val;
4081                 break;
4082         case BRCMS_PROT_G_USER:
4083                 wlc->protection->gmode_user = (u8) val;
4084                 break;
4085         case BRCMS_PROT_OVERLAP:
4086                 wlc->protection->overlap = (s8) val;
4087                 break;
4088         case BRCMS_PROT_N_USER:
4089                 wlc->protection->nmode_user = (s8) val;
4090                 break;
4091         case BRCMS_PROT_N_CFG:
4092                 wlc->protection->n_cfg = (s8) val;
4093                 break;
4094         case BRCMS_PROT_N_CFG_OVR:
4095                 wlc->protection->n_cfg_override = (s8) val;
4096                 break;
4097         case BRCMS_PROT_N_NONGF:
4098                 wlc->protection->nongf = (bool) val;
4099                 break;
4100         case BRCMS_PROT_N_NONGF_OVR:
4101                 wlc->protection->nongf_override = (s8) val;
4102                 break;
4103         case BRCMS_PROT_N_PAM_OVR:
4104                 wlc->protection->n_pam_override = (s8) val;
4105                 break;
4106         case BRCMS_PROT_N_OBSS:
4107                 wlc->protection->n_obss = (bool) val;
4108                 break;
4109
4110         default:
4111                 break;
4112         }
4113
4114 }
4115
4116 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4117 {
4118         if (wlc->pub->up) {
4119                 brcms_c_update_beacon(wlc);
4120                 brcms_c_update_probe_resp(wlc, true);
4121         }
4122 }
4123
4124 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4125 {
4126         wlc->stf->ldpc = val;
4127
4128         if (wlc->pub->up) {
4129                 brcms_c_update_beacon(wlc);
4130                 brcms_c_update_probe_resp(wlc, true);
4131                 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4132         }
4133 }
4134
4135 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4136                        const struct ieee80211_tx_queue_params *params,
4137                        bool suspend)
4138 {
4139         int i;
4140         struct shm_acparams acp_shm;
4141         u16 *shm_entry;
4142
4143         /* Only apply params if the core is out of reset and has clocks */
4144         if (!wlc->clk) {
4145                 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4146                           __func__);
4147                 return;
4148         }
4149
4150         memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4151         /* fill in shm ac params struct */
4152         acp_shm.txop = params->txop;
4153         /* convert from units of 32us to us for ucode */
4154         wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4155             EDCF_TXOP2USEC(acp_shm.txop);
4156         acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4157
4158         if (aci == AC_VI && acp_shm.txop == 0
4159             && acp_shm.aifs < EDCF_AIFSN_MAX)
4160                 acp_shm.aifs++;
4161
4162         if (acp_shm.aifs < EDCF_AIFSN_MIN
4163             || acp_shm.aifs > EDCF_AIFSN_MAX) {
4164                 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4165                           "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4166         } else {
4167                 acp_shm.cwmin = params->cw_min;
4168                 acp_shm.cwmax = params->cw_max;
4169                 acp_shm.cwcur = acp_shm.cwmin;
4170                 acp_shm.bslots =
4171                     R_REG(&wlc->regs->tsf_random) & acp_shm.cwcur;
4172                 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4173                 /* Indicate the new params to the ucode */
4174                 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4175                                                   wme_ac2fifo[aci] *
4176                                                   M_EDCF_QLEN +
4177                                                   M_EDCF_STATUS_OFF));
4178                 acp_shm.status |= WME_STATUS_NEWAC;
4179
4180                 /* Fill in shm acparam table */
4181                 shm_entry = (u16 *) &acp_shm;
4182                 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4183                         brcms_b_write_shm(wlc->hw,
4184                                           M_EDCF_QINFO +
4185                                           wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4186                                           *shm_entry++);
4187         }
4188
4189         if (suspend) {
4190                 brcms_c_suspend_mac_and_wait(wlc);
4191                 brcms_c_enable_mac(wlc);
4192         }
4193 }
4194
4195 void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4196 {
4197         u16 aci;
4198         int i_ac;
4199         struct ieee80211_tx_queue_params txq_pars;
4200         static const struct edcf_acparam default_edcf_acparams[] = {
4201                  {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4202                  {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4203                  {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4204                  {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4205         }; /* ucode needs these parameters during its initialization */
4206         const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4207
4208         for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) {
4209                 /* find out which ac this set of params applies to */
4210                 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4211
4212                 /* fill in shm ac params struct */
4213                 txq_pars.txop = edcf_acp->TXOP;
4214                 txq_pars.aifs = edcf_acp->ACI;
4215
4216                 /* CWmin = 2^(ECWmin) - 1 */
4217                 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4218                 /* CWmax = 2^(ECWmax) - 1 */
4219                 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4220                                             >> EDCF_ECWMAX_SHIFT);
4221                 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4222         }
4223
4224         if (suspend) {
4225                 brcms_c_suspend_mac_and_wait(wlc);
4226                 brcms_c_enable_mac(wlc);
4227         }
4228 }
4229
4230 /* maintain LED behavior in down state */
4231 static void brcms_c_down_led_upd(struct brcms_c_info *wlc)
4232 {
4233         /*
4234          * maintain LEDs while in down state, turn on sbclk if
4235          * not available yet. Turn on sbclk if necessary
4236          */
4237         brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_FLIP);
4238         brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_FLIP);
4239 }
4240
4241 static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4242 {
4243         /* Don't start the timer if HWRADIO feature is disabled */
4244         if (wlc->radio_monitor)
4245                 return;
4246
4247         wlc->radio_monitor = true;
4248         brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4249         brcms_add_timer(wlc->wl, wlc->radio_timer, TIMER_INTERVAL_RADIOCHK,
4250                         true);
4251 }
4252
4253 void brcms_c_radio_disable(struct brcms_c_info *wlc)
4254 {
4255         if (!wlc->pub->up) {
4256                 brcms_c_down_led_upd(wlc);
4257                 return;
4258         }
4259
4260         brcms_c_radio_monitor_start(wlc);
4261         brcms_down(wlc->wl);
4262 }
4263
4264 static void brcms_c_radio_enable(struct brcms_c_info *wlc)
4265 {
4266         if (wlc->pub->up)
4267                 return;
4268
4269         if (brcms_deviceremoved(wlc))
4270                 return;
4271
4272         brcms_up(wlc->wl);
4273 }
4274
4275 bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4276 {
4277         if (!wlc->radio_monitor)
4278                 return true;
4279
4280         wlc->radio_monitor = false;
4281         brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4282         return brcms_del_timer(wlc->wl, wlc->radio_timer);
4283 }
4284
4285 /* read hwdisable state and propagate to wlc flag */
4286 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4287 {
4288         if (wlc->pub->hw_off)
4289                 return;
4290
4291         if (brcms_b_radio_read_hwdisabled(wlc->hw))
4292                 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4293         else
4294                 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4295 }
4296
4297 /*
4298  * centralized radio disable/enable function,
4299  * invoke radio enable/disable after updating hwradio status
4300  */
4301 static void brcms_c_radio_upd(struct brcms_c_info *wlc)
4302 {
4303         if (wlc->pub->radio_disabled)
4304                 brcms_c_radio_disable(wlc);
4305         else
4306                 brcms_c_radio_enable(wlc);
4307 }
4308
4309 /* update hwradio status and return it */
4310 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4311 {
4312         brcms_c_radio_hwdisable_upd(wlc);
4313
4314         return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4315                         true : false;
4316 }
4317
4318 /* periodical query hw radio button while driver is "down" */
4319 static void brcms_c_radio_timer(void *arg)
4320 {
4321         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4322
4323         if (brcms_deviceremoved(wlc)) {
4324                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4325                         __func__);
4326                 brcms_down(wlc->wl);
4327                 return;
4328         }
4329
4330         /* cap mpc off count */
4331         if (wlc->mpc_offcnt < BRCMS_MPC_MAX_DELAYCNT)
4332                 wlc->mpc_offcnt++;
4333
4334         brcms_c_radio_hwdisable_upd(wlc);
4335         brcms_c_radio_upd(wlc);
4336 }
4337
4338 /* common low-level watchdog code */
4339 static void brcms_b_watchdog(void *arg)
4340 {
4341         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4342         struct brcms_hardware *wlc_hw = wlc->hw;
4343
4344         BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4345
4346         if (!wlc_hw->up)
4347                 return;
4348
4349         /* increment second count */
4350         wlc_hw->now++;
4351
4352         /* Check for FIFO error interrupts */
4353         brcms_b_fifoerrors(wlc_hw);
4354
4355         /* make sure RX dma has buffers */
4356         dma_rxfill(wlc->hw->di[RX_FIFO]);
4357
4358         wlc_phy_watchdog(wlc_hw->band->pi);
4359 }
4360
4361 /* common watchdog code */
4362 static void brcms_c_watchdog(void *arg)
4363 {
4364         struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4365
4366         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4367
4368         if (!wlc->pub->up)
4369                 return;
4370
4371         if (brcms_deviceremoved(wlc)) {
4372                 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4373                           __func__);
4374                 brcms_down(wlc->wl);
4375                 return;
4376         }
4377
4378         /* increment second count */
4379         wlc->pub->now++;
4380
4381         /* delay radio disable */
4382         if (wlc->mpc_delay_off) {
4383                 if (--wlc->mpc_delay_off == 0) {
4384                         mboolset(wlc->pub->radio_disabled,
4385                                  WL_RADIO_MPC_DISABLE);
4386                         if (wlc->mpc && brcms_c_ismpc(wlc))
4387                                 wlc->mpc_offcnt = 0;
4388                 }
4389         }
4390
4391         /* mpc sync */
4392         brcms_c_radio_mpc_upd(wlc);
4393         /* radio sync: sw/hw/mpc --> radio_disable/radio_enable */
4394         brcms_c_radio_hwdisable_upd(wlc);
4395         brcms_c_radio_upd(wlc);
4396         /* if radio is disable, driver may be down, quit here */
4397         if (wlc->pub->radio_disabled)
4398                 return;
4399
4400         brcms_b_watchdog(wlc);
4401
4402         /*
4403          * occasionally sample mac stat counters to
4404          * detect 16-bit counter wrap
4405          */
4406         if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4407                 brcms_c_statsupd(wlc);
4408
4409         if (BRCMS_ISNPHY(wlc->band) &&
4410             ((wlc->pub->now - wlc->tempsense_lasttime) >=
4411              BRCMS_TEMPSENSE_PERIOD)) {
4412                 wlc->tempsense_lasttime = wlc->pub->now;
4413                 brcms_c_tempsense_upd(wlc);
4414         }
4415 }
4416
4417 static void brcms_c_watchdog_by_timer(void *arg)
4418 {
4419         brcms_c_watchdog(arg);
4420 }
4421
4422 bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4423 {
4424         wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4425                 wlc, "watchdog");
4426         if (!wlc->wdtimer) {
4427                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for wdtimer "
4428                           "failed\n", unit);
4429                 goto fail;
4430         }
4431
4432         wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4433                 wlc, "radio");
4434         if (!wlc->radio_timer) {
4435                 wiphy_err(wlc->wiphy, "wl%d:  wl_init_timer for radio_timer "
4436                           "failed\n", unit);
4437                 goto fail;
4438         }
4439
4440         return true;
4441
4442  fail:
4443         return false;
4444 }
4445
4446 /*
4447  * Initialize brcms_c_info default values ...
4448  * may get overrides later in this function
4449  */
4450 void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4451 {
4452         int i;
4453
4454         /* Save our copy of the chanspec */
4455         wlc->chanspec = ch20mhz_chspec(1);
4456
4457         /* various 802.11g modes */
4458         wlc->shortslot = false;
4459         wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4460
4461         brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4462         brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4463
4464         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4465                                BRCMS_PROTECTION_AUTO);
4466         brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4467         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4468                                BRCMS_PROTECTION_AUTO);
4469         brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4470         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4471
4472         brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4473                                BRCMS_PROTECTION_CTL_OVERLAP);
4474
4475         /* 802.11g draft 4.0 NonERP elt advertisement */
4476         wlc->include_legacy_erp = true;
4477
4478         wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4479         wlc->stf->txant = ANT_TX_DEF;
4480
4481         wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4482
4483         wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4484         for (i = 0; i < NFIFO; i++)
4485                 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4486         wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4487
4488         /* default rate fallback retry limits */
4489         wlc->SFBL = RETRY_SHORT_FB;
4490         wlc->LFBL = RETRY_LONG_FB;
4491
4492         /* default mac retry limits */
4493         wlc->SRL = RETRY_SHORT_DEF;
4494         wlc->LRL = RETRY_LONG_DEF;
4495
4496         /* WME QoS mode is Auto by default */
4497         wlc->pub->_ampdu = AMPDU_AGG_HOST;
4498         wlc->pub->bcmerror = 0;
4499
4500         /* initialize mpc delay */
4501         wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
4502 }
4503
4504 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4505 {
4506         uint err = 0;
4507         uint unit;
4508         unit = wlc->pub->unit;
4509
4510         wlc->asi = brcms_c_antsel_attach(wlc);
4511         if (wlc->asi == NULL) {
4512                 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4513                           "failed\n", unit);
4514                 err = 44;
4515                 goto fail;
4516         }
4517
4518         wlc->ampdu = brcms_c_ampdu_attach(wlc);
4519         if (wlc->ampdu == NULL) {
4520                 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4521                           "failed\n", unit);
4522                 err = 50;
4523                 goto fail;
4524         }
4525
4526         if ((brcms_c_stf_attach(wlc) != 0)) {
4527                 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4528                           "failed\n", unit);
4529                 err = 68;
4530                 goto fail;
4531         }
4532  fail:
4533         return err;
4534 }
4535
4536 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4537 {
4538         return wlc->pub;
4539 }
4540
4541 /* low level attach
4542  *    run backplane attach, init nvram
4543  *    run phy attach
4544  *    initialize software state for each core and band
4545  *    put the whole chip in reset(driver down state), no clock
4546  */
4547 static int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device,
4548                           uint unit, bool piomode, void __iomem *regsva,
4549                           struct pci_dev *btparam)
4550 {
4551         struct brcms_hardware *wlc_hw;
4552         struct d11regs __iomem *regs;
4553         char *macaddr = NULL;
4554         char *vars;
4555         uint err = 0;
4556         uint j;
4557         bool wme = false;
4558         struct shared_phy_params sha_params;
4559         struct wiphy *wiphy = wlc->wiphy;
4560         char *var;
4561         unsigned long res;
4562
4563         BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor,
4564                 device);
4565
4566         wme = true;
4567
4568         wlc_hw = wlc->hw;
4569         wlc_hw->wlc = wlc;
4570         wlc_hw->unit = unit;
4571         wlc_hw->band = wlc_hw->bandstate[0];
4572         wlc_hw->_piomode = piomode;
4573
4574         /* populate struct brcms_hardware with default values  */
4575         brcms_b_info_init(wlc_hw);
4576
4577         /*
4578          * Do the hardware portion of the attach. Also initialize software
4579          * state that depends on the particular hardware we are running.
4580          */
4581         wlc_hw->sih = ai_attach(regsva, btparam,
4582                                 &wlc_hw->vars, &wlc_hw->vars_size);
4583         if (wlc_hw->sih == NULL) {
4584                 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4585                           unit);
4586                 err = 11;
4587                 goto fail;
4588         }
4589         vars = wlc_hw->vars;
4590
4591         /*
4592          * Get vendid/devid nvram overwrites, which could be different
4593          * than those the BIOS recognizes for devices on PCMCIA_BUS,
4594          * SDIO_BUS, and SROMless devices on PCI_BUS.
4595          */
4596         var = getvar(wlc_hw->sih, "vendid");
4597         if (var && !kstrtoul(var, 0, &res)) {
4598                 vendor = (u16)res;
4599                 wiphy_err(wiphy, "Overriding vendor id = 0x%x\n",
4600                           vendor);
4601         }
4602         var = getvar(wlc_hw->sih, "devid");
4603         if (var && !kstrtoul(var, 0, &res)) {
4604                 u16 devid = (u16)res;
4605                 if (devid != 0xffff) {
4606                         device = devid;
4607                         wiphy_err(wiphy, "Overriding device id = 0x%x"
4608                                   "\n", device);
4609                 }
4610         }
4611
4612         /* verify again the device is supported */
4613         if (!brcms_c_chipmatch(vendor, device)) {
4614                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
4615                         "vendor/device (0x%x/0x%x)\n",
4616                          unit, vendor, device);
4617                 err = 12;
4618                 goto fail;
4619         }
4620
4621         wlc_hw->vendorid = vendor;
4622         wlc_hw->deviceid = device;
4623
4624         /* set bar0 window to point at D11 core */
4625         wlc_hw->regs = (struct d11regs __iomem *)
4626                                 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
4627         wlc_hw->corerev = ai_corerev(wlc_hw->sih);
4628
4629         regs = wlc_hw->regs;
4630
4631         wlc->regs = wlc_hw->regs;
4632
4633         /* validate chip, chiprev and corerev */
4634         if (!brcms_c_isgoodchip(wlc_hw)) {
4635                 err = 13;
4636                 goto fail;
4637         }
4638
4639         /* initialize power control registers */
4640         ai_clkctl_init(wlc_hw->sih);
4641
4642         /* request fastclock and force fastclock for the rest of attach
4643          * bring the d11 core out of reset.
4644          *   For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4645          *   is still false; But it will be called again inside wlc_corereset,
4646          *   after d11 is out of reset.
4647          */
4648         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
4649         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4650
4651         if (!brcms_b_validate_chip_access(wlc_hw)) {
4652                 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4653                         "failed\n", unit);
4654                 err = 14;
4655                 goto fail;
4656         }
4657
4658         /* get the board rev, used just below */
4659         j = getintvar(wlc_hw->sih, "boardrev");
4660         /* promote srom boardrev of 0xFF to 1 */
4661         if (j == BOARDREV_PROMOTABLE)
4662                 j = BOARDREV_PROMOTED;
4663         wlc_hw->boardrev = (u16) j;
4664         if (!brcms_c_validboardtype(wlc_hw)) {
4665                 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4666                         "board type (0x%x)" " or revision level (0x%x)\n",
4667                          unit, wlc_hw->sih->boardtype, wlc_hw->boardrev);
4668                 err = 15;
4669                 goto fail;
4670         }
4671         wlc_hw->sromrev = (u8) getintvar(wlc_hw->sih, "sromrev");
4672         wlc_hw->boardflags = (u32) getintvar(wlc_hw->sih, "boardflags");
4673         wlc_hw->boardflags2 = (u32) getintvar(wlc_hw->sih, "boardflags2");
4674
4675         if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4676                 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4677
4678         /* check device id(srom, nvram etc.) to set bands */
4679         if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4680             wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4681                 /* Dualband boards */
4682                 wlc_hw->_nbands = 2;
4683         else
4684                 wlc_hw->_nbands = 1;
4685
4686         if ((wlc_hw->sih->chip == BCM43225_CHIP_ID))
4687                 wlc_hw->_nbands = 1;
4688
4689         /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4690          * unconditionally does the init of these values
4691          */
4692         wlc->vendorid = wlc_hw->vendorid;
4693         wlc->deviceid = wlc_hw->deviceid;
4694         wlc->pub->sih = wlc_hw->sih;
4695         wlc->pub->corerev = wlc_hw->corerev;
4696         wlc->pub->sromrev = wlc_hw->sromrev;
4697         wlc->pub->boardrev = wlc_hw->boardrev;
4698         wlc->pub->boardflags = wlc_hw->boardflags;
4699         wlc->pub->boardflags2 = wlc_hw->boardflags2;
4700         wlc->pub->_nbands = wlc_hw->_nbands;
4701
4702         wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4703
4704         if (wlc_hw->physhim == NULL) {
4705                 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4706                         "failed\n", unit);
4707                 err = 25;
4708                 goto fail;
4709         }
4710
4711         /* pass all the parameters to wlc_phy_shared_attach in one struct */
4712         sha_params.sih = wlc_hw->sih;
4713         sha_params.physhim = wlc_hw->physhim;
4714         sha_params.unit = unit;
4715         sha_params.corerev = wlc_hw->corerev;
4716         sha_params.vars = vars;
4717         sha_params.vid = wlc_hw->vendorid;
4718         sha_params.did = wlc_hw->deviceid;
4719         sha_params.chip = wlc_hw->sih->chip;
4720         sha_params.chiprev = wlc_hw->sih->chiprev;
4721         sha_params.chippkg = wlc_hw->sih->chippkg;
4722         sha_params.sromrev = wlc_hw->sromrev;
4723         sha_params.boardtype = wlc_hw->sih->boardtype;
4724         sha_params.boardrev = wlc_hw->boardrev;
4725         sha_params.boardvendor = wlc_hw->sih->boardvendor;
4726         sha_params.boardflags = wlc_hw->boardflags;
4727         sha_params.boardflags2 = wlc_hw->boardflags2;
4728         sha_params.buscorerev = wlc_hw->sih->buscorerev;
4729
4730         /* alloc and save pointer to shared phy state area */
4731         wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4732         if (!wlc_hw->phy_sh) {
4733                 err = 16;
4734                 goto fail;
4735         }
4736
4737         /* initialize software state for each core and band */
4738         for (j = 0; j < wlc_hw->_nbands; j++) {
4739                 /*
4740                  * band0 is always 2.4Ghz
4741                  * band1, if present, is 5Ghz
4742                  */
4743
4744                 brcms_c_setxband(wlc_hw, j);
4745
4746                 wlc_hw->band->bandunit = j;
4747                 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4748                 wlc->band->bandunit = j;
4749                 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4750                 wlc->core->coreidx = ai_coreidx(wlc_hw->sih);
4751
4752                 wlc_hw->machwcap = R_REG(&regs->machwcap);
4753                 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4754
4755                 /* init tx fifo size */
4756                 wlc_hw->xmtfifo_sz =
4757                     xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4758
4759                 /* Get a phy for this band */
4760                 wlc_hw->band->pi =
4761                         wlc_phy_attach(wlc_hw->phy_sh, regs,
4762                                         wlc_hw->band->bandtype, vars,
4763                                         wlc->wiphy);
4764                 if (wlc_hw->band->pi == NULL) {
4765                         wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4766                                   "attach failed\n", unit);
4767                         err = 17;
4768                         goto fail;
4769                 }
4770
4771                 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4772
4773                 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4774                                        &wlc_hw->band->phyrev,
4775                                        &wlc_hw->band->radioid,
4776                                        &wlc_hw->band->radiorev);
4777                 wlc_hw->band->abgphy_encore =
4778                     wlc_phy_get_encore(wlc_hw->band->pi);
4779                 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4780                 wlc_hw->band->core_flags =
4781                     wlc_phy_get_coreflags(wlc_hw->band->pi);
4782
4783                 /* verify good phy_type & supported phy revision */
4784                 if (BRCMS_ISNPHY(wlc_hw->band)) {
4785                         if (NCONF_HAS(wlc_hw->band->phyrev))
4786                                 goto good_phy;
4787                         else
4788                                 goto bad_phy;
4789                 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4790                         if (LCNCONF_HAS(wlc_hw->band->phyrev))
4791                                 goto good_phy;
4792                         else
4793                                 goto bad_phy;
4794                 } else {
4795  bad_phy:
4796                         wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4797                                   "phy type/rev (%d/%d)\n", unit,
4798                                   wlc_hw->band->phytype, wlc_hw->band->phyrev);
4799                         err = 18;
4800                         goto fail;
4801                 }
4802
4803  good_phy:
4804                 /*
4805                  * BMAC_NOTE: wlc->band->pi should not be set below and should
4806                  * be done in the high level attach. However we can not make
4807                  * that change until all low level access is changed to
4808                  * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4809                  * keeping wlc_hw->band->pi as well for incremental update of
4810                  * low level fns, and cut over low only init when all fns
4811                  * updated.
4812                  */
4813                 wlc->band->pi = wlc_hw->band->pi;
4814                 wlc->band->phytype = wlc_hw->band->phytype;
4815                 wlc->band->phyrev = wlc_hw->band->phyrev;
4816                 wlc->band->radioid = wlc_hw->band->radioid;
4817                 wlc->band->radiorev = wlc_hw->band->radiorev;
4818
4819                 /* default contention windows size limits */
4820                 wlc_hw->band->CWmin = APHY_CWMIN;
4821                 wlc_hw->band->CWmax = PHY_CWMAX;
4822
4823                 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4824                         err = 19;
4825                         goto fail;
4826                 }
4827         }
4828
4829         /* disable core to match driver "down" state */
4830         brcms_c_coredisable(wlc_hw);
4831
4832         /* Match driver "down" state */
4833         ai_pci_down(wlc_hw->sih);
4834
4835         /* register sb interrupt callback functions */
4836         ai_register_intr_callback(wlc_hw->sih, (void *)brcms_c_wlintrsoff,
4837                                   (void *)brcms_c_wlintrsrestore, NULL, wlc);
4838
4839         /* turn off pll and xtal to match driver "down" state */
4840         brcms_b_xtal(wlc_hw, OFF);
4841
4842         /* *******************************************************************
4843          * The hardware is in the DOWN state at this point. D11 core
4844          * or cores are in reset with clocks off, and the board PLLs
4845          * are off if possible.
4846          *
4847          * Beyond this point, wlc->sbclk == false and chip registers
4848          * should not be touched.
4849          *********************************************************************
4850          */
4851
4852         /* init etheraddr state variables */
4853         macaddr = brcms_c_get_macaddr(wlc_hw);
4854         if (macaddr == NULL) {
4855                 wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n",
4856                           unit);
4857                 err = 21;
4858                 goto fail;
4859         }
4860         if (!mac_pton(macaddr, wlc_hw->etheraddr) ||
4861             is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4862             is_zero_ether_addr(wlc_hw->etheraddr)) {
4863                 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n",
4864                           unit, macaddr);
4865                 err = 22;
4866                 goto fail;
4867         }
4868
4869         BCMMSG(wlc->wiphy,
4870                  "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
4871                  wlc_hw->deviceid, wlc_hw->_nbands,
4872                  wlc_hw->sih->boardtype, macaddr);
4873
4874         return err;
4875
4876  fail:
4877         wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4878                   err);
4879         return err;
4880 }
4881
4882 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4883 {
4884         uint unit;
4885         unit = wlc->pub->unit;
4886
4887         if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4888                 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4889                 wlc->band->antgain = 8;
4890         } else if (wlc->band->antgain == -1) {
4891                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4892                           " srom, using 2dB\n", unit, __func__);
4893                 wlc->band->antgain = 8;
4894         } else {
4895                 s8 gain, fract;
4896                 /* Older sroms specified gain in whole dbm only.  In order
4897                  * be able to specify qdbm granularity and remain backward
4898                  * compatible the whole dbms are now encoded in only
4899                  * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4900                  * 6 bit signed number ranges from -32 - 31.
4901                  *
4902                  * Examples:
4903                  * 0x1 = 1 db,
4904                  * 0xc1 = 1.75 db (1 + 3 quarters),
4905                  * 0x3f = -1 (-1 + 0 quarters),
4906                  * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4907                  * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4908                  */
4909                 gain = wlc->band->antgain & 0x3f;
4910                 gain <<= 2;     /* Sign extend */
4911                 gain >>= 2;
4912                 fract = (wlc->band->antgain & 0xc0) >> 6;
4913                 wlc->band->antgain = 4 * gain + fract;
4914         }
4915 }
4916
4917 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4918 {
4919         int aa;
4920         uint unit;
4921         char *vars;
4922         int bandtype;
4923         struct si_pub *sih = wlc->hw->sih;
4924
4925         unit = wlc->pub->unit;
4926         vars = wlc->pub->vars;
4927         bandtype = wlc->band->bandtype;
4928
4929         /* get antennas available */
4930         aa = (s8) getintvar(sih, bandtype == BRCM_BAND_5G ? "aa5g" : "aa2g");
4931         if (aa == 0)
4932                 aa = (s8) getintvar(sih,
4933                                     bandtype == BRCM_BAND_5G ? "aa1" : "aa0");
4934         if ((aa < 1) || (aa > 15)) {
4935                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4936                           " srom (0x%x), using 3\n", unit, __func__, aa);
4937                 aa = 3;
4938         }
4939
4940         /* reset the defaults if we have a single antenna */
4941         if (aa == 1) {
4942                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4943                 wlc->stf->txant = ANT_TX_FORCE_0;
4944         } else if (aa == 2) {
4945                 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4946                 wlc->stf->txant = ANT_TX_FORCE_1;
4947         } else {
4948         }
4949
4950         /* Compute Antenna Gain */
4951         wlc->band->antgain = (s8) getintvar(sih, bandtype == BRCM_BAND_5G ?
4952                                             "ag1" : "ag0");
4953         brcms_c_attach_antgain_init(wlc);
4954
4955         return true;
4956 }
4957
4958 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
4959 {
4960         u16 chanspec;
4961         struct brcms_band *band;
4962         struct brcms_bss_info *bi = wlc->default_bss;
4963
4964         /* init default and target BSS with some sane initial values */
4965         memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
4966         bi->beacon_period = BEACON_INTERVAL_DEFAULT;
4967
4968         /* fill the default channel as the first valid channel
4969          * starting from the 2G channels
4970          */
4971         chanspec = ch20mhz_chspec(1);
4972         wlc->home_chanspec = bi->chanspec = chanspec;
4973
4974         /* find the band of our default channel */
4975         band = wlc->band;
4976         if (wlc->pub->_nbands > 1 &&
4977             band->bandunit != chspec_bandunit(chanspec))
4978                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
4979
4980         /* init bss rates to the band specific default rate set */
4981         brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
4982                 band->bandtype, false, BRCMS_RATE_MASK_FULL,
4983                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
4984                 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
4985
4986         if (wlc->pub->_n_enab & SUPPORT_11N)
4987                 bi->flags |= BRCMS_BSS_HT;
4988 }
4989
4990 static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
4991 {
4992         struct brcms_txq_info *qi, *p;
4993
4994         qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
4995         if (qi != NULL) {
4996                 /*
4997                  * Have enough room for control packets along with HI watermark
4998                  * Also, add room to txq for total psq packets if all the SCBs
4999                  * leave PS mode. The watermark for flowcontrol to OS packets
5000                  * will remain the same
5001                  */
5002                 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
5003                           2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
5004
5005                 /* add this queue to the the global list */
5006                 p = wlc->tx_queues;
5007                 if (p == NULL) {
5008                         wlc->tx_queues = qi;
5009                 } else {
5010                         while (p->next != NULL)
5011                                 p = p->next;
5012                         p->next = qi;
5013                 }
5014         }
5015         return qi;
5016 }
5017
5018 static void brcms_c_txq_free(struct brcms_c_info *wlc,
5019                              struct brcms_txq_info *qi)
5020 {
5021         struct brcms_txq_info *p;
5022
5023         if (qi == NULL)
5024                 return;
5025
5026         /* remove the queue from the linked list */
5027         p = wlc->tx_queues;
5028         if (p == qi)
5029                 wlc->tx_queues = p->next;
5030         else {
5031                 while (p != NULL && p->next != qi)
5032                         p = p->next;
5033                 if (p != NULL)
5034                         p->next = p->next->next;
5035         }
5036
5037         kfree(qi);
5038 }
5039
5040 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
5041 {
5042         uint i;
5043         struct brcms_band *band;
5044
5045         for (i = 0; i < wlc->pub->_nbands; i++) {
5046                 band = wlc->bandstate[i];
5047                 if (band->bandtype == BRCM_BAND_5G) {
5048                         if ((bwcap == BRCMS_N_BW_40ALL)
5049                             || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
5050                                 band->mimo_cap_40 = true;
5051                         else
5052                                 band->mimo_cap_40 = false;
5053                 } else {
5054                         if (bwcap == BRCMS_N_BW_40ALL)
5055                                 band->mimo_cap_40 = true;
5056                         else
5057                                 band->mimo_cap_40 = false;
5058                 }
5059         }
5060 }
5061
5062 /*
5063  * The common driver entry routine. Error codes should be unique
5064  */
5065 struct brcms_c_info *
5066 brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit,
5067                bool piomode, void __iomem *regsva, struct pci_dev *btparam,
5068                uint *perr)
5069 {
5070         struct brcms_c_info *wlc;
5071         uint err = 0;
5072         uint i, j;
5073         struct brcms_pub *pub;
5074
5075         /* allocate struct brcms_c_info state and its substructures */
5076         wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, device);
5077         if (wlc == NULL)
5078                 goto fail;
5079         wlc->wiphy = wl->wiphy;
5080         pub = wlc->pub;
5081
5082 #if defined(BCMDBG)
5083         wlc_info_dbg = wlc;
5084 #endif
5085
5086         wlc->band = wlc->bandstate[0];
5087         wlc->core = wlc->corestate;
5088         wlc->wl = wl;
5089         pub->unit = unit;
5090         pub->_piomode = piomode;
5091         wlc->bandinit_pending = false;
5092
5093         /* populate struct brcms_c_info with default values  */
5094         brcms_c_info_init(wlc, unit);
5095
5096         /* update sta/ap related parameters */
5097         brcms_c_ap_upd(wlc);
5098
5099         /*
5100          * low level attach steps(all hw accesses go
5101          * inside, no more in rest of the attach)
5102          */
5103         err = brcms_b_attach(wlc, vendor, device, unit, piomode, regsva,
5104                              btparam);
5105         if (err)
5106                 goto fail;
5107
5108         brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, OFF);
5109
5110         pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
5111
5112         /* propagate *vars* from BMAC driver to high driver */
5113         brcms_b_copyfrom_vars(wlc->hw, &pub->vars, &wlc->vars_size);
5114
5115
5116         /* set maximum allowed duty cycle */
5117         wlc->tx_duty_cycle_ofdm =
5118             (u16) getintvar(wlc->hw->sih, "tx_duty_cycle_ofdm");
5119         wlc->tx_duty_cycle_cck =
5120             (u16) getintvar(wlc->hw->sih, "tx_duty_cycle_cck");
5121
5122         brcms_c_stf_phy_chain_calc(wlc);
5123
5124         /* txchain 1: txant 0, txchain 2: txant 1 */
5125         if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
5126                 wlc->stf->txant = wlc->stf->hw_txchain - 1;
5127
5128         /* push to BMAC driver */
5129         wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
5130                                wlc->stf->hw_rxchain);
5131
5132         /* pull up some info resulting from the low attach */
5133         for (i = 0; i < NFIFO; i++)
5134                 wlc->core->txavail[i] = wlc->hw->txavail[i];
5135
5136         memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
5137         memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
5138
5139         for (j = 0; j < wlc->pub->_nbands; j++) {
5140                 wlc->band = wlc->bandstate[j];
5141
5142                 if (!brcms_c_attach_stf_ant_init(wlc)) {
5143                         err = 24;
5144                         goto fail;
5145                 }
5146
5147                 /* default contention windows size limits */
5148                 wlc->band->CWmin = APHY_CWMIN;
5149                 wlc->band->CWmax = PHY_CWMAX;
5150
5151                 /* init gmode value */
5152                 if (wlc->band->bandtype == BRCM_BAND_2G) {
5153                         wlc->band->gmode = GMODE_AUTO;
5154                         brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
5155                                            wlc->band->gmode);
5156                 }
5157
5158                 /* init _n_enab supported mode */
5159                 if (BRCMS_PHY_11N_CAP(wlc->band)) {
5160                         pub->_n_enab = SUPPORT_11N;
5161                         brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
5162                                                    ((pub->_n_enab ==
5163                                                      SUPPORT_11N) ? WL_11N_2x2 :
5164                                                     WL_11N_3x3));
5165                 }
5166
5167                 /* init per-band default rateset, depend on band->gmode */
5168                 brcms_default_rateset(wlc, &wlc->band->defrateset);
5169
5170                 /* fill in hw_rateset */
5171                 brcms_c_rateset_filter(&wlc->band->defrateset,
5172                                    &wlc->band->hw_rateset, false,
5173                                    BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
5174                                    (bool) (wlc->pub->_n_enab & SUPPORT_11N));
5175         }
5176
5177         /*
5178          * update antenna config due to
5179          * wlc->stf->txant/txchain/ant_rx_ovr change
5180          */
5181         brcms_c_stf_phy_txant_upd(wlc);
5182
5183         /* attach each modules */
5184         err = brcms_c_attach_module(wlc);
5185         if (err != 0)
5186                 goto fail;
5187
5188         if (!brcms_c_timers_init(wlc, unit)) {
5189                 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
5190                           __func__);
5191                 err = 32;
5192                 goto fail;
5193         }
5194
5195         /* depend on rateset, gmode */
5196         wlc->cmi = brcms_c_channel_mgr_attach(wlc);
5197         if (!wlc->cmi) {
5198                 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
5199                           "\n", unit, __func__);
5200                 err = 33;
5201                 goto fail;
5202         }
5203
5204         /* init default when all parameters are ready, i.e. ->rateset */
5205         brcms_c_bss_default_init(wlc);
5206
5207         /*
5208          * Complete the wlc default state initializations..
5209          */
5210
5211         /* allocate our initial queue */
5212         wlc->pkt_queue = brcms_c_txq_alloc(wlc);
5213         if (wlc->pkt_queue == NULL) {
5214                 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
5215                           unit, __func__);
5216                 err = 100;
5217                 goto fail;
5218         }
5219
5220         wlc->bsscfg->wlc = wlc;
5221
5222         wlc->mimoft = FT_HT;
5223         wlc->mimo_40txbw = AUTO;
5224         wlc->ofdm_40txbw = AUTO;
5225         wlc->cck_40txbw = AUTO;
5226         brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
5227
5228         /* Set default values of SGI */
5229         if (BRCMS_SGI_CAP_PHY(wlc)) {
5230                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
5231                                                BRCMS_N_SGI_40));
5232         } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
5233                 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
5234                                                BRCMS_N_SGI_40));
5235         } else {
5236                 brcms_c_ht_update_sgi_rx(wlc, 0);
5237         }
5238
5239         /* initialize radio_mpc_disable according to wlc->mpc */
5240         brcms_c_radio_mpc_upd(wlc);
5241         brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
5242
5243         if (perr)
5244                 *perr = 0;
5245
5246         return wlc;
5247
5248  fail:
5249         wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
5250                   unit, __func__, err);
5251         if (wlc)
5252                 brcms_c_detach(wlc);
5253
5254         if (perr)
5255                 *perr = err;
5256         return NULL;
5257 }
5258
5259 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
5260 {
5261         /* free timer state */
5262         if (wlc->wdtimer) {
5263                 brcms_free_timer(wlc->wl, wlc->wdtimer);
5264                 wlc->wdtimer = NULL;
5265         }
5266         if (wlc->radio_timer) {
5267                 brcms_free_timer(wlc->wl, wlc->radio_timer);
5268                 wlc->radio_timer = NULL;
5269         }
5270 }
5271
5272 static void brcms_c_detach_module(struct brcms_c_info *wlc)
5273 {
5274         if (wlc->asi) {
5275                 brcms_c_antsel_detach(wlc->asi);
5276                 wlc->asi = NULL;
5277         }
5278
5279         if (wlc->ampdu) {
5280                 brcms_c_ampdu_detach(wlc->ampdu);
5281                 wlc->ampdu = NULL;
5282         }
5283
5284         brcms_c_stf_detach(wlc);
5285 }
5286
5287 /*
5288  * low level detach
5289  */
5290 static int brcms_b_detach(struct brcms_c_info *wlc)
5291 {
5292         uint i;
5293         struct brcms_hw_band *band;
5294         struct brcms_hardware *wlc_hw = wlc->hw;
5295         int callbacks;
5296
5297         callbacks = 0;
5298
5299         if (wlc_hw->sih) {
5300                 /*
5301                  * detach interrupt sync mechanism since interrupt is disabled
5302                  * and per-port interrupt object may has been freed. this must
5303                  * be done before sb core switch
5304                  */
5305                 ai_deregister_intr_callback(wlc_hw->sih);
5306                 ai_pci_sleep(wlc_hw->sih);
5307         }
5308
5309         brcms_b_detach_dmapio(wlc_hw);
5310
5311         band = wlc_hw->band;
5312         for (i = 0; i < wlc_hw->_nbands; i++) {
5313                 if (band->pi) {
5314                         /* Detach this band's phy */
5315                         wlc_phy_detach(band->pi);
5316                         band->pi = NULL;
5317                 }
5318                 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
5319         }
5320
5321         /* Free shared phy state */
5322         kfree(wlc_hw->phy_sh);
5323
5324         wlc_phy_shim_detach(wlc_hw->physhim);
5325
5326         /* free vars */
5327         kfree(wlc_hw->vars);
5328         wlc_hw->vars = NULL;
5329
5330         if (wlc_hw->sih) {
5331                 ai_detach(wlc_hw->sih);
5332                 wlc_hw->sih = NULL;
5333         }
5334
5335         return callbacks;
5336
5337 }
5338
5339 /*
5340  * Return a count of the number of driver callbacks still pending.
5341  *
5342  * General policy is that brcms_c_detach can only dealloc/free software states.
5343  * It can NOT touch hardware registers since the d11core may be in reset and
5344  * clock may not be available.
5345  * One exception is sb register access, which is possible if crystal is turned
5346  * on after "down" state, driver should avoid software timer with the exception
5347  * of radio_monitor.
5348  */
5349 uint brcms_c_detach(struct brcms_c_info *wlc)
5350 {
5351         uint callbacks = 0;
5352
5353         if (wlc == NULL)
5354                 return 0;
5355
5356         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5357
5358         callbacks += brcms_b_detach(wlc);
5359
5360         /* delete software timers */
5361         if (!brcms_c_radio_monitor_stop(wlc))
5362                 callbacks++;
5363
5364         brcms_c_channel_mgr_detach(wlc->cmi);
5365
5366         brcms_c_timers_deinit(wlc);
5367
5368         brcms_c_detach_module(wlc);
5369
5370
5371         while (wlc->tx_queues != NULL)
5372                 brcms_c_txq_free(wlc, wlc->tx_queues);
5373
5374         brcms_c_detach_mfree(wlc);
5375         return callbacks;
5376 }
5377
5378 /* update state that depends on the current value of "ap" */
5379 void brcms_c_ap_upd(struct brcms_c_info *wlc)
5380 {
5381         /* STA-BSS; short capable */
5382         wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
5383
5384         /* fixup mpc */
5385         wlc->mpc = true;
5386 }
5387
5388 /*
5389  * return true if Minimum Power Consumption should
5390  * be entered, false otherwise
5391  */
5392 bool brcms_c_is_non_delay_mpc(struct brcms_c_info *wlc)
5393 {
5394         return false;
5395 }
5396
5397 bool brcms_c_ismpc(struct brcms_c_info *wlc)
5398 {
5399         return (wlc->mpc_delay_off == 0) && (brcms_c_is_non_delay_mpc(wlc));
5400 }
5401
5402 void brcms_c_radio_mpc_upd(struct brcms_c_info *wlc)
5403 {
5404         bool mpc_radio, radio_state;
5405
5406         /*
5407          * Clear the WL_RADIO_MPC_DISABLE bit when mpc feature is disabled
5408          * in case the WL_RADIO_MPC_DISABLE bit was set. Stop the radio
5409          * monitor also when WL_RADIO_MPC_DISABLE is the only reason that
5410          * the radio is going down.
5411          */
5412         if (!wlc->mpc) {
5413                 if (!wlc->pub->radio_disabled)
5414                         return;
5415                 mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE);
5416                 brcms_c_radio_upd(wlc);
5417                 if (!wlc->pub->radio_disabled)
5418                         brcms_c_radio_monitor_stop(wlc);
5419                 return;
5420         }
5421
5422         /*
5423          * sync ismpc logic with WL_RADIO_MPC_DISABLE bit in
5424          * wlc->pub->radio_disabled to go ON, always call radio_upd
5425          * synchronously to go OFF, postpone radio_upd to later when
5426          * context is safe(e.g. watchdog)
5427          */
5428         radio_state =
5429             (mboolisset(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE) ? OFF :
5430              ON);
5431         mpc_radio = (brcms_c_ismpc(wlc) == true) ? OFF : ON;
5432
5433         if (radio_state == ON && mpc_radio == OFF)
5434                 wlc->mpc_delay_off = wlc->mpc_dlycnt;
5435         else if (radio_state == OFF && mpc_radio == ON) {
5436                 mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE);
5437                 brcms_c_radio_upd(wlc);
5438                 if (wlc->mpc_offcnt < BRCMS_MPC_THRESHOLD)
5439                         wlc->mpc_dlycnt = BRCMS_MPC_MAX_DELAYCNT;
5440                 else
5441                         wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
5442         }
5443         /*
5444          * Below logic is meant to capture the transition from mpc off
5445          * to mpc on for reasons other than wlc->mpc_delay_off keeping
5446          * the mpc off. In that case reset wlc->mpc_delay_off to
5447          * wlc->mpc_dlycnt, so that we restart the countdown of mpc_delay_off
5448          */
5449         if ((wlc->prev_non_delay_mpc == false) &&
5450             (brcms_c_is_non_delay_mpc(wlc) == true) && wlc->mpc_delay_off)
5451                 wlc->mpc_delay_off = wlc->mpc_dlycnt;
5452
5453         wlc->prev_non_delay_mpc = brcms_c_is_non_delay_mpc(wlc);
5454 }
5455 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5456 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5457 {
5458         if (wlc_hw->wlc->pub->hw_up)
5459                 return;
5460
5461         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5462
5463         /*
5464          * Enable pll and xtal, initialize the power control registers,
5465          * and force fastclock for the remainder of brcms_c_up().
5466          */
5467         brcms_b_xtal(wlc_hw, ON);
5468         ai_clkctl_init(wlc_hw->sih);
5469         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5470
5471         ai_pci_fixcfg(wlc_hw->sih);
5472
5473         /*
5474          * AI chip doesn't restore bar0win2 on
5475          * hibernation/resume, need sw fixup
5476          */
5477         if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
5478             (wlc_hw->sih->chip == BCM43225_CHIP_ID))
5479                 wlc_hw->regs = (struct d11regs __iomem *)
5480                                 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
5481
5482         /*
5483          * Inform phy that a POR reset has occurred so
5484          * it does a complete phy init
5485          */
5486         wlc_phy_por_inform(wlc_hw->band->pi);
5487
5488         wlc_hw->ucode_loaded = false;
5489         wlc_hw->wlc->pub->hw_up = true;
5490
5491         if ((wlc_hw->boardflags & BFL_FEM)
5492             && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
5493                 if (!
5494                     (wlc_hw->boardrev >= 0x1250
5495                      && (wlc_hw->boardflags & BFL_FEM_BT)))
5496                         ai_epa_4313war(wlc_hw->sih);
5497         }
5498 }
5499
5500 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5501 {
5502         uint coremask;
5503
5504         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5505
5506         /*
5507          * Enable pll and xtal, initialize the power control registers,
5508          * and force fastclock for the remainder of brcms_c_up().
5509          */
5510         brcms_b_xtal(wlc_hw, ON);
5511         ai_clkctl_init(wlc_hw->sih);
5512         brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5513
5514         /*
5515          * Configure pci/pcmcia here instead of in brcms_c_attach()
5516          * to allow mfg hotswap:  down, hotswap (chip power cycle), up.
5517          */
5518         coremask = (1 << wlc_hw->wlc->core->coreidx);
5519
5520         ai_pci_setup(wlc_hw->sih, coremask);
5521
5522         /*
5523          * Need to read the hwradio status here to cover the case where the
5524          * system is loaded with the hw radio disabled. We do not want to
5525          * bring the driver up in this case.
5526          */
5527         if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5528                 /* put SB PCI in down state again */
5529                 ai_pci_down(wlc_hw->sih);
5530                 brcms_b_xtal(wlc_hw, OFF);
5531                 return -ENOMEDIUM;
5532         }
5533
5534         ai_pci_up(wlc_hw->sih);
5535
5536         /* reset the d11 core */
5537         brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5538
5539         return 0;
5540 }
5541
5542 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5543 {
5544         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5545
5546         wlc_hw->up = true;
5547         wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5548
5549         /* FULLY enable dynamic power control and d11 core interrupt */
5550         brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
5551         brcms_intrson(wlc_hw->wlc->wl);
5552         return 0;
5553 }
5554
5555 /*
5556  * Write WME tunable parameters for retransmit/max rate
5557  * from wlc struct to ucode
5558  */
5559 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5560 {
5561         int ac;
5562
5563         /* Need clock to do this */
5564         if (!wlc->clk)
5565                 return;
5566
5567         for (ac = 0; ac < AC_COUNT; ac++)
5568                 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5569                                   wlc->wme_retries[ac]);
5570 }
5571
5572 /* make interface operational */
5573 int brcms_c_up(struct brcms_c_info *wlc)
5574 {
5575         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5576
5577         /* HW is turned off so don't try to access it */
5578         if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5579                 return -ENOMEDIUM;
5580
5581         if (!wlc->pub->hw_up) {
5582                 brcms_b_hw_up(wlc->hw);
5583                 wlc->pub->hw_up = true;
5584         }
5585
5586         if ((wlc->pub->boardflags & BFL_FEM)
5587             && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) {
5588                 if (wlc->pub->boardrev >= 0x1250
5589                     && (wlc->pub->boardflags & BFL_FEM_BT))
5590                         brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5591                                 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5592                 else
5593                         brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5594                                     MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5595         }
5596
5597         /*
5598          * Need to read the hwradio status here to cover the case where the
5599          * system is loaded with the hw radio disabled. We do not want to bring
5600          * the driver up in this case. If radio is disabled, abort up, lower
5601          * power, start radio timer and return 0(for NDIS) don't call
5602          * radio_update to avoid looping brcms_c_up.
5603          *
5604          * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5605          */
5606         if (!wlc->pub->radio_disabled) {
5607                 int status = brcms_b_up_prep(wlc->hw);
5608                 if (status == -ENOMEDIUM) {
5609                         if (!mboolisset
5610                             (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5611                                 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5612                                 mboolset(wlc->pub->radio_disabled,
5613                                          WL_RADIO_HW_DISABLE);
5614
5615                                 if (bsscfg->enable && bsscfg->BSS)
5616                                         wiphy_err(wlc->wiphy, "wl%d: up"
5617                                                   ": rfdisable -> "
5618                                                   "bsscfg_disable()\n",
5619                                                    wlc->pub->unit);
5620                         }
5621                 }
5622         }
5623
5624         if (wlc->pub->radio_disabled) {
5625                 brcms_c_radio_monitor_start(wlc);
5626                 return 0;
5627         }
5628
5629         /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5630         wlc->clk = true;
5631
5632         brcms_c_radio_monitor_stop(wlc);
5633
5634         /* Set EDCF hostflags */
5635         brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5636
5637         brcms_init(wlc->wl);
5638         wlc->pub->up = true;
5639
5640         if (wlc->bandinit_pending) {
5641                 brcms_c_suspend_mac_and_wait(wlc);
5642                 brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec);
5643                 wlc->bandinit_pending = false;
5644                 brcms_c_enable_mac(wlc);
5645         }
5646
5647         brcms_b_up_finish(wlc->hw);
5648
5649         /* Program the TX wme params with the current settings */
5650         brcms_c_wme_retries_write(wlc);
5651
5652         /* start one second watchdog timer */
5653         brcms_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5654         wlc->WDarmed = true;
5655
5656         /* ensure antenna config is up to date */
5657         brcms_c_stf_phy_txant_upd(wlc);
5658         /* ensure LDPC config is in sync */
5659         brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5660
5661         return 0;
5662 }
5663
5664 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5665 {
5666         uint callbacks = 0;
5667
5668         return callbacks;
5669 }
5670
5671 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5672 {
5673         bool dev_gone;
5674         uint callbacks = 0;
5675
5676         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5677
5678         if (!wlc_hw->up)
5679                 return callbacks;
5680
5681         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5682
5683         /* disable interrupts */
5684         if (dev_gone)
5685                 wlc_hw->wlc->macintmask = 0;
5686         else {
5687                 /* now disable interrupts */
5688                 brcms_intrsoff(wlc_hw->wlc->wl);
5689
5690                 /* ensure we're running on the pll clock again */
5691                 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5692         }
5693         /* down phy at the last of this stage */
5694         callbacks += wlc_phy_down(wlc_hw->band->pi);
5695
5696         return callbacks;
5697 }
5698
5699 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5700 {
5701         uint callbacks = 0;
5702         bool dev_gone;
5703
5704         BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5705
5706         if (!wlc_hw->up)
5707                 return callbacks;
5708
5709         wlc_hw->up = false;
5710         wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5711
5712         dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5713
5714         if (dev_gone) {
5715                 wlc_hw->sbclk = false;
5716                 wlc_hw->clk = false;
5717                 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5718
5719                 /* reclaim any posted packets */
5720                 brcms_c_flushqueues(wlc_hw->wlc);
5721         } else {
5722
5723                 /* Reset and disable the core */
5724                 if (ai_iscoreup(wlc_hw->sih)) {
5725                         if (R_REG(&wlc_hw->regs->maccontrol) &
5726                             MCTL_EN_MAC)
5727                                 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5728                         callbacks += brcms_reset(wlc_hw->wlc->wl);
5729                         brcms_c_coredisable(wlc_hw);
5730                 }
5731
5732                 /* turn off primary xtal and pll */
5733                 if (!wlc_hw->noreset) {
5734                         ai_pci_down(wlc_hw->sih);
5735                         brcms_b_xtal(wlc_hw, OFF);
5736                 }
5737         }
5738
5739         return callbacks;
5740 }
5741
5742 /*
5743  * Mark the interface nonoperational, stop the software mechanisms,
5744  * disable the hardware, free any transient buffer state.
5745  * Return a count of the number of driver callbacks still pending.
5746  */
5747 uint brcms_c_down(struct brcms_c_info *wlc)
5748 {
5749
5750         uint callbacks = 0;
5751         int i;
5752         bool dev_gone = false;
5753         struct brcms_txq_info *qi;
5754
5755         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5756
5757         /* check if we are already in the going down path */
5758         if (wlc->going_down) {
5759                 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5760                           "\n", wlc->pub->unit, __func__);
5761                 return 0;
5762         }
5763         if (!wlc->pub->up)
5764                 return callbacks;
5765
5766         /* in between, mpc could try to bring down again.. */
5767         wlc->going_down = true;
5768
5769         callbacks += brcms_b_bmac_down_prep(wlc->hw);
5770
5771         dev_gone = brcms_deviceremoved(wlc);
5772
5773         /* Call any registered down handlers */
5774         for (i = 0; i < BRCMS_MAXMODULES; i++) {
5775                 if (wlc->modulecb[i].down_fn)
5776                         callbacks +=
5777                             wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5778         }
5779
5780         /* cancel the watchdog timer */
5781         if (wlc->WDarmed) {
5782                 if (!brcms_del_timer(wlc->wl, wlc->wdtimer))
5783                         callbacks++;
5784                 wlc->WDarmed = false;
5785         }
5786         /* cancel all other timers */
5787         callbacks += brcms_c_down_del_timer(wlc);
5788
5789         wlc->pub->up = false;
5790
5791         wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5792
5793         /* clear txq flow control */
5794         brcms_c_txflowcontrol_reset(wlc);
5795
5796         /* flush tx queues */
5797         for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5798                 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5799
5800         callbacks += brcms_b_down_finish(wlc->hw);
5801
5802         /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5803         wlc->clk = false;
5804
5805         wlc->going_down = false;
5806         return callbacks;
5807 }
5808
5809 /* Set the current gmode configuration */
5810 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5811 {
5812         int ret = 0;
5813         uint i;
5814         struct brcms_c_rateset rs;
5815         /* Default to 54g Auto */
5816         /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5817         s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5818         bool shortslot_restrict = false; /* Restrict association to stations
5819                                           * that support shortslot
5820                                           */
5821         bool ofdm_basic = false;        /* Make 6, 12, and 24 basic rates */
5822         /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5823         int preamble = BRCMS_PLCP_LONG;
5824         bool preamble_restrict = false; /* Restrict association to stations
5825                                          * that support short preambles
5826                                          */
5827         struct brcms_band *band;
5828
5829         /* if N-support is enabled, allow Gmode set as long as requested
5830          * Gmode is not GMODE_LEGACY_B
5831          */
5832         if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5833                 return -ENOTSUPP;
5834
5835         /* verify that we are dealing with 2G band and grab the band pointer */
5836         if (wlc->band->bandtype == BRCM_BAND_2G)
5837                 band = wlc->band;
5838         else if ((wlc->pub->_nbands > 1) &&
5839                  (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5840                 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5841         else
5842                 return -EINVAL;
5843
5844         /* Legacy or bust when no OFDM is supported by regulatory */
5845         if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) &
5846              BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B))
5847                 return -EINVAL;
5848
5849         /* update configuration value */
5850         if (config == true)
5851                 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5852
5853         /* Clear rateset override */
5854         memset(&rs, 0, sizeof(struct brcms_c_rateset));
5855
5856         switch (gmode) {
5857         case GMODE_LEGACY_B:
5858                 shortslot = BRCMS_SHORTSLOT_OFF;
5859                 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5860
5861                 break;
5862
5863         case GMODE_LRS:
5864                 break;
5865
5866         case GMODE_AUTO:
5867                 /* Accept defaults */
5868                 break;
5869
5870         case GMODE_ONLY:
5871                 ofdm_basic = true;
5872                 preamble = BRCMS_PLCP_SHORT;
5873                 preamble_restrict = true;
5874                 break;
5875
5876         case GMODE_PERFORMANCE:
5877                 shortslot = BRCMS_SHORTSLOT_ON;
5878                 shortslot_restrict = true;
5879                 ofdm_basic = true;
5880                 preamble = BRCMS_PLCP_SHORT;
5881                 preamble_restrict = true;
5882                 break;
5883
5884         default:
5885                 /* Error */
5886                 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5887                           wlc->pub->unit, __func__, gmode);
5888                 return -ENOTSUPP;
5889         }
5890
5891         band->gmode = gmode;
5892
5893         wlc->shortslot_override = shortslot;
5894
5895         /* Use the default 11g rateset */
5896         if (!rs.count)
5897                 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5898
5899         if (ofdm_basic) {
5900                 for (i = 0; i < rs.count; i++) {
5901                         if (rs.rates[i] == BRCM_RATE_6M
5902                             || rs.rates[i] == BRCM_RATE_12M
5903                             || rs.rates[i] == BRCM_RATE_24M)
5904                                 rs.rates[i] |= BRCMS_RATE_FLAG;
5905                 }
5906         }
5907
5908         /* Set default bss rateset */
5909         wlc->default_bss->rateset.count = rs.count;
5910         memcpy(wlc->default_bss->rateset.rates, rs.rates,
5911                sizeof(wlc->default_bss->rateset.rates));
5912
5913         return ret;
5914 }
5915
5916 int brcms_c_set_nmode(struct brcms_c_info *wlc)
5917 {
5918         uint i;
5919         s32 nmode = AUTO;
5920
5921         if (wlc->stf->txstreams == WL_11N_3x3)
5922                 nmode = WL_11N_3x3;
5923         else
5924                 nmode = WL_11N_2x2;
5925
5926         /* force GMODE_AUTO if NMODE is ON */
5927         brcms_c_set_gmode(wlc, GMODE_AUTO, true);
5928         if (nmode == WL_11N_3x3)
5929                 wlc->pub->_n_enab = SUPPORT_HT;
5930         else
5931                 wlc->pub->_n_enab = SUPPORT_11N;
5932         wlc->default_bss->flags |= BRCMS_BSS_HT;
5933         /* add the mcs rates to the default and hw ratesets */
5934         brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
5935                               wlc->stf->txstreams);
5936         for (i = 0; i < wlc->pub->_nbands; i++)
5937                 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
5938                        wlc->default_bss->rateset.mcs, MCSSET_LEN);
5939
5940         return 0;
5941 }
5942
5943 static int
5944 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
5945                              struct brcms_c_rateset *rs_arg)
5946 {
5947         struct brcms_c_rateset rs, new;
5948         uint bandunit;
5949
5950         memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
5951
5952         /* check for bad count value */
5953         if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
5954                 return -EINVAL;
5955
5956         /* try the current band */
5957         bandunit = wlc->band->bandunit;
5958         memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5959         if (brcms_c_rate_hwrs_filter_sort_validate
5960             (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
5961              wlc->stf->txstreams))
5962                 goto good;
5963
5964         /* try the other band */
5965         if (brcms_is_mband_unlocked(wlc)) {
5966                 bandunit = OTHERBANDUNIT(wlc);
5967                 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
5968                 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
5969                                                        &wlc->
5970                                                        bandstate[bandunit]->
5971                                                        hw_rateset, true,
5972                                                        wlc->stf->txstreams))
5973                         goto good;
5974         }
5975
5976         return -EBADE;
5977
5978  good:
5979         /* apply new rateset */
5980         memcpy(&wlc->default_bss->rateset, &new,
5981                sizeof(struct brcms_c_rateset));
5982         memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
5983                sizeof(struct brcms_c_rateset));
5984         return 0;
5985 }
5986
5987 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
5988 {
5989         u8 r;
5990         bool war = false;
5991
5992         if (wlc->bsscfg->associated)
5993                 r = wlc->bsscfg->current_bss->rateset.rates[0];
5994         else
5995                 r = wlc->default_bss->rateset.rates[0];
5996
5997         wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
5998 }
5999
6000 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
6001 {
6002         u16 chspec = ch20mhz_chspec(channel);
6003
6004         if (channel < 0 || channel > MAXCHANNEL)
6005                 return -EINVAL;
6006
6007         if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
6008                 return -EINVAL;
6009
6010
6011         if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
6012                 if (wlc->band->bandunit != chspec_bandunit(chspec))
6013                         wlc->bandinit_pending = true;
6014                 else
6015                         wlc->bandinit_pending = false;
6016         }
6017
6018         wlc->default_bss->chanspec = chspec;
6019         /* brcms_c_BSSinit() will sanitize the rateset before
6020          * using it.. */
6021         if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
6022                 brcms_c_set_home_chanspec(wlc, chspec);
6023                 brcms_c_suspend_mac_and_wait(wlc);
6024                 brcms_c_set_chanspec(wlc, chspec);
6025                 brcms_c_enable_mac(wlc);
6026         }
6027         return 0;
6028 }
6029
6030 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
6031 {
6032         int ac;
6033
6034         if (srl < 1 || srl > RETRY_SHORT_MAX ||
6035             lrl < 1 || lrl > RETRY_SHORT_MAX)
6036                 return -EINVAL;
6037
6038         wlc->SRL = srl;
6039         wlc->LRL = lrl;
6040
6041         brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
6042
6043         for (ac = 0; ac < AC_COUNT; ac++) {
6044                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
6045                                                EDCF_SHORT,  wlc->SRL);
6046                 wlc->wme_retries[ac] =  SFIELD(wlc->wme_retries[ac],
6047                                                EDCF_LONG, wlc->LRL);
6048         }
6049         brcms_c_wme_retries_write(wlc);
6050
6051         return 0;
6052 }
6053
6054 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
6055                                  struct brcm_rateset *currs)
6056 {
6057         struct brcms_c_rateset *rs;
6058
6059         if (wlc->pub->associated)
6060                 rs = &wlc->bsscfg->current_bss->rateset;
6061         else
6062                 rs = &wlc->default_bss->rateset;
6063
6064         /* Copy only legacy rateset section */
6065         currs->count = rs->count;
6066         memcpy(&currs->rates, &rs->rates, rs->count);
6067 }
6068
6069 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
6070 {
6071         struct brcms_c_rateset internal_rs;
6072         int bcmerror;
6073
6074         if (rs->count > BRCMS_NUMRATES)
6075                 return -ENOBUFS;
6076
6077         memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
6078
6079         /* Copy only legacy rateset section */
6080         internal_rs.count = rs->count;
6081         memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
6082
6083         /* merge rateset coming in with the current mcsset */
6084         if (wlc->pub->_n_enab & SUPPORT_11N) {
6085                 struct brcms_bss_info *mcsset_bss;
6086                 if (wlc->bsscfg->associated)
6087                         mcsset_bss = wlc->bsscfg->current_bss;
6088                 else
6089                         mcsset_bss = wlc->default_bss;
6090                 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
6091                        MCSSET_LEN);
6092         }
6093
6094         bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
6095         if (!bcmerror)
6096                 brcms_c_ofdm_rateset_war(wlc);
6097
6098         return bcmerror;
6099 }
6100
6101 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
6102 {
6103         if (period < DOT11_MIN_BEACON_PERIOD ||
6104             period > DOT11_MAX_BEACON_PERIOD)
6105                 return -EINVAL;
6106
6107         wlc->default_bss->beacon_period = period;
6108         return 0;
6109 }
6110
6111 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
6112 {
6113         return wlc->band->phytype;
6114 }
6115
6116 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
6117 {
6118         wlc->shortslot_override = sslot_override;
6119
6120         /*
6121          * shortslot is an 11g feature, so no more work if we are
6122          * currently on the 5G band
6123          */
6124         if (wlc->band->bandtype == BRCM_BAND_5G)
6125                 return;
6126
6127         if (wlc->pub->up && wlc->pub->associated) {
6128                 /* let watchdog or beacon processing update shortslot */
6129         } else if (wlc->pub->up) {
6130                 /* unassociated shortslot is off */
6131                 brcms_c_switch_shortslot(wlc, false);
6132         } else {
6133                 /* driver is down, so just update the brcms_c_info
6134                  * value */
6135                 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
6136                         wlc->shortslot = false;
6137                 else
6138                         wlc->shortslot =
6139                             (wlc->shortslot_override ==
6140                              BRCMS_SHORTSLOT_ON);
6141         }
6142 }
6143
6144 /*
6145  * register watchdog and down handlers.
6146  */
6147 int brcms_c_module_register(struct brcms_pub *pub,
6148                             const char *name, struct brcms_info *hdl,
6149                             int (*d_fn)(void *handle))
6150 {
6151         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
6152         int i;
6153
6154         /* find an empty entry and just add, no duplication check! */
6155         for (i = 0; i < BRCMS_MAXMODULES; i++) {
6156                 if (wlc->modulecb[i].name[0] == '\0') {
6157                         strncpy(wlc->modulecb[i].name, name,
6158                                 sizeof(wlc->modulecb[i].name) - 1);
6159                         wlc->modulecb[i].hdl = hdl;
6160                         wlc->modulecb[i].down_fn = d_fn;
6161                         return 0;
6162                 }
6163         }
6164
6165         return -ENOSR;
6166 }
6167
6168 /* unregister module callbacks */
6169 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
6170                               struct brcms_info *hdl)
6171 {
6172         struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
6173         int i;
6174
6175         if (wlc == NULL)
6176                 return -ENODATA;
6177
6178         for (i = 0; i < BRCMS_MAXMODULES; i++) {
6179                 if (!strcmp(wlc->modulecb[i].name, name) &&
6180                     (wlc->modulecb[i].hdl == hdl)) {
6181                         memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
6182                         return 0;
6183                 }
6184         }
6185
6186         /* table not found! */
6187         return -ENODATA;
6188 }
6189
6190 #ifdef BCMDBG
6191 static const char * const supr_reason[] = {
6192         "None", "PMQ Entry", "Flush request",
6193         "Previous frag failure", "Channel mismatch",
6194         "Lifetime Expiry", "Underflow"
6195 };
6196
6197 static void brcms_c_print_txs_status(u16 s)
6198 {
6199         printk(KERN_DEBUG "[15:12]  %d  frame attempts\n",
6200                (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT);
6201         printk(KERN_DEBUG " [11:8]  %d  rts attempts\n",
6202                (s & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT);
6203         printk(KERN_DEBUG "    [7]  %d  PM mode indicated\n",
6204                ((s & TX_STATUS_PMINDCTD) ? 1 : 0));
6205         printk(KERN_DEBUG "    [6]  %d  intermediate status\n",
6206                ((s & TX_STATUS_INTERMEDIATE) ? 1 : 0));
6207         printk(KERN_DEBUG "    [5]  %d  AMPDU\n",
6208                (s & TX_STATUS_AMPDU) ? 1 : 0);
6209         printk(KERN_DEBUG "  [4:2]  %d  Frame Suppressed Reason (%s)\n",
6210                ((s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT),
6211                supr_reason[(s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT]);
6212         printk(KERN_DEBUG "    [1]  %d  acked\n",
6213                ((s & TX_STATUS_ACK_RCV) ? 1 : 0));
6214 }
6215 #endif                          /* BCMDBG */
6216
6217 void brcms_c_print_txstatus(struct tx_status *txs)
6218 {
6219 #if defined(BCMDBG)
6220         u16 s = txs->status;
6221         u16 ackphyrxsh = txs->ackphyrxsh;
6222
6223         printk(KERN_DEBUG "\ntxpkt (MPDU) Complete\n");
6224
6225         printk(KERN_DEBUG "FrameID: %04x   ", txs->frameid);
6226         printk(KERN_DEBUG "TxStatus: %04x", s);
6227         printk(KERN_DEBUG "\n");
6228
6229         brcms_c_print_txs_status(s);
6230
6231         printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime);
6232         printk(KERN_DEBUG "Seq: %04x ", txs->sequence);
6233         printk(KERN_DEBUG "PHYTxStatus: %04x ", txs->phyerr);
6234         printk(KERN_DEBUG "RxAckRSSI: %04x ",
6235                (ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT);
6236         printk(KERN_DEBUG "RxAckSQ: %04x",
6237                (ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
6238         printk(KERN_DEBUG "\n");
6239 #endif                          /* defined(BCMDBG) */
6240 }
6241
6242 void brcms_c_statsupd(struct brcms_c_info *wlc)
6243 {
6244         int i;
6245         struct macstat macstats;
6246 #ifdef BCMDBG
6247         u16 delta;
6248         u16 rxf0ovfl;
6249         u16 txfunfl[NFIFO];
6250 #endif                          /* BCMDBG */
6251
6252         /* if driver down, make no sense to update stats */
6253         if (!wlc->pub->up)
6254                 return;
6255
6256 #ifdef BCMDBG
6257         /* save last rx fifo 0 overflow count */
6258         rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
6259
6260         /* save last tx fifo  underflow count */
6261         for (i = 0; i < NFIFO; i++)
6262                 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
6263 #endif                          /* BCMDBG */
6264
6265         /* Read mac stats from contiguous shared memory */
6266         brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
6267                                 sizeof(struct macstat), OBJADDR_SHM_SEL);
6268
6269 #ifdef BCMDBG
6270         /* check for rx fifo 0 overflow */
6271         delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
6272         if (delta)
6273                 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
6274                           wlc->pub->unit, delta);
6275
6276         /* check for tx fifo underflows */
6277         for (i = 0; i < NFIFO; i++) {
6278                 delta =
6279                     (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
6280                               txfunfl[i]);
6281                 if (delta)
6282                         wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
6283                                   "\n", wlc->pub->unit, delta, i);
6284         }
6285 #endif                          /* BCMDBG */
6286
6287         /* merge counters from dma module */
6288         for (i = 0; i < NFIFO; i++) {
6289                 if (wlc->hw->di[i])
6290                         dma_counterreset(wlc->hw->di[i]);
6291         }
6292 }
6293
6294 bool brcms_c_chipmatch(u16 vendor, u16 device)
6295 {
6296         if (vendor != PCI_VENDOR_ID_BROADCOM) {
6297                 pr_err("chipmatch: unknown vendor id %04x\n", vendor);
6298                 return false;
6299         }
6300
6301         if (device == BCM43224_D11N_ID_VEN1)
6302                 return true;
6303         if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
6304                 return true;
6305         if (device == BCM4313_D11N2G_ID)
6306                 return true;
6307         if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
6308                 return true;
6309
6310         pr_err("chipmatch: unknown device id %04x\n", device);
6311         return false;
6312 }
6313
6314 #if defined(BCMDBG)
6315 void brcms_c_print_txdesc(struct d11txh *txh)
6316 {
6317         u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
6318         u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
6319         u16 mfc = le16_to_cpu(txh->MacFrameControl);
6320         u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
6321         u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
6322         u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
6323         u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
6324         u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
6325         u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
6326         u16 mainrates = le16_to_cpu(txh->MainRates);
6327         u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
6328         u8 *iv = txh->IV;
6329         u8 *ra = txh->TxFrameRA;
6330         u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
6331         u8 *rtspfb = txh->RTSPLCPFallback;
6332         u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
6333         u8 *fragpfb = txh->FragPLCPFallback;
6334         u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
6335         u16 mmodelen = le16_to_cpu(txh->MModeLen);
6336         u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
6337         u16 tfid = le16_to_cpu(txh->TxFrameID);
6338         u16 txs = le16_to_cpu(txh->TxStatus);
6339         u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
6340         u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
6341         u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
6342         u16 mmbyte = le16_to_cpu(txh->MinMBytes);
6343
6344         u8 *rtsph = txh->RTSPhyHeader;
6345         struct ieee80211_rts rts = txh->rts_frame;
6346         char hexbuf[256];
6347
6348         /* add plcp header along with txh descriptor */
6349         printk(KERN_DEBUG "Raw TxDesc + plcp header:\n");
6350         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
6351                              txh, sizeof(struct d11txh) + 48);
6352
6353         printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl);
6354         printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch);
6355         printk(KERN_DEBUG "FC: %04x ", mfc);
6356         printk(KERN_DEBUG "FES Time: %04x\n", tfest);
6357         printk(KERN_DEBUG "PhyCtl: %04x%s ", ptcw,
6358                (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
6359         printk(KERN_DEBUG "PhyCtl_1: %04x ", ptcw_1);
6360         printk(KERN_DEBUG "PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
6361         printk(KERN_DEBUG "PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
6362         printk(KERN_DEBUG "PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
6363         printk(KERN_DEBUG "MainRates: %04x ", mainrates);
6364         printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft);
6365         printk(KERN_DEBUG "\n");
6366
6367         brcmu_format_hex(hexbuf, iv, sizeof(txh->IV));
6368         printk(KERN_DEBUG "SecIV:       %s\n", hexbuf);
6369         brcmu_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA));
6370         printk(KERN_DEBUG "RA:          %s\n", hexbuf);
6371
6372         printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb);
6373         brcmu_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback));
6374         printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
6375         printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb);
6376         brcmu_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback));
6377         printk(KERN_DEBUG "PLCP: %s ", hexbuf);
6378         printk(KERN_DEBUG "DUR: %04x", fragdfb);
6379         printk(KERN_DEBUG "\n");
6380
6381         printk(KERN_DEBUG "MModeLen: %04x ", mmodelen);
6382         printk(KERN_DEBUG "MModeFbrLen: %04x\n", mmodefbrlen);
6383
6384         printk(KERN_DEBUG "FrameID:     %04x\n", tfid);
6385         printk(KERN_DEBUG "TxStatus:    %04x\n", txs);
6386
6387         printk(KERN_DEBUG "MaxNumMpdu:  %04x\n", mnmpdu);
6388         printk(KERN_DEBUG "MaxAggbyte:  %04x\n", mabyte);
6389         printk(KERN_DEBUG "MaxAggbyte_fb:  %04x\n", mabyte_f);
6390         printk(KERN_DEBUG "MinByte:     %04x\n", mmbyte);
6391
6392         brcmu_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader));
6393         printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
6394         brcmu_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame));
6395         printk(KERN_DEBUG "RTS Frame: %s", hexbuf);
6396         printk(KERN_DEBUG "\n");
6397 }
6398 #endif                          /* defined(BCMDBG) */
6399
6400 #if defined(BCMDBG)
6401 void brcms_c_print_rxh(struct d11rxhdr *rxh)
6402 {
6403         u16 len = rxh->RxFrameSize;
6404         u16 phystatus_0 = rxh->PhyRxStatus_0;
6405         u16 phystatus_1 = rxh->PhyRxStatus_1;
6406         u16 phystatus_2 = rxh->PhyRxStatus_2;
6407         u16 phystatus_3 = rxh->PhyRxStatus_3;
6408         u16 macstatus1 = rxh->RxStatus1;
6409         u16 macstatus2 = rxh->RxStatus2;
6410         char flagstr[64];
6411         char lenbuf[20];
6412         static const struct brcmu_bit_desc macstat_flags[] = {
6413                 {RXS_FCSERR, "FCSErr"},
6414                 {RXS_RESPFRAMETX, "Reply"},
6415                 {RXS_PBPRES, "PADDING"},
6416                 {RXS_DECATMPT, "DeCr"},
6417                 {RXS_DECERR, "DeCrErr"},
6418                 {RXS_BCNSENT, "Bcn"},
6419                 {0, NULL}
6420         };
6421
6422         printk(KERN_DEBUG "Raw RxDesc:\n");
6423         print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh,
6424                              sizeof(struct d11rxhdr));
6425
6426         brcmu_format_flags(macstat_flags, macstatus1, flagstr, 64);
6427
6428         snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
6429
6430         printk(KERN_DEBUG "RxFrameSize:     %6s (%d)%s\n", lenbuf, len,
6431                (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
6432         printk(KERN_DEBUG "RxPHYStatus:     %04x %04x %04x %04x\n",
6433                phystatus_0, phystatus_1, phystatus_2, phystatus_3);
6434         printk(KERN_DEBUG "RxMACStatus:     %x %s\n", macstatus1, flagstr);
6435         printk(KERN_DEBUG "RXMACaggtype:    %x\n",
6436                (macstatus2 & RXS_AGGTYPE_MASK));
6437         printk(KERN_DEBUG "RxTSFTime:       %04x\n", rxh->RxTSFTime);
6438 }
6439 #endif                          /* defined(BCMDBG) */
6440
6441 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
6442 {
6443         u16 table_ptr;
6444         u8 phy_rate, index;
6445
6446         /* get the phy specific rate encoding for the PLCP SIGNAL field */
6447         if (is_ofdm_rate(rate))
6448                 table_ptr = M_RT_DIRMAP_A;
6449         else
6450                 table_ptr = M_RT_DIRMAP_B;
6451
6452         /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
6453          * the index into the rate table.
6454          */
6455         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
6456         index = phy_rate & 0xf;
6457
6458         /* Find the SHM pointer to the rate table entry by looking in the
6459          * Direct-map Table
6460          */
6461         return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
6462 }
6463
6464 /* Callback for device removed */
6465
6466 /*
6467  * Attempts to queue a packet onto a multiple-precedence queue,
6468  * if necessary evicting a lower precedence packet from the queue.
6469  *
6470  * 'prec' is the precedence number that has already been mapped
6471  * from the packet priority.
6472  *
6473  * Returns true if packet consumed (queued), false if not.
6474  */
6475 static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6476                       struct sk_buff *pkt, int prec)
6477 {
6478         return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6479 }
6480
6481 bool
6482 brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6483                       struct sk_buff *pkt, int prec, bool head)
6484 {
6485         struct sk_buff *p;
6486         int eprec = -1;         /* precedence to evict from */
6487
6488         /* Determine precedence from which to evict packet, if any */
6489         if (pktq_pfull(q, prec))
6490                 eprec = prec;
6491         else if (pktq_full(q)) {
6492                 p = brcmu_pktq_peek_tail(q, &eprec);
6493                 if (eprec > prec) {
6494                         wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6495                                   "\n", __func__, eprec, prec);
6496                         return false;
6497                 }
6498         }
6499
6500         /* Evict if needed */
6501         if (eprec >= 0) {
6502                 bool discard_oldest;
6503
6504                 discard_oldest = ac_bitmap_tst(0, eprec);
6505
6506                 /* Refuse newer packet unless configured to discard oldest */
6507                 if (eprec == prec && !discard_oldest) {
6508                         wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6509                                   "\n", __func__, prec);
6510                         return false;
6511                 }
6512
6513                 /* Evict packet according to discard policy */
6514                 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6515                         brcmu_pktq_pdeq_tail(q, eprec);
6516                 brcmu_pkt_buf_free_skb(p);
6517         }
6518
6519         /* Enqueue */
6520         if (head)
6521                 p = brcmu_pktq_penq_head(q, prec, pkt);
6522         else
6523                 p = brcmu_pktq_penq(q, prec, pkt);
6524
6525         return true;
6526 }
6527
6528 void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6529                      struct sk_buff *sdu, uint prec)
6530 {
6531         struct brcms_txq_info *qi = wlc->pkt_queue;     /* Check me */
6532         struct pktq *q = &qi->q;
6533         int prio;
6534
6535         prio = sdu->priority;
6536
6537         if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6538                 /*
6539                  * we might hit this condtion in case
6540                  * packet flooding from mac80211 stack
6541                  */
6542                 brcmu_pkt_buf_free_skb(sdu);
6543         }
6544 }
6545
6546 /*
6547  * bcmc_fid_generate:
6548  * Generate frame ID for a BCMC packet.  The frag field is not used
6549  * for MC frames so is used as part of the sequence number.
6550  */
6551 static inline u16
6552 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6553                   struct d11txh *txh)
6554 {
6555         u16 frameid;
6556
6557         frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6558                                                   TXFID_QUEUE_MASK);
6559         frameid |=
6560             (((wlc->
6561                mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6562             TX_BCMC_FIFO;
6563
6564         return frameid;
6565 }
6566
6567 static uint
6568 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6569                       u8 preamble_type)
6570 {
6571         uint dur = 0;
6572
6573         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6574                 wlc->pub->unit, rspec, preamble_type);
6575         /*
6576          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6577          * is less than or equal to the rate of the immediately previous
6578          * frame in the FES
6579          */
6580         rspec = brcms_basic_rate(wlc, rspec);
6581         /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6582         dur =
6583             brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6584                                 (DOT11_ACK_LEN + FCS_LEN));
6585         return dur;
6586 }
6587
6588 static uint
6589 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6590                       u8 preamble_type)
6591 {
6592         BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6593                 wlc->pub->unit, rspec, preamble_type);
6594         return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6595 }
6596
6597 static uint
6598 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6599                      u8 preamble_type)
6600 {
6601         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6602                  "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6603         /*
6604          * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6605          * is less than or equal to the rate of the immediately previous
6606          * frame in the FES
6607          */
6608         rspec = brcms_basic_rate(wlc, rspec);
6609         /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6610         return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6611                                    (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6612                                     FCS_LEN));
6613 }
6614
6615 /* brcms_c_compute_frame_dur()
6616  *
6617  * Calculate the 802.11 MAC header DUR field for MPDU
6618  * DUR for a single frame = 1 SIFS + 1 ACK
6619  * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6620  *
6621  * rate                 MPDU rate in unit of 500kbps
6622  * next_frag_len        next MPDU length in bytes
6623  * preamble_type        use short/GF or long/MM PLCP header
6624  */
6625 static u16
6626 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6627                       u8 preamble_type, uint next_frag_len)
6628 {
6629         u16 dur, sifs;
6630
6631         sifs = get_sifs(wlc->band);
6632
6633         dur = sifs;
6634         dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6635
6636         if (next_frag_len) {
6637                 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6638                 dur *= 2;
6639                 /* add another SIFS and the frag time */
6640                 dur += sifs;
6641                 dur +=
6642                     (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6643                                                  next_frag_len);
6644         }
6645         return dur;
6646 }
6647
6648 /* The opposite of brcms_c_calc_frame_time */
6649 static uint
6650 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6651                    u8 preamble_type, uint dur)
6652 {
6653         uint nsyms, mac_len, Ndps, kNdps;
6654         uint rate = rspec2rate(ratespec);
6655
6656         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6657                  wlc->pub->unit, ratespec, preamble_type, dur);
6658
6659         if (is_mcs_rate(ratespec)) {
6660                 uint mcs = ratespec & RSPEC_RATE_MASK;
6661                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6662                 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6663                 /* payload calculation matches that of regular ofdm */
6664                 if (wlc->band->bandtype == BRCM_BAND_2G)
6665                         dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6666                 /* kNdbps = kbps * 4 */
6667                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6668                                    rspec_issgi(ratespec)) * 4;
6669                 nsyms = dur / APHY_SYMBOL_TIME;
6670                 mac_len =
6671                     ((nsyms * kNdps) -
6672                      ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6673         } else if (is_ofdm_rate(ratespec)) {
6674                 dur -= APHY_PREAMBLE_TIME;
6675                 dur -= APHY_SIGNAL_TIME;
6676                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6677                 Ndps = rate * 2;
6678                 nsyms = dur / APHY_SYMBOL_TIME;
6679                 mac_len =
6680                     ((nsyms * Ndps) -
6681                      (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6682         } else {
6683                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6684                         dur -= BPHY_PLCP_SHORT_TIME;
6685                 else
6686                         dur -= BPHY_PLCP_TIME;
6687                 mac_len = dur * rate;
6688                 /* divide out factor of 2 in rate (1/2 mbps) */
6689                 mac_len = mac_len / 8 / 2;
6690         }
6691         return mac_len;
6692 }
6693
6694 static u32
6695 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6696                        u32 int_val)
6697 {
6698         u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6699         u8 rate = int_val & NRATE_RATE_MASK;
6700         u32 rspec;
6701         bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6702         bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6703         bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6704                                   == NRATE_OVERRIDE_MCS_ONLY);
6705         int bcmerror = 0;
6706
6707         if (!ismcs)
6708                 return (u32) rate;
6709
6710         /* validate the combination of rate/mcs/stf is allowed */
6711         if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6712                 /* mcs only allowed when nmode */
6713                 if (stf > PHY_TXC1_MODE_SDM) {
6714                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6715                                   wlc->pub->unit, __func__);
6716                         bcmerror = -EINVAL;
6717                         goto done;
6718                 }
6719
6720                 /* mcs 32 is a special case, DUP mode 40 only */
6721                 if (rate == 32) {
6722                         if (!CHSPEC_IS40(wlc->home_chanspec) ||
6723                             ((stf != PHY_TXC1_MODE_SISO)
6724                              && (stf != PHY_TXC1_MODE_CDD))) {
6725                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6726                                           "32\n", wlc->pub->unit, __func__);
6727                                 bcmerror = -EINVAL;
6728                                 goto done;
6729                         }
6730                         /* mcs > 7 must use stf SDM */
6731                 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6732                         /* mcs > 7 must use stf SDM */
6733                         if (stf != PHY_TXC1_MODE_SDM) {
6734                                 BCMMSG(wlc->wiphy, "wl%d: enabling "
6735                                        "SDM mode for mcs %d\n",
6736                                        wlc->pub->unit, rate);
6737                                 stf = PHY_TXC1_MODE_SDM;
6738                         }
6739                 } else {
6740                         /*
6741                          * MCS 0-7 may use SISO, CDD, and for
6742                          * phy_rev >= 3 STBC
6743                          */
6744                         if ((stf > PHY_TXC1_MODE_STBC) ||
6745                             (!BRCMS_STBC_CAP_PHY(wlc)
6746                              && (stf == PHY_TXC1_MODE_STBC))) {
6747                                 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6748                                           "\n", wlc->pub->unit, __func__);
6749                                 bcmerror = -EINVAL;
6750                                 goto done;
6751                         }
6752                 }
6753         } else if (is_ofdm_rate(rate)) {
6754                 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6755                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6756                                   wlc->pub->unit, __func__);
6757                         bcmerror = -EINVAL;
6758                         goto done;
6759                 }
6760         } else if (is_cck_rate(rate)) {
6761                 if ((cur_band->bandtype != BRCM_BAND_2G)
6762                     || (stf != PHY_TXC1_MODE_SISO)) {
6763                         wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6764                                   wlc->pub->unit, __func__);
6765                         bcmerror = -EINVAL;
6766                         goto done;
6767                 }
6768         } else {
6769                 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6770                           wlc->pub->unit, __func__);
6771                 bcmerror = -EINVAL;
6772                 goto done;
6773         }
6774         /* make sure multiple antennae are available for non-siso rates */
6775         if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6776                 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6777                           "request\n", wlc->pub->unit, __func__);
6778                 bcmerror = -EINVAL;
6779                 goto done;
6780         }
6781
6782         rspec = rate;
6783         if (ismcs) {
6784                 rspec |= RSPEC_MIMORATE;
6785                 /* For STBC populate the STC field of the ratespec */
6786                 if (stf == PHY_TXC1_MODE_STBC) {
6787                         u8 stc;
6788                         stc = 1;        /* Nss for single stream is always 1 */
6789                         rspec |= (stc << RSPEC_STC_SHIFT);
6790                 }
6791         }
6792
6793         rspec |= (stf << RSPEC_STF_SHIFT);
6794
6795         if (override_mcs_only)
6796                 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6797
6798         if (issgi)
6799                 rspec |= RSPEC_SHORT_GI;
6800
6801         if ((rate != 0)
6802             && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6803                 return rate;
6804
6805         return rspec;
6806 done:
6807         return rate;
6808 }
6809
6810 /*
6811  * Add struct d11txh, struct cck_phy_hdr.
6812  *
6813  * 'p' data must start with 802.11 MAC header
6814  * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6815  *
6816  * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6817  *
6818  */
6819 static u16
6820 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6821                      struct sk_buff *p, struct scb *scb, uint frag,
6822                      uint nfrags, uint queue, uint next_frag_len)
6823 {
6824         struct ieee80211_hdr *h;
6825         struct d11txh *txh;
6826         u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6827         int len, phylen, rts_phylen;
6828         u16 mch, phyctl, xfts, mainrates;
6829         u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6830         u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6831         u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6832         bool use_rts = false;
6833         bool use_cts = false;
6834         bool use_rifs = false;
6835         bool short_preamble[2] = { false, false };
6836         u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6837         u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6838         u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6839         struct ieee80211_rts *rts = NULL;
6840         bool qos;
6841         uint ac;
6842         bool hwtkmic = false;
6843         u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6844 #define ANTCFG_NONE 0xFF
6845         u8 antcfg = ANTCFG_NONE;
6846         u8 fbantcfg = ANTCFG_NONE;
6847         uint phyctl1_stf = 0;
6848         u16 durid = 0;
6849         struct ieee80211_tx_rate *txrate[2];
6850         int k;
6851         struct ieee80211_tx_info *tx_info;
6852         bool is_mcs;
6853         u16 mimo_txbw;
6854         u8 mimo_preamble_type;
6855
6856         /* locate 802.11 MAC header */
6857         h = (struct ieee80211_hdr *)(p->data);
6858         qos = ieee80211_is_data_qos(h->frame_control);
6859
6860         /* compute length of frame in bytes for use in PLCP computations */
6861         len = brcmu_pkttotlen(p);
6862         phylen = len + FCS_LEN;
6863
6864         /* Get tx_info */
6865         tx_info = IEEE80211_SKB_CB(p);
6866
6867         /* add PLCP */
6868         plcp = skb_push(p, D11_PHY_HDR_LEN);
6869
6870         /* add Broadcom tx descriptor header */
6871         txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6872         memset(txh, 0, D11_TXH_LEN);
6873
6874         /* setup frameid */
6875         if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6876                 /* non-AP STA should never use BCMC queue */
6877                 if (queue == TX_BCMC_FIFO) {
6878                         wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6879                                   "TX_BCMC!\n", wlc->pub->unit, __func__);
6880                         frameid = bcmc_fid_generate(wlc, NULL, txh);
6881                 } else {
6882                         /* Increment the counter for first fragment */
6883                         if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6884                                 scb->seqnum[p->priority]++;
6885
6886                         /* extract fragment number from frame first */
6887                         seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6888                         seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6889                         h->seq_ctrl = cpu_to_le16(seq);
6890
6891                         frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6892                             (queue & TXFID_QUEUE_MASK);
6893                 }
6894         }
6895         frameid |= queue & TXFID_QUEUE_MASK;
6896
6897         /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6898         if (ieee80211_is_beacon(h->frame_control))
6899                 mcl |= TXC_IGNOREPMQ;
6900
6901         txrate[0] = tx_info->control.rates;
6902         txrate[1] = txrate[0] + 1;
6903
6904         /*
6905          * if rate control algorithm didn't give us a fallback
6906          * rate, use the primary rate
6907          */
6908         if (txrate[1]->idx < 0)
6909                 txrate[1] = txrate[0];
6910
6911         for (k = 0; k < hw->max_rates; k++) {
6912                 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6913                 if (!is_mcs) {
6914                         if ((txrate[k]->idx >= 0)
6915                             && (txrate[k]->idx <
6916                                 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
6917                                 rspec[k] =
6918                                     hw->wiphy->bands[tx_info->band]->
6919                                     bitrates[txrate[k]->idx].hw_value;
6920                                 short_preamble[k] =
6921                                     txrate[k]->
6922                                     flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
6923                                     true : false;
6924                         } else {
6925                                 rspec[k] = BRCM_RATE_1M;
6926                         }
6927                 } else {
6928                         rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
6929                                         NRATE_MCS_INUSE | txrate[k]->idx);
6930                 }
6931
6932                 /*
6933                  * Currently only support same setting for primay and
6934                  * fallback rates. Unify flags for each rate into a
6935                  * single value for the frame
6936                  */
6937                 use_rts |=
6938                     txrate[k]->
6939                     flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
6940                 use_cts |=
6941                     txrate[k]->
6942                     flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
6943
6944
6945                 /*
6946                  * (1) RATE:
6947                  *   determine and validate primary rate
6948                  *   and fallback rates
6949                  */
6950                 if (!rspec_active(rspec[k])) {
6951                         rspec[k] = BRCM_RATE_1M;
6952                 } else {
6953                         if (!is_multicast_ether_addr(h->addr1)) {
6954                                 /* set tx antenna config */
6955                                 brcms_c_antsel_antcfg_get(wlc->asi, false,
6956                                         false, 0, 0, &antcfg, &fbantcfg);
6957                         }
6958                 }
6959         }
6960
6961         phyctl1_stf = wlc->stf->ss_opmode;
6962
6963         if (wlc->pub->_n_enab & SUPPORT_11N) {
6964                 for (k = 0; k < hw->max_rates; k++) {
6965                         /*
6966                          * apply siso/cdd to single stream mcs's or ofdm
6967                          * if rspec is auto selected
6968                          */
6969                         if (((is_mcs_rate(rspec[k]) &&
6970                               is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
6971                              is_ofdm_rate(rspec[k]))
6972                             && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
6973                                 || !(rspec[k] & RSPEC_OVERRIDE))) {
6974                                 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
6975
6976                                 /* For SISO MCS use STBC if possible */
6977                                 if (is_mcs_rate(rspec[k])
6978                                     && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
6979                                         u8 stc;
6980
6981                                         /* Nss for single stream is always 1 */
6982                                         stc = 1;
6983                                         rspec[k] |= (PHY_TXC1_MODE_STBC <<
6984                                                         RSPEC_STF_SHIFT) |
6985                                                     (stc << RSPEC_STC_SHIFT);
6986                                 } else
6987                                         rspec[k] |=
6988                                             (phyctl1_stf << RSPEC_STF_SHIFT);
6989                         }
6990
6991                         /*
6992                          * Is the phy configured to use 40MHZ frames? If
6993                          * so then pick the desired txbw
6994                          */
6995                         if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
6996                                 /* default txbw is 20in40 SB */
6997                                 mimo_ctlchbw = mimo_txbw =
6998                                    CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
6999                                                                  wlc->band->pi))
7000                                    ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
7001
7002                                 if (is_mcs_rate(rspec[k])) {
7003                                         /* mcs 32 must be 40b/w DUP */
7004                                         if ((rspec[k] & RSPEC_RATE_MASK)
7005                                             == 32) {
7006                                                 mimo_txbw =
7007                                                     PHY_TXC1_BW_40MHZ_DUP;
7008                                                 /* use override */
7009                                         } else if (wlc->mimo_40txbw != AUTO)
7010                                                 mimo_txbw = wlc->mimo_40txbw;
7011                                         /* else check if dst is using 40 Mhz */
7012                                         else if (scb->flags & SCB_IS40)
7013                                                 mimo_txbw = PHY_TXC1_BW_40MHZ;
7014                                 } else if (is_ofdm_rate(rspec[k])) {
7015                                         if (wlc->ofdm_40txbw != AUTO)
7016                                                 mimo_txbw = wlc->ofdm_40txbw;
7017                                 } else if (wlc->cck_40txbw != AUTO) {
7018                                         mimo_txbw = wlc->cck_40txbw;
7019                                 }
7020                         } else {
7021                                 /*
7022                                  * mcs32 is 40 b/w only.
7023                                  * This is possible for probe packets on
7024                                  * a STA during SCAN
7025                                  */
7026                                 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
7027                                         /* mcs 0 */
7028                                         rspec[k] = RSPEC_MIMORATE;
7029
7030                                 mimo_txbw = PHY_TXC1_BW_20MHZ;
7031                         }
7032
7033                         /* Set channel width */
7034                         rspec[k] &= ~RSPEC_BW_MASK;
7035                         if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
7036                                 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
7037                         else
7038                                 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7039
7040                         /* Disable short GI, not supported yet */
7041                         rspec[k] &= ~RSPEC_SHORT_GI;
7042
7043                         mimo_preamble_type = BRCMS_MM_PREAMBLE;
7044                         if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
7045                                 mimo_preamble_type = BRCMS_GF_PREAMBLE;
7046
7047                         if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
7048                             && (!is_mcs_rate(rspec[k]))) {
7049                                 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
7050                                           "RC_MCS != is_mcs_rate(rspec)\n",
7051                                           wlc->pub->unit, __func__);
7052                         }
7053
7054                         if (is_mcs_rate(rspec[k])) {
7055                                 preamble_type[k] = mimo_preamble_type;
7056
7057                                 /*
7058                                  * if SGI is selected, then forced mm
7059                                  * for single stream
7060                                  */
7061                                 if ((rspec[k] & RSPEC_SHORT_GI)
7062                                     && is_single_stream(rspec[k] &
7063                                                         RSPEC_RATE_MASK))
7064                                         preamble_type[k] = BRCMS_MM_PREAMBLE;
7065                         }
7066
7067                         /* should be better conditionalized */
7068                         if (!is_mcs_rate(rspec[0])
7069                             && (tx_info->control.rates[0].
7070                                 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
7071                                 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
7072                 }
7073         } else {
7074                 for (k = 0; k < hw->max_rates; k++) {
7075                         /* Set ctrlchbw as 20Mhz */
7076                         rspec[k] &= ~RSPEC_BW_MASK;
7077                         rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
7078
7079                         /* for nphy, stf of ofdm frames must follow policies */
7080                         if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
7081                                 rspec[k] &= ~RSPEC_STF_MASK;
7082                                 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
7083                         }
7084                 }
7085         }
7086
7087         /* Reset these for use with AMPDU's */
7088         txrate[0]->count = 0;
7089         txrate[1]->count = 0;
7090
7091         /* (2) PROTECTION, may change rspec */
7092         if ((ieee80211_is_data(h->frame_control) ||
7093             ieee80211_is_mgmt(h->frame_control)) &&
7094             (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
7095                 use_rts = true;
7096
7097         /* (3) PLCP: determine PLCP header and MAC duration,
7098          * fill struct d11txh */
7099         brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
7100         brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
7101         memcpy(&txh->FragPLCPFallback,
7102                plcp_fallback, sizeof(txh->FragPLCPFallback));
7103
7104         /* Length field now put in CCK FBR CRC field */
7105         if (is_cck_rate(rspec[1])) {
7106                 txh->FragPLCPFallback[4] = phylen & 0xff;
7107                 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
7108         }
7109
7110         /* MIMO-RATE: need validation ?? */
7111         mainrates = is_ofdm_rate(rspec[0]) ?
7112                         D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
7113                         plcp[0];
7114
7115         /* DUR field for main rate */
7116         if (!ieee80211_is_pspoll(h->frame_control) &&
7117             !is_multicast_ether_addr(h->addr1) && !use_rifs) {
7118                 durid =
7119                     brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
7120                                           next_frag_len);
7121                 h->duration_id = cpu_to_le16(durid);
7122         } else if (use_rifs) {
7123                 /* NAV protect to end of next max packet size */
7124                 durid =
7125                     (u16) brcms_c_calc_frame_time(wlc, rspec[0],
7126                                                  preamble_type[0],
7127                                                  DOT11_MAX_FRAG_LEN);
7128                 durid += RIFS_11N_TIME;
7129                 h->duration_id = cpu_to_le16(durid);
7130         }
7131
7132         /* DUR field for fallback rate */
7133         if (ieee80211_is_pspoll(h->frame_control))
7134                 txh->FragDurFallback = h->duration_id;
7135         else if (is_multicast_ether_addr(h->addr1) || use_rifs)
7136                 txh->FragDurFallback = 0;
7137         else {
7138                 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
7139                                               preamble_type[1], next_frag_len);
7140                 txh->FragDurFallback = cpu_to_le16(durid);
7141         }
7142
7143         /* (4) MAC-HDR: MacTxControlLow */
7144         if (frag == 0)
7145                 mcl |= TXC_STARTMSDU;
7146
7147         if (!is_multicast_ether_addr(h->addr1))
7148                 mcl |= TXC_IMMEDACK;
7149
7150         if (wlc->band->bandtype == BRCM_BAND_5G)
7151                 mcl |= TXC_FREQBAND_5G;
7152
7153         if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
7154                 mcl |= TXC_BW_40;
7155
7156         /* set AMIC bit if using hardware TKIP MIC */
7157         if (hwtkmic)
7158                 mcl |= TXC_AMIC;
7159
7160         txh->MacTxControlLow = cpu_to_le16(mcl);
7161
7162         /* MacTxControlHigh */
7163         mch = 0;
7164
7165         /* Set fallback rate preamble type */
7166         if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
7167             (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
7168                 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
7169                         mch |= TXC_PREAMBLE_DATA_FB_SHORT;
7170         }
7171
7172         /* MacFrameControl */
7173         memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
7174         txh->TxFesTimeNormal = cpu_to_le16(0);
7175
7176         txh->TxFesTimeFallback = cpu_to_le16(0);
7177
7178         /* TxFrameRA */
7179         memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
7180
7181         /* TxFrameID */
7182         txh->TxFrameID = cpu_to_le16(frameid);
7183
7184         /*
7185          * TxStatus, Note the case of recreating the first frag of a suppressed
7186          * frame then we may need to reset the retry cnt's via the status reg
7187          */
7188         txh->TxStatus = cpu_to_le16(status);
7189
7190         /*
7191          * extra fields for ucode AMPDU aggregation, the new fields are added to
7192          * the END of previous structure so that it's compatible in driver.
7193          */
7194         txh->MaxNMpdus = cpu_to_le16(0);
7195         txh->MaxABytes_MRT = cpu_to_le16(0);
7196         txh->MaxABytes_FBR = cpu_to_le16(0);
7197         txh->MinMBytes = cpu_to_le16(0);
7198
7199         /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
7200          * furnish struct d11txh */
7201         /* RTS PLCP header and RTS frame */
7202         if (use_rts || use_cts) {
7203                 if (use_rts && use_cts)
7204                         use_cts = false;
7205
7206                 for (k = 0; k < 2; k++) {
7207                         rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
7208                                                               false,
7209                                                               mimo_ctlchbw);
7210                 }
7211
7212                 if (!is_ofdm_rate(rts_rspec[0]) &&
7213                     !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
7214                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7215                         rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
7216                         mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
7217                 }
7218
7219                 if (!is_ofdm_rate(rts_rspec[1]) &&
7220                     !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
7221                       (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7222                         rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7223                         mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7224                 }
7225
7226                 /* RTS/CTS additions to MacTxControlLow */
7227                 if (use_cts) {
7228                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7229                 } else {
7230                         txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7231                         txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7232                 }
7233
7234                 /* RTS PLCP header */
7235                 rts_plcp = txh->RTSPhyHeader;
7236                 if (use_cts)
7237                         rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7238                 else
7239                         rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7240
7241                 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7242
7243                 /* fallback rate version of RTS PLCP header */
7244                 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7245                                  rts_plcp_fallback);
7246                 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7247                        sizeof(txh->RTSPLCPFallback));
7248
7249                 /* RTS frame fields... */
7250                 rts = (struct ieee80211_rts *)&txh->rts_frame;
7251
7252                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7253                                                rspec[0], rts_preamble_type[0],
7254                                                preamble_type[0], phylen, false);
7255                 rts->duration = cpu_to_le16(durid);
7256                 /* fallback rate version of RTS DUR field */
7257                 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7258                                                rts_rspec[1], rspec[1],
7259                                                rts_preamble_type[1],
7260                                                preamble_type[1], phylen, false);
7261                 txh->RTSDurFallback = cpu_to_le16(durid);
7262
7263                 if (use_cts) {
7264                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7265                                                          IEEE80211_STYPE_CTS);
7266
7267                         memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7268                 } else {
7269                         rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7270                                                          IEEE80211_STYPE_RTS);
7271
7272                         memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7273                 }
7274
7275                 /* mainrate
7276                  *    low 8 bits: main frag rate/mcs,
7277                  *    high 8 bits: rts/cts rate/mcs
7278                  */
7279                 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7280                                 D11A_PHY_HDR_GRATE(
7281                                         (struct ofdm_phy_hdr *) rts_plcp) :
7282                                 rts_plcp[0]) << 8;
7283         } else {
7284                 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7285                 memset((char *)&txh->rts_frame, 0,
7286                         sizeof(struct ieee80211_rts));
7287                 memset((char *)txh->RTSPLCPFallback, 0,
7288                       sizeof(txh->RTSPLCPFallback));
7289                 txh->RTSDurFallback = 0;
7290         }
7291
7292 #ifdef SUPPORT_40MHZ
7293         /* add null delimiter count */
7294         if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7295                 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7296                    brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7297
7298 #endif
7299
7300         /*
7301          * Now that RTS/RTS FB preamble types are updated, write
7302          * the final value
7303          */
7304         txh->MacTxControlHigh = cpu_to_le16(mch);
7305
7306         /*
7307          * MainRates (both the rts and frag plcp rates have
7308          * been calculated now)
7309          */
7310         txh->MainRates = cpu_to_le16(mainrates);
7311
7312         /* XtraFrameTypes */
7313         xfts = frametype(rspec[1], wlc->mimoft);
7314         xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7315         xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7316         xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7317                                                              XFTS_CHANNEL_SHIFT;
7318         txh->XtraFrameTypes = cpu_to_le16(xfts);
7319
7320         /* PhyTxControlWord */
7321         phyctl = frametype(rspec[0], wlc->mimoft);
7322         if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7323             (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7324                 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7325                         phyctl |= PHY_TXC_SHORT_HDR;
7326         }
7327
7328         /* phytxant is properly bit shifted */
7329         phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7330         txh->PhyTxControlWord = cpu_to_le16(phyctl);
7331
7332         /* PhyTxControlWord_1 */
7333         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7334                 u16 phyctl1 = 0;
7335
7336                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7337                 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7338                 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7339                 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7340
7341                 if (use_rts || use_cts) {
7342                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7343                         txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7344                         phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7345                         txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7346                 }
7347
7348                 /*
7349                  * For mcs frames, if mixedmode(overloaded with long preamble)
7350                  * is going to be set, fill in non-zero MModeLen and/or
7351                  * MModeFbrLen it will be unnecessary if they are separated
7352                  */
7353                 if (is_mcs_rate(rspec[0]) &&
7354                     (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7355                         u16 mmodelen =
7356                             brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7357                         txh->MModeLen = cpu_to_le16(mmodelen);
7358                 }
7359
7360                 if (is_mcs_rate(rspec[1]) &&
7361                     (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7362                         u16 mmodefbrlen =
7363                             brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7364                         txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7365                 }
7366         }
7367
7368         ac = skb_get_queue_mapping(p);
7369         if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7370                 uint frag_dur, dur, dur_fallback;
7371
7372                 /* WME: Update TXOP threshold */
7373                 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7374                         frag_dur =
7375                             brcms_c_calc_frame_time(wlc, rspec[0],
7376                                         preamble_type[0], phylen);
7377
7378                         if (rts) {
7379                                 /* 1 RTS or CTS-to-self frame */
7380                                 dur =
7381                                     brcms_c_calc_cts_time(wlc, rts_rspec[0],
7382                                                       rts_preamble_type[0]);
7383                                 dur_fallback =
7384                                     brcms_c_calc_cts_time(wlc, rts_rspec[1],
7385                                                       rts_preamble_type[1]);
7386                                 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7387                                 dur += le16_to_cpu(rts->duration);
7388                                 dur_fallback +=
7389                                         le16_to_cpu(txh->RTSDurFallback);
7390                         } else if (use_rifs) {
7391                                 dur = frag_dur;
7392                                 dur_fallback = 0;
7393                         } else {
7394                                 /* frame + SIFS + ACK */
7395                                 dur = frag_dur;
7396                                 dur +=
7397                                     brcms_c_compute_frame_dur(wlc, rspec[0],
7398                                                           preamble_type[0], 0);
7399
7400                                 dur_fallback =
7401                                     brcms_c_calc_frame_time(wlc, rspec[1],
7402                                                         preamble_type[1],
7403                                                         phylen);
7404                                 dur_fallback +=
7405                                     brcms_c_compute_frame_dur(wlc, rspec[1],
7406                                                           preamble_type[1], 0);
7407                         }
7408                         /* NEED to set TxFesTimeNormal (hard) */
7409                         txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7410                         /*
7411                          * NEED to set fallback rate version of
7412                          * TxFesTimeNormal (hard)
7413                          */
7414                         txh->TxFesTimeFallback =
7415                                 cpu_to_le16((u16) dur_fallback);
7416
7417                         /*
7418                          * update txop byte threshold (txop minus intraframe
7419                          * overhead)
7420                          */
7421                         if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7422                                 uint newfragthresh;
7423
7424                                 newfragthresh =
7425                                     brcms_c_calc_frame_len(wlc,
7426                                         rspec[0], preamble_type[0],
7427                                         (wlc->edcf_txop[ac] -
7428                                                 (dur - frag_dur)));
7429                                 /* range bound the fragthreshold */
7430                                 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7431                                         newfragthresh =
7432                                             DOT11_MIN_FRAG_LEN;
7433                                 else if (newfragthresh >
7434                                          wlc->usr_fragthresh)
7435                                         newfragthresh =
7436                                             wlc->usr_fragthresh;
7437                                 /* update the fragthresh and do txc update */
7438                                 if (wlc->fragthresh[queue] !=
7439                                     (u16) newfragthresh)
7440                                         wlc->fragthresh[queue] =
7441                                             (u16) newfragthresh;
7442                         } else {
7443                                 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7444                                           "for rate %d\n",
7445                                           wlc->pub->unit, fifo_names[queue],
7446                                           rspec2rate(rspec[0]));
7447                         }
7448
7449                         if (dur > wlc->edcf_txop[ac])
7450                                 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7451                                           "exceeded phylen %d/%d dur %d/%d\n",
7452                                           wlc->pub->unit, __func__,
7453                                           fifo_names[queue],
7454                                           phylen, wlc->fragthresh[queue],
7455                                           dur, wlc->edcf_txop[ac]);
7456                 }
7457         }
7458
7459         return 0;
7460 }
7461
7462 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7463                               struct ieee80211_hw *hw)
7464 {
7465         u8 prio;
7466         uint fifo;
7467         struct scb *scb = &wlc->pri_scb;
7468         struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7469
7470         /*
7471          * 802.11 standard requires management traffic
7472          * to go at highest priority
7473          */
7474         prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7475                 MAXPRIO;
7476         fifo = prio2fifo[prio];
7477         if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7478                 return;
7479         brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7480         brcms_c_send_q(wlc);
7481 }
7482
7483 void brcms_c_send_q(struct brcms_c_info *wlc)
7484 {
7485         struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7486         int prec;
7487         u16 prec_map;
7488         int err = 0, i, count;
7489         uint fifo;
7490         struct brcms_txq_info *qi = wlc->pkt_queue;
7491         struct pktq *q = &qi->q;
7492         struct ieee80211_tx_info *tx_info;
7493
7494         prec_map = wlc->tx_prec_map;
7495
7496         /* Send all the enq'd pkts that we can.
7497          * Dequeue packets with precedence with empty HW fifo only
7498          */
7499         while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7500                 tx_info = IEEE80211_SKB_CB(pkt[0]);
7501                 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7502                         err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7503                 } else {
7504                         count = 1;
7505                         err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7506                         if (!err) {
7507                                 for (i = 0; i < count; i++)
7508                                         brcms_c_txfifo(wlc, fifo, pkt[i], true,
7509                                                        1);
7510                         }
7511                 }
7512
7513                 if (err == -EBUSY) {
7514                         brcmu_pktq_penq_head(q, prec, pkt[0]);
7515                         /*
7516                          * If send failed due to any other reason than a
7517                          * change in HW FIFO condition, quit. Otherwise,
7518                          * read the new prec_map!
7519                          */
7520                         if (prec_map == wlc->tx_prec_map)
7521                                 break;
7522                         prec_map = wlc->tx_prec_map;
7523                 }
7524         }
7525 }
7526
7527 void
7528 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7529                bool commit, s8 txpktpend)
7530 {
7531         u16 frameid = INVALIDFID;
7532         struct d11txh *txh;
7533
7534         txh = (struct d11txh *) (p->data);
7535
7536         /* When a BC/MC frame is being committed to the BCMC fifo
7537          * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7538          */
7539         if (fifo == TX_BCMC_FIFO)
7540                 frameid = le16_to_cpu(txh->TxFrameID);
7541
7542         /*
7543          * Bump up pending count for if not using rpc. If rpc is
7544          * used, this will be handled in brcms_b_txfifo()
7545          */
7546         if (commit) {
7547                 wlc->core->txpktpend[fifo] += txpktpend;
7548                 BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n",
7549                          txpktpend, wlc->core->txpktpend[fifo]);
7550         }
7551
7552         /* Commit BCMC sequence number in the SHM frame ID location */
7553         if (frameid != INVALIDFID) {
7554                 /*
7555                  * To inform the ucode of the last mcast frame posted
7556                  * so that it can clear moredata bit
7557                  */
7558                 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7559         }
7560
7561         if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7562                 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7563 }
7564
7565 /*
7566  * Compute PLCP, but only requires actual rate and length of pkt.
7567  * Rate is given in the driver standard multiple of 500 kbps.
7568  * le is set for 11 Mbps rate if necessary.
7569  * Broken out for PRQ.
7570  */
7571
7572 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
7573                              uint length, u8 *plcp)
7574 {
7575         u16 usec = 0;
7576         u8 le = 0;
7577
7578         switch (rate_500) {
7579         case BRCM_RATE_1M:
7580                 usec = length << 3;
7581                 break;
7582         case BRCM_RATE_2M:
7583                 usec = length << 2;
7584                 break;
7585         case BRCM_RATE_5M5:
7586                 usec = (length << 4) / 11;
7587                 if ((length << 4) - (usec * 11) > 0)
7588                         usec++;
7589                 break;
7590         case BRCM_RATE_11M:
7591                 usec = (length << 3) / 11;
7592                 if ((length << 3) - (usec * 11) > 0) {
7593                         usec++;
7594                         if ((usec * 11) - (length << 3) >= 8)
7595                                 le = D11B_PLCP_SIGNAL_LE;
7596                 }
7597                 break;
7598
7599         default:
7600                 wiphy_err(wlc->wiphy,
7601                           "brcms_c_cck_plcp_set: unsupported rate %d\n",
7602                           rate_500);
7603                 rate_500 = BRCM_RATE_1M;
7604                 usec = length << 3;
7605                 break;
7606         }
7607         /* PLCP signal byte */
7608         plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
7609         /* PLCP service byte */
7610         plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
7611         /* PLCP length u16, little endian */
7612         plcp[2] = usec & 0xff;
7613         plcp[3] = (usec >> 8) & 0xff;
7614         /* PLCP CRC16 */
7615         plcp[4] = 0;
7616         plcp[5] = 0;
7617 }
7618
7619 /* Rate: 802.11 rate code, length: PSDU length in octets */
7620 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
7621 {
7622         u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
7623         plcp[0] = mcs;
7624         if (rspec_is40mhz(rspec) || (mcs == 32))
7625                 plcp[0] |= MIMO_PLCP_40MHZ;
7626         BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
7627         plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
7628         plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
7629         plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
7630         plcp[5] = 0;
7631 }
7632
7633 /* Rate: 802.11 rate code, length: PSDU length in octets */
7634 static void
7635 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
7636 {
7637         u8 rate_signal;
7638         u32 tmp = 0;
7639         int rate = rspec2rate(rspec);
7640
7641         /*
7642          * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
7643          * transmitted first
7644          */
7645         rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
7646         memset(plcp, 0, D11_PHY_HDR_LEN);
7647         D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
7648
7649         tmp = (length & 0xfff) << 5;
7650         plcp[2] |= (tmp >> 16) & 0xff;
7651         plcp[1] |= (tmp >> 8) & 0xff;
7652         plcp[0] |= tmp & 0xff;
7653 }
7654
7655 /* Rate: 802.11 rate code, length: PSDU length in octets */
7656 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
7657                                  uint length, u8 *plcp)
7658 {
7659         int rate = rspec2rate(rspec);
7660
7661         brcms_c_cck_plcp_set(wlc, rate, length, plcp);
7662 }
7663
7664 void
7665 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
7666                      uint length, u8 *plcp)
7667 {
7668         if (is_mcs_rate(rspec))
7669                 brcms_c_compute_mimo_plcp(rspec, length, plcp);
7670         else if (is_ofdm_rate(rspec))
7671                 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
7672         else
7673                 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
7674 }
7675
7676 /* brcms_c_compute_rtscts_dur()
7677  *
7678  * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
7679  * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
7680  * DUR for CTS-TO-SELF w/ frame    = 2 SIFS         + next frame time + 1 ACK
7681  *
7682  * cts                  cts-to-self or rts/cts
7683  * rts_rate             rts or cts rate in unit of 500kbps
7684  * rate                 next MPDU rate in unit of 500kbps
7685  * frame_len            next MPDU frame length in bytes
7686  */
7687 u16
7688 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
7689                            u32 rts_rate,
7690                            u32 frame_rate, u8 rts_preamble_type,
7691                            u8 frame_preamble_type, uint frame_len, bool ba)
7692 {
7693         u16 dur, sifs;
7694
7695         sifs = get_sifs(wlc->band);
7696
7697         if (!cts_only) {
7698                 /* RTS/CTS */
7699                 dur = 3 * sifs;
7700                 dur +=
7701                     (u16) brcms_c_calc_cts_time(wlc, rts_rate,
7702                                                rts_preamble_type);
7703         } else {
7704                 /* CTS-TO-SELF */
7705                 dur = 2 * sifs;
7706         }
7707
7708         dur +=
7709             (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
7710                                          frame_len);
7711         if (ba)
7712                 dur +=
7713                     (u16) brcms_c_calc_ba_time(wlc, frame_rate,
7714                                               BRCMS_SHORT_PREAMBLE);
7715         else
7716                 dur +=
7717                     (u16) brcms_c_calc_ack_time(wlc, frame_rate,
7718                                                frame_preamble_type);
7719         return dur;
7720 }
7721
7722 u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
7723 {
7724         u16 phyctl1 = 0;
7725         u16 bw;
7726
7727         if (BRCMS_ISLCNPHY(wlc->band)) {
7728                 bw = PHY_TXC1_BW_20MHZ;
7729         } else {
7730                 bw = rspec_get_bw(rspec);
7731                 /* 10Mhz is not supported yet */
7732                 if (bw < PHY_TXC1_BW_20MHZ) {
7733                         wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
7734                                   "not supported yet, set to 20L\n", bw);
7735                         bw = PHY_TXC1_BW_20MHZ;
7736                 }
7737         }
7738
7739         if (is_mcs_rate(rspec)) {
7740                 uint mcs = rspec & RSPEC_RATE_MASK;
7741
7742                 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
7743                 phyctl1 = rspec_phytxbyte2(rspec);
7744                 /* set the upper byte of phyctl1 */
7745                 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
7746         } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
7747                    && !BRCMS_ISSSLPNPHY(wlc->band)) {
7748                 /*
7749                  * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
7750                  * Data Rate. Eventually MIMOPHY would also be converted to
7751                  * this format
7752                  */
7753                 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
7754                 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
7755         } else {                /* legacy OFDM/CCK */
7756                 s16 phycfg;
7757                 /* get the phyctl byte from rate phycfg table */
7758                 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
7759                 if (phycfg == -1) {
7760                         wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
7761                                   "legacy OFDM/CCK rate\n");
7762                         phycfg = 0;
7763                 }
7764                 /* set the upper byte of phyctl1 */
7765                 phyctl1 =
7766                     (bw | (phycfg << 8) |
7767                      (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
7768         }
7769         return phyctl1;
7770 }
7771
7772 u32
7773 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7774                            bool use_rspec, u16 mimo_ctlchbw)
7775 {
7776         u32 rts_rspec = 0;
7777
7778         if (use_rspec)
7779                 /* use frame rate as rts rate */
7780                 rts_rspec = rspec;
7781         else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7782                 /* Use 11Mbps as the g protection RTS target rate and fallback.
7783                  * Use the brcms_basic_rate() lookup to find the best basic rate
7784                  * under the target in case 11 Mbps is not Basic.
7785                  * 6 and 9 Mbps are not usually selected by rate selection, but
7786                  * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7787                  * is more robust.
7788                  */
7789                 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7790         else
7791                 /* calculate RTS rate and fallback rate based on the frame rate
7792                  * RTS must be sent at a basic rate since it is a
7793                  * control frame, sec 9.6 of 802.11 spec
7794                  */
7795                 rts_rspec = brcms_basic_rate(wlc, rspec);
7796
7797         if (BRCMS_PHY_11N_CAP(wlc->band)) {
7798                 /* set rts txbw to correct side band */
7799                 rts_rspec &= ~RSPEC_BW_MASK;
7800
7801                 /*
7802                  * if rspec/rspec_fallback is 40MHz, then send RTS on both
7803                  * 20MHz channel (DUP), otherwise send RTS on control channel
7804                  */
7805                 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7806                         rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7807                 else
7808                         rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7809
7810                 /* pick siso/cdd as default for ofdm */
7811                 if (is_ofdm_rate(rts_rspec)) {
7812                         rts_rspec &= ~RSPEC_STF_MASK;
7813                         rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7814                 }
7815         }
7816         return rts_rspec;
7817 }
7818
7819 void brcms_c_tbtt(struct brcms_c_info *wlc)
7820 {
7821         if (!wlc->bsscfg->BSS)
7822                 /*
7823                  * DirFrmQ is now valid...defer setting until end
7824                  * of ATIM window
7825                  */
7826                 wlc->qvalid |= MCMD_DIRFRMQVAL;
7827 }
7828
7829 void
7830 brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend)
7831 {
7832         wlc->core->txpktpend[fifo] -= txpktpend;
7833         BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend,
7834                wlc->core->txpktpend[fifo]);
7835
7836         /* There is more room; mark precedences related to this FIFO sendable */
7837         wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
7838
7839         /* figure out which bsscfg is being worked on... */
7840 }
7841
7842 /* Update beacon listen interval in shared memory */
7843 void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7844 {
7845         /* wake up every DTIM is the default */
7846         if (wlc->bcn_li_dtim == 1)
7847                 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7848         else
7849                 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7850                               (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7851 }
7852
7853 static void
7854 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7855                   u32 *tsf_h_ptr)
7856 {
7857         struct d11regs __iomem *regs = wlc_hw->regs;
7858
7859         /* read the tsf timer low, then high to get an atomic read */
7860         *tsf_l_ptr = R_REG(&regs->tsf_timerlow);
7861         *tsf_h_ptr = R_REG(&regs->tsf_timerhigh);
7862 }
7863
7864 /*
7865  * recover 64bit TSF value from the 16bit TSF value in the rx header
7866  * given the assumption that the TSF passed in header is within 65ms
7867  * of the current tsf.
7868  *
7869  * 6       5       4       4       3       2       1
7870  * 3.......6.......8.......0.......2.......4.......6.......8......0
7871  * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7872  *
7873  * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7874  * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7875  * receive call sequence after rx interrupt. Only the higher 16 bits
7876  * are used. Finally, the tsf_h is read from the tsf register.
7877  */
7878 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7879                                  struct d11rxhdr *rxh)
7880 {
7881         u32 tsf_h, tsf_l;
7882         u16 rx_tsf_0_15, rx_tsf_16_31;
7883
7884         brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7885
7886         rx_tsf_16_31 = (u16)(tsf_l >> 16);
7887         rx_tsf_0_15 = rxh->RxTSFTime;
7888
7889         /*
7890          * a greater tsf time indicates the low 16 bits of
7891          * tsf_l wrapped, so decrement the high 16 bits.
7892          */
7893         if ((u16)tsf_l < rx_tsf_0_15) {
7894                 rx_tsf_16_31 -= 1;
7895                 if (rx_tsf_16_31 == 0xffff)
7896                         tsf_h -= 1;
7897         }
7898
7899         return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7900 }
7901
7902 static void
7903 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7904                      struct sk_buff *p,
7905                      struct ieee80211_rx_status *rx_status)
7906 {
7907         int preamble;
7908         int channel;
7909         u32 rspec;
7910         unsigned char *plcp;
7911
7912         /* fill in TSF and flag its presence */
7913         rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7914         rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7915
7916         channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
7917
7918         if (channel > 14) {
7919                 rx_status->band = IEEE80211_BAND_5GHZ;
7920                 rx_status->freq = ieee80211_ofdm_chan_to_freq(
7921                                         WF_CHAN_FACTOR_5_G/2, channel);
7922
7923         } else {
7924                 rx_status->band = IEEE80211_BAND_2GHZ;
7925                 rx_status->freq = ieee80211_dsss_chan_to_freq(channel);
7926         }
7927
7928         rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
7929
7930         /* noise */
7931         /* qual */
7932         rx_status->antenna =
7933                 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
7934
7935         plcp = p->data;
7936
7937         rspec = brcms_c_compute_rspec(rxh, plcp);
7938         if (is_mcs_rate(rspec)) {
7939                 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
7940                 rx_status->flag |= RX_FLAG_HT;
7941                 if (rspec_is40mhz(rspec))
7942                         rx_status->flag |= RX_FLAG_40MHZ;
7943         } else {
7944                 switch (rspec2rate(rspec)) {
7945                 case BRCM_RATE_1M:
7946                         rx_status->rate_idx = 0;
7947                         break;
7948                 case BRCM_RATE_2M:
7949                         rx_status->rate_idx = 1;
7950                         break;
7951                 case BRCM_RATE_5M5:
7952                         rx_status->rate_idx = 2;
7953                         break;
7954                 case BRCM_RATE_11M:
7955                         rx_status->rate_idx = 3;
7956                         break;
7957                 case BRCM_RATE_6M:
7958                         rx_status->rate_idx = 4;
7959                         break;
7960                 case BRCM_RATE_9M:
7961                         rx_status->rate_idx = 5;
7962                         break;
7963                 case BRCM_RATE_12M:
7964                         rx_status->rate_idx = 6;
7965                         break;
7966                 case BRCM_RATE_18M:
7967                         rx_status->rate_idx = 7;
7968                         break;
7969                 case BRCM_RATE_24M:
7970                         rx_status->rate_idx = 8;
7971                         break;
7972                 case BRCM_RATE_36M:
7973                         rx_status->rate_idx = 9;
7974                         break;
7975                 case BRCM_RATE_48M:
7976                         rx_status->rate_idx = 10;
7977                         break;
7978                 case BRCM_RATE_54M:
7979                         rx_status->rate_idx = 11;
7980                         break;
7981                 default:
7982                         wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
7983                 }
7984
7985                 /*
7986                  * For 5GHz, we should decrease the index as it is
7987                  * a subset of the 2.4G rates. See bitrates field
7988                  * of brcms_band_5GHz_nphy (in mac80211_if.c).
7989                  */
7990                 if (rx_status->band == IEEE80211_BAND_5GHZ)
7991                         rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
7992
7993                 /* Determine short preamble and rate_idx */
7994                 preamble = 0;
7995                 if (is_cck_rate(rspec)) {
7996                         if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
7997                                 rx_status->flag |= RX_FLAG_SHORTPRE;
7998                 } else if (is_ofdm_rate(rspec)) {
7999                         rx_status->flag |= RX_FLAG_SHORTPRE;
8000                 } else {
8001                         wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
8002                                   __func__);
8003                 }
8004         }
8005
8006         if (plcp3_issgi(plcp[3]))
8007                 rx_status->flag |= RX_FLAG_SHORT_GI;
8008
8009         if (rxh->RxStatus1 & RXS_DECERR) {
8010                 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
8011                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_PLCP_CRC\n",
8012                           __func__);
8013         }
8014         if (rxh->RxStatus1 & RXS_FCSERR) {
8015                 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
8016                 wiphy_err(wlc->wiphy, "%s:  RX_FLAG_FAILED_FCS_CRC\n",
8017                           __func__);
8018         }
8019 }
8020
8021 static void
8022 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
8023                 struct sk_buff *p)
8024 {
8025         int len_mpdu;
8026         struct ieee80211_rx_status rx_status;
8027
8028         memset(&rx_status, 0, sizeof(rx_status));
8029         prep_mac80211_status(wlc, rxh, p, &rx_status);
8030
8031         /* mac header+body length, exclude CRC and plcp header */
8032         len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
8033         skb_pull(p, D11_PHY_HDR_LEN);
8034         __skb_trim(p, len_mpdu);
8035
8036         memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
8037         ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
8038 }
8039
8040 /* Process received frames */
8041 /*
8042  * Return true if more frames need to be processed. false otherwise.
8043  * Param 'bound' indicates max. # frames to process before break out.
8044  */
8045 void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
8046 {
8047         struct d11rxhdr *rxh;
8048         struct ieee80211_hdr *h;
8049         uint len;
8050         bool is_amsdu;
8051
8052         BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8053
8054         /* frame starts with rxhdr */
8055         rxh = (struct d11rxhdr *) (p->data);
8056
8057         /* strip off rxhdr */
8058         skb_pull(p, BRCMS_HWRXOFF);
8059
8060         /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8061         if (rxh->RxStatus1 & RXS_PBPRES) {
8062                 if (p->len < 2) {
8063                         wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8064                                   "len %d\n", wlc->pub->unit, p->len);
8065                         goto toss;
8066                 }
8067                 skb_pull(p, 2);
8068         }
8069
8070         h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8071         len = p->len;
8072
8073         if (rxh->RxStatus1 & RXS_FCSERR) {
8074                 if (wlc->pub->mac80211_state & MAC80211_PROMISC_BCNS) {
8075                         wiphy_err(wlc->wiphy, "FCSERR while scanning******* -"
8076                                   " tossing\n");
8077                         goto toss;
8078                 } else {
8079                         wiphy_err(wlc->wiphy, "RCSERR!!!\n");
8080                         goto toss;
8081                 }
8082         }
8083
8084         /* check received pkt has at least frame control field */
8085         if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8086                 goto toss;
8087
8088         /* not supporting A-MSDU */
8089         is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8090         if (is_amsdu)
8091                 goto toss;
8092
8093         brcms_c_recvctl(wlc, rxh, p);
8094         return;
8095
8096  toss:
8097         brcmu_pkt_buf_free_skb(p);
8098 }
8099
8100 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
8101  * number of bytes goes in the length field
8102  *
8103  * Formula given by HT PHY Spec v 1.13
8104  *   len = 3(nsyms + nstream + 3) - 3
8105  */
8106 u16
8107 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
8108                       uint mac_len)
8109 {
8110         uint nsyms, len = 0, kNdps;
8111
8112         BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
8113                  wlc->pub->unit, rspec2rate(ratespec), mac_len);
8114
8115         if (is_mcs_rate(ratespec)) {
8116                 uint mcs = ratespec & RSPEC_RATE_MASK;
8117                 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
8118                                   rspec_stc(ratespec);
8119
8120                 /*
8121                  * the payload duration calculation matches that
8122                  * of regular ofdm
8123                  */
8124                 /* 1000Ndbps = kbps * 4 */
8125                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
8126                                    rspec_issgi(ratespec)) * 4;
8127
8128                 if (rspec_stc(ratespec) == 0)
8129                         nsyms =
8130                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8131                                   APHY_TAIL_NBITS) * 1000, kNdps);
8132                 else
8133                         /* STBC needs to have even number of symbols */
8134                         nsyms =
8135                             2 *
8136                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8137                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
8138
8139                 /* (+3) account for HT-SIG(2) and HT-STF(1) */
8140                 nsyms += (tot_streams + 3);
8141                 /*
8142                  * 3 bytes/symbol @ legacy 6Mbps rate
8143                  * (-3) excluding service bits and tail bits
8144                  */
8145                 len = (3 * nsyms) - 3;
8146         }
8147
8148         return (u16) len;
8149 }
8150
8151 /*
8152  * calculate frame duration of a given rate and length, return
8153  * time in usec unit
8154  */
8155 uint
8156 brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
8157                         u8 preamble_type, uint mac_len)
8158 {
8159         uint nsyms, dur = 0, Ndps, kNdps;
8160         uint rate = rspec2rate(ratespec);
8161
8162         if (rate == 0) {
8163                 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
8164                           wlc->pub->unit);
8165                 rate = BRCM_RATE_1M;
8166         }
8167
8168         BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
8169                  wlc->pub->unit, ratespec, preamble_type, mac_len);
8170
8171         if (is_mcs_rate(ratespec)) {
8172                 uint mcs = ratespec & RSPEC_RATE_MASK;
8173                 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
8174
8175                 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
8176                 if (preamble_type == BRCMS_MM_PREAMBLE)
8177                         dur += PREN_MM_EXT;
8178                 /* 1000Ndbps = kbps * 4 */
8179                 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
8180                                    rspec_issgi(ratespec)) * 4;
8181
8182                 if (rspec_stc(ratespec) == 0)
8183                         nsyms =
8184                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8185                                   APHY_TAIL_NBITS) * 1000, kNdps);
8186                 else
8187                         /* STBC needs to have even number of symbols */
8188                         nsyms =
8189                             2 *
8190                             CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8191                                   APHY_TAIL_NBITS) * 1000, 2 * kNdps);
8192
8193                 dur += APHY_SYMBOL_TIME * nsyms;
8194                 if (wlc->band->bandtype == BRCM_BAND_2G)
8195                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
8196         } else if (is_ofdm_rate(rate)) {
8197                 dur = APHY_PREAMBLE_TIME;
8198                 dur += APHY_SIGNAL_TIME;
8199                 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
8200                 Ndps = rate * 2;
8201                 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
8202                 nsyms =
8203                     CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
8204                          Ndps);
8205                 dur += APHY_SYMBOL_TIME * nsyms;
8206                 if (wlc->band->bandtype == BRCM_BAND_2G)
8207                         dur += DOT11_OFDM_SIGNAL_EXTENSION;
8208         } else {
8209                 /*
8210                  * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
8211                  * will divide out
8212                  */
8213                 mac_len = mac_len * 8 * 2;
8214                 /* calc ceiling of bits/rate = microseconds of air time */
8215                 dur = (mac_len + rate - 1) / rate;
8216                 if (preamble_type & BRCMS_SHORT_PREAMBLE)
8217                         dur += BPHY_PLCP_SHORT_TIME;
8218                 else
8219                         dur += BPHY_PLCP_TIME;
8220         }
8221         return dur;
8222 }
8223
8224 /* derive wlc->band->basic_rate[] table from 'rateset' */
8225 void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
8226                               struct brcms_c_rateset *rateset)
8227 {
8228         u8 rate;
8229         u8 mandatory;
8230         u8 cck_basic = 0;
8231         u8 ofdm_basic = 0;
8232         u8 *br = wlc->band->basic_rate;
8233         uint i;
8234
8235         /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
8236         memset(br, 0, BRCM_MAXRATE + 1);
8237
8238         /* For each basic rate in the rates list, make an entry in the
8239          * best basic lookup.
8240          */
8241         for (i = 0; i < rateset->count; i++) {
8242                 /* only make an entry for a basic rate */
8243                 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
8244                         continue;
8245
8246                 /* mask off basic bit */
8247                 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
8248
8249                 if (rate > BRCM_MAXRATE) {
8250                         wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
8251                                   "invalid rate 0x%X in rate set\n",
8252                                   rateset->rates[i]);
8253                         continue;
8254                 }
8255
8256                 br[rate] = rate;
8257         }
8258
8259         /* The rate lookup table now has non-zero entries for each
8260          * basic rate, equal to the basic rate: br[basicN] = basicN
8261          *
8262          * To look up the best basic rate corresponding to any
8263          * particular rate, code can use the basic_rate table
8264          * like this
8265          *
8266          * basic_rate = wlc->band->basic_rate[tx_rate]
8267          *
8268          * Make sure there is a best basic rate entry for
8269          * every rate by walking up the table from low rates
8270          * to high, filling in holes in the lookup table
8271          */
8272
8273         for (i = 0; i < wlc->band->hw_rateset.count; i++) {
8274                 rate = wlc->band->hw_rateset.rates[i];
8275
8276                 if (br[rate] != 0) {
8277                         /* This rate is a basic rate.
8278                          * Keep track of the best basic rate so far by
8279                          * modulation type.
8280                          */
8281                         if (is_ofdm_rate(rate))
8282                                 ofdm_basic = rate;
8283                         else
8284                                 cck_basic = rate;
8285
8286                         continue;
8287                 }
8288
8289                 /* This rate is not a basic rate so figure out the
8290                  * best basic rate less than this rate and fill in
8291                  * the hole in the table
8292                  */
8293
8294                 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
8295
8296                 if (br[rate] != 0)
8297                         continue;
8298
8299                 if (is_ofdm_rate(rate)) {
8300                         /*
8301                          * In 11g and 11a, the OFDM mandatory rates
8302                          * are 6, 12, and 24 Mbps
8303                          */
8304                         if (rate >= BRCM_RATE_24M)
8305                                 mandatory = BRCM_RATE_24M;
8306                         else if (rate >= BRCM_RATE_12M)
8307                                 mandatory = BRCM_RATE_12M;
8308                         else
8309                                 mandatory = BRCM_RATE_6M;
8310                 } else {
8311                         /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
8312                         mandatory = rate;
8313                 }
8314
8315                 br[rate] = mandatory;
8316         }
8317 }
8318
8319 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
8320                                    u8 basic_rate)
8321 {
8322         u8 phy_rate, index;
8323         u8 basic_phy_rate, basic_index;
8324         u16 dir_table, basic_table;
8325         u16 basic_ptr;
8326
8327         /* Shared memory address for the table we are reading */
8328         dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
8329
8330         /* Shared memory address for the table we are writing */
8331         basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
8332
8333         /*
8334          * for a given rate, the LS-nibble of the PLCP SIGNAL field is
8335          * the index into the rate table.
8336          */
8337         phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
8338         basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
8339         index = phy_rate & 0xf;
8340         basic_index = basic_phy_rate & 0xf;
8341
8342         /* Find the SHM pointer to the ACK rate entry by looking in the
8343          * Direct-map Table
8344          */
8345         basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
8346
8347         /* Update the SHM BSS-basic-rate-set mapping table with the pointer
8348          * to the correct basic rate for the given incoming rate
8349          */
8350         brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
8351 }
8352
8353 static const struct brcms_c_rateset *
8354 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
8355 {
8356         const struct brcms_c_rateset *rs_dflt;
8357
8358         if (BRCMS_PHY_11N_CAP(wlc->band)) {
8359                 if (wlc->band->bandtype == BRCM_BAND_5G)
8360                         rs_dflt = &ofdm_mimo_rates;
8361                 else
8362                         rs_dflt = &cck_ofdm_mimo_rates;
8363         } else if (wlc->band->gmode)
8364                 rs_dflt = &cck_ofdm_rates;
8365         else
8366                 rs_dflt = &cck_rates;
8367
8368         return rs_dflt;
8369 }
8370
8371 void brcms_c_set_ratetable(struct brcms_c_info *wlc)
8372 {
8373         const struct brcms_c_rateset *rs_dflt;
8374         struct brcms_c_rateset rs;
8375         u8 rate, basic_rate;
8376         uint i;
8377
8378         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
8379
8380         brcms_c_rateset_copy(rs_dflt, &rs);
8381         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
8382
8383         /* walk the phy rate table and update SHM basic rate lookup table */
8384         for (i = 0; i < rs.count; i++) {
8385                 rate = rs.rates[i] & BRCMS_RATE_MASK;
8386
8387                 /* for a given rate brcms_basic_rate returns the rate at
8388                  * which a response ACK/CTS should be sent.
8389                  */
8390                 basic_rate = brcms_basic_rate(wlc, rate);
8391                 if (basic_rate == 0)
8392                         /* This should only happen if we are using a
8393                          * restricted rateset.
8394                          */
8395                         basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
8396
8397                 brcms_c_write_rate_shm(wlc, rate, basic_rate);
8398         }
8399 }
8400
8401 /*
8402  * Return true if the specified rate is supported by the specified band.
8403  * BRCM_BAND_AUTO indicates the current band.
8404  */
8405 bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
8406                     bool verbose)
8407 {
8408         struct brcms_c_rateset *hw_rateset;
8409         uint i;
8410
8411         if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
8412                 hw_rateset = &wlc->band->hw_rateset;
8413         else if (wlc->pub->_nbands > 1)
8414                 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
8415         else
8416                 /* other band specified and we are a single band device */
8417                 return false;
8418
8419         /* check if this is a mimo rate */
8420         if (is_mcs_rate(rspec)) {
8421                 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
8422                         goto error;
8423
8424                 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
8425         }
8426
8427         for (i = 0; i < hw_rateset->count; i++)
8428                 if (hw_rateset->rates[i] == rspec2rate(rspec))
8429                         return true;
8430  error:
8431         if (verbose)
8432                 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
8433                           "not in hw_rateset\n", wlc->pub->unit, rspec);
8434
8435         return false;
8436 }
8437
8438 void brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
8439 {
8440         const struct brcms_c_rateset *rs_dflt;
8441         struct brcms_c_rateset rs;
8442         u8 rate;
8443         u16 entry_ptr;
8444         u8 plcp[D11_PHY_HDR_LEN];
8445         u16 dur, sifs;
8446         uint i;
8447
8448         sifs = get_sifs(wlc->band);
8449
8450         rs_dflt = brcms_c_rateset_get_hwrs(wlc);
8451
8452         brcms_c_rateset_copy(rs_dflt, &rs);
8453         brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
8454
8455         /*
8456          * walk the phy rate table and update MAC core SHM
8457          * basic rate table entries
8458          */
8459         for (i = 0; i < rs.count; i++) {
8460                 rate = rs.rates[i] & BRCMS_RATE_MASK;
8461
8462                 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
8463
8464                 /* Calculate the Probe Response PLCP for the given rate */
8465                 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
8466
8467                 /*
8468                  * Calculate the duration of the Probe Response
8469                  * frame plus SIFS for the MAC
8470                  */
8471                 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
8472                                                 BRCMS_LONG_PREAMBLE, frame_len);
8473                 dur += sifs;
8474
8475                 /* Update the SHM Rate Table entry Probe Response values */
8476                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
8477                               (u16) (plcp[0] + (plcp[1] << 8)));
8478                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
8479                               (u16) (plcp[2] + (plcp[3] << 8)));
8480                 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
8481         }
8482 }
8483
8484 /*      Max buffering needed for beacon template/prb resp template is 142 bytes.
8485  *
8486  *      PLCP header is 6 bytes.
8487  *      802.11 A3 header is 24 bytes.
8488  *      Max beacon frame body template length is 112 bytes.
8489  *      Max probe resp frame body template length is 110 bytes.
8490  *
8491  *      *len on input contains the max length of the packet available.
8492  *
8493  *      The *len value is set to the number of bytes in buf used, and starts
8494  *      with the PLCP and included up to, but not including, the 4 byte FCS.
8495  */
8496 static void
8497 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
8498                          u32 bcn_rspec,
8499                          struct brcms_bss_cfg *cfg, u16 *buf, int *len)
8500 {
8501         static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
8502         struct cck_phy_hdr *plcp;
8503         struct ieee80211_mgmt *h;
8504         int hdr_len, body_len;
8505
8506         hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
8507
8508         /* calc buffer size provided for frame body */
8509         body_len = *len - hdr_len;
8510         /* return actual size */
8511         *len = hdr_len + body_len;
8512
8513         /* format PHY and MAC headers */
8514         memset((char *)buf, 0, hdr_len);
8515
8516         plcp = (struct cck_phy_hdr *) buf;
8517
8518         /*
8519          * PLCP for Probe Response frames are filled in from
8520          * core's rate table
8521          */
8522         if (type == IEEE80211_STYPE_BEACON)
8523                 /* fill in PLCP */
8524                 brcms_c_compute_plcp(wlc, bcn_rspec,
8525                                  (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
8526                                  (u8 *) plcp);
8527
8528         /* "Regular" and 16 MBSS but not for 4 MBSS */
8529         /* Update the phytxctl for the beacon based on the rspec */
8530         brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
8531
8532         h = (struct ieee80211_mgmt *)&plcp[1];
8533
8534         /* fill in 802.11 header */
8535         h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
8536
8537         /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
8538         /* A1 filled in by MAC for prb resp, broadcast for bcn */
8539         if (type == IEEE80211_STYPE_BEACON)
8540                 memcpy(&h->da, &ether_bcast, ETH_ALEN);
8541         memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
8542         memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
8543
8544         /* SEQ filled in by MAC */
8545 }
8546
8547 int brcms_c_get_header_len(void)
8548 {
8549         return TXOFF;
8550 }
8551
8552 /*
8553  * Update all beacons for the system.
8554  */
8555 void brcms_c_update_beacon(struct brcms_c_info *wlc)
8556 {
8557         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
8558
8559         if (bsscfg->up && !bsscfg->BSS)
8560                 /* Clear the soft intmask */
8561                 wlc->defmacintmask &= ~MI_BCNTPL;
8562 }
8563
8564 /* Write ssid into shared memory */
8565 void brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
8566 {
8567         u8 *ssidptr = cfg->SSID;
8568         u16 base = M_SSID;
8569         u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
8570
8571         /* padding the ssid with zero and copy it into shm */
8572         memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
8573         memcpy(ssidbuf, ssidptr, cfg->SSID_len);
8574
8575         brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
8576         brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
8577 }
8578
8579 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
8580 {
8581         struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
8582
8583         /* update AP or IBSS probe responses */
8584         if (bsscfg->up && !bsscfg->BSS)
8585                 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
8586 }
8587
8588 void
8589 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
8590                               struct brcms_bss_cfg *cfg,
8591                               bool suspend)
8592 {
8593         u16 prb_resp[BCN_TMPL_LEN / 2];
8594         int len = BCN_TMPL_LEN;
8595
8596         /*
8597          * write the probe response to hardware, or save in
8598          * the config structure
8599          */
8600
8601         /* create the probe response template */
8602         brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
8603                                  cfg, prb_resp, &len);
8604
8605         if (suspend)
8606                 brcms_c_suspend_mac_and_wait(wlc);
8607
8608         /* write the probe response into the template region */
8609         brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
8610                                     (len + 3) & ~3, prb_resp);
8611
8612         /* write the length of the probe response frame (+PLCP/-FCS) */
8613         brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
8614
8615         /* write the SSID and SSID length */
8616         brcms_c_shm_ssid_upd(wlc, cfg);
8617
8618         /*
8619          * Write PLCP headers and durations for probe response frames
8620          * at all rates. Use the actual frame length covered by the
8621          * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
8622          * by subtracting the PLCP len and adding the FCS.
8623          */
8624         len += (-D11_PHY_HDR_LEN + FCS_LEN);
8625         brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
8626
8627         if (suspend)
8628                 brcms_c_enable_mac(wlc);
8629 }
8630
8631 /* prepares pdu for transmission. returns BCM error codes */
8632 int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
8633 {
8634         uint fifo;
8635         struct d11txh *txh;
8636         struct ieee80211_hdr *h;
8637         struct scb *scb;
8638
8639         txh = (struct d11txh *) (pdu->data);
8640         h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
8641
8642         /* get the pkt queue info. This was put at brcms_c_sendctl or
8643          * brcms_c_send for PDU */
8644         fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
8645
8646         scb = NULL;
8647
8648         *fifop = fifo;
8649
8650         /* return if insufficient dma resources */
8651         if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
8652                 /* Mark precedences related to this FIFO, unsendable */
8653                 /* A fifo is full. Clear precedences related to that FIFO */
8654                 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
8655                 return -EBUSY;
8656         }
8657         return 0;
8658 }
8659
8660 void brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
8661 {
8662         brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
8663                 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
8664                 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
8665                 brcms_chspec_bw(wlc->default_bss->chanspec),
8666                 wlc->stf->txstreams);
8667 }
8668
8669 /* Copy a buffer to shared memory.
8670  * SHM 'offset' needs to be an even address and
8671  * Buffer length 'len' must be an even number of bytes
8672  */
8673 void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset, const void *buf,
8674                         int len)
8675 {
8676         brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
8677 }
8678
8679 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
8680                            uint *blocks)
8681 {
8682         if (fifo >= NFIFO)
8683                 return -EINVAL;
8684
8685         *blocks = wlc_hw->xmtfifo_sz[fifo];
8686
8687         return 0;
8688 }
8689
8690 void
8691 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
8692                   const u8 *addr)
8693 {
8694         brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
8695         if (match_reg_offset == RCM_BSSID_OFFSET)
8696                 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
8697 }
8698
8699 /* check for the particular priority flow control bit being set */
8700 bool
8701 brcms_c_txflowcontrol_prio_isset(struct brcms_c_info *wlc,
8702                                  struct brcms_txq_info *q,
8703                                  int prio)
8704 {
8705         uint prio_mask;
8706
8707         if (prio == ALLPRIO)
8708                 prio_mask = TXQ_STOP_FOR_PRIOFC_MASK;
8709         else
8710                 prio_mask = NBITVAL(prio);
8711
8712         return (q->stopped & prio_mask) == prio_mask;
8713 }
8714
8715 /* propagate the flow control to all interfaces using the given tx queue */
8716 void brcms_c_txflowcontrol(struct brcms_c_info *wlc,
8717                            struct brcms_txq_info *qi,
8718                            bool on, int prio)
8719 {
8720         uint prio_bits;
8721         uint cur_bits;
8722
8723         BCMMSG(wlc->wiphy, "flow control kicks in\n");
8724
8725         if (prio == ALLPRIO)
8726                 prio_bits = TXQ_STOP_FOR_PRIOFC_MASK;
8727         else
8728                 prio_bits = NBITVAL(prio);
8729
8730         cur_bits = qi->stopped & prio_bits;
8731
8732         /* Check for the case of no change and return early
8733          * Otherwise update the bit and continue
8734          */
8735         if (on) {
8736                 if (cur_bits == prio_bits)
8737                         return;
8738
8739                 mboolset(qi->stopped, prio_bits);
8740         } else {
8741                 if (cur_bits == 0)
8742                         return;
8743
8744                 mboolclr(qi->stopped, prio_bits);
8745         }
8746
8747         /* If there is a flow control override we will not change the external
8748          * flow control state.
8749          */
8750         if (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK)
8751                 return;
8752
8753         brcms_c_txflowcontrol_signal(wlc, qi, on, prio);
8754 }
8755
8756 void
8757 brcms_c_txflowcontrol_override(struct brcms_c_info *wlc,
8758                                struct brcms_txq_info *qi,
8759                                bool on, uint override)
8760 {
8761         uint prev_override;
8762
8763         prev_override = (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK);
8764
8765         /* Update the flow control bits and do an early return if there is
8766          * no change in the external flow control state.
8767          */
8768         if (on) {
8769                 mboolset(qi->stopped, override);
8770                 /* if there was a previous override bit on, then setting this
8771                  * makes no difference.
8772                  */
8773                 if (prev_override)
8774                         return;
8775
8776                 brcms_c_txflowcontrol_signal(wlc, qi, ON, ALLPRIO);
8777         } else {
8778                 mboolclr(qi->stopped, override);
8779                 /* clearing an override bit will only make a difference for
8780                  * flow control if it was the only bit set. For any other
8781                  * override setting, just return
8782                  */
8783                 if (prev_override != override)
8784                         return;
8785
8786                 if (qi->stopped == 0) {
8787                         brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
8788                 } else {
8789                         int prio;
8790
8791                         for (prio = MAXPRIO; prio >= 0; prio--) {
8792                                 if (!mboolisset(qi->stopped, NBITVAL(prio)))
8793                                         brcms_c_txflowcontrol_signal(
8794                                                 wlc, qi, OFF, prio);
8795                         }
8796                 }
8797         }
8798 }
8799
8800 /*
8801  * Flag 'scan in progress' to withhold dynamic phy calibration
8802  */
8803 void brcms_c_scan_start(struct brcms_c_info *wlc)
8804 {
8805         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
8806 }
8807
8808 void brcms_c_scan_stop(struct brcms_c_info *wlc)
8809 {
8810         wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
8811 }
8812
8813 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
8814 {
8815         wlc->pub->associated = state;
8816         wlc->bsscfg->associated = state;
8817 }
8818
8819 /*
8820  * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
8821  * AMPDU traffic, packets pending in hardware have to be invalidated so that
8822  * when later on hardware releases them, they can be handled appropriately.
8823  */
8824 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
8825                                struct ieee80211_sta *sta,
8826                                void (*dma_callback_fn))
8827 {
8828         struct dma_pub *dmah;
8829         int i;
8830         for (i = 0; i < NFIFO; i++) {
8831                 dmah = hw->di[i];
8832                 if (dmah != NULL)
8833                         dma_walk_packets(dmah, dma_callback_fn, sta);
8834         }
8835 }
8836
8837 int brcms_c_get_curband(struct brcms_c_info *wlc)
8838 {
8839         return wlc->band->bandunit;
8840 }
8841
8842 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
8843 {
8844         /* flush packet queue when requested */
8845         if (drop)
8846                 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
8847
8848         /* wait for queue and DMA fifos to run dry */
8849         while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0)
8850                 brcms_msleep(wlc->wl, 1);
8851 }
8852
8853 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
8854 {
8855         wlc->bcn_li_bcn = interval;
8856         if (wlc->pub->up)
8857                 brcms_c_bcn_li_upd(wlc);
8858 }
8859
8860 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
8861 {
8862         uint qdbm;
8863
8864         /* Remove override bit and clip to max qdbm value */
8865         qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
8866         return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
8867 }
8868
8869 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
8870 {
8871         uint qdbm;
8872         bool override;
8873
8874         wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
8875
8876         /* Return qdbm units */
8877         return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
8878 }
8879
8880 void brcms_c_set_radio_mpc(struct brcms_c_info *wlc, bool mpc)
8881 {
8882         wlc->mpc = mpc;
8883         brcms_c_radio_mpc_upd(wlc);
8884 }