1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
15 #include <asm/arch/stm32.h>
16 #include "serial_stm32.h"
17 #include <dm/device_compat.h>
19 static void _stm32_serial_setbrg(fdt_addr_t base,
20 struct stm32_uart_info *uart_info,
24 bool stm32f4 = uart_info->stm32f4;
25 u32 int_div, mantissa, fraction, oversampling;
27 int_div = DIV_ROUND_CLOSEST(clock_rate, baudrate);
31 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
34 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_OVER8);
37 mantissa = (int_div / oversampling) << USART_BRR_M_SHIFT;
38 fraction = int_div % oversampling;
40 writel(mantissa | fraction, base + BRR_OFFSET(stm32f4));
43 static int stm32_serial_setbrg(struct udevice *dev, int baudrate)
45 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
47 _stm32_serial_setbrg(plat->base, plat->uart_info,
48 plat->clock_rate, baudrate);
53 static int stm32_serial_setconfig(struct udevice *dev, uint serial_config)
55 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
56 bool stm32f4 = plat->uart_info->stm32f4;
57 u8 uart_enable_bit = plat->uart_info->uart_enable_bit;
58 u32 cr1 = plat->base + CR1_OFFSET(stm32f4);
60 uint parity = SERIAL_GET_PARITY(serial_config);
61 uint bits = SERIAL_GET_BITS(serial_config);
62 uint stop = SERIAL_GET_STOP(serial_config);
65 * only parity config is implemented, check if other serial settings
66 * are the default one.
67 * (STM32F4 serial IP didn't support parity setting)
69 if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP || stm32f4)
70 return -ENOTSUPP; /* not supported in driver*/
72 clrbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
73 /* update usart configuration (uart need to be disable)
74 * PCE: parity check enable
75 * PS : '0' : Even / '1' : Odd
76 * M[1:0] = '00' : 8 Data bits
77 * M[1:0] = '01' : 9 Data bits with parity
85 config = USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0;
88 config = USART_CR1_PCE | USART_CR1_M0;
93 USART_CR1_PCE | USART_CR1_PS | USART_CR1_M1 |
96 setbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
101 static int stm32_serial_getc(struct udevice *dev)
103 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
104 bool stm32f4 = plat->uart_info->stm32f4;
105 fdt_addr_t base = plat->base;
106 u32 isr = readl(base + ISR_OFFSET(stm32f4));
108 if ((isr & USART_ISR_RXNE) == 0)
111 if (isr & (USART_ISR_PE | USART_ISR_ORE | USART_ISR_FE)) {
113 setbits_le32(base + ICR_OFFSET,
114 USART_ICR_PCECF | USART_ICR_ORECF |
117 readl(base + RDR_OFFSET(stm32f4));
121 return readl(base + RDR_OFFSET(stm32f4));
124 static int _stm32_serial_putc(fdt_addr_t base,
125 struct stm32_uart_info *uart_info,
128 bool stm32f4 = uart_info->stm32f4;
130 if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_TXE) == 0)
133 writel(c, base + TDR_OFFSET(stm32f4));
138 static int stm32_serial_putc(struct udevice *dev, const char c)
140 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
142 return _stm32_serial_putc(plat->base, plat->uart_info, c);
145 static int stm32_serial_pending(struct udevice *dev, bool input)
147 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
148 bool stm32f4 = plat->uart_info->stm32f4;
149 fdt_addr_t base = plat->base;
152 return readl(base + ISR_OFFSET(stm32f4)) &
153 USART_ISR_RXNE ? 1 : 0;
155 return readl(base + ISR_OFFSET(stm32f4)) &
156 USART_ISR_TXE ? 0 : 1;
159 static void _stm32_serial_init(fdt_addr_t base,
160 struct stm32_uart_info *uart_info)
162 bool stm32f4 = uart_info->stm32f4;
163 u8 uart_enable_bit = uart_info->uart_enable_bit;
165 /* Disable uart-> enable fifo -> enable uart */
166 clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
167 BIT(uart_enable_bit));
168 if (uart_info->has_fifo)
169 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN);
170 setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE |
171 BIT(uart_enable_bit));
174 static int stm32_serial_probe(struct udevice *dev)
176 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
178 struct reset_ctl reset;
181 plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev);
183 ret = clk_get_by_index(dev, 0, &clk);
187 ret = clk_enable(&clk);
189 dev_err(dev, "failed to enable clock\n");
193 ret = reset_get_by_index(dev, 0, &reset);
195 reset_assert(&reset);
197 reset_deassert(&reset);
200 plat->clock_rate = clk_get_rate(&clk);
201 if (!plat->clock_rate) {
206 _stm32_serial_init(plat->base, plat->uart_info);
211 static const struct udevice_id stm32_serial_id[] = {
212 { .compatible = "st,stm32-uart", .data = (ulong)&stm32f4_info},
213 { .compatible = "st,stm32f7-uart", .data = (ulong)&stm32f7_info},
214 { .compatible = "st,stm32h7-uart", .data = (ulong)&stm32h7_info},
218 static int stm32_serial_ofdata_to_platdata(struct udevice *dev)
220 struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
222 plat->base = devfdt_get_addr(dev);
223 if (plat->base == FDT_ADDR_T_NONE)
229 static const struct dm_serial_ops stm32_serial_ops = {
230 .putc = stm32_serial_putc,
231 .pending = stm32_serial_pending,
232 .getc = stm32_serial_getc,
233 .setbrg = stm32_serial_setbrg,
234 .setconfig = stm32_serial_setconfig
237 U_BOOT_DRIVER(serial_stm32) = {
238 .name = "serial_stm32",
240 .of_match = of_match_ptr(stm32_serial_id),
241 .ofdata_to_platdata = of_match_ptr(stm32_serial_ofdata_to_platdata),
242 .platdata_auto_alloc_size = sizeof(struct stm32x7_serial_platdata),
243 .ops = &stm32_serial_ops,
244 .probe = stm32_serial_probe,
245 #if !CONFIG_IS_ENABLED(OF_CONTROL)
246 .flags = DM_FLAG_PRE_RELOC,
250 #ifdef CONFIG_DEBUG_UART_STM32
251 #include <debug_uart.h>
252 static inline struct stm32_uart_info *_debug_uart_info(void)
254 struct stm32_uart_info *uart_info;
256 #if defined(CONFIG_STM32F4)
257 uart_info = &stm32f4_info;
258 #elif defined(CONFIG_STM32F7)
259 uart_info = &stm32f7_info;
261 uart_info = &stm32h7_info;
266 static inline void _debug_uart_init(void)
268 fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
269 struct stm32_uart_info *uart_info = _debug_uart_info();
271 _stm32_serial_init(base, uart_info);
272 _stm32_serial_setbrg(base, uart_info,
273 CONFIG_DEBUG_UART_CLOCK,
277 static inline void _debug_uart_putc(int c)
279 fdt_addr_t base = CONFIG_DEBUG_UART_BASE;
280 struct stm32_uart_info *uart_info = _debug_uart_info();
282 while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN)