2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
56 #include <linux/device.h>
57 #include "scic_controller.h"
59 #include "scic_port.h"
60 #include "scic_remote_device.h"
61 #include "scic_sds_controller.h"
62 #include "scic_sds_controller_registers.h"
63 #include "scic_sds_pci.h"
64 #include "scic_sds_phy.h"
65 #include "scic_sds_port_configuration_agent.h"
66 #include "scic_sds_port.h"
67 #include "scic_sds_remote_device.h"
68 #include "scic_sds_request.h"
69 #include "sci_environment.h"
71 #include "scu_completion_codes.h"
72 #include "scu_constants.h"
73 #include "scu_event_codes.h"
74 #include "scu_remote_node_context.h"
75 #include "scu_task_context.h"
76 #include "scu_unsolicited_frame.h"
78 #define SCU_CONTEXT_RAM_INIT_STALL_TIME 200
81 * smu_dcc_get_max_ports() -
83 * This macro returns the maximum number of logical ports supported by the
84 * hardware. The caller passes in the value read from the device context
85 * capacity register and this macro will mash and shift the value appropriately.
87 #define smu_dcc_get_max_ports(dcc_value) \
89 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_MASK) \
90 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_LP_SHIFT) + 1 \
94 * smu_dcc_get_max_task_context() -
96 * This macro returns the maximum number of task contexts supported by the
97 * hardware. The caller passes in the value read from the device context
98 * capacity register and this macro will mash and shift the value appropriately.
100 #define smu_dcc_get_max_task_context(dcc_value) \
102 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_MASK) \
103 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_TC_SHIFT) + 1 \
107 * smu_dcc_get_max_remote_node_context() -
109 * This macro returns the maximum number of remote node contexts supported by
110 * the hardware. The caller passes in the value read from the device context
111 * capacity register and this macro will mash and shift the value appropriately.
113 #define smu_dcc_get_max_remote_node_context(dcc_value) \
115 (((dcc_value) & SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_MASK) \
116 >> SMU_DEVICE_CONTEXT_CAPACITY_MAX_RNC_SHIFT) + 1 \
120 static void scic_sds_controller_power_control_timer_handler(
122 #define SCIC_SDS_CONTROLLER_MIN_TIMER_COUNT 3
123 #define SCIC_SDS_CONTROLLER_MAX_TIMER_COUNT 3
128 * The number of milliseconds to wait for a phy to start.
130 #define SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT 100
135 * The number of milliseconds to wait while a given phy is consuming power
136 * before allowing another set of phys to consume power. Ultimately, this will
137 * be specified by OEM parameter.
139 #define SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL 500
142 * COMPLETION_QUEUE_CYCLE_BIT() -
144 * This macro will return the cycle bit of the completion queue entry
146 #define COMPLETION_QUEUE_CYCLE_BIT(x) ((x) & 0x80000000)
149 * NORMALIZE_GET_POINTER() -
151 * This macro will normalize the completion queue get pointer so its value can
152 * be used as an index into an array
154 #define NORMALIZE_GET_POINTER(x) \
155 ((x) & SMU_COMPLETION_QUEUE_GET_POINTER_MASK)
158 * NORMALIZE_PUT_POINTER() -
160 * This macro will normalize the completion queue put pointer so its value can
161 * be used as an array inde
163 #define NORMALIZE_PUT_POINTER(x) \
164 ((x) & SMU_COMPLETION_QUEUE_PUT_POINTER_MASK)
168 * NORMALIZE_GET_POINTER_CYCLE_BIT() -
170 * This macro will normalize the completion queue cycle pointer so it matches
171 * the completion queue cycle bit
173 #define NORMALIZE_GET_POINTER_CYCLE_BIT(x) \
174 ((SMU_CQGR_CYCLE_BIT & (x)) << (31 - SMU_COMPLETION_QUEUE_GET_CYCLE_BIT_SHIFT))
177 * NORMALIZE_EVENT_POINTER() -
179 * This macro will normalize the completion queue event entry so its value can
180 * be used as an index.
182 #define NORMALIZE_EVENT_POINTER(x) \
184 ((x) & SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_MASK) \
185 >> SMU_COMPLETION_QUEUE_GET_EVENT_POINTER_SHIFT \
189 * INCREMENT_COMPLETION_QUEUE_GET() -
191 * This macro will increment the controllers completion queue index value and
192 * possibly toggle the cycle bit if the completion queue index wraps back to 0.
194 #define INCREMENT_COMPLETION_QUEUE_GET(controller, index, cycle) \
195 INCREMENT_QUEUE_GET(\
198 (controller)->completion_queue_entries, \
203 * INCREMENT_EVENT_QUEUE_GET() -
205 * This macro will increment the controllers event queue index value and
206 * possibly toggle the event cycle bit if the event queue index wraps back to 0.
208 #define INCREMENT_EVENT_QUEUE_GET(controller, index, cycle) \
209 INCREMENT_QUEUE_GET(\
212 (controller)->completion_event_entries, \
213 SMU_CQGR_EVENT_CYCLE_BIT \
216 struct sci_base_memory_descriptor_list *
217 sci_controller_get_memory_descriptor_list_handle(struct scic_sds_controller *scic)
219 return &scic->parent.mdl;
223 * ****************************************************************************-
224 * * SCIC SDS Controller Initialization Methods
225 * ****************************************************************************- */
228 * This timer is used to start another phy after we have given up on the
229 * previous phy to transition to the ready state.
233 static void scic_sds_controller_phy_startup_timeout_handler(
236 enum sci_status status;
237 struct scic_sds_controller *this_controller;
239 this_controller = (struct scic_sds_controller *)controller;
241 this_controller->phy_startup_timer_pending = false;
243 status = SCI_FAILURE;
245 while (status != SCI_SUCCESS) {
246 status = scic_sds_controller_start_next_phy(this_controller);
253 * This method initializes the phy startup operations for controller start.
255 enum sci_status scic_sds_controller_initialize_phy_startup(
256 struct scic_sds_controller *this_controller)
258 this_controller->phy_startup_timer = isci_event_timer_create(
260 scic_sds_controller_phy_startup_timeout_handler,
264 if (this_controller->phy_startup_timer == NULL) {
265 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
267 this_controller->next_phy_to_start = 0;
268 this_controller->phy_startup_timer_pending = false;
277 * This method initializes the power control operations for the controller
280 void scic_sds_controller_initialize_power_control(
281 struct scic_sds_controller *this_controller)
283 this_controller->power_control.timer = isci_event_timer_create(
285 scic_sds_controller_power_control_timer_handler,
290 this_controller->power_control.requesters,
292 sizeof(this_controller->power_control.requesters)
295 this_controller->power_control.phys_waiting = 0;
298 /* --------------------------------------------------------------------------- */
300 #define SCU_REMOTE_NODE_CONTEXT_ALIGNMENT (32)
301 #define SCU_TASK_CONTEXT_ALIGNMENT (256)
302 #define SCU_UNSOLICITED_FRAME_ADDRESS_ALIGNMENT (64)
303 #define SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT (1024)
304 #define SCU_UNSOLICITED_FRAME_HEADER_ALIGNMENT (64)
306 /* --------------------------------------------------------------------------- */
309 * This method builds the memory descriptor table for this controller.
310 * @this_controller: This parameter specifies the controller object for which
311 * to build the memory table.
314 void scic_sds_controller_build_memory_descriptor_table(
315 struct scic_sds_controller *this_controller)
317 sci_base_mde_construct(
318 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
319 SCU_COMPLETION_RAM_ALIGNMENT,
320 (sizeof(u32) * this_controller->completion_queue_entries),
321 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
324 sci_base_mde_construct(
325 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
326 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
327 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
328 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
331 sci_base_mde_construct(
332 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
333 SCU_TASK_CONTEXT_ALIGNMENT,
334 this_controller->task_context_entries * sizeof(struct scu_task_context),
335 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
339 * The UF buffer address table size must be programmed to a power
340 * of 2. Find the first power of 2 that is equal to or greater then
341 * the number of unsolicited frame buffers to be utilized. */
342 scic_sds_unsolicited_frame_control_set_address_table_count(
343 &this_controller->uf_control
346 sci_base_mde_construct(
347 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
348 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
349 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
350 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
355 * This method validates the driver supplied memory descriptor table.
360 enum sci_status scic_sds_controller_validate_memory_descriptor_table(
361 struct scic_sds_controller *this_controller)
365 mde_list_valid = sci_base_mde_is_valid(
366 &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE],
367 SCU_COMPLETION_RAM_ALIGNMENT,
368 (sizeof(u32) * this_controller->completion_queue_entries),
369 (SCI_MDE_ATTRIBUTE_CACHEABLE | SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS)
372 if (mde_list_valid == false)
373 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
375 mde_list_valid = sci_base_mde_is_valid(
376 &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT],
377 SCU_REMOTE_NODE_CONTEXT_ALIGNMENT,
378 this_controller->remote_node_entries * sizeof(union scu_remote_node_context),
379 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
382 if (mde_list_valid == false)
383 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
385 mde_list_valid = sci_base_mde_is_valid(
386 &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT],
387 SCU_TASK_CONTEXT_ALIGNMENT,
388 this_controller->task_context_entries * sizeof(struct scu_task_context),
389 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
392 if (mde_list_valid == false)
393 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
395 mde_list_valid = sci_base_mde_is_valid(
396 &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER],
397 SCU_UNSOLICITED_FRAME_BUFFER_ALIGNMENT,
398 scic_sds_unsolicited_frame_control_get_mde_size(this_controller->uf_control),
399 SCI_MDE_ATTRIBUTE_PHYSICALLY_CONTIGUOUS
402 if (mde_list_valid == false)
403 return SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD;
409 * This method initializes the controller with the physical memory addresses
410 * that are used to communicate with the driver.
414 void scic_sds_controller_ram_initialization(
415 struct scic_sds_controller *this_controller)
417 struct sci_physical_memory_descriptor *mde;
420 * The completion queue is actually placed in cacheable memory
421 * Therefore it no longer comes out of memory in the MDL. */
422 mde = &this_controller->memory_descriptors[SCU_MDE_COMPLETION_QUEUE];
423 this_controller->completion_queue = (u32 *)mde->virtual_address;
424 SMU_CQBAR_WRITE(this_controller, mde->physical_address);
427 * Program the location of the Remote Node Context table
429 mde = &this_controller->memory_descriptors[SCU_MDE_REMOTE_NODE_CONTEXT];
430 this_controller->remote_node_context_table = (union scu_remote_node_context *)
431 mde->virtual_address;
432 SMU_RNCBAR_WRITE(this_controller, mde->physical_address);
434 /* Program the location of the Task Context table into the SCU. */
435 mde = &this_controller->memory_descriptors[SCU_MDE_TASK_CONTEXT];
436 this_controller->task_context_table = (struct scu_task_context *)
437 mde->virtual_address;
438 SMU_HTTBAR_WRITE(this_controller, mde->physical_address);
440 mde = &this_controller->memory_descriptors[SCU_MDE_UF_BUFFER];
441 scic_sds_unsolicited_frame_control_construct(
442 &this_controller->uf_control, mde, this_controller
446 * Inform the silicon as to the location of the UF headers and
450 this_controller->uf_control.headers.physical_address);
453 this_controller->uf_control.address_table.physical_address);
457 * This method initializes the task context data for the controller.
461 void scic_sds_controller_assign_task_entries(
462 struct scic_sds_controller *this_controller)
467 * Assign all the TCs to function 0
468 * TODO: Do we actually need to read this register to write it back? */
469 task_assignment = SMU_TCA_READ(this_controller, 0);
474 | (SMU_TCA_GEN_VAL(STARTING, 0))
475 | (SMU_TCA_GEN_VAL(ENDING, this_controller->task_context_entries - 1))
476 | (SMU_TCA_GEN_BIT(RANGE_CHECK_ENABLE))
479 SMU_TCA_WRITE(this_controller, 0, task_assignment);
483 * This method initializes the hardware completion queue.
487 void scic_sds_controller_initialize_completion_queue(
488 struct scic_sds_controller *this_controller)
491 u32 completion_queue_control_value;
492 u32 completion_queue_get_value;
493 u32 completion_queue_put_value;
495 this_controller->completion_queue_get = 0;
497 completion_queue_control_value = (
498 SMU_CQC_QUEUE_LIMIT_SET(this_controller->completion_queue_entries - 1)
499 | SMU_CQC_EVENT_LIMIT_SET(this_controller->completion_event_entries - 1)
502 SMU_CQC_WRITE(this_controller, completion_queue_control_value);
504 /* Set the completion queue get pointer and enable the queue */
505 completion_queue_get_value = (
506 (SMU_CQGR_GEN_VAL(POINTER, 0))
507 | (SMU_CQGR_GEN_VAL(EVENT_POINTER, 0))
508 | (SMU_CQGR_GEN_BIT(ENABLE))
509 | (SMU_CQGR_GEN_BIT(EVENT_ENABLE))
512 SMU_CQGR_WRITE(this_controller, completion_queue_get_value);
514 /* Set the completion queue put pointer */
515 completion_queue_put_value = (
516 (SMU_CQPR_GEN_VAL(POINTER, 0))
517 | (SMU_CQPR_GEN_VAL(EVENT_POINTER, 0))
520 SMU_CQPR_WRITE(this_controller, completion_queue_put_value);
522 /* Initialize the cycle bit of the completion queue entries */
523 for (index = 0; index < this_controller->completion_queue_entries; index++) {
525 * If get.cycle_bit != completion_queue.cycle_bit
526 * its not a valid completion queue entry
527 * so at system start all entries are invalid */
528 this_controller->completion_queue[index] = 0x80000000;
533 * This method initializes the hardware unsolicited frame queue.
537 void scic_sds_controller_initialize_unsolicited_frame_queue(
538 struct scic_sds_controller *this_controller)
540 u32 frame_queue_control_value;
541 u32 frame_queue_get_value;
542 u32 frame_queue_put_value;
544 /* Write the queue size */
545 frame_queue_control_value =
546 SCU_UFQC_GEN_VAL(QUEUE_SIZE, this_controller->uf_control.address_table.count);
548 SCU_UFQC_WRITE(this_controller, frame_queue_control_value);
550 /* Setup the get pointer for the unsolicited frame queue */
551 frame_queue_get_value = (
552 SCU_UFQGP_GEN_VAL(POINTER, 0)
553 | SCU_UFQGP_GEN_BIT(ENABLE_BIT)
556 SCU_UFQGP_WRITE(this_controller, frame_queue_get_value);
558 /* Setup the put pointer for the unsolicited frame queue */
559 frame_queue_put_value = SCU_UFQPP_GEN_VAL(POINTER, 0);
561 SCU_UFQPP_WRITE(this_controller, frame_queue_put_value);
565 * This method enables the hardware port task scheduler.
569 void scic_sds_controller_enable_port_task_scheduler(
570 struct scic_sds_controller *this_controller)
572 u32 port_task_scheduler_value;
574 port_task_scheduler_value = SCU_PTSGCR_READ(this_controller);
576 port_task_scheduler_value |=
577 (SCU_PTSGCR_GEN_BIT(ETM_ENABLE) | SCU_PTSGCR_GEN_BIT(PTSG_ENABLE));
579 SCU_PTSGCR_WRITE(this_controller, port_task_scheduler_value);
582 /* --------------------------------------------------------------------------- */
587 * This macro is used to delay between writes to the AFE registers during AFE
590 #define AFE_REGISTER_WRITE_DELAY 10
592 /* Initialize the AFE for this phy index. We need to read the AFE setup from
593 * the OEM parameters none
595 void scic_sds_controller_afe_initialization(struct scic_sds_controller *scic)
600 /* Clear DFX Status registers */
601 scu_afe_register_write(scic, afe_dfx_master_control0, 0x0081000f);
602 udelay(AFE_REGISTER_WRITE_DELAY);
604 /* Configure bias currents to normal */
606 scu_afe_register_write(scic, afe_bias_control, 0x00005500);
608 scu_afe_register_write(scic, afe_bias_control, 0x00005A00);
610 udelay(AFE_REGISTER_WRITE_DELAY);
614 scu_afe_register_write(scic, afe_pll_control0, 0x80040A08);
616 scu_afe_register_write(scic, afe_pll_control0, 0x80040908);
618 udelay(AFE_REGISTER_WRITE_DELAY);
620 /* Wait for the PLL to lock */
622 afe_status = scu_afe_register_read(
623 scic, afe_common_block_status);
624 udelay(AFE_REGISTER_WRITE_DELAY);
625 } while ((afe_status & 0x00001000) == 0);
628 /* Shorten SAS SNW lock time (RxLock timer value from 76 us to 50 us) */
629 scu_afe_register_write(scic, afe_pmsn_master_control0, 0x7bcc96ad);
630 udelay(AFE_REGISTER_WRITE_DELAY);
633 for (phy_id = 0; phy_id < SCI_MAX_PHYS; phy_id++) {
635 /* Configure transmitter SSC parameters */
636 scu_afe_txreg_write(scic, phy_id, afe_tx_ssc_control, 0x00030000);
637 udelay(AFE_REGISTER_WRITE_DELAY);
640 * All defaults, except the Receive Word Alignament/Comma Detect
641 * Enable....(0xe800) */
642 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004512);
643 udelay(AFE_REGISTER_WRITE_DELAY);
645 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control1, 0x0050100F);
646 udelay(AFE_REGISTER_WRITE_DELAY);
650 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
651 * & increase TX int & ext bias 20%....(0xe85c) */
653 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003D4);
655 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003F0);
657 /* Power down TX and RX (PWRDNTX and PWRDNRX) */
658 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d7);
659 udelay(AFE_REGISTER_WRITE_DELAY);
662 * Power up TX and RX out from power down (PWRDNTX and PWRDNRX)
663 * & increase TX int & ext bias 20%....(0xe85c) */
664 scu_afe_txreg_write(scic, phy_id, afe_channel_control, 0x000003d4);
666 udelay(AFE_REGISTER_WRITE_DELAY);
668 if (is_a0() || is_a2()) {
669 /* Enable TX equalization (0xe824) */
670 scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
671 udelay(AFE_REGISTER_WRITE_DELAY);
675 * RDPI=0x0(RX Power On), RXOOBDETPDNC=0x0, TPD=0x0(TX Power On),
676 * RDD=0x0(RX Detect Enabled) ....(0xe800) */
677 scu_afe_txreg_write(scic, phy_id, afe_xcvr_control0, 0x00004100);
678 udelay(AFE_REGISTER_WRITE_DELAY);
680 /* Leave DFE/FFE on */
682 scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F09983F);
684 scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
686 scu_afe_txreg_write(scic, phy_id, afe_rx_ssc_control0, 0x3F11103F);
687 udelay(AFE_REGISTER_WRITE_DELAY);
688 /* Enable TX equalization (0xe824) */
689 scu_afe_txreg_write(scic, phy_id, afe_tx_control, 0x00040000);
691 udelay(AFE_REGISTER_WRITE_DELAY);
693 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control0, 0x000E7C03);
694 udelay(AFE_REGISTER_WRITE_DELAY);
696 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control1, 0x000E7C03);
697 udelay(AFE_REGISTER_WRITE_DELAY);
699 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control2, 0x000E7C03);
700 udelay(AFE_REGISTER_WRITE_DELAY);
702 scu_afe_txreg_write(scic, phy_id, afe_tx_amp_control3, 0x000E7C03);
703 udelay(AFE_REGISTER_WRITE_DELAY);
706 /* Transfer control to the PEs */
707 scu_afe_register_write(scic, afe_dfx_master_control0, 0x00010f00);
708 udelay(AFE_REGISTER_WRITE_DELAY);
712 * ****************************************************************************-
713 * * SCIC SDS Controller Internal Start/Stop Routines
714 * ****************************************************************************- */
718 * This method will attempt to transition into the ready state for the
719 * controller and indicate that the controller start operation has completed
720 * if all criteria are met.
721 * @this_controller: This parameter indicates the controller object for which
722 * to transition to ready.
723 * @status: This parameter indicates the status value to be pass into the call
724 * to scic_cb_controller_start_complete().
728 static void scic_sds_controller_transition_to_ready(
729 struct scic_sds_controller *this_controller,
730 enum sci_status status)
732 if (this_controller->parent.state_machine.current_state_id
733 == SCI_BASE_CONTROLLER_STATE_STARTING) {
735 * We move into the ready state, because some of the phys/ports
736 * may be up and operational. */
737 sci_base_state_machine_change_state(
738 scic_sds_controller_get_base_state_machine(this_controller),
739 SCI_BASE_CONTROLLER_STATE_READY
742 isci_event_controller_start_complete(this_controller, status);
747 * This method is the general timeout handler for the controller. It will take
748 * the correct timetout action based on the current controller state
750 void scic_sds_controller_timeout_handler(
751 struct scic_sds_controller *scic)
753 enum sci_base_controller_states current_state;
755 current_state = sci_base_state_machine_get_state(
756 scic_sds_controller_get_base_state_machine(scic));
758 if (current_state == SCI_BASE_CONTROLLER_STATE_STARTING) {
759 scic_sds_controller_transition_to_ready(
760 scic, SCI_FAILURE_TIMEOUT);
761 } else if (current_state == SCI_BASE_CONTROLLER_STATE_STOPPING) {
762 sci_base_state_machine_change_state(
763 scic_sds_controller_get_base_state_machine(scic),
764 SCI_BASE_CONTROLLER_STATE_FAILED);
765 isci_event_controller_stop_complete(scic, SCI_FAILURE_TIMEOUT);
766 } else /* / @todo Now what do we want to do in this case? */
767 dev_err(scic_to_dev(scic),
768 "%s: Controller timer fired when controller was not "
769 "in a state being timed.\n",
774 * scic_sds_controller_get_port_configuration_mode
775 * @this_controller: This is the controller to use to determine if we are using
776 * manual or automatic port configuration.
778 * SCIC_PORT_CONFIGURATION_MODE
780 enum SCIC_PORT_CONFIGURATION_MODE scic_sds_controller_get_port_configuration_mode(
781 struct scic_sds_controller *this_controller)
784 enum SCIC_PORT_CONFIGURATION_MODE mode;
786 mode = SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE;
788 for (index = 0; index < SCI_MAX_PORTS; index++) {
789 if (this_controller->oem_parameters.sds1.ports[index].phy_mask != 0) {
790 mode = SCIC_PORT_MANUAL_CONFIGURATION_MODE;
798 enum sci_status scic_sds_controller_stop_ports(struct scic_sds_controller *scic)
801 enum sci_status port_status;
802 enum sci_status status = SCI_SUCCESS;
804 for (index = 0; index < scic->logical_port_entries; index++) {
805 struct scic_sds_port *sci_port = &scic->port_table[index];
806 SCI_BASE_PORT_HANDLER_T stop;
808 stop = sci_port->state_handlers->parent.stop_handler;
809 port_status = stop(&sci_port->parent);
811 if ((port_status != SCI_SUCCESS) &&
812 (port_status != SCI_FAILURE_INVALID_STATE)) {
813 status = SCI_FAILURE;
815 dev_warn(scic_to_dev(scic),
816 "%s: Controller stop operation failed to "
817 "stop port %d because of status %d.\n",
819 sci_port->logical_port_index,
832 static void scic_sds_controller_phy_timer_start(
833 struct scic_sds_controller *this_controller)
835 isci_event_timer_start(
837 this_controller->phy_startup_timer,
838 SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
841 this_controller->phy_startup_timer_pending = true;
849 void scic_sds_controller_phy_timer_stop(
850 struct scic_sds_controller *this_controller)
852 isci_event_timer_stop(
854 this_controller->phy_startup_timer
857 this_controller->phy_startup_timer_pending = false;
861 * This method is called internally by the controller object to start the next
862 * phy on the controller. If all the phys have been starte, then this
863 * method will attempt to transition the controller to the READY state and
864 * inform the user (scic_cb_controller_start_complete()).
865 * @this_controller: This parameter specifies the controller object for which
866 * to start the next phy.
870 enum sci_status scic_sds_controller_start_next_phy(
871 struct scic_sds_controller *this_controller)
873 enum sci_status status;
875 status = SCI_SUCCESS;
877 if (this_controller->phy_startup_timer_pending == false) {
878 if (this_controller->next_phy_to_start == SCI_MAX_PHYS) {
879 bool is_controller_start_complete = true;
880 struct scic_sds_phy *the_phy;
883 for (index = 0; index < SCI_MAX_PHYS; index++) {
884 the_phy = &this_controller->phy_table[index];
886 if (scic_sds_phy_get_port(the_phy) != NULL) {
888 * The controller start operation is complete if and only
890 * - all links have been given an opportunity to start
891 * - have no indication of a connected device
892 * - have an indication of a connected device and it has
893 * finished the link training process.
897 (the_phy->is_in_link_training == false)
898 && (the_phy->parent.state_machine.current_state_id
899 == SCI_BASE_PHY_STATE_INITIAL)
902 (the_phy->is_in_link_training == false)
903 && (the_phy->parent.state_machine.current_state_id
904 == SCI_BASE_PHY_STATE_STOPPED)
907 (the_phy->is_in_link_training == true)
908 && (the_phy->parent.state_machine.current_state_id
909 == SCI_BASE_PHY_STATE_STARTING)
912 is_controller_start_complete = false;
919 * The controller has successfully finished the start process.
920 * Inform the SCI Core user and transition to the READY state. */
921 if (is_controller_start_complete == true) {
922 scic_sds_controller_transition_to_ready(
923 this_controller, SCI_SUCCESS
925 scic_sds_controller_phy_timer_stop(this_controller);
928 struct scic_sds_phy *the_phy;
930 the_phy = &this_controller->phy_table[this_controller->next_phy_to_start];
933 scic_sds_controller_get_port_configuration_mode(this_controller)
934 == SCIC_PORT_MANUAL_CONFIGURATION_MODE
936 if (scic_sds_phy_get_port(the_phy) == NULL) {
937 this_controller->next_phy_to_start++;
940 * Caution recursion ahead be forwarned
942 * The PHY was never added to a PORT in MPC mode so start the next phy in sequence
943 * This phy will never go link up and will not draw power the OEM parameters either
944 * configured the phy incorrectly for the PORT or it was never assigned to a PORT */
945 return scic_sds_controller_start_next_phy(this_controller);
949 status = scic_sds_phy_start(the_phy);
951 if (status == SCI_SUCCESS) {
952 scic_sds_controller_phy_timer_start(this_controller);
954 dev_warn(scic_to_dev(this_controller),
955 "%s: Controller stop operation failed "
956 "to stop phy %d because of status "
959 this_controller->phy_table[this_controller->next_phy_to_start].phy_index,
963 this_controller->next_phy_to_start++;
976 enum sci_status scic_sds_controller_stop_phys(
977 struct scic_sds_controller *this_controller)
980 enum sci_status status;
981 enum sci_status phy_status;
983 status = SCI_SUCCESS;
985 for (index = 0; index < SCI_MAX_PHYS; index++) {
986 phy_status = scic_sds_phy_stop(&this_controller->phy_table[index]);
989 (phy_status != SCI_SUCCESS)
990 && (phy_status != SCI_FAILURE_INVALID_STATE)
992 status = SCI_FAILURE;
994 dev_warn(scic_to_dev(this_controller),
995 "%s: Controller stop operation failed to stop "
996 "phy %d because of status %d.\n",
998 this_controller->phy_table[index].phy_index, phy_status);
1011 enum sci_status scic_sds_controller_stop_devices(
1012 struct scic_sds_controller *this_controller)
1015 enum sci_status status;
1016 enum sci_status device_status;
1018 status = SCI_SUCCESS;
1020 for (index = 0; index < this_controller->remote_node_entries; index++) {
1021 if (this_controller->device_table[index] != NULL) {
1022 /* / @todo What timeout value do we want to provide to this request? */
1023 device_status = scic_remote_device_stop(this_controller->device_table[index], 0);
1025 if ((device_status != SCI_SUCCESS) &&
1026 (device_status != SCI_FAILURE_INVALID_STATE)) {
1027 dev_warn(scic_to_dev(this_controller),
1028 "%s: Controller stop operation failed "
1029 "to stop device 0x%p because of "
1032 this_controller->device_table[index], device_status);
1041 * ****************************************************************************-
1042 * * SCIC SDS Controller Power Control (Staggered Spinup)
1043 * ****************************************************************************- */
1048 * This method starts the power control timer for this controller object.
1050 static void scic_sds_controller_power_control_timer_start(
1051 struct scic_sds_controller *this_controller)
1053 isci_event_timer_start(
1054 this_controller, this_controller->power_control.timer,
1055 SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL
1058 this_controller->power_control.timer_started = true;
1066 static void scic_sds_controller_power_control_timer_handler(
1069 struct scic_sds_controller *this_controller;
1071 this_controller = (struct scic_sds_controller *)controller;
1073 if (this_controller->power_control.phys_waiting == 0) {
1074 this_controller->power_control.timer_started = false;
1076 struct scic_sds_phy *the_phy = NULL;
1081 && (this_controller->power_control.phys_waiting != 0);
1083 if (this_controller->power_control.requesters[i] != NULL) {
1084 the_phy = this_controller->power_control.requesters[i];
1085 this_controller->power_control.requesters[i] = NULL;
1086 this_controller->power_control.phys_waiting--;
1092 * It doesn't matter if the power list is empty, we need to start the
1093 * timer in case another phy becomes ready. */
1094 scic_sds_controller_power_control_timer_start(this_controller);
1096 scic_sds_phy_consume_power_handler(the_phy);
1101 * This method inserts the phy in the stagger spinup control queue.
1106 void scic_sds_controller_power_control_queue_insert(
1107 struct scic_sds_controller *this_controller,
1108 struct scic_sds_phy *the_phy)
1110 BUG_ON(the_phy == NULL);
1113 (this_controller->power_control.timer_started)
1114 && (this_controller->power_control.requesters[the_phy->phy_index] == NULL)
1116 this_controller->power_control.requesters[the_phy->phy_index] = the_phy;
1117 this_controller->power_control.phys_waiting++;
1119 scic_sds_controller_power_control_timer_start(this_controller);
1120 scic_sds_phy_consume_power_handler(the_phy);
1125 * This method removes the phy from the stagger spinup control queue.
1130 void scic_sds_controller_power_control_queue_remove(
1131 struct scic_sds_controller *this_controller,
1132 struct scic_sds_phy *the_phy)
1134 BUG_ON(the_phy == NULL);
1136 if (this_controller->power_control.requesters[the_phy->phy_index] != NULL) {
1137 this_controller->power_control.phys_waiting--;
1140 this_controller->power_control.requesters[the_phy->phy_index] = NULL;
1144 * ****************************************************************************-
1145 * * SCIC SDS Controller Completion Routines
1146 * ****************************************************************************- */
1149 * This method returns a true value if the completion queue has entries that
1153 * bool true if the completion queue has entries to process false if the
1154 * completion queue has no entries to process
1156 static bool scic_sds_controller_completion_queue_has_entries(
1157 struct scic_sds_controller *this_controller)
1159 u32 get_value = this_controller->completion_queue_get;
1160 u32 get_index = get_value & SMU_COMPLETION_QUEUE_GET_POINTER_MASK;
1163 NORMALIZE_GET_POINTER_CYCLE_BIT(get_value)
1164 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1172 /* --------------------------------------------------------------------------- */
1175 * This method processes a task completion notification. This is called from
1176 * within the controller completion handler.
1178 * @completion_entry:
1181 static void scic_sds_controller_task_completion(
1182 struct scic_sds_controller *this_controller,
1183 u32 completion_entry)
1186 struct scic_sds_request *io_request;
1188 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1189 io_request = this_controller->io_request_table[index];
1191 /* Make sure that we really want to process this IO request */
1193 (io_request != NULL)
1194 && (io_request->io_tag != SCI_CONTROLLER_INVALID_IO_TAG)
1196 scic_sds_io_tag_get_sequence(io_request->io_tag)
1197 == this_controller->io_request_sequence[index]
1200 /* Yep this is a valid io request pass it along to the io request handler */
1201 scic_sds_io_request_tc_completion(io_request, completion_entry);
1206 * This method processes an SDMA completion event. This is called from within
1207 * the controller completion handler.
1209 * @completion_entry:
1212 static void scic_sds_controller_sdma_completion(
1213 struct scic_sds_controller *this_controller,
1214 u32 completion_entry)
1217 struct scic_sds_request *io_request;
1218 struct scic_sds_remote_device *device;
1220 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1222 switch (scu_get_command_request_type(completion_entry)) {
1223 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC:
1224 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_TC:
1225 io_request = this_controller->io_request_table[index];
1226 dev_warn(scic_to_dev(this_controller),
1227 "%s: SCIC SDS Completion type SDMA %x for io request "
1232 /* @todo For a post TC operation we need to fail the IO
1237 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_DUMP_RNC:
1238 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_OTHER_RNC:
1239 case SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_RNC:
1240 device = this_controller->device_table[index];
1241 dev_warn(scic_to_dev(this_controller),
1242 "%s: SCIC SDS Completion type SDMA %x for remote "
1247 /* @todo For a port RNC operation we need to fail the
1253 dev_warn(scic_to_dev(this_controller),
1254 "%s: SCIC SDS Completion unknown SDMA completion "
1266 * @completion_entry:
1268 * This method processes an unsolicited frame message. This is called from
1269 * within the controller completion handler. none
1271 static void scic_sds_controller_unsolicited_frame(
1272 struct scic_sds_controller *this_controller,
1273 u32 completion_entry)
1278 struct scu_unsolicited_frame_header *frame_header;
1279 struct scic_sds_phy *phy;
1280 struct scic_sds_remote_device *device;
1282 enum sci_status result = SCI_FAILURE;
1284 frame_index = SCU_GET_FRAME_INDEX(completion_entry);
1287 = this_controller->uf_control.buffers.array[frame_index].header;
1288 this_controller->uf_control.buffers.array[frame_index].state
1289 = UNSOLICITED_FRAME_IN_USE;
1291 if (SCU_GET_FRAME_ERROR(completion_entry)) {
1293 * / @todo If the IAF frame or SIGNATURE FIS frame has an error will
1294 * / this cause a problem? We expect the phy initialization will
1295 * / fail if there is an error in the frame. */
1296 scic_sds_controller_release_frame(this_controller, frame_index);
1300 if (frame_header->is_address_frame) {
1301 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1302 phy = &this_controller->phy_table[index];
1304 result = scic_sds_phy_frame_handler(phy, frame_index);
1308 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1310 if (index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1312 * This is a signature fis or a frame from a direct attached SATA
1313 * device that has not yet been created. In either case forwared
1314 * the frame to the PE and let it take care of the frame data. */
1315 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1316 phy = &this_controller->phy_table[index];
1317 result = scic_sds_phy_frame_handler(phy, frame_index);
1319 if (index < this_controller->remote_node_entries)
1320 device = this_controller->device_table[index];
1325 result = scic_sds_remote_device_frame_handler(device, frame_index);
1327 scic_sds_controller_release_frame(this_controller, frame_index);
1331 if (result != SCI_SUCCESS) {
1333 * / @todo Is there any reason to report some additional error message
1334 * / when we get this failure notifiction? */
1339 * This method processes an event completion entry. This is called from within
1340 * the controller completion handler.
1342 * @completion_entry:
1345 static void scic_sds_controller_event_completion(
1346 struct scic_sds_controller *this_controller,
1347 u32 completion_entry)
1350 struct scic_sds_request *io_request;
1351 struct scic_sds_remote_device *device;
1352 struct scic_sds_phy *phy;
1354 index = SCU_GET_COMPLETION_INDEX(completion_entry);
1356 switch (scu_get_event_type(completion_entry)) {
1357 case SCU_EVENT_TYPE_SMU_COMMAND_ERROR:
1358 /* / @todo The driver did something wrong and we need to fix the condtion. */
1359 dev_err(scic_to_dev(this_controller),
1360 "%s: SCIC Controller 0x%p received SMU command error "
1367 case SCU_EVENT_TYPE_SMU_PCQ_ERROR:
1368 case SCU_EVENT_TYPE_SMU_ERROR:
1369 case SCU_EVENT_TYPE_FATAL_MEMORY_ERROR:
1371 * / @todo This is a hardware failure and its likely that we want to
1372 * / reset the controller. */
1373 dev_err(scic_to_dev(this_controller),
1374 "%s: SCIC Controller 0x%p received fatal controller "
1381 case SCU_EVENT_TYPE_TRANSPORT_ERROR:
1382 io_request = this_controller->io_request_table[index];
1383 scic_sds_io_request_event_handler(io_request, completion_entry);
1386 case SCU_EVENT_TYPE_PTX_SCHEDULE_EVENT:
1387 switch (scu_get_event_specifier(completion_entry)) {
1388 case SCU_EVENT_SPECIFIC_SMP_RESPONSE_NO_PE:
1389 case SCU_EVENT_SPECIFIC_TASK_TIMEOUT:
1390 io_request = this_controller->io_request_table[index];
1391 if (io_request != NULL)
1392 scic_sds_io_request_event_handler(io_request, completion_entry);
1394 dev_warn(scic_to_dev(this_controller),
1395 "%s: SCIC Controller 0x%p received "
1396 "event 0x%x for io request object "
1397 "that doesnt exist.\n",
1404 case SCU_EVENT_SPECIFIC_IT_NEXUS_TIMEOUT:
1405 device = this_controller->device_table[index];
1407 scic_sds_remote_device_event_handler(device, completion_entry);
1409 dev_warn(scic_to_dev(this_controller),
1410 "%s: SCIC Controller 0x%p received "
1411 "event 0x%x for remote device object "
1412 "that doesnt exist.\n",
1421 case SCU_EVENT_TYPE_BROADCAST_CHANGE:
1423 * direct the broadcast change event to the phy first and then let
1424 * the phy redirect the broadcast change to the port object */
1425 case SCU_EVENT_TYPE_ERR_CNT_EVENT:
1427 * direct error counter event to the phy object since that is where
1428 * we get the event notification. This is a type 4 event. */
1429 case SCU_EVENT_TYPE_OSSP_EVENT:
1430 index = SCU_GET_PROTOCOL_ENGINE_INDEX(completion_entry);
1431 phy = &this_controller->phy_table[index];
1432 scic_sds_phy_event_handler(phy, completion_entry);
1435 case SCU_EVENT_TYPE_RNC_SUSPEND_TX:
1436 case SCU_EVENT_TYPE_RNC_SUSPEND_TX_RX:
1437 case SCU_EVENT_TYPE_RNC_OPS_MISC:
1438 if (index < this_controller->remote_node_entries) {
1439 device = this_controller->device_table[index];
1442 scic_sds_remote_device_event_handler(device, completion_entry);
1444 dev_err(scic_to_dev(this_controller),
1445 "%s: SCIC Controller 0x%p received event 0x%x "
1446 "for remote device object 0x%0x that doesnt "
1456 dev_warn(scic_to_dev(this_controller),
1457 "%s: SCIC Controller received unknown event code %x\n",
1465 * This method is a private routine for processing the completion queue entries.
1469 static void scic_sds_controller_process_completions(
1470 struct scic_sds_controller *this_controller)
1472 u32 completion_count = 0;
1473 u32 completion_entry;
1479 dev_dbg(scic_to_dev(this_controller),
1480 "%s: completion queue begining get:0x%08x\n",
1482 this_controller->completion_queue_get);
1484 /* Get the component parts of the completion queue */
1485 get_index = NORMALIZE_GET_POINTER(this_controller->completion_queue_get);
1486 get_cycle = SMU_CQGR_CYCLE_BIT & this_controller->completion_queue_get;
1488 event_index = NORMALIZE_EVENT_POINTER(this_controller->completion_queue_get);
1489 event_cycle = SMU_CQGR_EVENT_CYCLE_BIT & this_controller->completion_queue_get;
1492 NORMALIZE_GET_POINTER_CYCLE_BIT(get_cycle)
1493 == COMPLETION_QUEUE_CYCLE_BIT(this_controller->completion_queue[get_index])
1497 completion_entry = this_controller->completion_queue[get_index];
1498 INCREMENT_COMPLETION_QUEUE_GET(this_controller, get_index, get_cycle);
1500 dev_dbg(scic_to_dev(this_controller),
1501 "%s: completion queue entry:0x%08x\n",
1505 switch (SCU_GET_COMPLETION_TYPE(completion_entry)) {
1506 case SCU_COMPLETION_TYPE_TASK:
1507 scic_sds_controller_task_completion(this_controller, completion_entry);
1510 case SCU_COMPLETION_TYPE_SDMA:
1511 scic_sds_controller_sdma_completion(this_controller, completion_entry);
1514 case SCU_COMPLETION_TYPE_UFI:
1515 scic_sds_controller_unsolicited_frame(this_controller, completion_entry);
1518 case SCU_COMPLETION_TYPE_EVENT:
1519 INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1520 scic_sds_controller_event_completion(this_controller, completion_entry);
1523 case SCU_COMPLETION_TYPE_NOTIFY:
1525 * Presently we do the same thing with a notify event that we do with the
1526 * other event codes. */
1527 INCREMENT_EVENT_QUEUE_GET(this_controller, event_index, event_cycle);
1528 scic_sds_controller_event_completion(this_controller, completion_entry);
1532 dev_warn(scic_to_dev(this_controller),
1533 "%s: SCIC Controller received unknown "
1534 "completion type %x\n",
1541 /* Update the get register if we completed one or more entries */
1542 if (completion_count > 0) {
1543 this_controller->completion_queue_get =
1544 SMU_CQGR_GEN_BIT(ENABLE)
1545 | SMU_CQGR_GEN_BIT(EVENT_ENABLE)
1546 | event_cycle | SMU_CQGR_GEN_VAL(EVENT_POINTER, event_index)
1547 | get_cycle | SMU_CQGR_GEN_VAL(POINTER, get_index);
1549 SMU_CQGR_WRITE(this_controller,
1550 this_controller->completion_queue_get);
1553 dev_dbg(scic_to_dev(this_controller),
1554 "%s: completion queue ending get:0x%08x\n",
1556 this_controller->completion_queue_get);
1560 bool scic_sds_controller_isr(struct scic_sds_controller *scic)
1562 if (scic_sds_controller_completion_queue_has_entries(scic)) {
1566 * we have a spurious interrupt it could be that we have already
1567 * emptied the completion queue from a previous interrupt */
1568 SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1571 * There is a race in the hardware that could cause us not to be notified
1572 * of an interrupt completion if we do not take this step. We will mask
1573 * then unmask the interrupts so if there is another interrupt pending
1574 * the clearing of the interrupt source we get the next interrupt message. */
1575 SMU_IMR_WRITE(scic, 0xFF000000);
1576 SMU_IMR_WRITE(scic, 0x00000000);
1582 void scic_sds_controller_completion_handler(struct scic_sds_controller *scic)
1584 /* Empty out the completion queue */
1585 if (scic_sds_controller_completion_queue_has_entries(scic))
1586 scic_sds_controller_process_completions(scic);
1588 /* Clear the interrupt and enable all interrupts again */
1589 SMU_ISR_WRITE(scic, SMU_ISR_COMPLETION);
1590 /* Could we write the value of SMU_ISR_COMPLETION? */
1591 SMU_IMR_WRITE(scic, 0xFF000000);
1592 SMU_IMR_WRITE(scic, 0x00000000);
1595 bool scic_sds_controller_error_isr(struct scic_sds_controller *scic)
1597 u32 interrupt_status;
1599 interrupt_status = SMU_ISR_READ(scic);
1601 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
1603 if (interrupt_status != 0) {
1605 * There is an error interrupt pending so let it through and handle
1606 * in the callback */
1611 * There is a race in the hardware that could cause us not to be notified
1612 * of an interrupt completion if we do not take this step. We will mask
1613 * then unmask the error interrupts so if there was another interrupt
1614 * pending we will be notified.
1615 * Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)? */
1616 SMU_IMR_WRITE(scic, 0x000000FF);
1617 SMU_IMR_WRITE(scic, 0x00000000);
1622 void scic_sds_controller_error_handler(struct scic_sds_controller *scic)
1624 u32 interrupt_status;
1626 interrupt_status = SMU_ISR_READ(scic);
1628 if ((interrupt_status & SMU_ISR_QUEUE_SUSPEND) &&
1629 scic_sds_controller_completion_queue_has_entries(scic)) {
1631 scic_sds_controller_process_completions(scic);
1632 SMU_ISR_WRITE(scic, SMU_ISR_QUEUE_SUSPEND);
1635 dev_err(scic_to_dev(scic), "%s: status: %#x\n", __func__,
1638 sci_base_state_machine_change_state(
1639 scic_sds_controller_get_base_state_machine(scic),
1640 SCI_BASE_CONTROLLER_STATE_FAILED);
1646 * If we dont process any completions I am not sure that we want to do this.
1647 * We are in the middle of a hardware fault and should probably be reset. */
1648 SMU_IMR_WRITE(scic, 0x00000000);
1652 u32 scic_sds_controller_get_object_size(void)
1654 return sizeof(struct scic_sds_controller);
1658 void scic_sds_controller_link_up(
1659 struct scic_sds_controller *scic,
1660 struct scic_sds_port *sci_port,
1661 struct scic_sds_phy *sci_phy)
1663 scic_sds_controller_phy_handler_t link_up;
1666 state = scic->parent.state_machine.current_state_id;
1667 link_up = scic_sds_controller_state_handler_table[state].link_up;
1670 link_up(scic, sci_port, sci_phy);
1672 dev_dbg(scic_to_dev(scic),
1673 "%s: SCIC Controller linkup event from phy %d in "
1674 "unexpected state %d\n",
1677 sci_base_state_machine_get_state(
1678 scic_sds_controller_get_base_state_machine(
1683 void scic_sds_controller_link_down(
1684 struct scic_sds_controller *scic,
1685 struct scic_sds_port *sci_port,
1686 struct scic_sds_phy *sci_phy)
1689 scic_sds_controller_phy_handler_t link_down;
1691 state = scic->parent.state_machine.current_state_id;
1692 link_down = scic_sds_controller_state_handler_table[state].link_down;
1695 link_down(scic, sci_port, sci_phy);
1697 dev_dbg(scic_to_dev(scic),
1698 "%s: SCIC Controller linkdown event from phy %d in "
1699 "unexpected state %d\n",
1701 sci_phy->phy_index, state);
1705 * This method is called by the remote device to inform the controller
1706 * that this remote device has started.
1710 void scic_sds_controller_remote_device_started(struct scic_sds_controller *scic,
1711 struct scic_sds_remote_device *sci_dev)
1714 scic_sds_controller_device_handler_t started;
1716 state = scic->parent.state_machine.current_state_id;
1717 started = scic_sds_controller_state_handler_table[state].remote_device_started_handler;
1720 started(scic, sci_dev);
1722 dev_dbg(scic_to_dev(scic),
1723 "%s: SCIC Controller 0x%p remote device started event "
1724 "from device 0x%p in unexpected state %d\n",
1725 __func__, scic, sci_dev, state);
1730 * This is a helper method to determine if any remote devices on this
1731 * controller are still in the stopping state.
1734 bool scic_sds_controller_has_remote_devices_stopping(
1735 struct scic_sds_controller *this_controller)
1739 for (index = 0; index < this_controller->remote_node_entries; index++) {
1740 if ((this_controller->device_table[index] != NULL) &&
1741 (this_controller->device_table[index]->parent.state_machine.current_state_id
1742 == SCI_BASE_REMOTE_DEVICE_STATE_STOPPING))
1750 * This method is called by the remote device to inform the controller
1751 * object that the remote device has stopped.
1755 void scic_sds_controller_remote_device_stopped(struct scic_sds_controller *scic,
1756 struct scic_sds_remote_device *sci_dev)
1760 scic_sds_controller_device_handler_t stopped;
1762 state = scic->parent.state_machine.current_state_id;
1763 stopped = scic_sds_controller_state_handler_table[state].remote_device_stopped_handler;
1766 stopped(scic, sci_dev);
1768 dev_dbg(scic_to_dev(scic),
1769 "%s: SCIC Controller 0x%p remote device stopped event "
1770 "from device 0x%p in unexpected state %d\n",
1771 __func__, scic, sci_dev, state);
1778 * This method will write to the SCU PCP register the request value. The method
1779 * is used to suspend/resume ports, devices, and phys.
1784 void scic_sds_controller_post_request(
1785 struct scic_sds_controller *this_controller,
1788 dev_dbg(scic_to_dev(this_controller),
1789 "%s: SCIC Controller 0x%p post request 0x%08x\n",
1794 SMU_PCP_WRITE(this_controller, request);
1798 * This method will copy the soft copy of the task context into the physical
1799 * memory accessible by the controller.
1800 * @this_controller: This parameter specifies the controller for which to copy
1802 * @this_request: This parameter specifies the request for which the task
1803 * context is being copied.
1805 * After this call is made the SCIC_SDS_IO_REQUEST object will always point to
1806 * the physical memory version of the task context. Thus, all subsequent
1807 * updates to the task context are performed in the TC table (i.e. DMAable
1810 void scic_sds_controller_copy_task_context(
1811 struct scic_sds_controller *this_controller,
1812 struct scic_sds_request *this_request)
1814 struct scu_task_context *task_context_buffer;
1816 task_context_buffer = scic_sds_controller_get_task_context_buffer(
1817 this_controller, this_request->io_tag
1821 task_context_buffer,
1822 this_request->task_context_buffer,
1823 SCI_FIELD_OFFSET(struct scu_task_context, sgl_snapshot_ac)
1827 * Now that the soft copy of the TC has been copied into the TC
1828 * table accessible by the silicon. Thus, any further changes to
1829 * the TC (e.g. TC termination) occur in the appropriate location. */
1830 this_request->task_context_buffer = task_context_buffer;
1834 * This method returns the task context buffer for the given io tag.
1838 * struct scu_task_context*
1840 struct scu_task_context *scic_sds_controller_get_task_context_buffer(
1841 struct scic_sds_controller *this_controller,
1844 u16 task_index = scic_sds_io_tag_get_index(io_tag);
1846 if (task_index < this_controller->task_context_entries) {
1847 return &this_controller->task_context_table[task_index];
1854 * This method returnst the sequence value from the io tag value
1862 * This method returns the IO request associated with the tag value
1866 * SCIC_SDS_IO_REQUEST_T* NULL if there is no valid IO request at the tag value
1868 struct scic_sds_request *scic_sds_controller_get_io_request_from_tag(
1869 struct scic_sds_controller *this_controller,
1875 task_index = scic_sds_io_tag_get_index(io_tag);
1877 if (task_index < this_controller->task_context_entries) {
1878 if (this_controller->io_request_table[task_index] != NULL) {
1879 task_sequence = scic_sds_io_tag_get_sequence(io_tag);
1881 if (task_sequence == this_controller->io_request_sequence[task_index]) {
1882 return this_controller->io_request_table[task_index];
1891 * This method allocates remote node index and the reserves the remote node
1892 * context space for use. This method can fail if there are no more remote
1893 * node index available.
1894 * @this_controller: This is the controller object which contains the set of
1895 * free remote node ids
1896 * @the_devce: This is the device object which is requesting the a remote node
1898 * @node_id: This is the remote node id that is assinged to the device if one
1901 * enum sci_status SCI_FAILURE_OUT_OF_RESOURCES if there are no available remote
1902 * node index available.
1904 enum sci_status scic_sds_controller_allocate_remote_node_context(
1905 struct scic_sds_controller *this_controller,
1906 struct scic_sds_remote_device *the_device,
1910 u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
1912 node_index = scic_sds_remote_node_table_allocate_remote_node(
1913 &this_controller->available_remote_nodes, remote_node_count
1916 if (node_index != SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) {
1917 this_controller->device_table[node_index] = the_device;
1919 *node_id = node_index;
1924 return SCI_FAILURE_INSUFFICIENT_RESOURCES;
1928 * This method frees the remote node index back to the available pool. Once
1929 * this is done the remote node context buffer is no longer valid and can
1936 void scic_sds_controller_free_remote_node_context(
1937 struct scic_sds_controller *this_controller,
1938 struct scic_sds_remote_device *the_device,
1941 u32 remote_node_count = scic_sds_remote_device_node_count(the_device);
1943 if (this_controller->device_table[node_id] == the_device) {
1944 this_controller->device_table[node_id] = NULL;
1946 scic_sds_remote_node_table_release_remote_node_index(
1947 &this_controller->available_remote_nodes, remote_node_count, node_id
1953 * This method returns the union scu_remote_node_context for the specified remote
1958 * union scu_remote_node_context*
1960 union scu_remote_node_context *scic_sds_controller_get_remote_node_context_buffer(
1961 struct scic_sds_controller *this_controller,
1965 (node_id < this_controller->remote_node_entries)
1966 && (this_controller->device_table[node_id] != NULL)
1968 return &this_controller->remote_node_context_table[node_id];
1976 * @resposne_buffer: This is the buffer into which the D2H register FIS will be
1978 * @frame_header: This is the frame header returned by the hardware.
1979 * @frame_buffer: This is the frame buffer returned by the hardware.
1981 * This method will combind the frame header and frame buffer to create a SATA
1982 * D2H register FIS none
1984 void scic_sds_controller_copy_sata_response(
1985 void *response_buffer,
1996 (char *)((char *)response_buffer + sizeof(u32)),
1998 sizeof(struct sata_fis_reg_d2h) - sizeof(u32)
2003 * This method releases the frame once this is done the frame is available for
2004 * re-use by the hardware. The data contained in the frame header and frame
2005 * buffer is no longer valid. The UF queue get pointer is only updated if UF
2006 * control indicates this is appropriate.
2011 void scic_sds_controller_release_frame(
2012 struct scic_sds_controller *this_controller,
2015 if (scic_sds_unsolicited_frame_control_release_frame(
2016 &this_controller->uf_control, frame_index) == true)
2017 SCU_UFQGP_WRITE(this_controller, this_controller->uf_control.get);
2021 * This method sets user parameters and OEM parameters to default values.
2022 * Users can override these values utilizing the scic_user_parameters_set()
2023 * and scic_oem_parameters_set() methods.
2024 * @controller: This parameter specifies the controller for which to set the
2025 * configuration parameters to their default values.
2028 static void scic_sds_controller_set_default_config_parameters(struct scic_sds_controller *scic)
2032 /* Default to no SSC operation. */
2033 scic->oem_parameters.sds1.controller.do_enable_ssc = false;
2035 /* Initialize all of the port parameter information to narrow ports. */
2036 for (index = 0; index < SCI_MAX_PORTS; index++) {
2037 scic->oem_parameters.sds1.ports[index].phy_mask = 0;
2040 /* Initialize all of the phy parameter information. */
2041 for (index = 0; index < SCI_MAX_PHYS; index++) {
2043 * Default to 3G (i.e. Gen 2) for now. User can override if
2045 scic->user_parameters.sds1.phys[index].max_speed_generation = 2;
2047 /* the frequencies cannot be 0 */
2048 scic->user_parameters.sds1.phys[index].align_insertion_frequency = 0x7f;
2049 scic->user_parameters.sds1.phys[index].in_connection_align_insertion_frequency = 0xff;
2050 scic->user_parameters.sds1.phys[index].notify_enable_spin_up_insertion_frequency = 0x33;
2053 * Previous Vitesse based expanders had a arbitration issue that
2054 * is worked around by having the upper 32-bits of SAS address
2055 * with a value greater then the Vitesse company identifier.
2056 * Hence, usage of 0x5FCFFFFF. */
2057 scic->oem_parameters.sds1.phys[index].sas_address.low = 0x00000001;
2058 scic->oem_parameters.sds1.phys[index].sas_address.high = 0x5FCFFFFF;
2061 scic->user_parameters.sds1.stp_inactivity_timeout = 5;
2062 scic->user_parameters.sds1.ssp_inactivity_timeout = 5;
2063 scic->user_parameters.sds1.stp_max_occupancy_timeout = 5;
2064 scic->user_parameters.sds1.ssp_max_occupancy_timeout = 20;
2065 scic->user_parameters.sds1.no_outbound_task_timeout = 20;
2069 enum sci_status scic_controller_construct(struct scic_sds_controller *controller,
2070 void __iomem *scu_base,
2071 void __iomem *smu_base)
2075 sci_base_controller_construct(
2076 &controller->parent,
2077 scic_sds_controller_state_table,
2078 controller->memory_descriptors,
2079 ARRAY_SIZE(controller->memory_descriptors),
2083 controller->scu_registers = scu_base;
2084 controller->smu_registers = smu_base;
2086 scic_sds_port_configuration_agent_construct(&controller->port_agent);
2088 /* Construct the ports for this controller */
2089 for (index = 0; index < SCI_MAX_PORTS; index++)
2090 scic_sds_port_construct(&controller->port_table[index],
2092 scic_sds_port_construct(&controller->port_table[index],
2093 SCIC_SDS_DUMMY_PORT, controller);
2095 /* Construct the phys for this controller */
2096 for (index = 0; index < SCI_MAX_PHYS; index++) {
2097 /* Add all the PHYs to the dummy port */
2098 scic_sds_phy_construct(
2099 &controller->phy_table[index],
2100 &controller->port_table[SCI_MAX_PORTS],
2105 controller->invalid_phy_mask = 0;
2107 /* Set the default maximum values */
2108 controller->completion_event_entries = SCU_EVENT_COUNT;
2109 controller->completion_queue_entries = SCU_COMPLETION_QUEUE_COUNT;
2110 controller->remote_node_entries = SCI_MAX_REMOTE_DEVICES;
2111 controller->logical_port_entries = SCI_MAX_PORTS;
2112 controller->task_context_entries = SCU_IO_REQUEST_COUNT;
2113 controller->uf_control.buffers.count = SCU_UNSOLICITED_FRAME_COUNT;
2114 controller->uf_control.address_table.count = SCU_UNSOLICITED_FRAME_COUNT;
2116 /* Initialize the User and OEM parameters to default values. */
2117 scic_sds_controller_set_default_config_parameters(controller);
2119 return scic_controller_reset(controller);
2122 /* --------------------------------------------------------------------------- */
2124 enum sci_status scic_controller_initialize(
2125 struct scic_sds_controller *scic)
2127 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2128 sci_base_controller_handler_t initialize;
2131 state = scic->parent.state_machine.current_state_id;
2132 initialize = scic_sds_controller_state_handler_table[state].base.initialize;
2135 status = initialize(&scic->parent);
2137 dev_warn(scic_to_dev(scic),
2138 "%s: SCIC Controller initialize operation requested "
2139 "in invalid state %d\n",
2141 sci_base_state_machine_get_state(
2142 scic_sds_controller_get_base_state_machine(
2148 /* --------------------------------------------------------------------------- */
2150 u32 scic_controller_get_suggested_start_timeout(
2151 struct scic_sds_controller *sc)
2153 /* Validate the user supplied parameters. */
2158 * The suggested minimum timeout value for a controller start operation:
2160 * Signature FIS Timeout
2161 * + Phy Start Timeout
2162 * + Number of Phy Spin Up Intervals
2163 * ---------------------------------
2164 * Number of milliseconds for the controller start operation.
2166 * NOTE: The number of phy spin up intervals will be equivalent
2167 * to the number of phys divided by the number phys allowed
2168 * per interval - 1 (once OEM parameters are supported).
2169 * Currently we assume only 1 phy per interval. */
2171 return SCIC_SDS_SIGNATURE_FIS_TIMEOUT
2172 + SCIC_SDS_CONTROLLER_PHY_START_TIMEOUT
2173 + ((SCI_MAX_PHYS - 1) * SCIC_SDS_CONTROLLER_POWER_CONTROL_INTERVAL);
2176 /* --------------------------------------------------------------------------- */
2178 enum sci_status scic_controller_start(
2179 struct scic_sds_controller *scic,
2182 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2183 sci_base_controller_timed_handler_t start;
2186 state = scic->parent.state_machine.current_state_id;
2187 start = scic_sds_controller_state_handler_table[state].base.start;
2190 status = start(&scic->parent, timeout);
2192 dev_warn(scic_to_dev(scic),
2193 "%s: SCIC Controller start operation requested in "
2194 "invalid state %d\n",
2196 sci_base_state_machine_get_state(
2197 scic_sds_controller_get_base_state_machine(
2203 /* --------------------------------------------------------------------------- */
2205 enum sci_status scic_controller_stop(
2206 struct scic_sds_controller *scic,
2209 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2210 sci_base_controller_timed_handler_t stop;
2213 state = scic->parent.state_machine.current_state_id;
2214 stop = scic_sds_controller_state_handler_table[state].base.stop;
2217 status = stop(&scic->parent, timeout);
2219 dev_warn(scic_to_dev(scic),
2220 "%s: SCIC Controller stop operation requested in "
2221 "invalid state %d\n",
2223 sci_base_state_machine_get_state(
2224 scic_sds_controller_get_base_state_machine(
2230 /* --------------------------------------------------------------------------- */
2232 enum sci_status scic_controller_reset(
2233 struct scic_sds_controller *scic)
2235 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2236 sci_base_controller_handler_t reset;
2239 state = scic->parent.state_machine.current_state_id;
2240 reset = scic_sds_controller_state_handler_table[state].base.reset;
2243 status = reset(&scic->parent);
2245 dev_warn(scic_to_dev(scic),
2246 "%s: SCIC Controller reset operation requested in "
2247 "invalid state %d\n",
2249 sci_base_state_machine_get_state(
2250 scic_sds_controller_get_base_state_machine(
2256 enum sci_io_status scic_controller_start_io(
2257 struct scic_sds_controller *scic,
2258 struct scic_sds_remote_device *remote_device,
2259 struct scic_sds_request *io_request,
2263 sci_base_controller_start_request_handler_t start_io;
2265 state = scic->parent.state_machine.current_state_id;
2266 start_io = scic_sds_controller_state_handler_table[state].base.start_io;
2268 return start_io(&scic->parent,
2269 (struct sci_base_remote_device *) remote_device,
2270 (struct sci_base_request *)io_request, io_tag);
2273 /* --------------------------------------------------------------------------- */
2275 enum sci_status scic_controller_terminate_request(
2276 struct scic_sds_controller *scic,
2277 struct scic_sds_remote_device *remote_device,
2278 struct scic_sds_request *request)
2280 sci_base_controller_request_handler_t terminate_request;
2283 state = scic->parent.state_machine.current_state_id;
2284 terminate_request = scic_sds_controller_state_handler_table[state].terminate_request;
2286 return terminate_request(&scic->parent,
2287 (struct sci_base_remote_device *)remote_device,
2288 (struct sci_base_request *)request);
2291 /* --------------------------------------------------------------------------- */
2293 enum sci_status scic_controller_complete_io(
2294 struct scic_sds_controller *scic,
2295 struct scic_sds_remote_device *remote_device,
2296 struct scic_sds_request *io_request)
2299 sci_base_controller_request_handler_t complete_io;
2301 state = scic->parent.state_machine.current_state_id;
2302 complete_io = scic_sds_controller_state_handler_table[state].base.complete_io;
2304 return complete_io(&scic->parent,
2305 (struct sci_base_remote_device *)remote_device,
2306 (struct sci_base_request *)io_request);
2309 /* --------------------------------------------------------------------------- */
2312 enum sci_task_status scic_controller_start_task(
2313 struct scic_sds_controller *scic,
2314 struct scic_sds_remote_device *remote_device,
2315 struct scic_sds_request *task_request,
2319 sci_base_controller_start_request_handler_t start_task;
2320 enum sci_task_status status = SCI_TASK_FAILURE_INVALID_STATE;
2322 state = scic->parent.state_machine.current_state_id;
2323 start_task = scic_sds_controller_state_handler_table[state].base.start_task;
2326 status = start_task(&scic->parent,
2327 (struct sci_base_remote_device *)remote_device,
2328 (struct sci_base_request *)task_request,
2331 dev_warn(scic_to_dev(scic),
2332 "%s: SCIC Controller starting task from invalid "
2339 /* --------------------------------------------------------------------------- */
2341 enum sci_status scic_controller_complete_task(
2342 struct scic_sds_controller *scic,
2343 struct scic_sds_remote_device *remote_device,
2344 struct scic_sds_request *task_request)
2347 sci_base_controller_request_handler_t complete_task;
2348 enum sci_status status = SCI_FAILURE_INVALID_STATE;
2350 state = scic->parent.state_machine.current_state_id;
2351 complete_task = scic_sds_controller_state_handler_table[state].base.complete_task;
2354 status = complete_task(&scic->parent,
2355 (struct sci_base_remote_device *)remote_device,
2356 (struct sci_base_request *)task_request);
2358 dev_warn(scic_to_dev(scic),
2359 "%s: SCIC Controller completing task from invalid "
2367 /* --------------------------------------------------------------------------- */
2369 enum sci_status scic_controller_get_port_handle(
2370 struct scic_sds_controller *scic,
2372 struct scic_sds_port **port_handle)
2374 if (port_index < scic->logical_port_entries) {
2375 *port_handle = &scic->port_table[port_index];
2380 return SCI_FAILURE_INVALID_PORT;
2383 /* --------------------------------------------------------------------------- */
2385 enum sci_status scic_controller_get_phy_handle(
2386 struct scic_sds_controller *scic,
2388 struct scic_sds_phy **phy_handle)
2390 if (phy_index < ARRAY_SIZE(scic->phy_table)) {
2391 *phy_handle = &scic->phy_table[phy_index];
2396 dev_err(scic_to_dev(scic),
2397 "%s: Controller:0x%p PhyId:0x%x invalid phy index\n",
2398 __func__, scic, phy_index);
2400 return SCI_FAILURE_INVALID_PHY;
2403 /* --------------------------------------------------------------------------- */
2405 u16 scic_controller_allocate_io_tag(
2406 struct scic_sds_controller *scic)
2411 if (!sci_pool_empty(scic->tci_pool)) {
2412 sci_pool_get(scic->tci_pool, task_context);
2414 sequence_count = scic->io_request_sequence[task_context];
2416 return scic_sds_io_tag_construct(sequence_count, task_context);
2419 return SCI_CONTROLLER_INVALID_IO_TAG;
2422 /* --------------------------------------------------------------------------- */
2424 enum sci_status scic_controller_free_io_tag(
2425 struct scic_sds_controller *scic,
2431 BUG_ON(io_tag == SCI_CONTROLLER_INVALID_IO_TAG);
2433 sequence = scic_sds_io_tag_get_sequence(io_tag);
2434 index = scic_sds_io_tag_get_index(io_tag);
2436 if (!sci_pool_full(scic->tci_pool)) {
2437 if (sequence == scic->io_request_sequence[index]) {
2438 scic_sds_io_sequence_increment(
2439 scic->io_request_sequence[index]);
2441 sci_pool_put(scic->tci_pool, index);
2447 return SCI_FAILURE_INVALID_IO_TAG;
2450 /* --------------------------------------------------------------------------- */
2452 void scic_controller_enable_interrupts(
2453 struct scic_sds_controller *scic)
2455 BUG_ON(scic->smu_registers == NULL);
2456 SMU_IMR_WRITE(scic, 0x00000000);
2459 /* --------------------------------------------------------------------------- */
2461 void scic_controller_disable_interrupts(
2462 struct scic_sds_controller *scic)
2464 BUG_ON(scic->smu_registers == NULL);
2465 SMU_IMR_WRITE(scic, 0xffffffff);
2468 /* --------------------------------------------------------------------------- */
2470 enum sci_status scic_controller_set_mode(
2471 struct scic_sds_controller *scic,
2472 enum sci_controller_mode operating_mode)
2474 enum sci_status status = SCI_SUCCESS;
2476 if ((scic->parent.state_machine.current_state_id ==
2477 SCI_BASE_CONTROLLER_STATE_INITIALIZING) ||
2478 (scic->parent.state_machine.current_state_id ==
2479 SCI_BASE_CONTROLLER_STATE_INITIALIZED)) {
2480 switch (operating_mode) {
2481 case SCI_MODE_SPEED:
2482 scic->remote_node_entries = SCI_MAX_REMOTE_DEVICES;
2483 scic->task_context_entries = SCU_IO_REQUEST_COUNT;
2484 scic->uf_control.buffers.count =
2485 SCU_UNSOLICITED_FRAME_COUNT;
2486 scic->completion_event_entries = SCU_EVENT_COUNT;
2487 scic->completion_queue_entries =
2488 SCU_COMPLETION_QUEUE_COUNT;
2489 scic_sds_controller_build_memory_descriptor_table(scic);
2493 scic->remote_node_entries = SCI_MIN_REMOTE_DEVICES;
2494 scic->task_context_entries = SCI_MIN_IO_REQUESTS;
2495 scic->uf_control.buffers.count =
2496 SCU_MIN_UNSOLICITED_FRAMES;
2497 scic->completion_event_entries = SCU_MIN_EVENTS;
2498 scic->completion_queue_entries =
2499 SCU_MIN_COMPLETION_QUEUE_ENTRIES;
2500 scic_sds_controller_build_memory_descriptor_table(scic);
2504 status = SCI_FAILURE_INVALID_PARAMETER_VALUE;
2508 status = SCI_FAILURE_INVALID_STATE;
2514 * scic_sds_controller_reset_hardware() -
2516 * This method will reset the controller hardware.
2518 void scic_sds_controller_reset_hardware(
2519 struct scic_sds_controller *scic)
2521 /* Disable interrupts so we dont take any spurious interrupts */
2522 scic_controller_disable_interrupts(scic);
2525 SMU_SMUSRCR_WRITE(scic, 0xFFFFFFFF);
2527 /* Delay for 1ms to before clearing the CQP and UFQPR. */
2530 /* The write to the CQGR clears the CQP */
2531 SMU_CQGR_WRITE(scic, 0x00000000);
2533 /* The write to the UFQGP clears the UFQPR */
2534 SCU_UFQGP_WRITE(scic, 0x00000000);
2537 /* --------------------------------------------------------------------------- */
2539 enum sci_status scic_user_parameters_set(
2540 struct scic_sds_controller *scic,
2541 union scic_user_parameters *scic_parms)
2544 (scic->parent.state_machine.current_state_id
2545 == SCI_BASE_CONTROLLER_STATE_RESET)
2546 || (scic->parent.state_machine.current_state_id
2547 == SCI_BASE_CONTROLLER_STATE_INITIALIZING)
2548 || (scic->parent.state_machine.current_state_id
2549 == SCI_BASE_CONTROLLER_STATE_INITIALIZED)
2554 * Validate the user parameters. If they are not legal, then
2555 * return a failure. */
2556 for (index = 0; index < SCI_MAX_PHYS; index++) {
2557 if (!(scic_parms->sds1.phys[index].max_speed_generation
2558 <= SCIC_SDS_PARM_MAX_SPEED
2559 && scic_parms->sds1.phys[index].max_speed_generation
2560 > SCIC_SDS_PARM_NO_SPEED))
2561 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2563 if (scic_parms->sds1.phys[index].in_connection_align_insertion_frequency < 3)
2564 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2566 (scic_parms->sds1.phys[index].in_connection_align_insertion_frequency < 3) ||
2567 (scic_parms->sds1.phys[index].align_insertion_frequency == 0) ||
2568 (scic_parms->sds1.phys[index].notify_enable_spin_up_insertion_frequency == 0)
2570 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2573 if ((scic_parms->sds1.stp_inactivity_timeout == 0) ||
2574 (scic_parms->sds1.ssp_inactivity_timeout == 0) ||
2575 (scic_parms->sds1.stp_max_occupancy_timeout == 0) ||
2576 (scic_parms->sds1.ssp_max_occupancy_timeout == 0) ||
2577 (scic_parms->sds1.no_outbound_task_timeout == 0))
2578 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2580 memcpy(&scic->user_parameters, scic_parms, sizeof(*scic_parms));
2585 return SCI_FAILURE_INVALID_STATE;
2588 /* --------------------------------------------------------------------------- */
2590 void scic_user_parameters_get(
2591 struct scic_sds_controller *scic,
2592 union scic_user_parameters *scic_parms)
2594 memcpy(scic_parms, (&scic->user_parameters), sizeof(*scic_parms));
2597 /* --------------------------------------------------------------------------- */
2599 enum sci_status scic_oem_parameters_set(
2600 struct scic_sds_controller *scic,
2601 union scic_oem_parameters *scic_parms)
2604 (scic->parent.state_machine.current_state_id
2605 == SCI_BASE_CONTROLLER_STATE_RESET)
2606 || (scic->parent.state_machine.current_state_id
2607 == SCI_BASE_CONTROLLER_STATE_INITIALIZING)
2608 || (scic->parent.state_machine.current_state_id
2609 == SCI_BASE_CONTROLLER_STATE_INITIALIZED)
2614 * Validate the oem parameters. If they are not legal, then
2615 * return a failure. */
2616 for (index = 0; index < SCI_MAX_PORTS; index++) {
2617 if (scic_parms->sds1.ports[index].phy_mask > SCIC_SDS_PARM_PHY_MASK_MAX) {
2618 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2622 for (index = 0; index < SCI_MAX_PHYS; index++) {
2624 scic_parms->sds1.phys[index].sas_address.high == 0
2625 && scic_parms->sds1.phys[index].sas_address.low == 0
2627 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2631 memcpy(&scic->oem_parameters, scic_parms, sizeof(*scic_parms));
2635 return SCI_FAILURE_INVALID_STATE;
2638 /* --------------------------------------------------------------------------- */
2640 void scic_oem_parameters_get(
2641 struct scic_sds_controller *scic,
2642 union scic_oem_parameters *scic_parms)
2644 memcpy(scic_parms, (&scic->oem_parameters), sizeof(*scic_parms));
2647 /* --------------------------------------------------------------------------- */
2650 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS 853
2651 #define INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS 1280
2652 #define INTERRUPT_COALESCE_TIMEOUT_MAX_US 2700000
2653 #define INTERRUPT_COALESCE_NUMBER_MAX 256
2654 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN 7
2655 #define INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX 28
2657 enum sci_status scic_controller_set_interrupt_coalescence(
2658 struct scic_sds_controller *scic_controller,
2659 u32 coalesce_number,
2660 u32 coalesce_timeout)
2662 u8 timeout_encode = 0;
2666 /* Check if the input parameters fall in the range. */
2667 if (coalesce_number > INTERRUPT_COALESCE_NUMBER_MAX)
2668 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2671 * Defined encoding for interrupt coalescing timeout:
2672 * Value Min Max Units
2673 * ----- --- --- -----
2703 * Others Undefined */
2706 * Use the table above to decide the encode of interrupt coalescing timeout
2707 * value for register writing. */
2708 if (coalesce_timeout == 0)
2711 /* make the timeout value in unit of (10 ns). */
2712 coalesce_timeout = coalesce_timeout * 100;
2713 min = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_LOWER_BOUND_NS / 10;
2714 max = INTERRUPT_COALESCE_TIMEOUT_BASE_RANGE_UPPER_BOUND_NS / 10;
2716 /* get the encode of timeout for register writing. */
2717 for (timeout_encode = INTERRUPT_COALESCE_TIMEOUT_ENCODE_MIN;
2718 timeout_encode <= INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX;
2720 if (min <= coalesce_timeout && max > coalesce_timeout)
2722 else if (coalesce_timeout >= max && coalesce_timeout < min * 2
2723 && coalesce_timeout <= INTERRUPT_COALESCE_TIMEOUT_MAX_US * 100) {
2724 if ((coalesce_timeout - max) < (2 * min - coalesce_timeout))
2736 if (timeout_encode == INTERRUPT_COALESCE_TIMEOUT_ENCODE_MAX + 1)
2737 /* the value is out of range. */
2738 return SCI_FAILURE_INVALID_PARAMETER_VALUE;
2743 (SMU_ICC_GEN_VAL(NUMBER, coalesce_number) |
2744 SMU_ICC_GEN_VAL(TIMER, timeout_encode))
2747 scic_controller->interrupt_coalesce_number = (u16)coalesce_number;
2748 scic_controller->interrupt_coalesce_timeout = coalesce_timeout / 100;
2754 struct scic_sds_controller *scic_controller_alloc(struct device *dev)
2756 return devm_kzalloc(dev, sizeof(struct scic_sds_controller), GFP_KERNEL);
2760 * *****************************************************************************
2761 * * DEFAULT STATE HANDLERS
2762 * ***************************************************************************** */
2766 * @controller: This is struct sci_base_controller object which is cast into a
2767 * struct scic_sds_controller object.
2768 * @remote_device: This is struct sci_base_remote_device which, if it was used, would
2769 * be cast to a struct scic_sds_remote_device.
2770 * @io_request: This is the struct sci_base_request which, if it was used, would be
2771 * cast to a SCIC_SDS_IO_REQUEST.
2772 * @io_tag: This is the IO tag to be assigned to the IO request or
2773 * SCI_CONTROLLER_INVALID_IO_TAG.
2775 * This method is called when the struct scic_sds_controller default start io/task
2776 * handler is in place. - Issue a warning message enum sci_status
2777 * SCI_FAILURE_INVALID_STATE
2779 static enum sci_status scic_sds_controller_default_start_operation_handler(
2780 struct sci_base_controller *controller,
2781 struct sci_base_remote_device *remote_device,
2782 struct sci_base_request *io_request,
2785 struct scic_sds_controller *this_controller;
2787 this_controller = (struct scic_sds_controller *)controller;
2789 dev_warn(scic_to_dev(this_controller),
2790 "%s: SCIC Controller requested to start an io/task from "
2791 "invalid state %d\n",
2793 sci_base_state_machine_get_state(
2794 scic_sds_controller_get_base_state_machine(
2797 return SCI_FAILURE_INVALID_STATE;
2802 * @controller: This is struct sci_base_controller object which is cast into a
2803 * struct scic_sds_controller object.
2804 * @remote_device: This is struct sci_base_remote_device which, if it was used, would
2805 * be cast to a struct scic_sds_remote_device.
2806 * @io_request: This is the struct sci_base_request which, if it was used, would be
2807 * cast to a SCIC_SDS_IO_REQUEST.
2809 * This method is called when the struct scic_sds_controller default request handler
2810 * is in place. - Issue a warning message enum sci_status SCI_FAILURE_INVALID_STATE
2812 static enum sci_status scic_sds_controller_default_request_handler(
2813 struct sci_base_controller *controller,
2814 struct sci_base_remote_device *remote_device,
2815 struct sci_base_request *io_request)
2817 struct scic_sds_controller *this_controller;
2819 this_controller = (struct scic_sds_controller *)controller;
2821 dev_warn(scic_to_dev(this_controller),
2822 "%s: SCIC Controller request operation from invalid state %d\n",
2824 sci_base_state_machine_get_state(
2825 scic_sds_controller_get_base_state_machine(
2828 return SCI_FAILURE_INVALID_STATE;
2832 * *****************************************************************************
2833 * * GENERAL (COMMON) STATE HANDLERS
2834 * ***************************************************************************** */
2838 * @controller: The struct sci_base_controller object which is cast into a
2839 * struct scic_sds_controller object.
2841 * This method is called when the struct scic_sds_controller is in the ready state
2842 * reset handler is in place. - Transition to
2843 * SCI_BASE_CONTROLLER_STATE_RESETTING enum sci_status SCI_SUCCESS
2845 static enum sci_status scic_sds_controller_general_reset_handler(
2846 struct sci_base_controller *controller)
2848 struct scic_sds_controller *this_controller;
2850 this_controller = (struct scic_sds_controller *)controller;
2853 * The reset operation is not a graceful cleanup just perform the state
2855 sci_base_state_machine_change_state(
2856 scic_sds_controller_get_base_state_machine(this_controller),
2857 SCI_BASE_CONTROLLER_STATE_RESETTING
2864 * *****************************************************************************
2865 * * RESET STATE HANDLERS
2866 * ***************************************************************************** */
2870 * @controller: This is the struct sci_base_controller object which is cast into a
2871 * struct scic_sds_controller object.
2873 * This method is the struct scic_sds_controller initialize handler for the reset
2874 * state. - Currently this function does nothing enum sci_status SCI_FAILURE This
2875 * function is not yet implemented and is a valid request from the reset state.
2877 static enum sci_status scic_sds_controller_reset_state_initialize_handler(
2878 struct sci_base_controller *controller)
2881 enum sci_status result = SCI_SUCCESS;
2882 struct scic_sds_controller *this_controller;
2884 this_controller = (struct scic_sds_controller *)controller;
2886 sci_base_state_machine_change_state(
2887 scic_sds_controller_get_base_state_machine(this_controller),
2888 SCI_BASE_CONTROLLER_STATE_INITIALIZING
2891 this_controller->timeout_timer = isci_event_timer_create(
2893 (void (*)(void *))scic_sds_controller_timeout_handler,
2894 (void (*)(void *))controller);
2896 scic_sds_controller_initialize_phy_startup(this_controller);
2898 scic_sds_controller_initialize_power_control(this_controller);
2901 * There is nothing to do here for B0 since we do not have to
2902 * program the AFE registers.
2903 * / @todo The AFE settings are supposed to be correct for the B0 but
2904 * / presently they seem to be wrong. */
2905 scic_sds_controller_afe_initialization(this_controller);
2907 if (SCI_SUCCESS == result) {
2911 /* Take the hardware out of reset */
2912 SMU_SMUSRCR_WRITE(this_controller, 0x00000000);
2915 * / @todo Provide meaningfull error code for hardware failure
2916 * result = SCI_FAILURE_CONTROLLER_HARDWARE; */
2917 result = SCI_FAILURE;
2918 terminate_loop = 100;
2920 while (terminate_loop-- && (result != SCI_SUCCESS)) {
2921 /* Loop until the hardware reports success */
2922 udelay(SCU_CONTEXT_RAM_INIT_STALL_TIME);
2923 status = SMU_SMUCSR_READ(this_controller);
2925 if ((status & SCU_RAM_INIT_COMPLETED) == SCU_RAM_INIT_COMPLETED) {
2926 result = SCI_SUCCESS;
2931 if (result == SCI_SUCCESS) {
2932 u32 max_supported_ports;
2933 u32 max_supported_devices;
2934 u32 max_supported_io_requests;
2935 u32 device_context_capacity;
2938 * Determine what are the actaul device capacities that the
2939 * hardware will support */
2940 device_context_capacity = SMU_DCC_READ(this_controller);
2942 max_supported_ports =
2943 smu_dcc_get_max_ports(device_context_capacity);
2944 max_supported_devices =
2945 smu_dcc_get_max_remote_node_context(device_context_capacity);
2946 max_supported_io_requests =
2947 smu_dcc_get_max_task_context(device_context_capacity);
2949 /* Make all PEs that are unassigned match up with the logical ports */
2950 for (index = 0; index < max_supported_ports; index++) {
2953 this_controller->scu_registers->peg0.ptsg.protocol_engine[index],
2958 /* Record the smaller of the two capacity values */
2959 this_controller->logical_port_entries =
2960 min(max_supported_ports, this_controller->logical_port_entries);
2962 this_controller->task_context_entries =
2963 min(max_supported_io_requests, this_controller->task_context_entries);
2965 this_controller->remote_node_entries =
2966 min(max_supported_devices, this_controller->remote_node_entries);
2969 * Now that we have the correct hardware reported minimum values
2970 * build the MDL for the controller. Default to a performance
2972 scic_controller_set_mode(this_controller, SCI_MODE_SPEED);
2975 /* Initialize hardware PCI Relaxed ordering in DMA engines */
2976 if (result == SCI_SUCCESS) {
2977 u32 dma_configuration;
2979 /* Configure the payload DMA */
2980 dma_configuration = SCU_PDMACR_READ(this_controller);
2981 dma_configuration |= SCU_PDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2982 SCU_PDMACR_WRITE(this_controller, dma_configuration);
2984 /* Configure the control DMA */
2985 dma_configuration = SCU_CDMACR_READ(this_controller);
2986 dma_configuration |= SCU_CDMACR_GEN_BIT(PCI_RELAXED_ORDERING_ENABLE);
2987 SCU_CDMACR_WRITE(this_controller, dma_configuration);
2991 * Initialize the PHYs before the PORTs because the PHY registers
2992 * are accessed during the port initialization. */
2993 if (result == SCI_SUCCESS) {
2994 /* Initialize the phys */
2996 (result == SCI_SUCCESS) && (index < SCI_MAX_PHYS);
2998 result = scic_sds_phy_initialize(
2999 &this_controller->phy_table[index],
3000 &this_controller->scu_registers->peg0.pe[index].tl,
3001 &this_controller->scu_registers->peg0.pe[index].ll
3006 if (result == SCI_SUCCESS) {
3007 /* Initialize the logical ports */
3009 (index < this_controller->logical_port_entries)
3010 && (result == SCI_SUCCESS);
3012 result = scic_sds_port_initialize(
3013 &this_controller->port_table[index],
3014 &this_controller->scu_registers->peg0.ptsg.port[index],
3015 &this_controller->scu_registers->peg0.ptsg.protocol_engine,
3016 &this_controller->scu_registers->peg0.viit[index]
3021 if (SCI_SUCCESS == result) {
3022 result = scic_sds_port_configuration_agent_initialize(
3024 &this_controller->port_agent
3028 /* Advance the controller state machine */
3029 if (result == SCI_SUCCESS) {
3030 sci_base_state_machine_change_state(
3031 scic_sds_controller_get_base_state_machine(this_controller),
3032 SCI_BASE_CONTROLLER_STATE_INITIALIZED
3035 sci_base_state_machine_change_state(
3036 scic_sds_controller_get_base_state_machine(this_controller),
3037 SCI_BASE_CONTROLLER_STATE_FAILED
3045 * *****************************************************************************
3046 * * INITIALIZED STATE HANDLERS
3047 * ***************************************************************************** */
3051 * @controller: This is the struct sci_base_controller object which is cast into a
3052 * struct scic_sds_controller object.
3053 * @timeout: This is the allowed time for the controller object to reach the
3056 * This method is the struct scic_sds_controller start handler for the initialized
3057 * state. - Validate we have a good memory descriptor table - Initialze the
3058 * physical memory before programming the hardware - Program the SCU hardware
3059 * with the physical memory addresses passed in the memory descriptor table. -
3060 * Initialzie the TCi pool - Initialize the RNi pool - Initialize the
3061 * completion queue - Initialize the unsolicited frame data - Take the SCU port
3062 * task scheduler out of reset - Start the first phy object. - Transition to
3063 * SCI_BASE_CONTROLLER_STATE_STARTING. enum sci_status SCI_SUCCESS if all of the
3064 * controller start operations complete
3065 * SCI_FAILURE_UNSUPPORTED_INFORMATION_FIELD if one or more of the memory
3066 * descriptor fields is invalid.
3068 static enum sci_status scic_sds_controller_initialized_state_start_handler(
3069 struct sci_base_controller *controller,
3073 enum sci_status result;
3074 struct scic_sds_controller *this_controller;
3076 this_controller = (struct scic_sds_controller *)controller;
3078 /* Make sure that the SCI User filled in the memory descriptor table correctly */
3079 result = scic_sds_controller_validate_memory_descriptor_table(this_controller);
3081 if (result == SCI_SUCCESS) {
3082 /* The memory descriptor list looks good so program the hardware */
3083 scic_sds_controller_ram_initialization(this_controller);
3086 if (result == SCI_SUCCESS) {
3087 /* Build the TCi free pool */
3088 sci_pool_initialize(this_controller->tci_pool);
3089 for (index = 0; index < this_controller->task_context_entries; index++) {
3090 sci_pool_put(this_controller->tci_pool, index);
3093 /* Build the RNi free pool */
3094 scic_sds_remote_node_table_initialize(
3095 &this_controller->available_remote_nodes,
3096 this_controller->remote_node_entries
3100 if (result == SCI_SUCCESS) {
3102 * Before anything else lets make sure we will not be interrupted
3103 * by the hardware. */
3104 scic_controller_disable_interrupts(this_controller);
3106 /* Enable the port task scheduler */
3107 scic_sds_controller_enable_port_task_scheduler(this_controller);
3109 /* Assign all the task entries to this controller physical function */
3110 scic_sds_controller_assign_task_entries(this_controller);
3112 /* Now initialze the completion queue */
3113 scic_sds_controller_initialize_completion_queue(this_controller);
3115 /* Initialize the unsolicited frame queue for use */
3116 scic_sds_controller_initialize_unsolicited_frame_queue(this_controller);
3119 /* Start all of the ports on this controller */
3120 for (index = 0; index < this_controller->logical_port_entries &&
3121 result == SCI_SUCCESS; index++) {
3122 struct scic_sds_port *sci_port = &this_controller->port_table[index];
3124 result = sci_port->state_handlers->parent.start_handler(&sci_port->parent);
3127 if (result == SCI_SUCCESS) {
3128 scic_sds_controller_start_next_phy(this_controller);
3130 isci_event_timer_start(this_controller,
3131 this_controller->timeout_timer,
3134 sci_base_state_machine_change_state(
3135 scic_sds_controller_get_base_state_machine(this_controller),
3136 SCI_BASE_CONTROLLER_STATE_STARTING
3144 * *****************************************************************************
3145 * * INITIALIZED STATE HANDLERS
3146 * ***************************************************************************** */
3150 * @controller: This is struct scic_sds_controller which receives the link up
3152 * @port: This is struct scic_sds_port with which the phy is associated.
3153 * @phy: This is the struct scic_sds_phy which has gone link up.
3155 * This method is called when the struct scic_sds_controller is in the starting state
3156 * link up handler is called. This method will perform the following: - Stop
3157 * the phy timer - Start the next phy - Report the link up condition to the
3160 static void scic_sds_controller_starting_state_link_up_handler(
3161 struct scic_sds_controller *this_controller,
3162 struct scic_sds_port *port,
3163 struct scic_sds_phy *phy)
3165 scic_sds_controller_phy_timer_stop(this_controller);
3167 this_controller->port_agent.link_up_handler(
3168 this_controller, &this_controller->port_agent, port, phy
3170 /* scic_sds_port_link_up(port, phy); */
3172 scic_sds_controller_start_next_phy(this_controller);
3177 * @controller: This is struct scic_sds_controller which receives the link down
3179 * @port: This is struct scic_sds_port with which the phy is associated.
3180 * @phy: This is the struct scic_sds_phy which has gone link down.
3182 * This method is called when the struct scic_sds_controller is in the starting state
3183 * link down handler is called. - Report the link down condition to the port
3186 static void scic_sds_controller_starting_state_link_down_handler(
3187 struct scic_sds_controller *this_controller,
3188 struct scic_sds_port *port,
3189 struct scic_sds_phy *phy)
3191 this_controller->port_agent.link_down_handler(
3192 this_controller, &this_controller->port_agent, port, phy
3194 /* scic_sds_port_link_down(port, phy); */
3198 * *****************************************************************************
3199 * * READY STATE HANDLERS
3200 * ***************************************************************************** */
3204 * @controller: The struct sci_base_controller object which is cast into a
3205 * struct scic_sds_controller object.
3206 * @timeout: The timeout for when the stop operation should report a failure.
3208 * This method is called when the struct scic_sds_controller is in the ready state
3209 * stop handler is called. - Start the timeout timer - Transition to
3210 * SCI_BASE_CONTROLLER_STATE_STOPPING. enum sci_status SCI_SUCCESS
3212 static enum sci_status scic_sds_controller_ready_state_stop_handler(
3213 struct sci_base_controller *controller,
3216 struct scic_sds_controller *this_controller;
3218 this_controller = (struct scic_sds_controller *)controller;
3220 isci_event_timer_start(this_controller,
3221 this_controller->timeout_timer,
3224 sci_base_state_machine_change_state(
3225 scic_sds_controller_get_base_state_machine(this_controller),
3226 SCI_BASE_CONTROLLER_STATE_STOPPING
3234 * @controller: This is struct sci_base_controller object which is cast into a
3235 * struct scic_sds_controller object.
3236 * @remote_device: This is struct sci_base_remote_device which is cast to a
3237 * struct scic_sds_remote_device object.
3238 * @io_request: This is the struct sci_base_request which is cast to a
3239 * SCIC_SDS_IO_REQUEST object.
3240 * @io_tag: This is the IO tag to be assigned to the IO request or
3241 * SCI_CONTROLLER_INVALID_IO_TAG.
3243 * This method is called when the struct scic_sds_controller is in the ready state and
3244 * the start io handler is called. - Start the io request on the remote device
3245 * - if successful - assign the io_request to the io_request_table - post the
3246 * request to the hardware enum sci_status SCI_SUCCESS if the start io operation
3247 * succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could not be
3248 * allocated for the io request. SCI_FAILURE_INVALID_STATE if one or more
3249 * objects are not in a valid state to accept io requests. How does the io_tag
3250 * parameter get assigned to the io request?
3252 static enum sci_status scic_sds_controller_ready_state_start_io_handler(
3253 struct sci_base_controller *controller,
3254 struct sci_base_remote_device *remote_device,
3255 struct sci_base_request *io_request,
3258 enum sci_status status;
3260 struct scic_sds_controller *this_controller;
3261 struct scic_sds_request *the_request;
3262 struct scic_sds_remote_device *the_device;
3264 this_controller = (struct scic_sds_controller *)controller;
3265 the_request = (struct scic_sds_request *)io_request;
3266 the_device = (struct scic_sds_remote_device *)remote_device;
3268 status = scic_sds_remote_device_start_io(this_controller, the_device, the_request);
3270 if (status == SCI_SUCCESS) {
3271 this_controller->io_request_table[
3272 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3274 scic_sds_controller_post_request(
3276 scic_sds_request_get_post_context(the_request)
3285 * @controller: This is struct sci_base_controller object which is cast into a
3286 * struct scic_sds_controller object.
3287 * @remote_device: This is struct sci_base_remote_device which is cast to a
3288 * struct scic_sds_remote_device object.
3289 * @io_request: This is the struct sci_base_request which is cast to a
3290 * SCIC_SDS_IO_REQUEST object.
3292 * This method is called when the struct scic_sds_controller is in the ready state and
3293 * the complete io handler is called. - Complete the io request on the remote
3294 * device - if successful - remove the io_request to the io_request_table
3295 * enum sci_status SCI_SUCCESS if the start io operation succeeds
3296 * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3297 * accept io requests.
3299 static enum sci_status scic_sds_controller_ready_state_complete_io_handler(
3300 struct sci_base_controller *controller,
3301 struct sci_base_remote_device *remote_device,
3302 struct sci_base_request *io_request)
3305 enum sci_status status;
3306 struct scic_sds_controller *this_controller;
3307 struct scic_sds_request *the_request;
3308 struct scic_sds_remote_device *the_device;
3310 this_controller = (struct scic_sds_controller *)controller;
3311 the_request = (struct scic_sds_request *)io_request;
3312 the_device = (struct scic_sds_remote_device *)remote_device;
3314 status = scic_sds_remote_device_complete_io(
3315 this_controller, the_device, the_request);
3317 if (status == SCI_SUCCESS) {
3318 index = scic_sds_io_tag_get_index(the_request->io_tag);
3319 this_controller->io_request_table[index] = NULL;
3327 * @controller: This is struct sci_base_controller object which is cast into a
3328 * struct scic_sds_controller object.
3329 * @remote_device: This is struct sci_base_remote_device which is cast to a
3330 * struct scic_sds_remote_device object.
3331 * @io_request: This is the struct sci_base_request which is cast to a
3332 * SCIC_SDS_IO_REQUEST object.
3334 * This method is called when the struct scic_sds_controller is in the ready state and
3335 * the continue io handler is called. enum sci_status
3337 static enum sci_status scic_sds_controller_ready_state_continue_io_handler(
3338 struct sci_base_controller *controller,
3339 struct sci_base_remote_device *remote_device,
3340 struct sci_base_request *io_request)
3342 struct scic_sds_controller *this_controller;
3343 struct scic_sds_request *the_request;
3345 the_request = (struct scic_sds_request *)io_request;
3346 this_controller = (struct scic_sds_controller *)controller;
3348 this_controller->io_request_table[
3349 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3351 scic_sds_controller_post_request(
3353 scic_sds_request_get_post_context(the_request)
3361 * @controller: This is struct sci_base_controller object which is cast into a
3362 * struct scic_sds_controller object.
3363 * @remote_device: This is struct sci_base_remote_device which is cast to a
3364 * struct scic_sds_remote_device object.
3365 * @io_request: This is the struct sci_base_request which is cast to a
3366 * SCIC_SDS_IO_REQUEST object.
3367 * @task_tag: This is the task tag to be assigned to the task request or
3368 * SCI_CONTROLLER_INVALID_IO_TAG.
3370 * This method is called when the struct scic_sds_controller is in the ready state and
3371 * the start task handler is called. - The remote device is requested to start
3372 * the task request - if successful - assign the task to the io_request_table -
3373 * post the request to the SCU hardware enum sci_status SCI_SUCCESS if the start io
3374 * operation succeeds SCI_FAILURE_INSUFFICIENT_RESOURCES if the IO tag could
3375 * not be allocated for the io request. SCI_FAILURE_INVALID_STATE if one or
3376 * more objects are not in a valid state to accept io requests. How does the io
3377 * tag get assigned in this code path?
3379 static enum sci_status scic_sds_controller_ready_state_start_task_handler(
3380 struct sci_base_controller *controller,
3381 struct sci_base_remote_device *remote_device,
3382 struct sci_base_request *io_request,
3385 struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3387 struct scic_sds_request *the_request = (struct scic_sds_request *)
3389 struct scic_sds_remote_device *the_device = (struct scic_sds_remote_device *)
3391 enum sci_status status;
3393 status = scic_sds_remote_device_start_task(
3394 this_controller, the_device, the_request
3397 if (status == SCI_SUCCESS) {
3398 this_controller->io_request_table[
3399 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3401 scic_sds_controller_post_request(
3403 scic_sds_request_get_post_context(the_request)
3405 } else if (status == SCI_FAILURE_RESET_DEVICE_PARTIAL_SUCCESS) {
3406 this_controller->io_request_table[
3407 scic_sds_io_tag_get_index(the_request->io_tag)] = the_request;
3410 * We will let framework know this task request started successfully,
3411 * although core is still woring on starting the request (to post tc when
3412 * RNC is resumed.) */
3413 status = SCI_SUCCESS;
3420 * @controller: This is struct sci_base_controller object which is cast into a
3421 * struct scic_sds_controller object.
3422 * @remote_device: This is struct sci_base_remote_device which is cast to a
3423 * struct scic_sds_remote_device object.
3424 * @io_request: This is the struct sci_base_request which is cast to a
3425 * SCIC_SDS_IO_REQUEST object.
3427 * This method is called when the struct scic_sds_controller is in the ready state and
3428 * the terminate request handler is called. - call the io request terminate
3429 * function - if successful - post the terminate request to the SCU hardware
3430 * enum sci_status SCI_SUCCESS if the start io operation succeeds
3431 * SCI_FAILURE_INVALID_STATE if one or more objects are not in a valid state to
3432 * accept io requests.
3434 static enum sci_status scic_sds_controller_ready_state_terminate_request_handler(
3435 struct sci_base_controller *controller,
3436 struct sci_base_remote_device *remote_device,
3437 struct sci_base_request *io_request)
3439 struct scic_sds_controller *this_controller = (struct scic_sds_controller *)
3441 struct scic_sds_request *the_request = (struct scic_sds_request *)
3443 enum sci_status status;
3445 status = scic_sds_io_request_terminate(the_request);
3446 if (status == SCI_SUCCESS) {
3448 * Utilize the original post context command and or in the POST_TC_ABORT
3449 * request sub-type. */
3450 scic_sds_controller_post_request(
3452 scic_sds_request_get_post_context(the_request)
3453 | SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT
3462 * @controller: This is struct scic_sds_controller which receives the link up
3464 * @port: This is struct scic_sds_port with which the phy is associated.
3465 * @phy: This is the struct scic_sds_phy which has gone link up.
3467 * This method is called when the struct scic_sds_controller is in the starting state
3468 * link up handler is called. This method will perform the following: - Stop
3469 * the phy timer - Start the next phy - Report the link up condition to the
3472 static void scic_sds_controller_ready_state_link_up_handler(
3473 struct scic_sds_controller *this_controller,
3474 struct scic_sds_port *port,
3475 struct scic_sds_phy *phy)
3477 this_controller->port_agent.link_up_handler(
3478 this_controller, &this_controller->port_agent, port, phy
3484 * @controller: This is struct scic_sds_controller which receives the link down
3486 * @port: This is struct scic_sds_port with which the phy is associated.
3487 * @phy: This is the struct scic_sds_phy which has gone link down.
3489 * This method is called when the struct scic_sds_controller is in the starting state
3490 * link down handler is called. - Report the link down condition to the port
3493 static void scic_sds_controller_ready_state_link_down_handler(
3494 struct scic_sds_controller *this_controller,
3495 struct scic_sds_port *port,
3496 struct scic_sds_phy *phy)
3498 this_controller->port_agent.link_down_handler(
3499 this_controller, &this_controller->port_agent, port, phy
3504 * *****************************************************************************
3505 * * STOPPING STATE HANDLERS
3506 * ***************************************************************************** */
3510 * @controller: This is struct sci_base_controller object which is cast into a
3511 * struct scic_sds_controller object.
3512 * @remote_device: This is struct sci_base_remote_device which is cast to a
3513 * struct scic_sds_remote_device object.
3514 * @io_request: This is the struct sci_base_request which is cast to a
3515 * SCIC_SDS_IO_REQUEST object.
3517 * This method is called when the struct scic_sds_controller is in a stopping state
3518 * and the complete io handler is called. - This function is not yet
3519 * implemented enum sci_status SCI_FAILURE
3521 static enum sci_status scic_sds_controller_stopping_state_complete_io_handler(
3522 struct sci_base_controller *controller,
3523 struct sci_base_remote_device *remote_device,
3524 struct sci_base_request *io_request)
3526 struct scic_sds_controller *this_controller;
3528 this_controller = (struct scic_sds_controller *)controller;
3530 /* / @todo Implement this function */
3536 * @controller: This is struct sci_base_controller object which is cast into a
3537 * struct scic_sds_controller object.
3538 * @remote_device: This is struct sci_base_remote_device which is cast to a
3539 * struct scic_sds_remote_device object.
3541 * This method is called when the struct scic_sds_controller is in a stopping state
3542 * and the remote device has stopped.
3544 void scic_sds_controller_stopping_state_device_stopped_handler(
3545 struct scic_sds_controller *controller,
3546 struct scic_sds_remote_device *remote_device
3549 if (!scic_sds_controller_has_remote_devices_stopping(controller)) {
3550 sci_base_state_machine_change_state(
3551 &controller->parent.state_machine,
3552 SCI_BASE_CONTROLLER_STATE_STOPPED
3557 const struct scic_sds_controller_state_handler scic_sds_controller_state_handler_table[] = {
3558 [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
3559 .base.start_io = scic_sds_controller_default_start_operation_handler,
3560 .base.complete_io = scic_sds_controller_default_request_handler,
3561 .base.continue_io = scic_sds_controller_default_request_handler,
3562 .terminate_request = scic_sds_controller_default_request_handler,
3564 [SCI_BASE_CONTROLLER_STATE_RESET] = {
3565 .base.reset = scic_sds_controller_general_reset_handler,
3566 .base.initialize = scic_sds_controller_reset_state_initialize_handler,
3567 .base.start_io = scic_sds_controller_default_start_operation_handler,
3568 .base.complete_io = scic_sds_controller_default_request_handler,
3569 .base.continue_io = scic_sds_controller_default_request_handler,
3570 .terminate_request = scic_sds_controller_default_request_handler,
3572 [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {
3573 .base.start_io = scic_sds_controller_default_start_operation_handler,
3574 .base.complete_io = scic_sds_controller_default_request_handler,
3575 .base.continue_io = scic_sds_controller_default_request_handler,
3576 .terminate_request = scic_sds_controller_default_request_handler,
3578 [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {
3579 .base.start = scic_sds_controller_initialized_state_start_handler,
3580 .base.start_io = scic_sds_controller_default_start_operation_handler,
3581 .base.complete_io = scic_sds_controller_default_request_handler,
3582 .base.continue_io = scic_sds_controller_default_request_handler,
3583 .terminate_request = scic_sds_controller_default_request_handler,
3585 [SCI_BASE_CONTROLLER_STATE_STARTING] = {
3586 .base.start_io = scic_sds_controller_default_start_operation_handler,
3587 .base.complete_io = scic_sds_controller_default_request_handler,
3588 .base.continue_io = scic_sds_controller_default_request_handler,
3589 .terminate_request = scic_sds_controller_default_request_handler,
3590 .link_up = scic_sds_controller_starting_state_link_up_handler,
3591 .link_down = scic_sds_controller_starting_state_link_down_handler
3593 [SCI_BASE_CONTROLLER_STATE_READY] = {
3594 .base.stop = scic_sds_controller_ready_state_stop_handler,
3595 .base.reset = scic_sds_controller_general_reset_handler,
3596 .base.start_io = scic_sds_controller_ready_state_start_io_handler,
3597 .base.complete_io = scic_sds_controller_ready_state_complete_io_handler,
3598 .base.continue_io = scic_sds_controller_ready_state_continue_io_handler,
3599 .base.start_task = scic_sds_controller_ready_state_start_task_handler,
3600 .base.complete_task = scic_sds_controller_ready_state_complete_io_handler,
3601 .terminate_request = scic_sds_controller_ready_state_terminate_request_handler,
3602 .link_up = scic_sds_controller_ready_state_link_up_handler,
3603 .link_down = scic_sds_controller_ready_state_link_down_handler
3605 [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
3606 .base.start_io = scic_sds_controller_default_start_operation_handler,
3607 .base.complete_io = scic_sds_controller_default_request_handler,
3608 .base.continue_io = scic_sds_controller_default_request_handler,
3609 .terminate_request = scic_sds_controller_default_request_handler,
3611 [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
3612 .base.start_io = scic_sds_controller_default_start_operation_handler,
3613 .base.complete_io = scic_sds_controller_stopping_state_complete_io_handler,
3614 .base.continue_io = scic_sds_controller_default_request_handler,
3615 .terminate_request = scic_sds_controller_default_request_handler,
3616 .remote_device_stopped_handler = scic_sds_controller_stopping_state_device_stopped_handler,
3618 [SCI_BASE_CONTROLLER_STATE_STOPPED] = {
3619 .base.reset = scic_sds_controller_general_reset_handler,
3620 .base.start_io = scic_sds_controller_default_start_operation_handler,
3621 .base.complete_io = scic_sds_controller_default_request_handler,
3622 .base.continue_io = scic_sds_controller_default_request_handler,
3623 .terminate_request = scic_sds_controller_default_request_handler,
3625 [SCI_BASE_CONTROLLER_STATE_FAILED] = {
3626 .base.reset = scic_sds_controller_general_reset_handler,
3627 .base.start_io = scic_sds_controller_default_start_operation_handler,
3628 .base.complete_io = scic_sds_controller_default_request_handler,
3629 .base.continue_io = scic_sds_controller_default_request_handler,
3630 .terminate_request = scic_sds_controller_default_request_handler,
3636 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3639 * This method implements the actions taken by the struct scic_sds_controller on entry
3640 * to the SCI_BASE_CONTROLLER_STATE_INITIAL. - Set the state handlers to the
3641 * controllers initial state. none This function should initialze the
3642 * controller object.
3644 static void scic_sds_controller_initial_state_enter(
3645 struct sci_base_object *object)
3647 struct scic_sds_controller *this_controller;
3649 this_controller = (struct scic_sds_controller *)object;
3651 sci_base_state_machine_change_state(
3652 &this_controller->parent.state_machine, SCI_BASE_CONTROLLER_STATE_RESET);
3657 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3660 * This method implements the actions taken by the struct scic_sds_controller on exit
3661 * from the SCI_BASE_CONTROLLER_STATE_STARTING. - This function stops the
3662 * controller starting timeout timer. none
3664 static void scic_sds_controller_starting_state_exit(
3665 struct sci_base_object *object)
3667 struct scic_sds_controller *scic = (struct scic_sds_controller *)object;
3669 isci_event_timer_stop(scic, scic->timeout_timer);
3674 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3677 * This method implements the actions taken by the struct scic_sds_controller on entry
3678 * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
3679 * controllers ready state. none
3681 static void scic_sds_controller_ready_state_enter(
3682 struct sci_base_object *object)
3684 struct scic_sds_controller *this_controller;
3686 this_controller = (struct scic_sds_controller *)object;
3688 /* set the default interrupt coalescence number and timeout value. */
3689 scic_controller_set_interrupt_coalescence(
3690 this_controller, 0x10, 250);
3695 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3698 * This method implements the actions taken by the struct scic_sds_controller on exit
3699 * from the SCI_BASE_CONTROLLER_STATE_READY. - This function does nothing. none
3701 static void scic_sds_controller_ready_state_exit(
3702 struct sci_base_object *object)
3704 struct scic_sds_controller *this_controller;
3706 this_controller = (struct scic_sds_controller *)object;
3708 /* disable interrupt coalescence. */
3709 scic_controller_set_interrupt_coalescence(this_controller, 0, 0);
3714 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3717 * This method implements the actions taken by the struct scic_sds_controller on entry
3718 * to the SCI_BASE_CONTROLLER_STATE_READY. - Set the state handlers to the
3719 * controllers ready state. - Stop the phys on this controller - Stop the ports
3720 * on this controller - Stop all of the remote devices on this controller none
3722 static void scic_sds_controller_stopping_state_enter(
3723 struct sci_base_object *object)
3725 struct scic_sds_controller *this_controller;
3727 this_controller = (struct scic_sds_controller *)object;
3729 /* Stop all of the components for this controller */
3730 scic_sds_controller_stop_phys(this_controller);
3731 scic_sds_controller_stop_ports(this_controller);
3732 scic_sds_controller_stop_devices(this_controller);
3737 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3740 * This method implements the actions taken by the struct scic_sds_controller on exit
3741 * from the SCI_BASE_CONTROLLER_STATE_STOPPING. - This function stops the
3742 * controller stopping timeout timer. none
3744 static void scic_sds_controller_stopping_state_exit(
3745 struct sci_base_object *object)
3747 struct scic_sds_controller *this_controller;
3749 this_controller = (struct scic_sds_controller *)object;
3751 isci_event_timer_stop(this_controller, this_controller->timeout_timer);
3756 * @object: This is the struct sci_base_object which is cast to a struct scic_sds_controller
3759 * This method implements the actions taken by the struct scic_sds_controller on entry
3760 * to the SCI_BASE_CONTROLLER_STATE_RESETTING. - Set the state handlers to the
3761 * controllers resetting state. - Write to the SCU hardware reset register to
3762 * force a reset - Transition to the SCI_BASE_CONTROLLER_STATE_RESET none
3764 static void scic_sds_controller_resetting_state_enter(
3765 struct sci_base_object *object)
3767 struct scic_sds_controller *this_controller;
3769 this_controller = (struct scic_sds_controller *)object;
3771 scic_sds_controller_reset_hardware(this_controller);
3773 sci_base_state_machine_change_state(
3774 scic_sds_controller_get_base_state_machine(this_controller),
3775 SCI_BASE_CONTROLLER_STATE_RESET
3779 /* --------------------------------------------------------------------------- */
3781 const struct sci_base_state scic_sds_controller_state_table[] = {
3782 [SCI_BASE_CONTROLLER_STATE_INITIAL] = {
3783 .enter_state = scic_sds_controller_initial_state_enter,
3785 [SCI_BASE_CONTROLLER_STATE_RESET] = {},
3786 [SCI_BASE_CONTROLLER_STATE_INITIALIZING] = {},
3787 [SCI_BASE_CONTROLLER_STATE_INITIALIZED] = {},
3788 [SCI_BASE_CONTROLLER_STATE_STARTING] = {
3789 .exit_state = scic_sds_controller_starting_state_exit,
3791 [SCI_BASE_CONTROLLER_STATE_READY] = {
3792 .enter_state = scic_sds_controller_ready_state_enter,
3793 .exit_state = scic_sds_controller_ready_state_exit,
3795 [SCI_BASE_CONTROLLER_STATE_RESETTING] = {
3796 .enter_state = scic_sds_controller_resetting_state_enter,
3798 [SCI_BASE_CONTROLLER_STATE_STOPPING] = {
3799 .enter_state = scic_sds_controller_stopping_state_enter,
3800 .exit_state = scic_sds_controller_stopping_state_exit,
3802 [SCI_BASE_CONTROLLER_STATE_STOPPED] = {},
3803 [SCI_BASE_CONTROLLER_STATE_FAILED] = {}