drivers/pinctrl/sh-pfc/core.c

   1 /*
   2  * SuperH Pin Function Controller support.
   3  *
   4  * Copyright (C) 2008 Magnus Damm
   5  * Copyright (C) 2009 - 2012 Paul Mundt
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11
  12 #define DRV_NAME "sh-pfc"
  13
  14 #include <linux/bitops.h>
  15 #include <linux/err.h>
  16 #include <linux/errno.h>
  17 #include <linux/io.h>
  18 #include <linux/ioport.h>
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/of.h>
  22 #include <linux/of_device.h>
  23 #include <linux/pinctrl/machine.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/slab.h>
  26
  27 #include "core.h"
  28
  29 static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev)
  30 {
  31         struct resource *res;
  32         int k;
  33
  34         if (pdev->num_resources == 0)
  35                 return -EINVAL;
  36
  37         pfc->window = devm_kzalloc(pfc->dev, pdev->num_resources *
  38                                    sizeof(*pfc->window), GFP_NOWAIT);
  39         if (!pfc->window)
  40                 return -ENOMEM;
  41
  42         pfc->num_windows = pdev->num_resources;
  43
  44         for (k = 0, res = pdev->resource; k < pdev->num_resources; k++, res++) {
  45                 WARN_ON(resource_type(res) != IORESOURCE_MEM);
  46                 pfc->window[k].phys = res->start;
  47                 pfc->window[k].size = resource_size(res);
  48                 pfc->window[k].virt = devm_ioremap_nocache(pfc->dev, res->start,
  49                                                            resource_size(res));
  50                 if (!pfc->window[k].virt)
  51                         return -ENOMEM;
  52         }
  53
  54         return 0;
  55 }
  56
  57 static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc,
  58                                          unsigned long address)
  59 {
  60         struct sh_pfc_window *window;
  61         unsigned int i;
  62
  63         /* scan through physical windows and convert address */
  64         for (i = 0; i < pfc->num_windows; i++) {
  65                 window = pfc->window + i;
  66
  67                 if (address < window->phys)
  68                         continue;
  69
  70                 if (address >= (window->phys + window->size))
  71                         continue;
  72
  73                 return window->virt + (address - window->phys);
  74         }
  75
  76         BUG();
  77         return NULL;
  78 }
  79
  80 int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin)
  81 {
  82         unsigned int offset;
  83         unsigned int i;
  84
  85         if (pfc->info->ranges == NULL)
  86                 return pin;
  87
  88         for (i = 0, offset = 0; i < pfc->info->nr_ranges; ++i) {
  89                 const struct pinmux_range *range = &pfc->info->ranges[i];
  90
  91                 if (pin <= range->end)
  92                         return pin >= range->begin
  93                              ? offset + pin - range->begin : -1;
  94
  95                 offset += range->end - range->begin + 1;
  96         }
  97
  98         return -EINVAL;
  99 }
 100
 101 static int sh_pfc_enum_in_range(pinmux_enum_t enum_id,
 102                                 const struct pinmux_range *r)
 103 {
 104         if (enum_id < r->begin)
 105                 return 0;
 106
 107         if (enum_id > r->end)
 108                 return 0;
 109
 110         return 1;
 111 }
 112
 113 unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
 114                                   unsigned long reg_width)
 115 {
 116         switch (reg_width) {
 117         case 8:
 118                 return ioread8(mapped_reg);
 119         case 16:
 120                 return ioread16(mapped_reg);
 121         case 32:
 122                 return ioread32(mapped_reg);
 123         }
 124
 125         BUG();
 126         return 0;
 127 }
 128
 129 void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned long reg_width,
 130                           unsigned long data)
 131 {
 132         switch (reg_width) {
 133         case 8:
 134                 iowrite8(data, mapped_reg);
 135                 return;
 136         case 16:
 137                 iowrite16(data, mapped_reg);
 138                 return;
 139         case 32:
 140                 iowrite32(data, mapped_reg);
 141                 return;
 142         }
 143
 144         BUG();
 145 }
 146
 147 static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
 148                                      const struct pinmux_cfg_reg *crp,
 149                                      unsigned long in_pos,
 150                                      void __iomem **mapped_regp,
 151                                      unsigned long *maskp,
 152                                      unsigned long *posp)
 153 {
 154         int k;
 155
 156         *mapped_regp = sh_pfc_phys_to_virt(pfc, crp->reg);
 157
 158         if (crp->field_width) {
 159                 *maskp = (1 << crp->field_width) - 1;
 160                 *posp = crp->reg_width - ((in_pos + 1) * crp->field_width);
 161         } else {
 162                 *maskp = (1 << crp->var_field_width[in_pos]) - 1;
 163                 *posp = crp->reg_width;
 164                 for (k = 0; k <= in_pos; k++)
 165                         *posp -= crp->var_field_width[k];
 166         }
 167 }
 168
 169 static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
 170                                     const struct pinmux_cfg_reg *crp,
 171                                     unsigned long field, unsigned long value)
 172 {
 173         void __iomem *mapped_reg;
 174         unsigned long mask, pos, data;
 175
 176         sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
 177
 178         dev_dbg(pfc->dev, "write_reg addr = %lx, value = %ld, field = %ld, "
 179                 "r_width = %ld, f_width = %ld\n",
 180                 crp->reg, value, field, crp->reg_width, crp->field_width);
 181
 182         mask = ~(mask << pos);
 183         value = value << pos;
 184
 185         data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width);
 186         data &= mask;
 187         data |= value;
 188
 189         if (pfc->info->unlock_reg)
 190                 sh_pfc_write_raw_reg(
 191                         sh_pfc_phys_to_virt(pfc, pfc->info->unlock_reg), 32,
 192                         ~data);
 193
 194         sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data);
 195 }
 196
 197 static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
 198                                  const struct pinmux_cfg_reg **crp, int *fieldp,
 199                                  int *valuep)
 200 {
 201         const struct pinmux_cfg_reg *config_reg;
 202         unsigned long r_width, f_width, curr_width, ncomb;
 203         int k, m, n, pos, bit_pos;
 204
 205         k = 0;
 206         while (1) {
 207                 config_reg = pfc->info->cfg_regs + k;
 208
 209                 r_width = config_reg->reg_width;
 210                 f_width = config_reg->field_width;
 211
 212                 if (!r_width)
 213                         break;
 214
 215                 pos = 0;
 216                 m = 0;
 217                 for (bit_pos = 0; bit_pos < r_width; bit_pos += curr_width) {
 218                         if (f_width)
 219                                 curr_width = f_width;
 220                         else
 221                                 curr_width = config_reg->var_field_width[m];
 222
 223                         ncomb = 1 << curr_width;
 224                         for (n = 0; n < ncomb; n++) {
 225                                 if (config_reg->enum_ids[pos + n] == enum_id) {
 226                                         *crp = config_reg;
 227                                         *fieldp = m;
 228                                         *valuep = n;
 229                                         return 0;
 230                                 }
 231                         }
 232                         pos += ncomb;
 233                         m++;
 234                 }
 235                 k++;
 236         }
 237
 238         return -EINVAL;
 239 }
 240
 241 static int sh_pfc_mark_to_enum(struct sh_pfc *pfc, pinmux_enum_t mark, int pos,
 242                               pinmux_enum_t *enum_idp)
 243 {
 244         const pinmux_enum_t *data = pfc->info->gpio_data;
 245         int k;
 246
 247         if (pos) {
 248                 *enum_idp = data[pos + 1];
 249                 return pos + 1;
 250         }
 251
 252         for (k = 0; k < pfc->info->gpio_data_size; k++) {
 253                 if (data[k] == mark) {
 254                         *enum_idp = data[k + 1];
 255                         return k + 1;
 256                 }
 257         }
 258
 259         dev_err(pfc->dev, "cannot locate data/mark enum_id for mark %d\n",
 260                 mark);
 261         return -EINVAL;
 262 }
 263
 264 int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type)
 265 {
 266         const struct pinmux_cfg_reg *cr = NULL;
 267         pinmux_enum_t enum_id;
 268         const struct pinmux_range *range;
 269         int in_range, pos, field, value;
 270         int ret;
 271
 272         switch (pinmux_type) {
 273         case PINMUX_TYPE_GPIO:
 274         case PINMUX_TYPE_FUNCTION:
 275                 range = NULL;
 276                 break;
 277
 278         case PINMUX_TYPE_OUTPUT:
 279                 range = &pfc->info->output;
 280                 break;
 281
 282         case PINMUX_TYPE_INPUT:
 283                 range = &pfc->info->input;
 284                 break;
 285
 286         default:
 287                 return -EINVAL;
 288         }
 289
 290         pos = 0;
 291         enum_id = 0;
 292         field = 0;
 293         value = 0;
 294
 295         /* Iterate over all the configuration fields we need to update. */
 296         while (1) {
 297                 pos = sh_pfc_mark_to_enum(pfc, mark, pos, &enum_id);
 298                 if (pos < 0)
 299                         return pos;
 300
 301                 if (!enum_id)
 302                         break;
 303
 304                 /* Check if the configuration field selects a function. If it
 305                  * doesn't, skip the field if it's not applicable to the
 306                  * requested pinmux type.
 307                  */
 308                 in_range = sh_pfc_enum_in_range(enum_id, &pfc->info->function);
 309                 if (!in_range) {
 310                         if (pinmux_type == PINMUX_TYPE_FUNCTION) {
 311                                 /* Functions are allowed to modify all
 312                                  * fields.
 313                                  */
 314                                 in_range = 1;
 315                         } else if (pinmux_type != PINMUX_TYPE_GPIO) {
 316                                 /* Input/output types can only modify fields
 317                                  * that correspond to their respective ranges.
 318                                  */
 319                                 in_range = sh_pfc_enum_in_range(enum_id, range);
 320
 321                                 /*
 322                                  * special case pass through for fixed
 323                                  * input-only or output-only pins without
 324                                  * function enum register association.
 325                                  */
 326                                 if (in_range && enum_id == range->force)
 327                                         continue;
 328                         }
 329                         /* GPIOs are only allowed to modify function fields. */
 330                 }
 331
 332                 if (!in_range)
 333                         continue;
 334
 335                 ret = sh_pfc_get_config_reg(pfc, enum_id, &cr, &field, &value);
 336                 if (ret < 0)
 337                         return ret;
 338
 339                 sh_pfc_write_config_reg(pfc, cr, field, value);
 340         }
 341
 342         return 0;
 343 }
 344
 345 #ifdef CONFIG_OF
 346 static const struct of_device_id sh_pfc_of_table[] = {
 347 #ifdef CONFIG_PINCTRL_PFC_R8A73A4
 348         {
 349                 .compatible = "renesas,pfc-r8a73a4",
 350                 .data = &r8a73a4_pinmux_info,
 351         },
 352 #endif
 353 #ifdef CONFIG_PINCTRL_PFC_R8A7740
 354         {
 355                 .compatible = "renesas,pfc-r8a7740",
 356                 .data = &r8a7740_pinmux_info,
 357         },
 358 #endif
 359 #ifdef CONFIG_PINCTRL_PFC_R8A7778
 360         {
 361                 .compatible = "renesas,pfc-r8a7778",
 362                 .data = &r8a7778_pinmux_info,
 363         },
 364 #endif
 365 #ifdef CONFIG_PINCTRL_PFC_R8A7779
 366         {
 367                 .compatible = "renesas,pfc-r8a7779",
 368                 .data = &r8a7779_pinmux_info,
 369         },
 370 #endif
 371 #ifdef CONFIG_PINCTRL_PFC_R8A7790
 372         {
 373                 .compatible = "renesas,pfc-r8a7790",
 374                 .data = &r8a7790_pinmux_info,
 375         },
 376 #endif
 377 #ifdef CONFIG_PINCTRL_PFC_SH7372
 378         {
 379                 .compatible = "renesas,pfc-sh7372",
 380                 .data = &sh7372_pinmux_info,
 381         },
 382 #endif
 383 #ifdef CONFIG_PINCTRL_PFC_SH73A0
 384         {
 385                 .compatible = "renesas,pfc-sh73a0",
 386                 .data = &sh73a0_pinmux_info,
 387         },
 388 #endif
 389         { },
 390 };
 391 MODULE_DEVICE_TABLE(of, sh_pfc_of_table);
 392 #endif
 393
 394 static int sh_pfc_probe(struct platform_device *pdev)
 395 {
 396         const struct platform_device_id *platid = platform_get_device_id(pdev);
 397 #ifdef CONFIG_OF
 398         struct device_node *np = pdev->dev.of_node;
 399 #endif
 400         const struct sh_pfc_soc_info *info;
 401         struct sh_pfc *pfc;
 402         int ret;
 403
 404 #ifdef CONFIG_OF
 405         if (np)
 406                 info = of_match_device(sh_pfc_of_table, &pdev->dev)->data;
 407         else
 408 #endif
 409                 info = platid ? (const void *)platid->driver_data : NULL;
 410
 411         if (info == NULL)
 412                 return -ENODEV;
 413
 414         pfc = devm_kzalloc(&pdev->dev, sizeof(*pfc), GFP_KERNEL);
 415         if (pfc == NULL)
 416                 return -ENOMEM;
 417
 418         pfc->info = info;
 419         pfc->dev = &pdev->dev;
 420
 421         ret = sh_pfc_ioremap(pfc, pdev);
 422         if (unlikely(ret < 0))
 423                 return ret;
 424
 425         spin_lock_init(&pfc->lock);
 426
 427         if (info->ops && info->ops->init) {
 428                 ret = info->ops->init(pfc);
 429                 if (ret < 0)
 430                         return ret;
 431         }
 432
 433         pinctrl_provide_dummies();
 434
 435         /*
 436          * Initialize pinctrl bindings first
 437          */
 438         ret = sh_pfc_register_pinctrl(pfc);
 439         if (unlikely(ret != 0))
 440                 goto error;
 441
 442 #ifdef CONFIG_GPIO_SH_PFC
 443         /*
 444          * Then the GPIO chip
 445          */
 446         ret = sh_pfc_register_gpiochip(pfc);
 447         if (unlikely(ret != 0)) {
 448                 /*
 449                  * If the GPIO chip fails to come up we still leave the
 450                  * PFC state as it is, given that there are already
 451                  * extant users of it that have succeeded by this point.
 452                  */
 453                 dev_notice(pfc->dev, "failed to init GPIO chip, ignoring...\n");
 454         }
 455 #endif
 456
 457         platform_set_drvdata(pdev, pfc);
 458
 459         dev_info(pfc->dev, "%s support registered\n", info->name);
 460
 461         return 0;
 462
 463 error:
 464         if (info->ops && info->ops->exit)
 465                 info->ops->exit(pfc);
 466         return ret;
 467 }
 468
 469 static int sh_pfc_remove(struct platform_device *pdev)
 470 {
 471         struct sh_pfc *pfc = platform_get_drvdata(pdev);
 472
 473 #ifdef CONFIG_GPIO_SH_PFC
 474         sh_pfc_unregister_gpiochip(pfc);
 475 #endif
 476         sh_pfc_unregister_pinctrl(pfc);
 477
 478         if (pfc->info->ops && pfc->info->ops->exit)
 479                 pfc->info->ops->exit(pfc);
 480
 481         platform_set_drvdata(pdev, NULL);
 482
 483         return 0;
 484 }
 485
 486 static const struct platform_device_id sh_pfc_id_table[] = {
 487 #ifdef CONFIG_PINCTRL_PFC_R8A73A4
 488         { "pfc-r8a73a4", (kernel_ulong_t)&r8a73a4_pinmux_info },
 489 #endif
 490 #ifdef CONFIG_PINCTRL_PFC_R8A7740
 491         { "pfc-r8a7740", (kernel_ulong_t)&r8a7740_pinmux_info },
 492 #endif
 493 #ifdef CONFIG_PINCTRL_PFC_R8A7778
 494         { "pfc-r8a7778", (kernel_ulong_t)&r8a7778_pinmux_info },
 495 #endif
 496 #ifdef CONFIG_PINCTRL_PFC_R8A7779
 497         { "pfc-r8a7779", (kernel_ulong_t)&r8a7779_pinmux_info },
 498 #endif
 499 #ifdef CONFIG_PINCTRL_PFC_R8A7790
 500         { "pfc-r8a7790", (kernel_ulong_t)&r8a7790_pinmux_info },
 501 #endif
 502 #ifdef CONFIG_PINCTRL_PFC_SH7203
 503         { "pfc-sh7203", (kernel_ulong_t)&sh7203_pinmux_info },
 504 #endif
 505 #ifdef CONFIG_PINCTRL_PFC_SH7264
 506         { "pfc-sh7264", (kernel_ulong_t)&sh7264_pinmux_info },
 507 #endif
 508 #ifdef CONFIG_PINCTRL_PFC_SH7269
 509         { "pfc-sh7269", (kernel_ulong_t)&sh7269_pinmux_info },
 510 #endif
 511 #ifdef CONFIG_PINCTRL_PFC_SH7372
 512         { "pfc-sh7372", (kernel_ulong_t)&sh7372_pinmux_info },
 513 #endif
 514 #ifdef CONFIG_PINCTRL_PFC_SH73A0
 515         { "pfc-sh73a0", (kernel_ulong_t)&sh73a0_pinmux_info },
 516 #endif
 517 #ifdef CONFIG_PINCTRL_PFC_SH7720
 518         { "pfc-sh7720", (kernel_ulong_t)&sh7720_pinmux_info },
 519 #endif
 520 #ifdef CONFIG_PINCTRL_PFC_SH7722
 521         { "pfc-sh7722", (kernel_ulong_t)&sh7722_pinmux_info },
 522 #endif
 523 #ifdef CONFIG_PINCTRL_PFC_SH7723
 524         { "pfc-sh7723", (kernel_ulong_t)&sh7723_pinmux_info },
 525 #endif
 526 #ifdef CONFIG_PINCTRL_PFC_SH7724
 527         { "pfc-sh7724", (kernel_ulong_t)&sh7724_pinmux_info },
 528 #endif
 529 #ifdef CONFIG_PINCTRL_PFC_SH7734
 530         { "pfc-sh7734", (kernel_ulong_t)&sh7734_pinmux_info },
 531 #endif
 532 #ifdef CONFIG_PINCTRL_PFC_SH7757
 533         { "pfc-sh7757", (kernel_ulong_t)&sh7757_pinmux_info },
 534 #endif
 535 #ifdef CONFIG_PINCTRL_PFC_SH7785
 536         { "pfc-sh7785", (kernel_ulong_t)&sh7785_pinmux_info },
 537 #endif
 538 #ifdef CONFIG_PINCTRL_PFC_SH7786
 539         { "pfc-sh7786", (kernel_ulong_t)&sh7786_pinmux_info },
 540 #endif
 541 #ifdef CONFIG_PINCTRL_PFC_SHX3
 542         { "pfc-shx3", (kernel_ulong_t)&shx3_pinmux_info },
 543 #endif
 544         { "sh-pfc", 0 },
 545         { },
 546 };
 547 MODULE_DEVICE_TABLE(platform, sh_pfc_id_table);
 548
 549 static struct platform_driver sh_pfc_driver = {
 550         .probe          = sh_pfc_probe,
 551         .remove         = sh_pfc_remove,
 552         .id_table       = sh_pfc_id_table,
 553         .driver         = {
 554                 .name   = DRV_NAME,
 555                 .owner  = THIS_MODULE,
 556                 .of_match_table = of_match_ptr(sh_pfc_of_table),
 557         },
 558 };
 559
 560 static int __init sh_pfc_init(void)
 561 {
 562         return platform_driver_register(&sh_pfc_driver);
 563 }
 564 postcore_initcall(sh_pfc_init);
 565
 566 static void __exit sh_pfc_exit(void)
 567 {
 568         platform_driver_unregister(&sh_pfc_driver);
 569 }
 570 module_exit(sh_pfc_exit);
 571
 572 MODULE_AUTHOR("Magnus Damm, Paul Mundt, Laurent Pinchart");
 573 MODULE_DESCRIPTION("Pin Control and GPIO driver for SuperH pin function controller");
 574 MODULE_LICENSE("GPL v2");