drivers/pci/hotplug/cpqphp_pci.c

   1 /*
   2  * Compaq Hot Plug Controller Driver
   3  *
   4  * Copyright (C) 1995,2001 Compaq Computer Corporation
   5  * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
   6  * Copyright (C) 2001 IBM Corp.
   7  *
   8  * All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or (at
  13  * your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18  * NON INFRINGEMENT.  See the GNU General Public License for more
  19  * details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24  *
  25  * Send feedback to <greg@kroah.com>
  26  *
  27  */
  28
  29 #include <linux/module.h>
  30 #include <linux/kernel.h>
  31 #include <linux/types.h>
  32 #include <linux/slab.h>
  33 #include <linux/workqueue.h>
  34 #include <linux/proc_fs.h>
  35 #include <linux/pci.h>
  36 #include <linux/pci_hotplug.h>
  37 #include "../pci.h"
  38 #include "cpqphp.h"
  39 #include "cpqphp_nvram.h"
  40
  41
  42 u8 cpqhp_nic_irq;
  43 u8 cpqhp_disk_irq;
  44
  45 static u16 unused_IRQ;
  46
  47 /*
  48  * detect_HRT_floating_pointer
  49  *
  50  * find the Hot Plug Resource Table in the specified region of memory.
  51  *
  52  */
  53 static void __iomem *detect_HRT_floating_pointer(void __iomem *begin, void __iomem *end)
  54 {
  55         void __iomem *fp;
  56         void __iomem *endp;
  57         u8 temp1, temp2, temp3, temp4;
  58         int status = 0;
  59
  60         endp = (end - sizeof(struct hrt) + 1);
  61
  62         for (fp = begin; fp <= endp; fp += 16) {
  63                 temp1 = readb(fp + SIG0);
  64                 temp2 = readb(fp + SIG1);
  65                 temp3 = readb(fp + SIG2);
  66                 temp4 = readb(fp + SIG3);
  67                 if (temp1 == '$' &&
  68                     temp2 == 'H' &&
  69                     temp3 == 'R' &&
  70                     temp4 == 'T') {
  71                         status = 1;
  72                         break;
  73                 }
  74         }
  75
  76         if (!status)
  77                 fp = NULL;
  78
  79         dbg("Discovered Hotplug Resource Table at %p\n", fp);
  80         return fp;
  81 }
  82
  83
  84 int cpqhp_configure_device (struct controller* ctrl, struct pci_func* func)
  85 {
  86         unsigned char bus;
  87         struct pci_bus *child;
  88         int num;
  89
  90         if (func->pci_dev == NULL)
  91                 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
  92
  93         /* No pci device, we need to create it then */
  94         if (func->pci_dev == NULL) {
  95                 dbg("INFO: pci_dev still null\n");
  96
  97                 num = pci_scan_slot(ctrl->pci_dev->bus, PCI_DEVFN(func->device, func->function));
  98                 if (num)
  99                         pci_bus_add_devices(ctrl->pci_dev->bus);
 100
 101                 func->pci_dev = pci_find_slot(func->bus, PCI_DEVFN(func->device, func->function));
 102                 if (func->pci_dev == NULL) {
 103                         dbg("ERROR: pci_dev still null\n");
 104                         return 0;
 105                 }
 106         }
 107
 108         if (func->pci_dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
 109                 pci_read_config_byte(func->pci_dev, PCI_SECONDARY_BUS, &bus);
 110                 child = (struct pci_bus*) pci_add_new_bus(func->pci_dev->bus, (func->pci_dev), bus);
 111                 pci_do_scan_bus(child);
 112         }
 113
 114         return 0;
 115 }
 116
 117
 118 int cpqhp_unconfigure_device(struct pci_func* func)
 119 {
 120         int j;
 121
 122         dbg("%s: bus/dev/func = %x/%x/%x\n", __func__, func->bus, func->device, func->function);
 123
 124         for (j=0; j<8 ; j++) {
 125                 struct pci_dev* temp = pci_find_slot(func->bus, PCI_DEVFN(func->device, j));
 126                 if (temp)
 127                         pci_remove_bus_device(temp);
 128         }
 129         return 0;
 130 }
 131
 132 static int PCI_RefinedAccessConfig(struct pci_bus *bus, unsigned int devfn, u8 offset, u32 *value)
 133 {
 134         u32 vendID = 0;
 135
 136         if (pci_bus_read_config_dword (bus, devfn, PCI_VENDOR_ID, &vendID) == -1)
 137                 return -1;
 138         if (vendID == 0xffffffff)
 139                 return -1;
 140         return pci_bus_read_config_dword (bus, devfn, offset, value);
 141 }
 142
 143
 144 /*
 145  * cpqhp_set_irq
 146  *
 147  * @bus_num: bus number of PCI device
 148  * @dev_num: device number of PCI device
 149  * @slot: pointer to u8 where slot number will be returned
 150  */
 151 int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
 152 {
 153         int rc = 0;
 154
 155         if (cpqhp_legacy_mode) {
 156                 struct pci_dev *fakedev;
 157                 struct pci_bus *fakebus;
 158                 u16 temp_word;
 159
 160                 fakedev = kmalloc(sizeof(*fakedev), GFP_KERNEL);
 161                 fakebus = kmalloc(sizeof(*fakebus), GFP_KERNEL);
 162                 if (!fakedev || !fakebus) {
 163                         kfree(fakedev);
 164                         kfree(fakebus);
 165                         return -ENOMEM;
 166                 }
 167
 168                 fakedev->devfn = dev_num << 3;
 169                 fakedev->bus = fakebus;
 170                 fakebus->number = bus_num;
 171                 dbg("%s: dev %d, bus %d, pin %d, num %d\n",
 172                     __func__, dev_num, bus_num, int_pin, irq_num);
 173                 rc = pcibios_set_irq_routing(fakedev, int_pin - 1, irq_num);
 174                 kfree(fakedev);
 175                 kfree(fakebus);
 176                 dbg("%s: rc %d\n", __func__, rc);
 177                 if (!rc)
 178                         return !rc;
 179
 180                 /* set the Edge Level Control Register (ELCR) */
 181                 temp_word = inb(0x4d0);
 182                 temp_word |= inb(0x4d1) << 8;
 183
 184                 temp_word |= 0x01 << irq_num;
 185
 186                 /* This should only be for x86 as it sets the Edge Level
 187                  * Control Register
 188                  */
 189                 outb((u8) (temp_word & 0xFF), 0x4d0); outb((u8) ((temp_word &
 190                 0xFF00) >> 8), 0x4d1); rc = 0; }
 191
 192         return rc;
 193 }
 194
 195
 196 static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev_num)
 197 {
 198         u16 tdevice;
 199         u32 work;
 200         u8 tbus;
 201
 202         ctrl->pci_bus->number = bus_num;
 203
 204         for (tdevice = 0; tdevice < 0xFF; tdevice++) {
 205                 /* Scan for access first */
 206                 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
 207                         continue;
 208                 dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice);
 209                 /* Yep we got one. Not a bridge ? */
 210                 if ((work >> 8) != PCI_TO_PCI_BRIDGE_CLASS) {
 211                         *dev_num = tdevice;
 212                         dbg("found it !\n");
 213                         return 0;
 214                 }
 215         }
 216         for (tdevice = 0; tdevice < 0xFF; tdevice++) {
 217                 /* Scan for access first */
 218                 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
 219                         continue;
 220                 dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice);
 221                 /* Yep we got one. bridge ? */
 222                 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
 223                         pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(tdevice, 0), PCI_SECONDARY_BUS, &tbus);
 224                         /* XXX: no recursion, wtf? */
 225                         dbg("Recurse on bus_num %d tdevice %d\n", tbus, tdevice);
 226                         return 0;
 227                 }
 228         }
 229
 230         return -1;
 231 }
 232
 233
 234 static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num, u8 slot, u8 nobridge)
 235 {
 236         int loop, len;
 237         u32 work;
 238         u8 tbus, tdevice, tslot;
 239
 240         len = cpqhp_routing_table_length();
 241         for (loop = 0; loop < len; ++loop) {
 242                 tbus = cpqhp_routing_table->slots[loop].bus;
 243                 tdevice = cpqhp_routing_table->slots[loop].devfn;
 244                 tslot = cpqhp_routing_table->slots[loop].slot;
 245
 246                 if (tslot == slot) {
 247                         *bus_num = tbus;
 248                         *dev_num = tdevice;
 249                         ctrl->pci_bus->number = tbus;
 250                         pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_VENDOR_ID, &work);
 251                         if (!nobridge || (work == 0xffffffff))
 252                                 return 0;
 253
 254                         dbg("bus_num %d devfn %d\n", *bus_num, *dev_num);
 255                         pci_bus_read_config_dword (ctrl->pci_bus, *dev_num, PCI_CLASS_REVISION, &work);
 256                         dbg("work >> 8 (%x) = BRIDGE (%x)\n", work >> 8, PCI_TO_PCI_BRIDGE_CLASS);
 257
 258                         if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
 259                                 pci_bus_read_config_byte (ctrl->pci_bus, *dev_num, PCI_SECONDARY_BUS, &tbus);
 260                                 dbg("Scan bus for Non Bridge: bus %d\n", tbus);
 261                                 if (PCI_ScanBusForNonBridge(ctrl, tbus, dev_num) == 0) {
 262                                         *bus_num = tbus;
 263                                         return 0;
 264                                 }
 265                         } else
 266                                 return 0;
 267                 }
 268         }
 269         return -1;
 270 }
 271
 272
 273 int cpqhp_get_bus_dev (struct controller *ctrl, u8 * bus_num, u8 * dev_num, u8 slot)
 274 {
 275         /* plain (bridges allowed) */
 276         return PCI_GetBusDevHelper(ctrl, bus_num, dev_num, slot, 0);
 277 }
 278
 279
 280 /* More PCI configuration routines; this time centered around hotplug
 281  * controller
 282  */
 283
 284
 285 /*
 286  * cpqhp_save_config
 287  *
 288  * Reads configuration for all slots in a PCI bus and saves info.
 289  *
 290  * Note:  For non-hot plug busses, the slot # saved is the device #
 291  *
 292  * returns 0 if success
 293  */
 294 int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
 295 {
 296         long rc;
 297         u8 class_code;
 298         u8 header_type;
 299         u32 ID;
 300         u8 secondary_bus;
 301         struct pci_func *new_slot;
 302         int sub_bus;
 303         int FirstSupported;
 304         int LastSupported;
 305         int max_functions;
 306         int function;
 307         u8 DevError;
 308         int device = 0;
 309         int cloop = 0;
 310         int stop_it;
 311         int index;
 312
 313         /* Decide which slots are supported */
 314
 315         if (is_hot_plug) {
 316                 /*
 317                  * is_hot_plug is the slot mask
 318                  */
 319                 FirstSupported = is_hot_plug >> 4;
 320                 LastSupported = FirstSupported + (is_hot_plug & 0x0F) - 1;
 321         } else {
 322                 FirstSupported = 0;
 323                 LastSupported = 0x1F;
 324         }
 325
 326         /* Save PCI configuration space for all devices in supported slots */
 327         ctrl->pci_bus->number = busnumber;
 328         for (device = FirstSupported; device <= LastSupported; device++) {
 329                 ID = 0xFFFFFFFF;
 330                 rc = pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
 331
 332                 if (ID == 0xFFFFFFFF) {
 333                         if (is_hot_plug) {
 334                                 /* Setup slot structure with entry for empty
 335                                  * slot
 336                                  */
 337                                 new_slot = cpqhp_slot_create(busnumber);
 338                                 if (new_slot == NULL)
 339                                         return 1;
 340
 341                                 new_slot->bus = (u8) busnumber;
 342                                 new_slot->device = (u8) device;
 343                                 new_slot->function = 0;
 344                                 new_slot->is_a_board = 0;
 345                                 new_slot->presence_save = 0;
 346                                 new_slot->switch_save = 0;
 347                         }
 348                         continue;
 349                 }
 350
 351                 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(device, 0), 0x0B, &class_code);
 352                 if (rc)
 353                         return rc;
 354
 355                 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_HEADER_TYPE, &header_type);
 356                 if (rc)
 357                         return rc;
 358
 359                 /* If multi-function device, set max_functions to 8 */
 360                 if (header_type & 0x80)
 361                         max_functions = 8;
 362                 else
 363                         max_functions = 1;
 364
 365                 function = 0;
 366
 367                 do {
 368                         DevError = 0;
 369                         if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
 370                                 /* Recurse the subordinate bus
 371                                  * get the subordinate bus number
 372                                  */
 373                                 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(device, function), PCI_SECONDARY_BUS, &secondary_bus);
 374                                 if (rc) {
 375                                         return rc;
 376                                 } else {
 377                                         sub_bus = (int) secondary_bus;
 378
 379                                         /* Save secondary bus cfg spc
 380                                          * with this recursive call.
 381                                          */
 382                                         rc = cpqhp_save_config(ctrl, sub_bus, 0);
 383                                         if (rc)
 384                                                 return rc;
 385                                         ctrl->pci_bus->number = busnumber;
 386                                 }
 387                         }
 388
 389                         index = 0;
 390                         new_slot = cpqhp_slot_find(busnumber, device, index++);
 391                         while (new_slot &&
 392                                (new_slot->function != (u8) function))
 393                                 new_slot = cpqhp_slot_find(busnumber, device, index++);
 394
 395                         if (!new_slot) {
 396                                 /* Setup slot structure. */
 397                                 new_slot = cpqhp_slot_create(busnumber);
 398                                 if (new_slot == NULL)
 399                                         return 1;
 400                         }
 401
 402                         new_slot->bus = (u8) busnumber;
 403                         new_slot->device = (u8) device;
 404                         new_slot->function = (u8) function;
 405                         new_slot->is_a_board = 1;
 406                         new_slot->switch_save = 0x10;
 407                         /* In case of unsupported board */
 408                         new_slot->status = DevError;
 409                         new_slot->pci_dev = pci_find_slot(new_slot->bus, (new_slot->device << 3) | new_slot->function);
 410
 411                         for (cloop = 0; cloop < 0x20; cloop++) {
 412                                 rc = pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop]));
 413                                 if (rc)
 414                                         return rc;
 415                         }
 416
 417                         function++;
 418
 419                         stop_it = 0;
 420
 421                         /* this loop skips to the next present function
 422                          * reading in Class Code and Header type.
 423                          */
 424                         while ((function < max_functions) && (!stop_it)) {
 425                                 rc = pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(device, function), PCI_VENDOR_ID, &ID);
 426                                 if (ID == 0xFFFFFFFF) {
 427                                         function++;
 428                                         continue;
 429                                 }
 430                                 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(device, function), 0x0B, &class_code);
 431                                 if (rc)
 432                                         return rc;
 433
 434                                 rc = pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(device, function), PCI_HEADER_TYPE, &header_type);
 435                                 if (rc)
 436                                         return rc;
 437
 438                                 stop_it++;
 439                         }
 440
 441                 } while (function < max_functions);
 442         }                       /* End of FOR loop */
 443
 444         return 0;
 445 }
 446
 447
 448 /*
 449  * cpqhp_save_slot_config
 450  *
 451  * Saves configuration info for all PCI devices in a given slot
 452  * including subordinate busses.
 453  *
 454  * returns 0 if success
 455  */
 456 int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
 457 {
 458         long rc;
 459         u8 class_code;
 460         u8 header_type;
 461         u32 ID;
 462         u8 secondary_bus;
 463         int sub_bus;
 464         int max_functions;
 465         int function = 0;
 466         int cloop = 0;
 467         int stop_it;
 468
 469         ID = 0xFFFFFFFF;
 470
 471         ctrl->pci_bus->number = new_slot->bus;
 472         pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_VENDOR_ID, &ID);
 473
 474         if (ID == 0xFFFFFFFF)
 475                 return 2;
 476
 477         pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code);
 478         pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type);
 479
 480         if (header_type & 0x80) /* Multi-function device */
 481                 max_functions = 8;
 482         else
 483                 max_functions = 1;
 484
 485         while (function < max_functions) {
 486                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
 487                         /*  Recurse the subordinate bus */
 488                         pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, &secondary_bus);
 489
 490                         sub_bus = (int) secondary_bus;
 491
 492                         /* Save the config headers for the secondary
 493                          * bus.
 494                          */
 495                         rc = cpqhp_save_config(ctrl, sub_bus, 0);
 496                         if (rc)
 497                                 return(rc);
 498                         ctrl->pci_bus->number = new_slot->bus;
 499
 500                 }
 501
 502                 new_slot->status = 0;
 503
 504                 for (cloop = 0; cloop < 0x20; cloop++)
 505                         pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), cloop << 2, (u32 *) & (new_slot-> config_space [cloop]));
 506
 507                 function++;
 508
 509                 stop_it = 0;
 510
 511                 /* this loop skips to the next present function
 512                  * reading in the Class Code and the Header type.
 513                  */
 514                 while ((function < max_functions) && (!stop_it)) {
 515                         pci_bus_read_config_dword(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_VENDOR_ID, &ID);
 516
 517                         if (ID == 0xFFFFFFFF)
 518                                 function++;
 519                         else {
 520                                 pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), 0x0B, &class_code);
 521                                 pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_HEADER_TYPE, &header_type);
 522                                 stop_it++;
 523                         }
 524                 }
 525
 526         }
 527
 528         return 0;
 529 }
 530
 531
 532 /*
 533  * cpqhp_save_base_addr_length
 534  *
 535  * Saves the length of all base address registers for the
 536  * specified slot.  this is for hot plug REPLACE
 537  *
 538  * returns 0 if success
 539  */
 540 int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
 541 {
 542         u8 cloop;
 543         u8 header_type;
 544         u8 secondary_bus;
 545         u8 type;
 546         int sub_bus;
 547         u32 temp_register;
 548         u32 base;
 549         u32 rc;
 550         struct pci_func *next;
 551         int index = 0;
 552         struct pci_bus *pci_bus = ctrl->pci_bus;
 553         unsigned int devfn;
 554
 555         func = cpqhp_slot_find(func->bus, func->device, index++);
 556
 557         while (func != NULL) {
 558                 pci_bus->number = func->bus;
 559                 devfn = PCI_DEVFN(func->device, func->function);
 560
 561                 /* Check for Bridge */
 562                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 563
 564                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
 565                         pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 566
 567                         sub_bus = (int) secondary_bus;
 568
 569                         next = cpqhp_slot_list[sub_bus];
 570
 571                         while (next != NULL) {
 572                                 rc = cpqhp_save_base_addr_length(ctrl, next);
 573                                 if (rc)
 574                                         return rc;
 575
 576                                 next = next->next;
 577                         }
 578                         pci_bus->number = func->bus;
 579
 580                         /* FIXME: this loop is duplicated in the non-bridge
 581                          * case.  The two could be rolled together Figure out
 582                          * IO and memory base lengths
 583                          */
 584                         for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
 585                                 temp_register = 0xFFFFFFFF;
 586                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
 587                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
 588                                 /* If this register is implemented */
 589                                 if (base) {
 590                                         if (base & 0x01L) {
 591                                                 /* IO base
 592                                                  * set base = amount of IO space
 593                                                  * requested
 594                                                  */
 595                                                 base = base & 0xFFFFFFFE;
 596                                                 base = (~base) + 1;
 597
 598                                                 type = 1;
 599                                         } else {
 600                                                 /* memory base */
 601                                                 base = base & 0xFFFFFFF0;
 602                                                 base = (~base) + 1;
 603
 604                                                 type = 0;
 605                                         }
 606                                 } else {
 607                                         base = 0x0L;
 608                                         type = 0;
 609                                 }
 610
 611                                 /* Save information in slot structure */
 612                                 func->base_length[(cloop - 0x10) >> 2] =
 613                                 base;
 614                                 func->base_type[(cloop - 0x10) >> 2] = type;
 615
 616                         }       /* End of base register loop */
 617
 618                 } else if ((header_type & 0x7F) == 0x00) {
 619                         /* Figure out IO and memory base lengths */
 620                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
 621                                 temp_register = 0xFFFFFFFF;
 622                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
 623                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
 624
 625                                 /* If this register is implemented */
 626                                 if (base) {
 627                                         if (base & 0x01L) {
 628                                                 /* IO base
 629                                                  * base = amount of IO space
 630                                                  * requested
 631                                                  */
 632                                                 base = base & 0xFFFFFFFE;
 633                                                 base = (~base) + 1;
 634
 635                                                 type = 1;
 636                                         } else {
 637                                                 /* memory base
 638                                                  * base = amount of memory
 639                                                  * space requested
 640                                                  */
 641                                                 base = base & 0xFFFFFFF0;
 642                                                 base = (~base) + 1;
 643
 644                                                 type = 0;
 645                                         }
 646                                 } else {
 647                                         base = 0x0L;
 648                                         type = 0;
 649                                 }
 650
 651                                 /* Save information in slot structure */
 652                                 func->base_length[(cloop - 0x10) >> 2] = base;
 653                                 func->base_type[(cloop - 0x10) >> 2] = type;
 654
 655                         }       /* End of base register loop */
 656
 657                 } else {          /* Some other unknown header type */
 658                 }
 659
 660                 /* find the next device in this slot */
 661                 func = cpqhp_slot_find(func->bus, func->device, index++);
 662         }
 663
 664         return(0);
 665 }
 666
 667
 668 /*
 669  * cpqhp_save_used_resources
 670  *
 671  * Stores used resource information for existing boards.  this is
 672  * for boards that were in the system when this driver was loaded.
 673  * this function is for hot plug ADD
 674  *
 675  * returns 0 if success
 676  */
 677 int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
 678 {
 679         u8 cloop;
 680         u8 header_type;
 681         u8 secondary_bus;
 682         u8 temp_byte;
 683         u8 b_base;
 684         u8 b_length;
 685         u16 command;
 686         u16 save_command;
 687         u16 w_base;
 688         u16 w_length;
 689         u32 temp_register;
 690         u32 save_base;
 691         u32 base;
 692         int index = 0;
 693         struct pci_resource *mem_node;
 694         struct pci_resource *p_mem_node;
 695         struct pci_resource *io_node;
 696         struct pci_resource *bus_node;
 697         struct pci_bus *pci_bus = ctrl->pci_bus;
 698         unsigned int devfn;
 699
 700         func = cpqhp_slot_find(func->bus, func->device, index++);
 701
 702         while ((func != NULL) && func->is_a_board) {
 703                 pci_bus->number = func->bus;
 704                 devfn = PCI_DEVFN(func->device, func->function);
 705
 706                 /* Save the command register */
 707                 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
 708
 709                 /* disable card */
 710                 command = 0x00;
 711                 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
 712
 713                 /* Check for Bridge */
 714                 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 715
 716                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
 717                         /* Clear Bridge Control Register */
 718                         command = 0x00;
 719                         pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
 720                         pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 721                         pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte);
 722
 723                         bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
 724                         if (!bus_node)
 725                                 return -ENOMEM;
 726
 727                         bus_node->base = secondary_bus;
 728                         bus_node->length = temp_byte - secondary_bus + 1;
 729
 730                         bus_node->next = func->bus_head;
 731                         func->bus_head = bus_node;
 732
 733                         /* Save IO base and Limit registers */
 734                         pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &b_base);
 735                         pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &b_length);
 736
 737                         if ((b_base <= b_length) && (save_command & 0x01)) {
 738                                 io_node = kmalloc(sizeof(*io_node), GFP_KERNEL);
 739                                 if (!io_node)
 740                                         return -ENOMEM;
 741
 742                                 io_node->base = (b_base & 0xF0) << 8;
 743                                 io_node->length = (b_length - b_base + 0x10) << 8;
 744
 745                                 io_node->next = func->io_head;
 746                                 func->io_head = io_node;
 747                         }
 748
 749                         /* Save memory base and Limit registers */
 750                         pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
 751                         pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
 752
 753                         if ((w_base <= w_length) && (save_command & 0x02)) {
 754                                 mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
 755                                 if (!mem_node)
 756                                         return -ENOMEM;
 757
 758                                 mem_node->base = w_base << 16;
 759                                 mem_node->length = (w_length - w_base + 0x10) << 16;
 760
 761                                 mem_node->next = func->mem_head;
 762                                 func->mem_head = mem_node;
 763                         }
 764
 765                         /* Save prefetchable memory base and Limit registers */
 766                         pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
 767                         pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
 768
 769                         if ((w_base <= w_length) && (save_command & 0x02)) {
 770                                 p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
 771                                 if (!p_mem_node)
 772                                         return -ENOMEM;
 773
 774                                 p_mem_node->base = w_base << 16;
 775                                 p_mem_node->length = (w_length - w_base + 0x10) << 16;
 776
 777                                 p_mem_node->next = func->p_mem_head;
 778                                 func->p_mem_head = p_mem_node;
 779                         }
 780                         /* Figure out IO and memory base lengths */
 781                         for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
 782                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &save_base);
 783
 784                                 temp_register = 0xFFFFFFFF;
 785                                 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
 786                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
 787
 788                                 temp_register = base;
 789
 790                                 /* If this register is implemented */
 791                                 if (base) {
 792                                         if (((base & 0x03L) == 0x01)
 793                                             && (save_command & 0x01)) {
 794                                                 /* IO base
 795                                                  * set temp_register = amount
 796                                                  * of IO space requested
 797                                                  */
 798                                                 temp_register = base & 0xFFFFFFFE;
 799                                                 temp_register = (~temp_register) + 1;
 800
 801                                                 io_node = kmalloc(sizeof(*io_node),
 802                                                                 GFP_KERNEL);
 803                                                 if (!io_node)
 804                                                         return -ENOMEM;
 805
 806                                                 io_node->base =
 807                                                 save_base & (~0x03L);
 808                                                 io_node->length = temp_register;
 809
 810                                                 io_node->next = func->io_head;
 811                                                 func->io_head = io_node;
 812                                         } else
 813                                                 if (((base & 0x0BL) == 0x08)
 814                                                     && (save_command & 0x02)) {
 815                                                 /* prefetchable memory base */
 816                                                 temp_register = base & 0xFFFFFFF0;
 817                                                 temp_register = (~temp_register) + 1;
 818
 819                                                 p_mem_node = kmalloc(sizeof(*p_mem_node),
 820                                                                 GFP_KERNEL);
 821                                                 if (!p_mem_node)
 822                                                         return -ENOMEM;
 823
 824                                                 p_mem_node->base = save_base & (~0x0FL);
 825                                                 p_mem_node->length = temp_register;
 826
 827                                                 p_mem_node->next = func->p_mem_head;
 828                                                 func->p_mem_head = p_mem_node;
 829                                         } else
 830                                                 if (((base & 0x0BL) == 0x00)
 831                                                     && (save_command & 0x02)) {
 832                                                 /* prefetchable memory base */
 833                                                 temp_register = base & 0xFFFFFFF0;
 834                                                 temp_register = (~temp_register) + 1;
 835
 836                                                 mem_node = kmalloc(sizeof(*mem_node),
 837                                                                 GFP_KERNEL);
 838                                                 if (!mem_node)
 839                                                         return -ENOMEM;
 840
 841                                                 mem_node->base = save_base & (~0x0FL);
 842                                                 mem_node->length = temp_register;
 843
 844                                                 mem_node->next = func->mem_head;
 845                                                 func->mem_head = mem_node;
 846                                         } else
 847                                                 return(1);
 848                                 }
 849                         }       /* End of base register loop */
 850                 /* Standard header */
 851                 } else if ((header_type & 0x7F) == 0x00) {
 852                         /* Figure out IO and memory base lengths */
 853                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
 854                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
 855
 856                                 temp_register = 0xFFFFFFFF;
 857                                 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register);
 858                                 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base);
 859
 860                                 temp_register = base;
 861
 862                                 /* If this register is implemented */
 863                                 if (base) {
 864                                         if (((base & 0x03L) == 0x01)
 865                                             && (save_command & 0x01)) {
 866                                                 /* IO base
 867                                                  * set temp_register = amount
 868                                                  * of IO space requested
 869                                                  */
 870                                                 temp_register = base & 0xFFFFFFFE;
 871                                                 temp_register = (~temp_register) + 1;
 872
 873                                                 io_node = kmalloc(sizeof(*io_node),
 874                                                                 GFP_KERNEL);
 875                                                 if (!io_node)
 876                                                         return -ENOMEM;
 877
 878                                                 io_node->base = save_base & (~0x01L);
 879                                                 io_node->length = temp_register;
 880
 881                                                 io_node->next = func->io_head;
 882                                                 func->io_head = io_node;
 883                                         } else
 884                                                 if (((base & 0x0BL) == 0x08)
 885                                                     && (save_command & 0x02)) {
 886                                                 /* prefetchable memory base */
 887                                                 temp_register = base & 0xFFFFFFF0;
 888                                                 temp_register = (~temp_register) + 1;
 889
 890                                                 p_mem_node = kmalloc(sizeof(*p_mem_node),
 891                                                                 GFP_KERNEL);
 892                                                 if (!p_mem_node)
 893                                                         return -ENOMEM;
 894
 895                                                 p_mem_node->base = save_base & (~0x0FL);
 896                                                 p_mem_node->length = temp_register;
 897
 898                                                 p_mem_node->next = func->p_mem_head;
 899                                                 func->p_mem_head = p_mem_node;
 900                                         } else
 901                                                 if (((base & 0x0BL) == 0x00)
 902                                                     && (save_command & 0x02)) {
 903                                                 /* prefetchable memory base */
 904                                                 temp_register = base & 0xFFFFFFF0;
 905                                                 temp_register = (~temp_register) + 1;
 906
 907                                                 mem_node = kmalloc(sizeof(*mem_node),
 908                                                                 GFP_KERNEL);
 909                                                 if (!mem_node)
 910                                                         return -ENOMEM;
 911
 912                                                 mem_node->base = save_base & (~0x0FL);
 913                                                 mem_node->length = temp_register;
 914
 915                                                 mem_node->next = func->mem_head;
 916                                                 func->mem_head = mem_node;
 917                                         } else
 918                                                 return(1);
 919                                 }
 920                         }       /* End of base register loop */
 921                 }
 922
 923                 /* find the next device in this slot */
 924                 func = cpqhp_slot_find(func->bus, func->device, index++);
 925         }
 926
 927         return 0;
 928 }
 929
 930
 931 /*
 932  * cpqhp_configure_board
 933  *
 934  * Copies saved configuration information to one slot.
 935  * this is called recursively for bridge devices.
 936  * this is for hot plug REPLACE!
 937  *
 938  * returns 0 if success
 939  */
 940 int cpqhp_configure_board(struct controller *ctrl, struct pci_func * func)
 941 {
 942         int cloop;
 943         u8 header_type;
 944         u8 secondary_bus;
 945         int sub_bus;
 946         struct pci_func *next;
 947         u32 temp;
 948         u32 rc;
 949         int index = 0;
 950         struct pci_bus *pci_bus = ctrl->pci_bus;
 951         unsigned int devfn;
 952
 953         func = cpqhp_slot_find(func->bus, func->device, index++);
 954
 955         while (func != NULL) {
 956                 pci_bus->number = func->bus;
 957                 devfn = PCI_DEVFN(func->device, func->function);
 958
 959                 /* Start at the top of config space so that the control
 960                  * registers are programmed last
 961                  */
 962                 for (cloop = 0x3C; cloop > 0; cloop -= 4)
 963                         pci_bus_write_config_dword (pci_bus, devfn, cloop, func->config_space[cloop >> 2]);
 964
 965                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 966
 967                 /* If this is a bridge device, restore subordinate devices */
 968                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
 969                         pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 970
 971                         sub_bus = (int) secondary_bus;
 972
 973                         next = cpqhp_slot_list[sub_bus];
 974
 975                         while (next != NULL) {
 976                                 rc = cpqhp_configure_board(ctrl, next);
 977                                 if (rc)
 978                                         return rc;
 979
 980                                 next = next->next;
 981                         }
 982                 } else {
 983
 984                         /* Check all the base Address Registers to make sure
 985                          * they are the same.  If not, the board is different.
 986                          */
 987
 988                         for (cloop = 16; cloop < 40; cloop += 4) {
 989                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp);
 990
 991                                 if (temp != func->config_space[cloop >> 2]) {
 992                                         dbg("Config space compare failure!!! offset = %x\n", cloop);
 993                                         dbg("bus = %x, device = %x, function = %x\n", func->bus, func->device, func->function);
 994                                         dbg("temp = %x, config space = %x\n\n", temp, func->config_space[cloop >> 2]);
 995                                         return 1;
 996                                 }
 997                         }
 998                 }
 999
1000                 func->configured = 1;
1001
1002                 func = cpqhp_slot_find(func->bus, func->device, index++);
1003         }
1004
1005         return 0;
1006 }
1007
1008
1009 /*
1010  * cpqhp_valid_replace
1011  *
1012  * this function checks to see if a board is the same as the
1013  * one it is replacing.  this check will detect if the device's
1014  * vendor or device id's are the same
1015  *
1016  * returns 0 if the board is the same nonzero otherwise
1017  */
1018 int cpqhp_valid_replace(struct controller *ctrl, struct pci_func * func)
1019 {
1020         u8 cloop;
1021         u8 header_type;
1022         u8 secondary_bus;
1023         u8 type;
1024         u32 temp_register = 0;
1025         u32 base;
1026         u32 rc;
1027         struct pci_func *next;
1028         int index = 0;
1029         struct pci_bus *pci_bus = ctrl->pci_bus;
1030         unsigned int devfn;
1031
1032         if (!func->is_a_board)
1033                 return(ADD_NOT_SUPPORTED);
1034
1035         func = cpqhp_slot_find(func->bus, func->device, index++);
1036
1037         while (func != NULL) {
1038                 pci_bus->number = func->bus;
1039                 devfn = PCI_DEVFN(func->device, func->function);
1040
1041                 pci_bus_read_config_dword (pci_bus, devfn, PCI_VENDOR_ID, &temp_register);
1042
1043                 /* No adapter present */
1044                 if (temp_register == 0xFFFFFFFF)
1045                         return(NO_ADAPTER_PRESENT);
1046
1047                 if (temp_register != func->config_space[0])
1048                         return(ADAPTER_NOT_SAME);
1049
1050                 /* Check for same revision number and class code */
1051                 pci_bus_read_config_dword (pci_bus, devfn, PCI_CLASS_REVISION, &temp_register);
1052
1053                 /* Adapter not the same */
1054                 if (temp_register != func->config_space[0x08 >> 2])
1055                         return(ADAPTER_NOT_SAME);
1056
1057                 /* Check for Bridge */
1058                 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
1059
1060                 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
1061                         /* In order to continue checking, we must program the
1062                          * bus registers in the bridge to respond to accesses
1063                          * for its subordinate bus(es)
1064                          */
1065
1066                         temp_register = func->config_space[0x18 >> 2];
1067                         pci_bus_write_config_dword (pci_bus, devfn, PCI_PRIMARY_BUS, temp_register);
1068
1069                         secondary_bus = (temp_register >> 8) & 0xFF;
1070
1071                         next = cpqhp_slot_list[secondary_bus];
1072
1073                         while (next != NULL) {
1074                                 rc = cpqhp_valid_replace(ctrl, next);
1075                                 if (rc)
1076                                         return rc;
1077
1078                                 next = next->next;
1079                         }
1080
1081                 }
1082                 /* Check to see if it is a standard config header */
1083                 else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
1084                         /* Check subsystem vendor and ID */
1085                         pci_bus_read_config_dword (pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register);
1086
1087                         if (temp_register != func->config_space[0x2C >> 2]) {
1088                                 /* If it's a SMART-2 and the register isn't
1089                                  * filled in, ignore the difference because
1090                                  * they just have an old rev of the firmware
1091                                  */
1092                                 if (!((func->config_space[0] == 0xAE100E11)
1093                                       && (temp_register == 0x00L)))
1094                                         return(ADAPTER_NOT_SAME);
1095                         }
1096                         /* Figure out IO and memory base lengths */
1097                         for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
1098                                 temp_register = 0xFFFFFFFF;
1099                                 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
1100                                 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
1101
1102                                 /* If this register is implemented */
1103                                 if (base) {
1104                                         if (base & 0x01L) {
1105                                                 /* IO base
1106                                                  * set base = amount of IO
1107                                                  * space requested
1108                                                  */
1109                                                 base = base & 0xFFFFFFFE;
1110                                                 base = (~base) + 1;
1111
1112                                                 type = 1;
1113                                         } else {
1114                                                 /* memory base */
1115                                                 base = base & 0xFFFFFFF0;
1116                                                 base = (~base) + 1;
1117
1118                                                 type = 0;
1119                                         }
1120                                 } else {
1121                                         base = 0x0L;
1122                                         type = 0;
1123                                 }
1124
1125                                 /* Check information in slot structure */
1126                                 if (func->base_length[(cloop - 0x10) >> 2] != base)
1127                                         return(ADAPTER_NOT_SAME);
1128
1129                                 if (func->base_type[(cloop - 0x10) >> 2] != type)
1130                                         return(ADAPTER_NOT_SAME);
1131
1132                         }       /* End of base register loop */
1133
1134                 }               /* End of (type 0 config space) else */
1135                 else {
1136                         /* this is not a type 0 or 1 config space header so
1137                          * we don't know how to do it
1138                          */
1139                         return(DEVICE_TYPE_NOT_SUPPORTED);
1140                 }
1141
1142                 /* Get the next function */
1143                 func = cpqhp_slot_find(func->bus, func->device, index++);
1144         }
1145
1146
1147         return 0;
1148 }
1149
1150
1151 /*
1152  * cpqhp_find_available_resources
1153  *
1154  * Finds available memory, IO, and IRQ resources for programming
1155  * devices which may be added to the system
1156  * this function is for hot plug ADD!
1157  *
1158  * returns 0 if success
1159  */
1160 int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_start)
1161 {
1162         u8 temp;
1163         u8 populated_slot;
1164         u8 bridged_slot;
1165         void __iomem *one_slot;
1166         void __iomem *rom_resource_table;
1167         struct pci_func *func = NULL;
1168         int i = 10, index;
1169         u32 temp_dword, rc;
1170         struct pci_resource *mem_node;
1171         struct pci_resource *p_mem_node;
1172         struct pci_resource *io_node;
1173         struct pci_resource *bus_node;
1174
1175         rom_resource_table = detect_HRT_floating_pointer(rom_start, rom_start+0xffff);
1176         dbg("rom_resource_table = %p\n", rom_resource_table);
1177
1178         if (rom_resource_table == NULL)
1179                 return -ENODEV;
1180
1181         /* Sum all resources and setup resource maps */
1182         unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
1183         dbg("unused_IRQ = %x\n", unused_IRQ);
1184
1185         temp = 0;
1186         while (unused_IRQ) {
1187                 if (unused_IRQ & 1) {
1188                         cpqhp_disk_irq = temp;
1189                         break;
1190                 }
1191                 unused_IRQ = unused_IRQ >> 1;
1192                 temp++;
1193         }
1194
1195         dbg("cpqhp_disk_irq= %d\n", cpqhp_disk_irq);
1196         unused_IRQ = unused_IRQ >> 1;
1197         temp++;
1198
1199         while (unused_IRQ) {
1200                 if (unused_IRQ & 1) {
1201                         cpqhp_nic_irq = temp;
1202                         break;
1203                 }
1204                 unused_IRQ = unused_IRQ >> 1;
1205                 temp++;
1206         }
1207
1208         dbg("cpqhp_nic_irq= %d\n", cpqhp_nic_irq);
1209         unused_IRQ = readl(rom_resource_table + PCIIRQ);
1210
1211         temp = 0;
1212
1213         if (!cpqhp_nic_irq)
1214                 cpqhp_nic_irq = ctrl->cfgspc_irq;
1215
1216         if (!cpqhp_disk_irq)
1217                 cpqhp_disk_irq = ctrl->cfgspc_irq;
1218
1219         dbg("cpqhp_disk_irq, cpqhp_nic_irq= %d, %d\n", cpqhp_disk_irq, cpqhp_nic_irq);
1220
1221         rc = compaq_nvram_load(rom_start, ctrl);
1222         if (rc)
1223                 return rc;
1224
1225         one_slot = rom_resource_table + sizeof (struct hrt);
1226
1227         i = readb(rom_resource_table + NUMBER_OF_ENTRIES);
1228         dbg("number_of_entries = %d\n", i);
1229
1230         if (!readb(one_slot + SECONDARY_BUS))
1231                 return 1;
1232
1233         dbg("dev|IO base|length|Mem base|length|Pre base|length|PB SB MB\n");
1234
1235         while (i && readb(one_slot + SECONDARY_BUS)) {
1236                 u8 dev_func = readb(one_slot + DEV_FUNC);
1237                 u8 primary_bus = readb(one_slot + PRIMARY_BUS);
1238                 u8 secondary_bus = readb(one_slot + SECONDARY_BUS);
1239                 u8 max_bus = readb(one_slot + MAX_BUS);
1240                 u16 io_base = readw(one_slot + IO_BASE);
1241                 u16 io_length = readw(one_slot + IO_LENGTH);
1242                 u16 mem_base = readw(one_slot + MEM_BASE);
1243                 u16 mem_length = readw(one_slot + MEM_LENGTH);
1244                 u16 pre_mem_base = readw(one_slot + PRE_MEM_BASE);
1245                 u16 pre_mem_length = readw(one_slot + PRE_MEM_LENGTH);
1246
1247                 dbg("%2.2x | %4.4x  | %4.4x | %4.4x   | %4.4x | %4.4x   | %4.4x |%2.2x %2.2x %2.2x\n",
1248                     dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length,
1249                     primary_bus, secondary_bus, max_bus);
1250
1251                 /* If this entry isn't for our controller's bus, ignore it */
1252                 if (primary_bus != ctrl->bus) {
1253                         i--;
1254                         one_slot += sizeof (struct slot_rt);
1255                         continue;
1256                 }
1257                 /* find out if this entry is for an occupied slot */
1258                 ctrl->pci_bus->number = primary_bus;
1259                 pci_bus_read_config_dword (ctrl->pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword);
1260                 dbg("temp_D_word = %x\n", temp_dword);
1261
1262                 if (temp_dword != 0xFFFFFFFF) {
1263                         index = 0;
1264                         func = cpqhp_slot_find(primary_bus, dev_func >> 3, 0);
1265
1266                         while (func && (func->function != (dev_func & 0x07))) {
1267                                 dbg("func = %p (bus, dev, fun) = (%d, %d, %d)\n", func, primary_bus, dev_func >> 3, index);
1268                                 func = cpqhp_slot_find(primary_bus, dev_func >> 3, index++);
1269                         }
1270
1271                         /* If we can't find a match, skip this table entry */
1272                         if (!func) {
1273                                 i--;
1274                                 one_slot += sizeof (struct slot_rt);
1275                                 continue;
1276                         }
1277                         /* this may not work and shouldn't be used */
1278                         if (secondary_bus != primary_bus)
1279                                 bridged_slot = 1;
1280                         else
1281                                 bridged_slot = 0;
1282
1283                         populated_slot = 1;
1284                 } else {
1285                         populated_slot = 0;
1286                         bridged_slot = 0;
1287                 }
1288
1289
1290                 /* If we've got a valid IO base, use it */
1291
1292                 temp_dword = io_base + io_length;
1293
1294                 if ((io_base) && (temp_dword < 0x10000)) {
1295                         io_node = kmalloc(sizeof(*io_node), GFP_KERNEL);
1296                         if (!io_node)
1297                                 return -ENOMEM;
1298
1299                         io_node->base = io_base;
1300                         io_node->length = io_length;
1301
1302                         dbg("found io_node(base, length) = %x, %x\n",
1303                                         io_node->base, io_node->length);
1304                         dbg("populated slot =%d \n", populated_slot);
1305                         if (!populated_slot) {
1306                                 io_node->next = ctrl->io_head;
1307                                 ctrl->io_head = io_node;
1308                         } else {
1309                                 io_node->next = func->io_head;
1310                                 func->io_head = io_node;
1311                         }
1312                 }
1313
1314                 /* If we've got a valid memory base, use it */
1315                 temp_dword = mem_base + mem_length;
1316                 if ((mem_base) && (temp_dword < 0x10000)) {
1317                         mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
1318                         if (!mem_node)
1319                                 return -ENOMEM;
1320
1321                         mem_node->base = mem_base << 16;
1322
1323                         mem_node->length = mem_length << 16;
1324
1325                         dbg("found mem_node(base, length) = %x, %x\n",
1326                                         mem_node->base, mem_node->length);
1327                         dbg("populated slot =%d \n", populated_slot);
1328                         if (!populated_slot) {
1329                                 mem_node->next = ctrl->mem_head;
1330                                 ctrl->mem_head = mem_node;
1331                         } else {
1332                                 mem_node->next = func->mem_head;
1333                                 func->mem_head = mem_node;
1334                         }
1335                 }
1336
1337                 /* If we've got a valid prefetchable memory base, and
1338                  * the base + length isn't greater than 0xFFFF
1339                  */
1340                 temp_dword = pre_mem_base + pre_mem_length;
1341                 if ((pre_mem_base) && (temp_dword < 0x10000)) {
1342                         p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
1343                         if (!p_mem_node)
1344                                 return -ENOMEM;
1345
1346                         p_mem_node->base = pre_mem_base << 16;
1347
1348                         p_mem_node->length = pre_mem_length << 16;
1349                         dbg("found p_mem_node(base, length) = %x, %x\n",
1350                                         p_mem_node->base, p_mem_node->length);
1351                         dbg("populated slot =%d \n", populated_slot);
1352
1353                         if (!populated_slot) {
1354                                 p_mem_node->next = ctrl->p_mem_head;
1355                                 ctrl->p_mem_head = p_mem_node;
1356                         } else {
1357                                 p_mem_node->next = func->p_mem_head;
1358                                 func->p_mem_head = p_mem_node;
1359                         }
1360                 }
1361
1362                 /* If we've got a valid bus number, use it
1363                  * The second condition is to ignore bus numbers on
1364                  * populated slots that don't have PCI-PCI bridges
1365                  */
1366                 if (secondary_bus && (secondary_bus != primary_bus)) {
1367                         bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
1368                         if (!bus_node)
1369                                 return -ENOMEM;
1370
1371                         bus_node->base = secondary_bus;
1372                         bus_node->length = max_bus - secondary_bus + 1;
1373                         dbg("found bus_node(base, length) = %x, %x\n",
1374                                         bus_node->base, bus_node->length);
1375                         dbg("populated slot =%d \n", populated_slot);
1376                         if (!populated_slot) {
1377                                 bus_node->next = ctrl->bus_head;
1378                                 ctrl->bus_head = bus_node;
1379                         } else {
1380                                 bus_node->next = func->bus_head;
1381                                 func->bus_head = bus_node;
1382                         }
1383                 }
1384
1385                 i--;
1386                 one_slot += sizeof (struct slot_rt);
1387         }
1388
1389         /* If all of the following fail, we don't have any resources for
1390          * hot plug add
1391          */
1392         rc = 1;
1393         rc &= cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1394         rc &= cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
1395         rc &= cpqhp_resource_sort_and_combine(&(ctrl->io_head));
1396         rc &= cpqhp_resource_sort_and_combine(&(ctrl->bus_head));
1397
1398         return rc;
1399 }
1400
1401
1402 /*
1403  * cpqhp_return_board_resources
1404  *
1405  * this routine returns all resources allocated to a board to
1406  * the available pool.
1407  *
1408  * returns 0 if success
1409  */
1410 int cpqhp_return_board_resources(struct pci_func * func, struct resource_lists * resources)
1411 {
1412         int rc = 0;
1413         struct pci_resource *node;
1414         struct pci_resource *t_node;
1415         dbg("%s\n", __func__);
1416
1417         if (!func)
1418                 return 1;
1419
1420         node = func->io_head;
1421         func->io_head = NULL;
1422         while (node) {
1423                 t_node = node->next;
1424                 return_resource(&(resources->io_head), node);
1425                 node = t_node;
1426         }
1427
1428         node = func->mem_head;
1429         func->mem_head = NULL;
1430         while (node) {
1431                 t_node = node->next;
1432                 return_resource(&(resources->mem_head), node);
1433                 node = t_node;
1434         }
1435
1436         node = func->p_mem_head;
1437         func->p_mem_head = NULL;
1438         while (node) {
1439                 t_node = node->next;
1440                 return_resource(&(resources->p_mem_head), node);
1441                 node = t_node;
1442         }
1443
1444         node = func->bus_head;
1445         func->bus_head = NULL;
1446         while (node) {
1447                 t_node = node->next;
1448                 return_resource(&(resources->bus_head), node);
1449                 node = t_node;
1450         }
1451
1452         rc |= cpqhp_resource_sort_and_combine(&(resources->mem_head));
1453         rc |= cpqhp_resource_sort_and_combine(&(resources->p_mem_head));
1454         rc |= cpqhp_resource_sort_and_combine(&(resources->io_head));
1455         rc |= cpqhp_resource_sort_and_combine(&(resources->bus_head));
1456
1457         return rc;
1458 }
1459
1460
1461 /*
1462  * cpqhp_destroy_resource_list
1463  *
1464  * Puts node back in the resource list pointed to by head
1465  */
1466 void cpqhp_destroy_resource_list (struct resource_lists * resources)
1467 {
1468         struct pci_resource *res, *tres;
1469
1470         res = resources->io_head;
1471         resources->io_head = NULL;
1472
1473         while (res) {
1474                 tres = res;
1475                 res = res->next;
1476                 kfree(tres);
1477         }
1478
1479         res = resources->mem_head;
1480         resources->mem_head = NULL;
1481
1482         while (res) {
1483                 tres = res;
1484                 res = res->next;
1485                 kfree(tres);
1486         }
1487
1488         res = resources->p_mem_head;
1489         resources->p_mem_head = NULL;
1490
1491         while (res) {
1492                 tres = res;
1493                 res = res->next;
1494                 kfree(tres);
1495         }
1496
1497         res = resources->bus_head;
1498         resources->bus_head = NULL;
1499
1500         while (res) {
1501                 tres = res;
1502                 res = res->next;
1503                 kfree(tres);
1504         }
1505 }
1506
1507
1508 /*
1509  * cpqhp_destroy_board_resources
1510  *
1511  * Puts node back in the resource list pointed to by head
1512  */
1513 void cpqhp_destroy_board_resources (struct pci_func * func)
1514 {
1515         struct pci_resource *res, *tres;
1516
1517         res = func->io_head;
1518         func->io_head = NULL;
1519
1520         while (res) {
1521                 tres = res;
1522                 res = res->next;
1523                 kfree(tres);
1524         }
1525
1526         res = func->mem_head;
1527         func->mem_head = NULL;
1528
1529         while (res) {
1530                 tres = res;
1531                 res = res->next;
1532                 kfree(tres);
1533         }
1534
1535         res = func->p_mem_head;
1536         func->p_mem_head = NULL;
1537
1538         while (res) {
1539                 tres = res;
1540                 res = res->next;
1541                 kfree(tres);
1542         }
1543
1544         res = func->bus_head;
1545         func->bus_head = NULL;
1546
1547         while (res) {
1548                 tres = res;
1549                 res = res->next;
1550                 kfree(tres);
1551         }
1552 }
1553