2 * Linux device driver for RTL8187
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
10 * The driver was extended to the RTL8187B in 2008 by:
11 * Herton Ronaldo Krzesinski <herton@mandriva.com.br>
12 * Hin-Tak Leung <htl10@users.sourceforge.net>
13 * Larry Finger <Larry.Finger@lwfinger.net>
15 * Magic delays and register offsets below are taken from the original
16 * r8187 driver sources. Thanks to Realtek for their support!
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
23 #include <linux/init.h>
24 #include <linux/usb.h>
25 #include <linux/slab.h>
26 #include <linux/delay.h>
27 #include <linux/etherdevice.h>
28 #include <linux/eeprom_93cx6.h>
29 #include <net/mac80211.h>
32 #include "rtl8187_rtl8225.h"
33 #ifdef CONFIG_RTL8187_LEDS
34 #include "rtl8187_leds.h"
36 #include "rtl8187_rfkill.h"
38 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
39 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
40 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
41 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
42 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
43 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
44 MODULE_LICENSE("GPL");
46 static struct usb_device_id rtl8187_table[] __devinitdata = {
48 {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
50 {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
52 {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
53 {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
54 {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
55 {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
57 {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
59 {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
61 {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
62 {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
63 {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
65 {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
67 {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
68 {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
69 {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B},
70 /* Sphairon Access Systems GmbH */
71 {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
72 /* Dick Smith Electronics */
73 {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
75 {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
77 {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
79 {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
81 {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B},
85 MODULE_DEVICE_TABLE(usb, rtl8187_table);
87 static const struct ieee80211_rate rtl818x_rates[] = {
88 { .bitrate = 10, .hw_value = 0, },
89 { .bitrate = 20, .hw_value = 1, },
90 { .bitrate = 55, .hw_value = 2, },
91 { .bitrate = 110, .hw_value = 3, },
92 { .bitrate = 60, .hw_value = 4, },
93 { .bitrate = 90, .hw_value = 5, },
94 { .bitrate = 120, .hw_value = 6, },
95 { .bitrate = 180, .hw_value = 7, },
96 { .bitrate = 240, .hw_value = 8, },
97 { .bitrate = 360, .hw_value = 9, },
98 { .bitrate = 480, .hw_value = 10, },
99 { .bitrate = 540, .hw_value = 11, },
102 static const struct ieee80211_channel rtl818x_channels[] = {
103 { .center_freq = 2412 },
104 { .center_freq = 2417 },
105 { .center_freq = 2422 },
106 { .center_freq = 2427 },
107 { .center_freq = 2432 },
108 { .center_freq = 2437 },
109 { .center_freq = 2442 },
110 { .center_freq = 2447 },
111 { .center_freq = 2452 },
112 { .center_freq = 2457 },
113 { .center_freq = 2462 },
114 { .center_freq = 2467 },
115 { .center_freq = 2472 },
116 { .center_freq = 2484 },
119 static void rtl8187_iowrite_async_cb(struct urb *urb)
124 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
127 struct usb_ctrlrequest *dr;
129 struct rtl8187_async_write_data {
131 struct usb_ctrlrequest dr;
135 buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
139 urb = usb_alloc_urb(0, GFP_ATOMIC);
147 dr->bRequestType = RTL8187_REQT_WRITE;
148 dr->bRequest = RTL8187_REQ_SET_REG;
151 dr->wLength = cpu_to_le16(len);
153 memcpy(buf, data, len);
155 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
156 (unsigned char *)dr, buf, len,
157 rtl8187_iowrite_async_cb, buf);
158 usb_anchor_urb(urb, &priv->anchored);
159 rc = usb_submit_urb(urb, GFP_ATOMIC);
162 usb_unanchor_urb(urb);
167 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
168 __le32 *addr, u32 val)
170 __le32 buf = cpu_to_le32(val);
172 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
176 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
178 struct rtl8187_priv *priv = dev->priv;
183 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
184 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
185 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
186 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
189 static void rtl8187_tx_cb(struct urb *urb)
191 struct sk_buff *skb = (struct sk_buff *)urb->context;
192 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
193 struct ieee80211_hw *hw = info->rate_driver_data[0];
194 struct rtl8187_priv *priv = hw->priv;
196 skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
197 sizeof(struct rtl8187_tx_hdr));
198 ieee80211_tx_info_clear_status(info);
200 if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
201 if (priv->is_rtl8187b) {
202 skb_queue_tail(&priv->b_tx_status.queue, skb);
204 /* queue is "full", discard last items */
205 while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
206 struct sk_buff *old_skb;
208 dev_dbg(&priv->udev->dev,
209 "transmit status queue full\n");
211 old_skb = skb_dequeue(&priv->b_tx_status.queue);
212 ieee80211_tx_status_irqsafe(hw, old_skb);
216 info->flags |= IEEE80211_TX_STAT_ACK;
219 if (priv->is_rtl8187b)
220 ieee80211_tx_status_irqsafe(hw, skb);
222 /* Retry information for the RTI8187 is only available by
223 * reading a register in the device. We are in interrupt mode
224 * here, thus queue the skb and finish on a work queue. */
225 skb_queue_tail(&priv->b_tx_status.queue, skb);
226 ieee80211_queue_delayed_work(hw, &priv->work, 0);
230 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
232 struct rtl8187_priv *priv = dev->priv;
233 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
241 urb = usb_alloc_urb(0, GFP_ATOMIC);
248 flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
250 flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
251 if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
252 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
253 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
254 flags |= RTL818X_TX_DESC_FLAG_RTS;
255 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
256 rts_dur = ieee80211_rts_duration(dev, priv->vif,
258 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
259 flags |= RTL818X_TX_DESC_FLAG_CTS;
260 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
263 if (!priv->is_rtl8187b) {
264 struct rtl8187_tx_hdr *hdr =
265 (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
266 hdr->flags = cpu_to_le32(flags);
268 hdr->rts_duration = rts_dur;
269 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
274 /* fc needs to be calculated before skb_push() */
275 unsigned int epmap[4] = { 6, 7, 5, 4 };
276 struct ieee80211_hdr *tx_hdr =
277 (struct ieee80211_hdr *)(skb->data);
278 u16 fc = le16_to_cpu(tx_hdr->frame_control);
280 struct rtl8187b_tx_hdr *hdr =
281 (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
282 struct ieee80211_rate *txrate =
283 ieee80211_get_tx_rate(dev, info);
284 memset(hdr, 0, sizeof(*hdr));
285 hdr->flags = cpu_to_le32(flags);
286 hdr->rts_duration = rts_dur;
287 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
289 ieee80211_generic_frame_duration(dev, priv->vif,
293 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
296 ep = epmap[skb_get_queue_mapping(skb)];
299 info->rate_driver_data[0] = dev;
300 info->rate_driver_data[1] = urb;
302 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
303 buf, skb->len, rtl8187_tx_cb, skb);
304 urb->transfer_flags |= URB_ZERO_PACKET;
305 usb_anchor_urb(urb, &priv->anchored);
306 rc = usb_submit_urb(urb, GFP_ATOMIC);
308 usb_unanchor_urb(urb);
316 static void rtl8187_rx_cb(struct urb *urb)
318 struct sk_buff *skb = (struct sk_buff *)urb->context;
319 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
320 struct ieee80211_hw *dev = info->dev;
321 struct rtl8187_priv *priv = dev->priv;
322 struct ieee80211_rx_status rx_status = { 0 };
327 spin_lock_irqsave(&priv->rx_queue.lock, f);
328 __skb_unlink(skb, &priv->rx_queue);
329 spin_unlock_irqrestore(&priv->rx_queue.lock, f);
330 skb_put(skb, urb->actual_length);
332 if (unlikely(urb->status)) {
333 dev_kfree_skb_irq(skb);
337 if (!priv->is_rtl8187b) {
338 struct rtl8187_rx_hdr *hdr =
339 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
340 flags = le32_to_cpu(hdr->flags);
341 /* As with the RTL8187B below, the AGC is used to calculate
342 * signal strength. In this case, the scaling
343 * constants are derived from the output of p54usb.
345 signal = -4 - ((27 * hdr->agc) >> 6);
346 rx_status.antenna = (hdr->signal >> 7) & 1;
347 rx_status.mactime = le64_to_cpu(hdr->mac_time);
349 struct rtl8187b_rx_hdr *hdr =
350 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
351 /* The Realtek datasheet for the RTL8187B shows that the RX
352 * header contains the following quantities: signal quality,
353 * RSSI, AGC, the received power in dB, and the measured SNR.
354 * In testing, none of these quantities show qualitative
355 * agreement with AP signal strength, except for the AGC,
356 * which is inversely proportional to the strength of the
357 * signal. In the following, the signal strength
358 * is derived from the AGC. The arbitrary scaling constants
359 * are chosen to make the results close to the values obtained
360 * for a BCM4312 using b43 as the driver. The noise is ignored
363 flags = le32_to_cpu(hdr->flags);
364 signal = 14 - hdr->agc / 2;
365 rx_status.antenna = (hdr->rssi >> 7) & 1;
366 rx_status.mactime = le64_to_cpu(hdr->mac_time);
369 rx_status.signal = signal;
370 priv->signal = signal;
371 rate = (flags >> 20) & 0xF;
372 skb_trim(skb, flags & 0x0FFF);
373 rx_status.rate_idx = rate;
374 rx_status.freq = dev->conf.channel->center_freq;
375 rx_status.band = dev->conf.channel->band;
376 rx_status.flag |= RX_FLAG_TSFT;
377 if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
378 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
379 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
380 ieee80211_rx_irqsafe(dev, skb);
382 skb = dev_alloc_skb(RTL8187_MAX_RX);
383 if (unlikely(!skb)) {
384 /* TODO check rx queue length and refill *somewhere* */
388 info = (struct rtl8187_rx_info *)skb->cb;
391 urb->transfer_buffer = skb_tail_pointer(skb);
393 skb_queue_tail(&priv->rx_queue, skb);
395 usb_anchor_urb(urb, &priv->anchored);
396 if (usb_submit_urb(urb, GFP_ATOMIC)) {
397 usb_unanchor_urb(urb);
398 skb_unlink(skb, &priv->rx_queue);
399 dev_kfree_skb_irq(skb);
403 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
405 struct rtl8187_priv *priv = dev->priv;
406 struct urb *entry = NULL;
408 struct rtl8187_rx_info *info;
411 while (skb_queue_len(&priv->rx_queue) < 16) {
412 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
417 entry = usb_alloc_urb(0, GFP_KERNEL);
422 usb_fill_bulk_urb(entry, priv->udev,
423 usb_rcvbulkpipe(priv->udev,
424 priv->is_rtl8187b ? 3 : 1),
425 skb_tail_pointer(skb),
426 RTL8187_MAX_RX, rtl8187_rx_cb, skb);
427 info = (struct rtl8187_rx_info *)skb->cb;
430 skb_queue_tail(&priv->rx_queue, skb);
431 usb_anchor_urb(entry, &priv->anchored);
432 ret = usb_submit_urb(entry, GFP_KERNEL);
434 skb_unlink(skb, &priv->rx_queue);
435 usb_unanchor_urb(entry);
445 usb_kill_anchored_urbs(&priv->anchored);
449 static void rtl8187b_status_cb(struct urb *urb)
451 struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
452 struct rtl8187_priv *priv = hw->priv;
454 unsigned int cmd_type;
456 if (unlikely(urb->status))
460 * Read from status buffer:
462 * bits [30:31] = cmd type:
463 * - 0 indicates tx beacon interrupt
464 * - 1 indicates tx close descriptor
466 * In the case of tx beacon interrupt:
467 * [0:9] = Last Beacon CW
470 * [32:63] = Last Beacon TSF
472 * If it's tx close descriptor:
473 * [0:7] = Packet Retry Count
474 * [8:14] = RTS Retry Count
476 * [16:27] = Sequence No
480 * [32:47] = unused (reserved?)
481 * [48:63] = MAC Used Time
483 val = le64_to_cpu(priv->b_tx_status.buf);
485 cmd_type = (val >> 30) & 0x3;
487 unsigned int pkt_rc, seq_no;
490 struct ieee80211_hdr *ieee80211hdr;
494 tok = val & (1 << 15);
495 seq_no = (val >> 16) & 0xFFF;
497 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
498 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
499 ieee80211hdr = (struct ieee80211_hdr *)skb->data;
502 * While testing, it was discovered that the seq_no
503 * doesn't actually contains the sequence number.
504 * Instead of returning just the 12 bits of sequence
505 * number, hardware is returning entire sequence control
506 * (fragment number plus sequence number) in a 12 bit
507 * only field overflowing after some time. As a
508 * workaround, just consider the lower bits, and expect
509 * it's unlikely we wrongly ack some sent data
511 if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
515 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
516 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
518 __skb_unlink(skb, &priv->b_tx_status.queue);
520 info->flags |= IEEE80211_TX_STAT_ACK;
521 info->status.rates[0].count = pkt_rc + 1;
523 ieee80211_tx_status_irqsafe(hw, skb);
525 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
528 usb_anchor_urb(urb, &priv->anchored);
529 if (usb_submit_urb(urb, GFP_ATOMIC))
530 usb_unanchor_urb(urb);
533 static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
535 struct rtl8187_priv *priv = dev->priv;
539 entry = usb_alloc_urb(0, GFP_KERNEL);
543 usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
544 &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
545 rtl8187b_status_cb, dev);
547 usb_anchor_urb(entry, &priv->anchored);
548 ret = usb_submit_urb(entry, GFP_KERNEL);
550 usb_unanchor_urb(entry);
556 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
558 struct rtl8187_priv *priv = dev->priv;
562 reg = rtl818x_ioread8(priv, &priv->map->CMD);
564 reg |= RTL818X_CMD_RESET;
565 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
570 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
576 wiphy_err(dev->wiphy, "Reset timeout!\n");
580 /* reload registers from eeprom */
581 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
586 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
587 RTL818X_EEPROM_CMD_CONFIG))
592 wiphy_err(dev->wiphy, "eeprom reset timeout!\n");
599 static int rtl8187_init_hw(struct ieee80211_hw *dev)
601 struct rtl8187_priv *priv = dev->priv;
606 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
607 RTL818X_EEPROM_CMD_CONFIG);
608 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
609 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
610 RTL818X_CONFIG3_ANAPARAM_WRITE);
611 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
612 RTL8187_RTL8225_ANAPARAM_ON);
613 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
614 RTL8187_RTL8225_ANAPARAM2_ON);
615 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
616 ~RTL818X_CONFIG3_ANAPARAM_WRITE);
617 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
618 RTL818X_EEPROM_CMD_NORMAL);
620 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
623 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
624 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
625 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
628 res = rtl8187_cmd_reset(dev);
632 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
633 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
634 rtl818x_iowrite8(priv, &priv->map->CONFIG3,
635 reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
636 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
637 RTL8187_RTL8225_ANAPARAM_ON);
638 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
639 RTL8187_RTL8225_ANAPARAM2_ON);
640 rtl818x_iowrite8(priv, &priv->map->CONFIG3,
641 reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
642 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
645 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
646 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
648 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
649 rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
650 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
652 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
654 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
655 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
658 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
660 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
662 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
663 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
664 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
666 // TODO: set RESP_RATE and BRSR properly
667 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
668 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
671 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
672 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
673 reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
674 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
675 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
676 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
677 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
678 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
679 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
680 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
683 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
684 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
685 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
686 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
687 RTL818X_EEPROM_CMD_CONFIG);
688 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
689 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
690 RTL818X_EEPROM_CMD_NORMAL);
691 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
696 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
697 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
698 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
699 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
700 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
701 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
702 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
707 static const u8 rtl8187b_reg_table[][3] = {
708 {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
709 {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
710 {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
711 {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
713 {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
714 {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
715 {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1},
716 {0xF2, 0x02, 1}, {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1},
717 {0xF6, 0x06, 1}, {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
719 {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
720 {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
721 {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
722 {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
723 {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
724 {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
725 {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
728 {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0},
729 {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0},
730 {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0},
731 {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0},
732 {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
734 {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
738 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
740 struct rtl8187_priv *priv = dev->priv;
744 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
745 RTL818X_EEPROM_CMD_CONFIG);
747 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
748 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
749 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
750 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
751 RTL8187B_RTL8225_ANAPARAM2_ON);
752 rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
753 RTL8187B_RTL8225_ANAPARAM_ON);
754 rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
755 RTL8187B_RTL8225_ANAPARAM3_ON);
757 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
758 reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
759 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
760 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
762 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
763 reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
764 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
766 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
767 RTL818X_EEPROM_CMD_NORMAL);
769 res = rtl8187_cmd_reset(dev);
773 /* BRSR (Basic Rate Set Register) on 8187B looks to be the same as
774 * RESP_RATE on 8187L in Realtek sources: each bit should be each
775 * one of the 12 rates, all are enabled */
776 rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF);
778 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
779 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
780 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
782 /* Auto Rate Fallback Register (ARFR): 1M-54M setting */
783 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
784 rtl818x_iowrite8_idx(priv, (u8 *)0xFFE2, 0x00, 1);
786 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
788 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
789 RTL818X_EEPROM_CMD_CONFIG);
790 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
791 rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
792 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
793 RTL818X_EEPROM_CMD_NORMAL);
795 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
796 for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
797 rtl818x_iowrite8_idx(priv,
799 (rtl8187b_reg_table[i][0] | 0xFF00),
800 rtl8187b_reg_table[i][1],
801 rtl8187b_reg_table[i][2]);
804 rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
805 rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
807 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
808 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
809 rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
811 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
813 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
815 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
816 RTL818X_EEPROM_CMD_CONFIG);
817 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
818 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
819 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
820 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
821 RTL818X_EEPROM_CMD_NORMAL);
823 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
824 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
825 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
830 reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
831 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
832 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
834 rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
835 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
836 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
837 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
838 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
839 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
840 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
842 reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
843 rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
844 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
845 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
846 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
847 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
848 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
849 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
850 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
851 rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
852 rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
853 rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
854 rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
856 rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
858 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
860 priv->slot_time = 0x9;
861 priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
862 priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
863 priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
864 priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
865 rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
867 /* ENEDCA flag must always be set, transmit issues? */
868 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
873 static void rtl8187_work(struct work_struct *work)
875 /* The RTL8187 returns the retry count through register 0xFFFA. In
876 * addition, it appears to be a cumulative retry count, not the
877 * value for the current TX packet. When multiple TX entries are
878 * queued, the retry count will be valid for the last one in the queue.
879 * The "error" should not matter for purposes of rate setting. */
880 struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
882 struct ieee80211_tx_info *info;
883 struct ieee80211_hw *dev = priv->dev;
887 mutex_lock(&priv->conf_mutex);
888 tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
889 while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
890 struct sk_buff *old_skb;
892 old_skb = skb_dequeue(&priv->b_tx_status.queue);
893 info = IEEE80211_SKB_CB(old_skb);
894 info->status.rates[0].count = tmp - retry + 1;
895 ieee80211_tx_status_irqsafe(dev, old_skb);
898 mutex_unlock(&priv->conf_mutex);
901 static int rtl8187_start(struct ieee80211_hw *dev)
903 struct rtl8187_priv *priv = dev->priv;
907 mutex_lock(&priv->conf_mutex);
909 ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
910 rtl8187b_init_hw(dev);
912 goto rtl8187_start_exit;
914 init_usb_anchor(&priv->anchored);
917 if (priv->is_rtl8187b) {
918 reg = RTL818X_RX_CONF_MGMT |
919 RTL818X_RX_CONF_DATA |
920 RTL818X_RX_CONF_BROADCAST |
921 RTL818X_RX_CONF_NICMAC |
922 RTL818X_RX_CONF_BSSID |
923 (7 << 13 /* RX FIFO threshold NONE */) |
924 (7 << 10 /* MAX RX DMA */) |
925 RTL818X_RX_CONF_RX_AUTORESETPHY |
926 RTL818X_RX_CONF_ONLYERLPKT |
927 RTL818X_RX_CONF_MULTICAST;
929 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
931 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
932 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
933 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
934 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
935 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
937 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
938 RTL818X_TX_CONF_HW_SEQNUM |
939 RTL818X_TX_CONF_DISREQQSIZE |
940 (7 << 8 /* short retry limit */) |
941 (7 << 0 /* long retry limit */) |
942 (7 << 21 /* MAX TX DMA */));
943 rtl8187_init_urbs(dev);
944 rtl8187b_init_status_urb(dev);
945 goto rtl8187_start_exit;
948 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
950 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
951 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
953 rtl8187_init_urbs(dev);
955 reg = RTL818X_RX_CONF_ONLYERLPKT |
956 RTL818X_RX_CONF_RX_AUTORESETPHY |
957 RTL818X_RX_CONF_BSSID |
958 RTL818X_RX_CONF_MGMT |
959 RTL818X_RX_CONF_DATA |
960 (7 << 13 /* RX FIFO threshold NONE */) |
961 (7 << 10 /* MAX RX DMA */) |
962 RTL818X_RX_CONF_BROADCAST |
963 RTL818X_RX_CONF_NICMAC;
966 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
968 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
969 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
970 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
971 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
973 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
974 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
975 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
976 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
977 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
979 reg = RTL818X_TX_CONF_CW_MIN |
980 (7 << 21 /* MAX TX DMA */) |
981 RTL818X_TX_CONF_NO_ICV;
982 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
984 reg = rtl818x_ioread8(priv, &priv->map->CMD);
985 reg |= RTL818X_CMD_TX_ENABLE;
986 reg |= RTL818X_CMD_RX_ENABLE;
987 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
988 INIT_DELAYED_WORK(&priv->work, rtl8187_work);
991 mutex_unlock(&priv->conf_mutex);
995 static void rtl8187_stop(struct ieee80211_hw *dev)
997 struct rtl8187_priv *priv = dev->priv;
1001 mutex_lock(&priv->conf_mutex);
1002 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
1004 reg = rtl818x_ioread8(priv, &priv->map->CMD);
1005 reg &= ~RTL818X_CMD_TX_ENABLE;
1006 reg &= ~RTL818X_CMD_RX_ENABLE;
1007 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1009 priv->rf->stop(dev);
1011 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1012 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1013 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1014 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1016 while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1017 dev_kfree_skb_any(skb);
1019 usb_kill_anchored_urbs(&priv->anchored);
1020 mutex_unlock(&priv->conf_mutex);
1022 if (!priv->is_rtl8187b)
1023 cancel_delayed_work_sync(&priv->work);
1026 static int rtl8187_add_interface(struct ieee80211_hw *dev,
1027 struct ieee80211_vif *vif)
1029 struct rtl8187_priv *priv = dev->priv;
1031 int ret = -EOPNOTSUPP;
1033 mutex_lock(&priv->conf_mutex);
1037 switch (vif->type) {
1038 case NL80211_IFTYPE_STATION:
1047 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1048 for (i = 0; i < ETH_ALEN; i++)
1049 rtl818x_iowrite8(priv, &priv->map->MAC[i],
1050 ((u8 *)vif->addr)[i]);
1051 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1054 mutex_unlock(&priv->conf_mutex);
1058 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1059 struct ieee80211_vif *vif)
1061 struct rtl8187_priv *priv = dev->priv;
1062 mutex_lock(&priv->conf_mutex);
1064 mutex_unlock(&priv->conf_mutex);
1067 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1069 struct rtl8187_priv *priv = dev->priv;
1070 struct ieee80211_conf *conf = &dev->conf;
1073 mutex_lock(&priv->conf_mutex);
1074 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1075 /* Enable TX loopback on MAC level to avoid TX during channel
1076 * changes, as this has be seen to causes problems and the
1077 * card will stop work until next reset
1079 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1080 reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1081 priv->rf->set_chan(dev, conf);
1083 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1085 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1086 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1087 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1088 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1089 mutex_unlock(&priv->conf_mutex);
1094 * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1095 * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1097 static __le32 *rtl8187b_ac_addr[4] = {
1098 (__le32 *) 0xFFF0, /* AC_VO */
1099 (__le32 *) 0xFFF4, /* AC_VI */
1100 (__le32 *) 0xFFFC, /* AC_BK */
1101 (__le32 *) 0xFFF8, /* AC_BE */
1104 #define SIFS_TIME 0xa
1106 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1107 bool use_short_preamble)
1109 if (priv->is_rtl8187b) {
1114 if (use_short_slot) {
1115 priv->slot_time = 0x9;
1119 priv->slot_time = 0x14;
1123 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1124 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1125 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1128 * BRSR+1 on 8187B is in fact EIFS register
1129 * Value in units of 4 us
1131 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1134 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1135 * register. In units of 4 us like eifs register
1136 * ack_timeout = ack duration + plcp + difs + preamble
1138 ack_timeout = 112 + 48 + difs;
1139 if (use_short_preamble)
1143 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1144 DIV_ROUND_UP(ack_timeout, 4));
1146 for (queue = 0; queue < 4; queue++)
1147 rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1148 priv->aifsn[queue] * priv->slot_time +
1151 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1152 if (use_short_slot) {
1153 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1154 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1155 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1157 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1158 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1159 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1164 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1165 struct ieee80211_vif *vif,
1166 struct ieee80211_bss_conf *info,
1169 struct rtl8187_priv *priv = dev->priv;
1173 if (changed & BSS_CHANGED_BSSID) {
1174 mutex_lock(&priv->conf_mutex);
1175 for (i = 0; i < ETH_ALEN; i++)
1176 rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1179 if (priv->is_rtl8187b)
1180 reg = RTL818X_MSR_ENEDCA;
1184 if (is_valid_ether_addr(info->bssid))
1185 reg |= RTL818X_MSR_INFRA;
1187 reg |= RTL818X_MSR_NO_LINK;
1189 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1191 mutex_unlock(&priv->conf_mutex);
1194 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1195 rtl8187_conf_erp(priv, info->use_short_slot,
1196 info->use_short_preamble);
1199 static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev,
1200 struct netdev_hw_addr_list *mc_list)
1202 return netdev_hw_addr_list_count(mc_list);
1205 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1206 unsigned int changed_flags,
1207 unsigned int *total_flags,
1210 struct rtl8187_priv *priv = dev->priv;
1212 if (changed_flags & FIF_FCSFAIL)
1213 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1214 if (changed_flags & FIF_CONTROL)
1215 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1216 if (changed_flags & FIF_OTHER_BSS)
1217 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1218 if (*total_flags & FIF_ALLMULTI || multicast > 0)
1219 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1221 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1225 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1226 *total_flags |= FIF_FCSFAIL;
1227 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1228 *total_flags |= FIF_CONTROL;
1229 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1230 *total_flags |= FIF_OTHER_BSS;
1231 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1232 *total_flags |= FIF_ALLMULTI;
1234 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1237 static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue,
1238 const struct ieee80211_tx_queue_params *params)
1240 struct rtl8187_priv *priv = dev->priv;
1246 cw_min = fls(params->cw_min);
1247 cw_max = fls(params->cw_max);
1249 if (priv->is_rtl8187b) {
1250 priv->aifsn[queue] = params->aifs;
1253 * This is the structure of AC_*_PARAM registers in 8187B:
1254 * - TXOP limit field, bit offset = 16
1255 * - ECWmax, bit offset = 12
1256 * - ECWmin, bit offset = 8
1257 * - AIFS, bit offset = 0
1259 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1260 (params->txop << 16) | (cw_max << 12) |
1261 (cw_min << 8) | (params->aifs *
1262 priv->slot_time + SIFS_TIME));
1267 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1268 cw_min | (cw_max << 4));
1273 static u64 rtl8187_get_tsf(struct ieee80211_hw *dev)
1275 struct rtl8187_priv *priv = dev->priv;
1277 return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
1278 (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
1281 static const struct ieee80211_ops rtl8187_ops = {
1283 .start = rtl8187_start,
1284 .stop = rtl8187_stop,
1285 .add_interface = rtl8187_add_interface,
1286 .remove_interface = rtl8187_remove_interface,
1287 .config = rtl8187_config,
1288 .bss_info_changed = rtl8187_bss_info_changed,
1289 .prepare_multicast = rtl8187_prepare_multicast,
1290 .configure_filter = rtl8187_configure_filter,
1291 .conf_tx = rtl8187_conf_tx,
1292 .rfkill_poll = rtl8187_rfkill_poll,
1293 .get_tsf = rtl8187_get_tsf,
1296 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1298 struct ieee80211_hw *dev = eeprom->data;
1299 struct rtl8187_priv *priv = dev->priv;
1300 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1302 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1303 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1304 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1305 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1308 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1310 struct ieee80211_hw *dev = eeprom->data;
1311 struct rtl8187_priv *priv = dev->priv;
1312 u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1314 if (eeprom->reg_data_in)
1315 reg |= RTL818X_EEPROM_CMD_WRITE;
1316 if (eeprom->reg_data_out)
1317 reg |= RTL818X_EEPROM_CMD_READ;
1318 if (eeprom->reg_data_clock)
1319 reg |= RTL818X_EEPROM_CMD_CK;
1320 if (eeprom->reg_chip_select)
1321 reg |= RTL818X_EEPROM_CMD_CS;
1323 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1327 static int __devinit rtl8187_probe(struct usb_interface *intf,
1328 const struct usb_device_id *id)
1330 struct usb_device *udev = interface_to_usbdev(intf);
1331 struct ieee80211_hw *dev;
1332 struct rtl8187_priv *priv;
1333 struct eeprom_93cx6 eeprom;
1334 struct ieee80211_channel *channel;
1335 const char *chip_name;
1337 u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
1339 u8 mac_addr[ETH_ALEN];
1341 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1343 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1348 priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1350 /* allocate "DMA aware" buffer for register accesses */
1351 priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
1352 if (!priv->io_dmabuf) {
1356 mutex_init(&priv->io_mutex);
1358 SET_IEEE80211_DEV(dev, &intf->dev);
1359 usb_set_intfdata(intf, dev);
1364 skb_queue_head_init(&priv->rx_queue);
1366 BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1367 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1369 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1370 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1371 priv->map = (struct rtl818x_csr *)0xFF00;
1373 priv->band.band = IEEE80211_BAND_2GHZ;
1374 priv->band.channels = priv->channels;
1375 priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1376 priv->band.bitrates = priv->rates;
1377 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1378 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1381 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1382 IEEE80211_HW_SIGNAL_DBM |
1383 IEEE80211_HW_RX_INCLUDES_FCS;
1386 eeprom.register_read = rtl8187_eeprom_register_read;
1387 eeprom.register_write = rtl8187_eeprom_register_write;
1388 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1389 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1391 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1393 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1396 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1397 (__le16 __force *)mac_addr, 3);
1398 if (!is_valid_ether_addr(mac_addr)) {
1399 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1400 "generated MAC address\n");
1401 random_ether_addr(mac_addr);
1403 SET_IEEE80211_PERM_ADDR(dev, mac_addr);
1405 channel = priv->channels;
1406 for (i = 0; i < 3; i++) {
1407 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1409 (*channel++).hw_value = txpwr & 0xFF;
1410 (*channel++).hw_value = txpwr >> 8;
1412 for (i = 0; i < 2; i++) {
1413 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1415 (*channel++).hw_value = txpwr & 0xFF;
1416 (*channel++).hw_value = txpwr >> 8;
1419 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1422 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1423 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1424 /* 0 means asic B-cut, we should use SW 3 wire
1425 * bit-by-bit banging for radio. 1 means we can use
1426 * USB specific request to write radio registers */
1427 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1428 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1429 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1431 if (!priv->is_rtl8187b) {
1433 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1434 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1436 case RTL818X_TX_CONF_R8187vD_B:
1437 /* Some RTL8187B devices have a USB ID of 0x8187
1438 * detect them here */
1439 chip_name = "RTL8187BvB(early)";
1440 priv->is_rtl8187b = 1;
1441 priv->hw_rev = RTL8187BvB;
1443 case RTL818X_TX_CONF_R8187vD:
1444 chip_name = "RTL8187vD";
1447 chip_name = "RTL8187vB (default)";
1451 * Force USB request to write radio registers for 8187B, Realtek
1452 * only uses it in their sources
1454 /*if (priv->asic_rev == 0) {
1455 printk(KERN_WARNING "rtl8187: Forcing use of USB "
1456 "requests to write to radio registers\n");
1459 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1460 case RTL818X_R8187B_B:
1461 chip_name = "RTL8187BvB";
1462 priv->hw_rev = RTL8187BvB;
1464 case RTL818X_R8187B_D:
1465 chip_name = "RTL8187BvD";
1466 priv->hw_rev = RTL8187BvD;
1468 case RTL818X_R8187B_E:
1469 chip_name = "RTL8187BvE";
1470 priv->hw_rev = RTL8187BvE;
1473 chip_name = "RTL8187BvB (default)";
1474 priv->hw_rev = RTL8187BvB;
1478 if (!priv->is_rtl8187b) {
1479 for (i = 0; i < 2; i++) {
1480 eeprom_93cx6_read(&eeprom,
1481 RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1483 (*channel++).hw_value = txpwr & 0xFF;
1484 (*channel++).hw_value = txpwr >> 8;
1487 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1489 (*channel++).hw_value = txpwr & 0xFF;
1491 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1492 (*channel++).hw_value = txpwr & 0xFF;
1494 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1495 (*channel++).hw_value = txpwr & 0xFF;
1496 (*channel++).hw_value = txpwr >> 8;
1498 /* Handle the differing rfkill GPIO bit in different models */
1499 priv->rfkill_mask = RFKILL_MASK_8187_89_97;
1500 if (product_id == 0x8197 || product_id == 0x8198) {
1501 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, ®);
1503 priv->rfkill_mask = RFKILL_MASK_8198;
1507 * XXX: Once this driver supports anything that requires
1508 * beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ.
1510 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1512 if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1513 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1516 priv->rf = rtl8187_detect_rf(dev);
1517 dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1518 sizeof(struct rtl8187_tx_hdr) :
1519 sizeof(struct rtl8187b_tx_hdr);
1520 if (!priv->is_rtl8187b)
1525 err = ieee80211_register_hw(dev);
1527 printk(KERN_ERR "rtl8187: Cannot register device\n");
1528 goto err_free_dmabuf;
1530 mutex_init(&priv->conf_mutex);
1531 skb_queue_head_init(&priv->b_tx_status.queue);
1533 wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
1534 mac_addr, chip_name, priv->asic_rev, priv->rf->name,
1537 #ifdef CONFIG_RTL8187_LEDS
1538 eeprom_93cx6_read(&eeprom, 0x3F, ®);
1540 rtl8187_leds_init(dev, reg);
1542 rtl8187_rfkill_init(dev);
1547 kfree(priv->io_dmabuf);
1549 ieee80211_free_hw(dev);
1550 usb_set_intfdata(intf, NULL);
1555 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1557 struct ieee80211_hw *dev = usb_get_intfdata(intf);
1558 struct rtl8187_priv *priv;
1563 #ifdef CONFIG_RTL8187_LEDS
1564 rtl8187_leds_exit(dev);
1566 rtl8187_rfkill_exit(dev);
1567 ieee80211_unregister_hw(dev);
1570 usb_reset_device(priv->udev);
1571 usb_put_dev(interface_to_usbdev(intf));
1572 kfree(priv->io_dmabuf);
1573 ieee80211_free_hw(dev);
1576 static struct usb_driver rtl8187_driver = {
1577 .name = KBUILD_MODNAME,
1578 .id_table = rtl8187_table,
1579 .probe = rtl8187_probe,
1580 .disconnect = __devexit_p(rtl8187_disconnect),
1583 static int __init rtl8187_init(void)
1585 return usb_register(&rtl8187_driver);
1588 static void __exit rtl8187_exit(void)
1590 usb_deregister(&rtl8187_driver);
1593 module_init(rtl8187_init);
1594 module_exit(rtl8187_exit);