2 * Linux device driver for RTL8187
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
10 * Magic delays and register offsets below are taken from the original
11 * r8187 driver sources. Thanks to Realtek for their support!
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
18 #include <linux/init.h>
19 #include <linux/usb.h>
20 #include <linux/delay.h>
21 #include <linux/etherdevice.h>
22 #include <linux/eeprom_93cx6.h>
23 #include <net/mac80211.h>
26 #include "rtl8187_rtl8225.h"
28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
30 MODULE_DESCRIPTION("RTL8187 USB wireless driver");
31 MODULE_LICENSE("GPL");
33 static struct usb_device_id rtl8187_table[] __devinitdata = {
35 {USB_DEVICE(0x0bda, 0x8187)},
37 {USB_DEVICE(0x0846, 0x6100)},
38 {USB_DEVICE(0x0846, 0x6a00)},
40 {USB_DEVICE(0x03f0, 0xca02)},
42 {USB_DEVICE(0x0df6, 0x000d)},
46 MODULE_DEVICE_TABLE(usb, rtl8187_table);
48 static void rtl8187_iowrite_async_cb(struct urb *urb)
54 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
57 struct usb_ctrlrequest *dr;
59 struct rtl8187_async_write_data {
61 struct usb_ctrlrequest dr;
64 buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
68 urb = usb_alloc_urb(0, GFP_ATOMIC);
76 dr->bRequestType = RTL8187_REQT_WRITE;
77 dr->bRequest = RTL8187_REQ_SET_REG;
80 dr->wLength = cpu_to_le16(len);
82 memcpy(buf, data, len);
84 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
85 (unsigned char *)dr, buf, len,
86 rtl8187_iowrite_async_cb, buf);
87 usb_submit_urb(urb, GFP_ATOMIC);
90 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
91 __le32 *addr, u32 val)
93 __le32 buf = cpu_to_le32(val);
95 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
99 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
101 struct rtl8187_priv *priv = dev->priv;
106 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
107 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
108 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
109 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
114 static void rtl8187_tx_cb(struct urb *urb)
116 struct ieee80211_tx_status status = { {0} };
117 struct sk_buff *skb = (struct sk_buff *)urb->context;
118 struct rtl8187_tx_info *info = (struct rtl8187_tx_info *)skb->cb;
120 usb_free_urb(info->urb);
122 memcpy(&status.control, info->control, sizeof(status.control));
123 kfree(info->control);
124 skb_pull(skb, sizeof(struct rtl8187_tx_hdr));
125 status.flags |= IEEE80211_TX_STATUS_ACK;
126 ieee80211_tx_status_irqsafe(info->dev, skb, &status);
129 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
130 struct ieee80211_tx_control *control)
132 struct rtl8187_priv *priv = dev->priv;
133 struct rtl8187_tx_hdr *hdr;
134 struct rtl8187_tx_info *info;
139 urb = usb_alloc_urb(0, GFP_ATOMIC);
146 flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
147 flags |= control->rts_cts_rate << 19;
148 flags |= control->tx_rate << 24;
149 if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb->data))
150 flags |= RTL8187_TX_FLAG_MORE_FRAG;
151 if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
152 flags |= RTL8187_TX_FLAG_RTS;
153 rts_dur = ieee80211_rts_duration(dev, priv->if_id, skb->len, control);
155 if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
156 flags |= RTL8187_TX_FLAG_CTS;
158 hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
159 hdr->flags = cpu_to_le32(flags);
161 hdr->rts_duration = rts_dur;
162 hdr->retry = cpu_to_le32(control->retry_limit << 8);
164 info = (struct rtl8187_tx_info *)skb->cb;
165 info->control = kmemdup(control, sizeof(*control), GFP_ATOMIC);
168 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2),
169 hdr, skb->len, rtl8187_tx_cb, skb);
170 usb_submit_urb(urb, GFP_ATOMIC);
175 static void rtl8187_rx_cb(struct urb *urb)
177 struct sk_buff *skb = (struct sk_buff *)urb->context;
178 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
179 struct ieee80211_hw *dev = info->dev;
180 struct rtl8187_priv *priv = dev->priv;
181 struct rtl8187_rx_hdr *hdr;
182 struct ieee80211_rx_status rx_status = { 0 };
186 spin_lock(&priv->rx_queue.lock);
188 __skb_unlink(skb, &priv->rx_queue);
190 spin_unlock(&priv->rx_queue.lock);
193 spin_unlock(&priv->rx_queue.lock);
195 if (unlikely(urb->status)) {
197 dev_kfree_skb_irq(skb);
201 skb_put(skb, urb->actual_length);
202 hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr));
203 flags = le32_to_cpu(hdr->flags);
204 skb_trim(skb, flags & 0x0FFF);
206 signal = hdr->agc >> 1;
207 rate = (flags >> 20) & 0xF;
208 if (rate > 3) { /* OFDM rate */
211 else if (signal < 25)
213 signal = 90 - signal;
214 } else { /* CCK rate */
217 else if (signal < 30)
219 signal = 95 - signal;
222 rx_status.antenna = (hdr->signal >> 7) & 1;
223 rx_status.signal = 64 - min(hdr->noise, (u8)64);
224 rx_status.ssi = signal;
225 rx_status.rate = rate;
226 rx_status.freq = dev->conf.freq;
227 rx_status.channel = dev->conf.channel;
228 rx_status.phymode = dev->conf.phymode;
229 rx_status.mactime = le64_to_cpu(hdr->mac_time);
230 rx_status.flag |= RX_FLAG_TSFT;
231 if (flags & (1 << 13))
232 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
233 ieee80211_rx_irqsafe(dev, skb, &rx_status);
235 skb = dev_alloc_skb(RTL8187_MAX_RX);
236 if (unlikely(!skb)) {
238 /* TODO check rx queue length and refill *somewhere* */
242 info = (struct rtl8187_rx_info *)skb->cb;
245 urb->transfer_buffer = skb_tail_pointer(skb);
247 skb_queue_tail(&priv->rx_queue, skb);
249 usb_submit_urb(urb, GFP_ATOMIC);
252 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
254 struct rtl8187_priv *priv = dev->priv;
257 struct rtl8187_rx_info *info;
259 while (skb_queue_len(&priv->rx_queue) < 8) {
260 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
263 entry = usb_alloc_urb(0, GFP_KERNEL);
268 usb_fill_bulk_urb(entry, priv->udev,
269 usb_rcvbulkpipe(priv->udev, 1),
270 skb_tail_pointer(skb),
271 RTL8187_MAX_RX, rtl8187_rx_cb, skb);
272 info = (struct rtl8187_rx_info *)skb->cb;
275 skb_queue_tail(&priv->rx_queue, skb);
276 usb_submit_urb(entry, GFP_KERNEL);
282 static int rtl8187_init_hw(struct ieee80211_hw *dev)
284 struct rtl8187_priv *priv = dev->priv;
289 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
290 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
291 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
292 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
293 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
294 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
295 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
297 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
300 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
301 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
302 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
305 reg = rtl818x_ioread8(priv, &priv->map->CMD);
307 reg |= RTL818X_CMD_RESET;
308 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
313 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
319 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
323 /* reload registers from eeprom */
324 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
329 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
330 RTL818X_EEPROM_CMD_CONFIG))
335 printk(KERN_ERR "%s: eeprom reset timeout!\n",
336 wiphy_name(dev->wiphy));
340 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
341 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
342 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
343 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
344 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
345 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
346 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
349 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
350 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
352 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
353 rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
354 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
356 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
358 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
359 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
362 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
364 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
366 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
367 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
368 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
370 // TODO: set RESP_RATE and BRSR properly
371 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
372 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
375 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
376 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
377 reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
378 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
379 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
380 rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
381 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
382 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
383 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
384 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
387 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
388 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
389 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
390 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
391 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
392 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
393 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
398 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
399 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
400 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
401 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
402 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
403 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
404 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
409 static int rtl8187_start(struct ieee80211_hw *dev)
411 struct rtl8187_priv *priv = dev->priv;
415 ret = rtl8187_init_hw(dev);
419 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
421 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
422 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
424 rtl8187_init_urbs(dev);
426 reg = RTL818X_RX_CONF_ONLYERLPKT |
427 RTL818X_RX_CONF_RX_AUTORESETPHY |
428 RTL818X_RX_CONF_BSSID |
429 RTL818X_RX_CONF_MGMT |
430 RTL818X_RX_CONF_DATA |
431 (7 << 13 /* RX FIFO threshold NONE */) |
432 (7 << 10 /* MAX RX DMA */) |
433 RTL818X_RX_CONF_BROADCAST |
434 RTL818X_RX_CONF_NICMAC;
437 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
439 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
440 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
441 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
442 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
444 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
445 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
446 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
447 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
448 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
450 reg = RTL818X_TX_CONF_CW_MIN |
451 (7 << 21 /* MAX TX DMA */) |
452 RTL818X_TX_CONF_NO_ICV;
453 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
455 reg = rtl818x_ioread8(priv, &priv->map->CMD);
456 reg |= RTL818X_CMD_TX_ENABLE;
457 reg |= RTL818X_CMD_RX_ENABLE;
458 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
463 static void rtl8187_stop(struct ieee80211_hw *dev)
465 struct rtl8187_priv *priv = dev->priv;
466 struct rtl8187_rx_info *info;
470 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
472 reg = rtl818x_ioread8(priv, &priv->map->CMD);
473 reg &= ~RTL818X_CMD_TX_ENABLE;
474 reg &= ~RTL818X_CMD_RX_ENABLE;
475 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
479 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
480 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
481 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
482 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
484 while ((skb = skb_dequeue(&priv->rx_queue))) {
485 info = (struct rtl8187_rx_info *)skb->cb;
486 usb_kill_urb(info->urb);
492 static int rtl8187_add_interface(struct ieee80211_hw *dev,
493 struct ieee80211_if_init_conf *conf)
495 struct rtl8187_priv *priv = dev->priv;
498 if (priv->mode != IEEE80211_IF_TYPE_MNTR)
501 switch (conf->type) {
502 case IEEE80211_IF_TYPE_STA:
503 priv->mode = conf->type;
509 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
510 for (i = 0; i < ETH_ALEN; i++)
511 rtl818x_iowrite8(priv, &priv->map->MAC[i],
512 ((u8 *)conf->mac_addr)[i]);
513 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
518 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
519 struct ieee80211_if_init_conf *conf)
521 struct rtl8187_priv *priv = dev->priv;
522 priv->mode = IEEE80211_IF_TYPE_MNTR;
525 static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
527 struct rtl8187_priv *priv = dev->priv;
530 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
531 /* Enable TX loopback on MAC level to avoid TX during channel
532 * changes, as this has be seen to causes problems and the
533 * card will stop work until next reset
535 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
536 reg | RTL818X_TX_CONF_LOOPBACK_MAC);
538 priv->rf->set_chan(dev, conf);
540 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
542 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
544 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
545 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
546 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
547 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
548 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
550 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
551 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
552 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
553 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
556 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
557 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
558 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
559 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
563 static int rtl8187_config_interface(struct ieee80211_hw *dev, int if_id,
564 struct ieee80211_if_conf *conf)
566 struct rtl8187_priv *priv = dev->priv;
571 for (i = 0; i < ETH_ALEN; i++)
572 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
574 if (is_valid_ether_addr(conf->bssid))
575 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
577 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
582 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
583 unsigned int changed_flags,
584 unsigned int *total_flags,
585 int mc_count, struct dev_addr_list *mclist)
587 struct rtl8187_priv *priv = dev->priv;
589 if (changed_flags & FIF_FCSFAIL)
590 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
591 if (changed_flags & FIF_CONTROL)
592 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
593 if (changed_flags & FIF_OTHER_BSS)
594 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
595 if (*total_flags & FIF_ALLMULTI || mc_count > 0)
596 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
598 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
602 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
603 *total_flags |= FIF_FCSFAIL;
604 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
605 *total_flags |= FIF_CONTROL;
606 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
607 *total_flags |= FIF_OTHER_BSS;
608 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
609 *total_flags |= FIF_ALLMULTI;
611 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
614 static const struct ieee80211_ops rtl8187_ops = {
616 .start = rtl8187_start,
617 .stop = rtl8187_stop,
618 .add_interface = rtl8187_add_interface,
619 .remove_interface = rtl8187_remove_interface,
620 .config = rtl8187_config,
621 .config_interface = rtl8187_config_interface,
622 .configure_filter = rtl8187_configure_filter,
625 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
627 struct ieee80211_hw *dev = eeprom->data;
628 struct rtl8187_priv *priv = dev->priv;
629 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
631 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
632 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
633 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
634 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
637 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
639 struct ieee80211_hw *dev = eeprom->data;
640 struct rtl8187_priv *priv = dev->priv;
641 u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
643 if (eeprom->reg_data_in)
644 reg |= RTL818X_EEPROM_CMD_WRITE;
645 if (eeprom->reg_data_out)
646 reg |= RTL818X_EEPROM_CMD_READ;
647 if (eeprom->reg_data_clock)
648 reg |= RTL818X_EEPROM_CMD_CK;
649 if (eeprom->reg_chip_select)
650 reg |= RTL818X_EEPROM_CMD_CS;
652 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
656 static int __devinit rtl8187_probe(struct usb_interface *intf,
657 const struct usb_device_id *id)
659 struct usb_device *udev = interface_to_usbdev(intf);
660 struct ieee80211_hw *dev;
661 struct rtl8187_priv *priv;
662 struct eeprom_93cx6 eeprom;
663 struct ieee80211_channel *channel;
666 DECLARE_MAC_BUF(mac);
668 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
670 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
676 SET_IEEE80211_DEV(dev, &intf->dev);
677 usb_set_intfdata(intf, dev);
682 skb_queue_head_init(&priv->rx_queue);
683 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
684 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
685 priv->map = (struct rtl818x_csr *)0xFF00;
686 priv->modes[0].mode = MODE_IEEE80211G;
687 priv->modes[0].num_rates = ARRAY_SIZE(rtl818x_rates);
688 priv->modes[0].rates = priv->rates;
689 priv->modes[0].num_channels = ARRAY_SIZE(rtl818x_channels);
690 priv->modes[0].channels = priv->channels;
691 priv->modes[1].mode = MODE_IEEE80211B;
692 priv->modes[1].num_rates = 4;
693 priv->modes[1].rates = priv->rates;
694 priv->modes[1].num_channels = ARRAY_SIZE(rtl818x_channels);
695 priv->modes[1].channels = priv->channels;
696 priv->mode = IEEE80211_IF_TYPE_MNTR;
697 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
698 IEEE80211_HW_RX_INCLUDES_FCS;
699 dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr);
702 dev->max_signal = 64;
704 for (i = 0; i < 2; i++)
705 if ((err = ieee80211_register_hwmode(dev, &priv->modes[i])))
709 eeprom.register_read = rtl8187_eeprom_register_read;
710 eeprom.register_write = rtl8187_eeprom_register_write;
711 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
712 eeprom.width = PCI_EEPROM_WIDTH_93C66;
714 eeprom.width = PCI_EEPROM_WIDTH_93C46;
716 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
719 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
720 (__le16 __force *)dev->wiphy->perm_addr, 3);
721 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
722 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
723 "generated MAC address\n");
724 random_ether_addr(dev->wiphy->perm_addr);
727 channel = priv->channels;
728 for (i = 0; i < 3; i++) {
729 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
731 (*channel++).val = txpwr & 0xFF;
732 (*channel++).val = txpwr >> 8;
734 for (i = 0; i < 2; i++) {
735 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
737 (*channel++).val = txpwr & 0xFF;
738 (*channel++).val = txpwr >> 8;
740 for (i = 0; i < 2; i++) {
741 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i,
743 (*channel++).val = txpwr & 0xFF;
744 (*channel++).val = txpwr >> 8;
747 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
750 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
751 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
752 /* 0 means asic B-cut, we should use SW 3 wire
753 * bit-by-bit banging for radio. 1 means we can use
754 * USB specific request to write radio registers */
755 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
756 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
757 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
759 priv->rf = rtl8187_detect_rf(dev);
761 err = ieee80211_register_hw(dev);
763 printk(KERN_ERR "rtl8187: Cannot register device\n");
767 printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n",
768 wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
769 priv->asic_rev, priv->rf->name);
774 ieee80211_free_hw(dev);
775 usb_set_intfdata(intf, NULL);
780 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
782 struct ieee80211_hw *dev = usb_get_intfdata(intf);
783 struct rtl8187_priv *priv;
788 ieee80211_unregister_hw(dev);
791 usb_put_dev(interface_to_usbdev(intf));
792 ieee80211_free_hw(dev);
795 static struct usb_driver rtl8187_driver = {
796 .name = KBUILD_MODNAME,
797 .id_table = rtl8187_table,
798 .probe = rtl8187_probe,
799 .disconnect = rtl8187_disconnect,
802 static int __init rtl8187_init(void)
804 return usb_register(&rtl8187_driver);
807 static void __exit rtl8187_exit(void)
809 usb_deregister(&rtl8187_driver);
812 module_init(rtl8187_init);
813 module_exit(rtl8187_exit);