drivers/net/wireless/p54/p54spi.c

   1 /*
   2  * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
   3  * Copyright 2008       Johannes Berg <johannes@sipsolutions.net>
   4  *
   5  * This driver is a port from stlc45xx:
   6  *      Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License
  10  * version 2 as published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful, but
  13  * WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20  * 02110-1301 USA
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/firmware.h>
  27 #include <linux/delay.h>
  28 #include <linux/irq.h>
  29 #include <linux/spi/spi.h>
  30 #include <linux/etherdevice.h>
  31 #include <linux/gpio.h>
  32
  33 #include "p54spi.h"
  34 #include "p54spi_eeprom.h"
  35 #include "p54.h"
  36
  37 #include "p54common.h"
  38
  39 MODULE_FIRMWARE("3826.arm");
  40 MODULE_ALIAS("stlc45xx");
  41
  42 /*
  43  * gpios should be handled in board files and provided via platform data,
  44  * but because it's currently impossible for p54spi to have a header file
  45  * in include/linux, let's use module paramaters for now
  46  */
  47
  48 static int p54spi_gpio_power = 97;
  49 module_param(p54spi_gpio_power, int, 0444);
  50 MODULE_PARM_DESC(p54spi_gpio_power, "gpio number for power line");
  51
  52 static int p54spi_gpio_irq = 87;
  53 module_param(p54spi_gpio_irq, int, 0444);
  54 MODULE_PARM_DESC(p54spi_gpio_irq, "gpio number for irq line");
  55
  56 static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
  57                               void *buf, size_t len)
  58 {
  59         struct spi_transfer t[2];
  60         struct spi_message m;
  61         __le16 addr;
  62
  63         /* We first push the address */
  64         addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
  65
  66         spi_message_init(&m);
  67         memset(t, 0, sizeof(t));
  68
  69         t[0].tx_buf = &addr;
  70         t[0].len = sizeof(addr);
  71         spi_message_add_tail(&t[0], &m);
  72
  73         t[1].rx_buf = buf;
  74         t[1].len = len;
  75         spi_message_add_tail(&t[1], &m);
  76
  77         spi_sync(priv->spi, &m);
  78 }
  79
  80
  81 static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
  82                              const void *buf, size_t len)
  83 {
  84         struct spi_transfer t[3];
  85         struct spi_message m;
  86         __le16 addr;
  87
  88         /* We first push the address */
  89         addr = cpu_to_le16(address << 8);
  90
  91         spi_message_init(&m);
  92         memset(t, 0, sizeof(t));
  93
  94         t[0].tx_buf = &addr;
  95         t[0].len = sizeof(addr);
  96         spi_message_add_tail(&t[0], &m);
  97
  98         t[1].tx_buf = buf;
  99         t[1].len = len;
 100         spi_message_add_tail(&t[1], &m);
 101
 102         if (len % 2) {
 103                 __le16 last_word;
 104                 last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
 105
 106                 t[2].tx_buf = &last_word;
 107                 t[2].len = sizeof(last_word);
 108                 spi_message_add_tail(&t[2], &m);
 109         }
 110
 111         spi_sync(priv->spi, &m);
 112 }
 113
 114 static u16 p54spi_read16(struct p54s_priv *priv, u8 addr)
 115 {
 116         __le16 val;
 117
 118         p54spi_spi_read(priv, addr, &val, sizeof(val));
 119
 120         return le16_to_cpu(val);
 121 }
 122
 123 static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
 124 {
 125         __le32 val;
 126
 127         p54spi_spi_read(priv, addr, &val, sizeof(val));
 128
 129         return le32_to_cpu(val);
 130 }
 131
 132 static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
 133 {
 134         p54spi_spi_write(priv, addr, &val, sizeof(val));
 135 }
 136
 137 static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
 138 {
 139         p54spi_spi_write(priv, addr, &val, sizeof(val));
 140 }
 141
 142 struct p54spi_spi_reg {
 143         u16 address;            /* __le16 ? */
 144         u16 length;
 145         char *name;
 146 };
 147
 148 static const struct p54spi_spi_reg p54spi_registers_array[] =
 149 {
 150         { SPI_ADRS_ARM_INTERRUPTS,      32, "ARM_INT     " },
 151         { SPI_ADRS_ARM_INT_EN,          32, "ARM_INT_ENA " },
 152         { SPI_ADRS_HOST_INTERRUPTS,     32, "HOST_INT    " },
 153         { SPI_ADRS_HOST_INT_EN,         32, "HOST_INT_ENA" },
 154         { SPI_ADRS_HOST_INT_ACK,        32, "HOST_INT_ACK" },
 155         { SPI_ADRS_GEN_PURP_1,          32, "GP1_COMM    " },
 156         { SPI_ADRS_GEN_PURP_2,          32, "GP2_COMM    " },
 157         { SPI_ADRS_DEV_CTRL_STAT,       32, "DEV_CTRL_STA" },
 158         { SPI_ADRS_DMA_DATA,            16, "DMA_DATA    " },
 159         { SPI_ADRS_DMA_WRITE_CTRL,      16, "DMA_WR_CTRL " },
 160         { SPI_ADRS_DMA_WRITE_LEN,       16, "DMA_WR_LEN  " },
 161         { SPI_ADRS_DMA_WRITE_BASE,      32, "DMA_WR_BASE " },
 162         { SPI_ADRS_DMA_READ_CTRL,       16, "DMA_RD_CTRL " },
 163         { SPI_ADRS_DMA_READ_LEN,        16, "DMA_RD_LEN  " },
 164         { SPI_ADRS_DMA_WRITE_BASE,      32, "DMA_RD_BASE " }
 165 };
 166
 167 static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, __le32 bits)
 168 {
 169         int i;
 170         __le32 buffer;
 171
 172         for (i = 0; i < 2000; i++) {
 173                 p54spi_spi_read(priv, reg, &buffer, sizeof(buffer));
 174                 if ((buffer & bits) == bits)
 175                         return 1;
 176
 177                 msleep(1);
 178         }
 179         return 0;
 180 }
 181
 182 static int p54spi_spi_write_dma(struct p54s_priv *priv, __le32 base,
 183                                 const void *buf, size_t len)
 184 {
 185         p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
 186                        cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
 187
 188         if (p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL,
 189                             cpu_to_le32(HOST_ALLOWED)) == 0) {
 190                 dev_err(&priv->spi->dev, "spi_write_dma not allowed "
 191                         "to DMA write.");
 192                 return -EAGAIN;
 193         }
 194
 195         p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN, cpu_to_le16(len));
 196         p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE, base);
 197         p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, buf, len);
 198         return 0;
 199 }
 200
 201 static int p54spi_request_firmware(struct ieee80211_hw *dev)
 202 {
 203         struct p54s_priv *priv = dev->priv;
 204         int ret;
 205
 206         /* FIXME: should driver use it's own struct device? */
 207         ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
 208
 209         if (ret < 0) {
 210                 dev_err(&priv->spi->dev, "request_firmware() failed: %d", ret);
 211                 return ret;
 212         }
 213
 214         ret = p54_parse_firmware(dev, priv->firmware);
 215         if (ret) {
 216                 release_firmware(priv->firmware);
 217                 return ret;
 218         }
 219
 220         return 0;
 221 }
 222
 223 static int p54spi_request_eeprom(struct ieee80211_hw *dev)
 224 {
 225         struct p54s_priv *priv = dev->priv;
 226         const struct firmware *eeprom;
 227         int ret;
 228
 229         /*
 230          * allow users to customize their eeprom.
 231          */
 232
 233         ret = request_firmware(&eeprom, "3826.eeprom", &priv->spi->dev);
 234         if (ret < 0) {
 235                 dev_info(&priv->spi->dev, "loading default eeprom...\n");
 236                 ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
 237                                        sizeof(p54spi_eeprom));
 238         } else {
 239                 dev_info(&priv->spi->dev, "loading user eeprom...\n");
 240                 ret = p54_parse_eeprom(dev, (void *) eeprom->data,
 241                                        (int)eeprom->size);
 242                 release_firmware(eeprom);
 243         }
 244         return ret;
 245 }
 246
 247 static int p54spi_upload_firmware(struct ieee80211_hw *dev)
 248 {
 249         struct p54s_priv *priv = dev->priv;
 250         unsigned long fw_len, _fw_len;
 251         unsigned int offset = 0;
 252         int err = 0;
 253         u8 *fw;
 254
 255         fw_len = priv->firmware->size;
 256         fw = kmemdup(priv->firmware->data, fw_len, GFP_KERNEL);
 257         if (!fw)
 258                 return -ENOMEM;
 259
 260         /* stop the device */
 261         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
 262                        SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
 263                        SPI_CTRL_STAT_START_HALTED));
 264
 265         msleep(TARGET_BOOT_SLEEP);
 266
 267         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
 268                        SPI_CTRL_STAT_HOST_OVERRIDE |
 269                        SPI_CTRL_STAT_START_HALTED));
 270
 271         msleep(TARGET_BOOT_SLEEP);
 272
 273         while (fw_len > 0) {
 274                 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
 275
 276                 err = p54spi_spi_write_dma(priv, cpu_to_le32(
 277                                            ISL38XX_DEV_FIRMWARE_ADDR + offset),
 278                                            (fw + offset), _fw_len);
 279                 if (err < 0)
 280                         goto out;
 281
 282                 fw_len -= _fw_len;
 283                 offset += _fw_len;
 284         }
 285
 286         BUG_ON(fw_len != 0);
 287
 288         /* enable host interrupts */
 289         p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
 290                        cpu_to_le32(SPI_HOST_INTS_DEFAULT));
 291
 292         /* boot the device */
 293         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
 294                        SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
 295                        SPI_CTRL_STAT_RAM_BOOT));
 296
 297         msleep(TARGET_BOOT_SLEEP);
 298
 299         p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
 300                        SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
 301         msleep(TARGET_BOOT_SLEEP);
 302
 303 out:
 304         kfree(fw);
 305         return err;
 306 }
 307
 308 static void p54spi_power_off(struct p54s_priv *priv)
 309 {
 310         disable_irq(gpio_to_irq(p54spi_gpio_irq));
 311         gpio_set_value(p54spi_gpio_power, 0);
 312 }
 313
 314 static void p54spi_power_on(struct p54s_priv *priv)
 315 {
 316         gpio_set_value(p54spi_gpio_power, 1);
 317         enable_irq(gpio_to_irq(p54spi_gpio_irq));
 318
 319         /*
 320          * need to wait a while before device can be accessed, the lenght
 321          * is just a guess
 322          */
 323         msleep(10);
 324 }
 325
 326 static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
 327 {
 328         p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
 329 }
 330
 331 static void p54spi_wakeup(struct p54s_priv *priv)
 332 {
 333         unsigned long timeout;
 334         u32 ints;
 335
 336         /* wake the chip */
 337         p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
 338                        cpu_to_le32(SPI_TARGET_INT_WAKEUP));
 339
 340         /* And wait for the READY interrupt */
 341         timeout = jiffies + HZ;
 342
 343         ints =  p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
 344         while (!(ints & SPI_HOST_INT_READY)) {
 345                 if (time_after(jiffies, timeout))
 346                                 goto out;
 347                 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
 348         }
 349
 350         p54spi_int_ack(priv, SPI_HOST_INT_READY);
 351
 352 out:
 353         return;
 354 }
 355
 356 static inline void p54spi_sleep(struct p54s_priv *priv)
 357 {
 358         p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
 359                        cpu_to_le32(SPI_TARGET_INT_SLEEP));
 360 }
 361
 362 static void p54spi_int_ready(struct p54s_priv *priv)
 363 {
 364         p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
 365                        SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
 366
 367         switch (priv->fw_state) {
 368         case FW_STATE_BOOTING:
 369                 priv->fw_state = FW_STATE_READY;
 370                 complete(&priv->fw_comp);
 371                 break;
 372         case FW_STATE_RESETTING:
 373                 priv->fw_state = FW_STATE_READY;
 374                 /* TODO: reinitialize state */
 375                 break;
 376         default:
 377                 break;
 378         }
 379 }
 380
 381 static int p54spi_rx(struct p54s_priv *priv)
 382 {
 383         struct sk_buff *skb;
 384         u16 len;
 385
 386         p54spi_wakeup(priv);
 387
 388         /* dummy read to flush SPI DMA controller bug */
 389         p54spi_read16(priv, SPI_ADRS_GEN_PURP_1);
 390
 391         len = p54spi_read16(priv, SPI_ADRS_DMA_DATA);
 392
 393         if (len == 0) {
 394                 dev_err(&priv->spi->dev, "rx request of zero bytes");
 395                 return 0;
 396         }
 397
 398
 399         /* Firmware may insert up to 4 padding bytes after the lmac header,
 400          * but it does not amend the size of SPI data transfer.
 401          * Such packets has correct data size in header, thus referencing
 402          * past the end of allocated skb. Reserve extra 4 bytes for this case */
 403         skb = dev_alloc_skb(len + 4);
 404         if (!skb) {
 405                 dev_err(&priv->spi->dev, "could not alloc skb");
 406                 return 0;
 407         }
 408
 409         p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, skb_put(skb, len), len);
 410         p54spi_sleep(priv);
 411         /* Put additional bytes to compensate for the possible
 412          * alignment-caused truncation */
 413         skb_put(skb, 4);
 414
 415         if (p54_rx(priv->hw, skb) == 0)
 416                 dev_kfree_skb(skb);
 417
 418         return 0;
 419 }
 420
 421
 422 static irqreturn_t p54spi_interrupt(int irq, void *config)
 423 {
 424         struct spi_device *spi = config;
 425         struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
 426
 427         queue_work(priv->hw->workqueue, &priv->work);
 428
 429         return IRQ_HANDLED;
 430 }
 431
 432 static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
 433 {
 434         struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
 435         unsigned long timeout;
 436         int ret = 0;
 437         u32 ints;
 438
 439         p54spi_wakeup(priv);
 440
 441         ret = p54spi_spi_write_dma(priv, hdr->req_id, skb->data, skb->len);
 442         if (ret < 0)
 443                 goto out;
 444
 445         timeout = jiffies + 2 * HZ;
 446         ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
 447         while (!(ints & SPI_HOST_INT_WR_READY)) {
 448                 if (time_after(jiffies, timeout)) {
 449                         dev_err(&priv->spi->dev, "WR_READY timeout\n");
 450                         ret = -1;
 451                         goto out;
 452                 }
 453                 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
 454         }
 455
 456         p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
 457         p54spi_sleep(priv);
 458
 459         if (FREE_AFTER_TX(skb))
 460                 p54_free_skb(priv->hw, skb);
 461 out:
 462         return ret;
 463 }
 464
 465 static int p54spi_wq_tx(struct p54s_priv *priv)
 466 {
 467         struct p54s_tx_info *entry;
 468         struct sk_buff *skb;
 469         struct ieee80211_tx_info *info;
 470         struct p54_tx_info *minfo;
 471         struct p54s_tx_info *dinfo;
 472         unsigned long flags;
 473         int ret = 0;
 474
 475         spin_lock_irqsave(&priv->tx_lock, flags);
 476
 477         while (!list_empty(&priv->tx_pending)) {
 478                 entry = list_entry(priv->tx_pending.next,
 479                                    struct p54s_tx_info, tx_list);
 480
 481                 list_del_init(&entry->tx_list);
 482
 483                 spin_unlock_irqrestore(&priv->tx_lock, flags);
 484
 485                 dinfo = container_of((void *) entry, struct p54s_tx_info,
 486                                      tx_list);
 487                 minfo = container_of((void *) dinfo, struct p54_tx_info,
 488                                      data);
 489                 info = container_of((void *) minfo, struct ieee80211_tx_info,
 490                                     rate_driver_data);
 491                 skb = container_of((void *) info, struct sk_buff, cb);
 492
 493                 ret = p54spi_tx_frame(priv, skb);
 494
 495                 if (ret < 0) {
 496                         p54_free_skb(priv->hw, skb);
 497                         return ret;
 498                 }
 499
 500                 spin_lock_irqsave(&priv->tx_lock, flags);
 501         }
 502         spin_unlock_irqrestore(&priv->tx_lock, flags);
 503         return ret;
 504 }
 505
 506 static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 507 {
 508         struct p54s_priv *priv = dev->priv;
 509         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 510         struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
 511         struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
 512         unsigned long flags;
 513
 514         BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
 515
 516         spin_lock_irqsave(&priv->tx_lock, flags);
 517         list_add_tail(&di->tx_list, &priv->tx_pending);
 518         spin_unlock_irqrestore(&priv->tx_lock, flags);
 519
 520         queue_work(priv->hw->workqueue, &priv->work);
 521 }
 522
 523 static void p54spi_work(struct work_struct *work)
 524 {
 525         struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
 526         u32 ints;
 527         int ret;
 528
 529         mutex_lock(&priv->mutex);
 530
 531         if (priv->fw_state == FW_STATE_OFF &&
 532             priv->fw_state == FW_STATE_RESET)
 533                 goto out;
 534
 535         ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
 536
 537         if (ints & SPI_HOST_INT_READY) {
 538                 p54spi_int_ready(priv);
 539                 p54spi_int_ack(priv, SPI_HOST_INT_READY);
 540         }
 541
 542         if (priv->fw_state != FW_STATE_READY)
 543                 goto out;
 544
 545         if (ints & SPI_HOST_INT_UPDATE) {
 546                 p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
 547                 ret = p54spi_rx(priv);
 548                 if (ret < 0)
 549                         goto out;
 550         }
 551         if (ints & SPI_HOST_INT_SW_UPDATE) {
 552                 p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
 553                 ret = p54spi_rx(priv);
 554                 if (ret < 0)
 555                         goto out;
 556         }
 557
 558         ret = p54spi_wq_tx(priv);
 559         if (ret < 0)
 560                 goto out;
 561
 562         ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
 563
 564 out:
 565         mutex_unlock(&priv->mutex);
 566 }
 567
 568 static int p54spi_op_start(struct ieee80211_hw *dev)
 569 {
 570         struct p54s_priv *priv = dev->priv;
 571         unsigned long timeout;
 572         int ret = 0;
 573
 574         if (mutex_lock_interruptible(&priv->mutex)) {
 575                 ret = -EINTR;
 576                 goto out;
 577         }
 578
 579         priv->fw_state = FW_STATE_BOOTING;
 580
 581         p54spi_power_on(priv);
 582
 583         ret = p54spi_upload_firmware(dev);
 584         if (ret < 0) {
 585                 p54spi_power_off(priv);
 586                 goto out_unlock;
 587         }
 588
 589         mutex_unlock(&priv->mutex);
 590
 591         timeout = msecs_to_jiffies(2000);
 592         timeout = wait_for_completion_interruptible_timeout(&priv->fw_comp,
 593                                                             timeout);
 594         if (!timeout) {
 595                 dev_err(&priv->spi->dev, "firmware boot failed");
 596                 p54spi_power_off(priv);
 597                 ret = -1;
 598                 goto out;
 599         }
 600
 601         if (mutex_lock_interruptible(&priv->mutex)) {
 602                 ret = -EINTR;
 603                 p54spi_power_off(priv);
 604                 goto out;
 605         }
 606
 607         WARN_ON(priv->fw_state != FW_STATE_READY);
 608
 609 out_unlock:
 610         mutex_unlock(&priv->mutex);
 611
 612 out:
 613         return ret;
 614 }
 615
 616 static void p54spi_op_stop(struct ieee80211_hw *dev)
 617 {
 618         struct p54s_priv *priv = dev->priv;
 619         unsigned long flags;
 620
 621         if (mutex_lock_interruptible(&priv->mutex)) {
 622                 /* FIXME: how to handle this error? */
 623                 return;
 624         }
 625
 626         WARN_ON(priv->fw_state != FW_STATE_READY);
 627
 628         cancel_work_sync(&priv->work);
 629
 630         p54spi_power_off(priv);
 631         spin_lock_irqsave(&priv->tx_lock, flags);
 632         INIT_LIST_HEAD(&priv->tx_pending);
 633         spin_unlock_irqrestore(&priv->tx_lock, flags);
 634
 635         priv->fw_state = FW_STATE_OFF;
 636         mutex_unlock(&priv->mutex);
 637 }
 638
 639 static int __devinit p54spi_probe(struct spi_device *spi)
 640 {
 641         struct p54s_priv *priv = NULL;
 642         struct ieee80211_hw *hw;
 643         int ret = -EINVAL;
 644
 645         hw = p54_init_common(sizeof(*priv));
 646         if (!hw) {
 647                 dev_err(&priv->spi->dev, "could not alloc ieee80211_hw");
 648                 return -ENOMEM;
 649         }
 650
 651         priv = hw->priv;
 652         priv->hw = hw;
 653         dev_set_drvdata(&spi->dev, priv);
 654         priv->spi = spi;
 655
 656         spi->bits_per_word = 16;
 657         spi->max_speed_hz = 24000000;
 658
 659         ret = spi_setup(spi);
 660         if (ret < 0) {
 661                 dev_err(&priv->spi->dev, "spi_setup failed");
 662                 goto err_free_common;
 663         }
 664
 665         ret = gpio_request(p54spi_gpio_power, "p54spi power");
 666         if (ret < 0) {
 667                 dev_err(&priv->spi->dev, "power GPIO request failed: %d", ret);
 668                 goto err_free_common;
 669         }
 670
 671         ret = gpio_request(p54spi_gpio_irq, "p54spi irq");
 672         if (ret < 0) {
 673                 dev_err(&priv->spi->dev, "irq GPIO request failed: %d", ret);
 674                 goto err_free_common;
 675         }
 676
 677         gpio_direction_output(p54spi_gpio_power, 0);
 678         gpio_direction_input(p54spi_gpio_irq);
 679
 680         ret = request_irq(gpio_to_irq(p54spi_gpio_irq),
 681                           p54spi_interrupt, IRQF_DISABLED, "p54spi",
 682                           priv->spi);
 683         if (ret < 0) {
 684                 dev_err(&priv->spi->dev, "request_irq() failed");
 685                 goto err_free_common;
 686         }
 687
 688         set_irq_type(gpio_to_irq(p54spi_gpio_irq),
 689                      IRQ_TYPE_EDGE_RISING);
 690
 691         disable_irq(gpio_to_irq(p54spi_gpio_irq));
 692
 693         INIT_WORK(&priv->work, p54spi_work);
 694         init_completion(&priv->fw_comp);
 695         INIT_LIST_HEAD(&priv->tx_pending);
 696         mutex_init(&priv->mutex);
 697         SET_IEEE80211_DEV(hw, &spi->dev);
 698         priv->common.open = p54spi_op_start;
 699         priv->common.stop = p54spi_op_stop;
 700         priv->common.tx = p54spi_op_tx;
 701
 702         ret = p54spi_request_firmware(hw);
 703         if (ret < 0)
 704                 goto err_free_common;
 705
 706         ret = p54spi_request_eeprom(hw);
 707         if (ret)
 708                 goto err_free_common;
 709
 710         ret = p54_register_common(hw, &priv->spi->dev);
 711         if (ret)
 712                 goto err_free_common;
 713
 714         return 0;
 715
 716 err_free_common:
 717         p54_free_common(priv->hw);
 718         return ret;
 719 }
 720
 721 static int __devexit p54spi_remove(struct spi_device *spi)
 722 {
 723         struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
 724
 725         ieee80211_unregister_hw(priv->hw);
 726
 727         free_irq(gpio_to_irq(p54spi_gpio_irq), spi);
 728
 729         gpio_free(p54spi_gpio_power);
 730         gpio_free(p54spi_gpio_irq);
 731         release_firmware(priv->firmware);
 732
 733         mutex_destroy(&priv->mutex);
 734
 735         p54_free_common(priv->hw);
 736         ieee80211_free_hw(priv->hw);
 737
 738         return 0;
 739 }
 740
 741
 742 static struct spi_driver p54spi_driver = {
 743         .driver = {
 744                 /* use cx3110x name because board-n800.c uses that for the
 745                  * SPI port */
 746                 .name           = "cx3110x",
 747                 .bus            = &spi_bus_type,
 748                 .owner          = THIS_MODULE,
 749         },
 750
 751         .probe          = p54spi_probe,
 752         .remove         = __devexit_p(p54spi_remove),
 753 };
 754
 755 static int __init p54spi_init(void)
 756 {
 757         int ret;
 758
 759         ret = spi_register_driver(&p54spi_driver);
 760         if (ret < 0) {
 761                 printk(KERN_ERR "failed to register SPI driver: %d", ret);
 762                 goto out;
 763         }
 764
 765 out:
 766         return ret;
 767 }
 768
 769 static void __exit p54spi_exit(void)
 770 {
 771         spi_unregister_driver(&p54spi_driver);
 772 }
 773
 774 module_init(p54spi_init);
 775 module_exit(p54spi_exit);
 776
 777 MODULE_LICENSE("GPL");
 778 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");