2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/sched.h>
16 #include <linux/spinlock.h>
17 #include <linux/list.h>
18 #include <linux/pci.h>
19 #include <linux/delay.h>
20 #include <linux/completion.h>
21 #include <linux/etherdevice.h>
22 #include <linux/slab.h>
23 #include <net/mac80211.h>
24 #include <linux/moduleparam.h>
25 #include <linux/firmware.h>
26 #include <linux/workqueue.h>
28 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
29 #define MWL8K_NAME KBUILD_MODNAME
30 #define MWL8K_VERSION "0.12"
32 /* Module parameters */
33 static unsigned ap_mode_default;
34 module_param(ap_mode_default, bool, 0);
35 MODULE_PARM_DESC(ap_mode_default,
36 "Set to 1 to make ap mode the default instead of sta mode");
38 /* Register definitions */
39 #define MWL8K_HIU_GEN_PTR 0x00000c10
40 #define MWL8K_MODE_STA 0x0000005a
41 #define MWL8K_MODE_AP 0x000000a5
42 #define MWL8K_HIU_INT_CODE 0x00000c14
43 #define MWL8K_FWSTA_READY 0xf0f1f2f4
44 #define MWL8K_FWAP_READY 0xf1f2f4a5
45 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
46 #define MWL8K_HIU_SCRATCH 0x00000c40
48 /* Host->device communications */
49 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
50 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
51 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
52 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
53 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
54 #define MWL8K_H2A_INT_DUMMY (1 << 20)
55 #define MWL8K_H2A_INT_RESET (1 << 15)
56 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
57 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
59 /* Device->host communications */
60 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
61 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
62 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
63 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
64 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
65 #define MWL8K_A2H_INT_DUMMY (1 << 20)
66 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
67 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
68 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
69 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
70 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
71 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
72 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
73 #define MWL8K_A2H_INT_RX_READY (1 << 1)
74 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
76 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
77 MWL8K_A2H_INT_CHNL_SWITCHED | \
78 MWL8K_A2H_INT_QUEUE_EMPTY | \
79 MWL8K_A2H_INT_RADAR_DETECT | \
80 MWL8K_A2H_INT_RADIO_ON | \
81 MWL8K_A2H_INT_RADIO_OFF | \
82 MWL8K_A2H_INT_MAC_EVENT | \
83 MWL8K_A2H_INT_OPC_DONE | \
84 MWL8K_A2H_INT_RX_READY | \
85 MWL8K_A2H_INT_TX_DONE)
87 #define MWL8K_RX_QUEUES 1
88 #define MWL8K_TX_QUEUES 4
92 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
93 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
94 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
95 __le16 *qos, s8 *noise);
98 struct mwl8k_device_info {
103 struct rxd_ops *ap_rxd_ops;
107 struct mwl8k_rx_queue {
110 /* hw receives here */
113 /* refill descs here */
120 DEFINE_DMA_UNMAP_ADDR(dma);
124 struct mwl8k_tx_queue {
125 /* hw transmits here */
128 /* sw appends here */
132 struct mwl8k_tx_desc *txd;
134 struct sk_buff **skb;
138 struct ieee80211_hw *hw;
139 struct pci_dev *pdev;
141 struct mwl8k_device_info *device_info;
147 const struct firmware *fw_helper;
148 const struct firmware *fw_ucode;
150 /* hardware/firmware parameters */
152 struct rxd_ops *rxd_ops;
153 struct ieee80211_supported_band band_24;
154 struct ieee80211_channel channels_24[14];
155 struct ieee80211_rate rates_24[14];
156 struct ieee80211_supported_band band_50;
157 struct ieee80211_channel channels_50[4];
158 struct ieee80211_rate rates_50[9];
159 u32 ap_macids_supported;
160 u32 sta_macids_supported;
162 /* firmware access */
163 struct mutex fw_mutex;
164 struct task_struct *fw_mutex_owner;
166 struct completion *hostcmd_wait;
168 /* lock held over TX and TX reap */
171 /* TX quiesce completion, protected by fw_mutex and tx_lock */
172 struct completion *tx_wait;
174 /* List of interfaces. */
176 struct list_head vif_list;
178 /* power management status cookie from firmware */
180 dma_addr_t cookie_dma;
187 * Running count of TX packets in flight, to avoid
188 * iterating over the transmit rings each time.
192 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
193 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
196 bool radio_short_preamble;
197 bool sniffer_enabled;
200 /* XXX need to convert this to handle multiple interfaces */
202 u8 capture_bssid[ETH_ALEN];
203 struct sk_buff *beacon_skb;
206 * This FJ worker has to be global as it is scheduled from the
207 * RX handler. At this point we don't know which interface it
208 * belongs to until the list of bssids waiting to complete join
211 struct work_struct finalize_join_worker;
213 /* Tasklet to perform TX reclaim. */
214 struct tasklet_struct poll_tx_task;
216 /* Tasklet to perform RX. */
217 struct tasklet_struct poll_rx_task;
219 /* Most recently reported noise in dBm */
223 * preserve the queue configurations so they can be restored if/when
224 * the firmware image is swapped.
226 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_QUEUES];
228 /* async firmware loading state */
232 struct completion firmware_loading_complete;
235 /* Per interface specific private data */
237 struct list_head list;
238 struct ieee80211_vif *vif;
240 /* Firmware macid for this vif. */
243 /* Non AMPDU sequence number assigned by driver. */
246 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
249 /* Index into station database. Returned by UPDATE_STADB. */
252 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
254 static const struct ieee80211_channel mwl8k_channels_24[] = {
255 { .center_freq = 2412, .hw_value = 1, },
256 { .center_freq = 2417, .hw_value = 2, },
257 { .center_freq = 2422, .hw_value = 3, },
258 { .center_freq = 2427, .hw_value = 4, },
259 { .center_freq = 2432, .hw_value = 5, },
260 { .center_freq = 2437, .hw_value = 6, },
261 { .center_freq = 2442, .hw_value = 7, },
262 { .center_freq = 2447, .hw_value = 8, },
263 { .center_freq = 2452, .hw_value = 9, },
264 { .center_freq = 2457, .hw_value = 10, },
265 { .center_freq = 2462, .hw_value = 11, },
266 { .center_freq = 2467, .hw_value = 12, },
267 { .center_freq = 2472, .hw_value = 13, },
268 { .center_freq = 2484, .hw_value = 14, },
271 static const struct ieee80211_rate mwl8k_rates_24[] = {
272 { .bitrate = 10, .hw_value = 2, },
273 { .bitrate = 20, .hw_value = 4, },
274 { .bitrate = 55, .hw_value = 11, },
275 { .bitrate = 110, .hw_value = 22, },
276 { .bitrate = 220, .hw_value = 44, },
277 { .bitrate = 60, .hw_value = 12, },
278 { .bitrate = 90, .hw_value = 18, },
279 { .bitrate = 120, .hw_value = 24, },
280 { .bitrate = 180, .hw_value = 36, },
281 { .bitrate = 240, .hw_value = 48, },
282 { .bitrate = 360, .hw_value = 72, },
283 { .bitrate = 480, .hw_value = 96, },
284 { .bitrate = 540, .hw_value = 108, },
285 { .bitrate = 720, .hw_value = 144, },
288 static const struct ieee80211_channel mwl8k_channels_50[] = {
289 { .center_freq = 5180, .hw_value = 36, },
290 { .center_freq = 5200, .hw_value = 40, },
291 { .center_freq = 5220, .hw_value = 44, },
292 { .center_freq = 5240, .hw_value = 48, },
295 static const struct ieee80211_rate mwl8k_rates_50[] = {
296 { .bitrate = 60, .hw_value = 12, },
297 { .bitrate = 90, .hw_value = 18, },
298 { .bitrate = 120, .hw_value = 24, },
299 { .bitrate = 180, .hw_value = 36, },
300 { .bitrate = 240, .hw_value = 48, },
301 { .bitrate = 360, .hw_value = 72, },
302 { .bitrate = 480, .hw_value = 96, },
303 { .bitrate = 540, .hw_value = 108, },
304 { .bitrate = 720, .hw_value = 144, },
307 /* Set or get info from Firmware */
308 #define MWL8K_CMD_GET 0x0000
309 #define MWL8K_CMD_SET 0x0001
310 #define MWL8K_CMD_SET_LIST 0x0002
312 /* Firmware command codes */
313 #define MWL8K_CMD_CODE_DNLD 0x0001
314 #define MWL8K_CMD_GET_HW_SPEC 0x0003
315 #define MWL8K_CMD_SET_HW_SPEC 0x0004
316 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
317 #define MWL8K_CMD_GET_STAT 0x0014
318 #define MWL8K_CMD_RADIO_CONTROL 0x001c
319 #define MWL8K_CMD_RF_TX_POWER 0x001e
320 #define MWL8K_CMD_TX_POWER 0x001f
321 #define MWL8K_CMD_RF_ANTENNA 0x0020
322 #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
323 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
324 #define MWL8K_CMD_SET_POST_SCAN 0x0108
325 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
326 #define MWL8K_CMD_SET_AID 0x010d
327 #define MWL8K_CMD_SET_RATE 0x0110
328 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
329 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
330 #define MWL8K_CMD_SET_SLOT 0x0114
331 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
332 #define MWL8K_CMD_SET_WMM_MODE 0x0123
333 #define MWL8K_CMD_MIMO_CONFIG 0x0125
334 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
335 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
336 #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
337 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
338 #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
339 #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
340 #define MWL8K_CMD_UPDATE_STADB 0x1123
342 static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
344 u16 command = le16_to_cpu(cmd);
346 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
347 snprintf(buf, bufsize, "%s", #x);\
350 switch (command & ~0x8000) {
351 MWL8K_CMDNAME(CODE_DNLD);
352 MWL8K_CMDNAME(GET_HW_SPEC);
353 MWL8K_CMDNAME(SET_HW_SPEC);
354 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
355 MWL8K_CMDNAME(GET_STAT);
356 MWL8K_CMDNAME(RADIO_CONTROL);
357 MWL8K_CMDNAME(RF_TX_POWER);
358 MWL8K_CMDNAME(TX_POWER);
359 MWL8K_CMDNAME(RF_ANTENNA);
360 MWL8K_CMDNAME(SET_BEACON);
361 MWL8K_CMDNAME(SET_PRE_SCAN);
362 MWL8K_CMDNAME(SET_POST_SCAN);
363 MWL8K_CMDNAME(SET_RF_CHANNEL);
364 MWL8K_CMDNAME(SET_AID);
365 MWL8K_CMDNAME(SET_RATE);
366 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
367 MWL8K_CMDNAME(RTS_THRESHOLD);
368 MWL8K_CMDNAME(SET_SLOT);
369 MWL8K_CMDNAME(SET_EDCA_PARAMS);
370 MWL8K_CMDNAME(SET_WMM_MODE);
371 MWL8K_CMDNAME(MIMO_CONFIG);
372 MWL8K_CMDNAME(USE_FIXED_RATE);
373 MWL8K_CMDNAME(ENABLE_SNIFFER);
374 MWL8K_CMDNAME(SET_MAC_ADDR);
375 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
376 MWL8K_CMDNAME(BSS_START);
377 MWL8K_CMDNAME(SET_NEW_STN);
378 MWL8K_CMDNAME(UPDATE_STADB);
380 snprintf(buf, bufsize, "0x%x", cmd);
387 /* Hardware and firmware reset */
388 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
390 iowrite32(MWL8K_H2A_INT_RESET,
391 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
392 iowrite32(MWL8K_H2A_INT_RESET,
393 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
397 /* Release fw image */
398 static void mwl8k_release_fw(const struct firmware **fw)
402 release_firmware(*fw);
406 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
408 mwl8k_release_fw(&priv->fw_ucode);
409 mwl8k_release_fw(&priv->fw_helper);
412 /* states for asynchronous f/w loading */
413 static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
416 FW_STATE_LOADING_PREF,
417 FW_STATE_LOADING_ALT,
421 /* Request fw image */
422 static int mwl8k_request_fw(struct mwl8k_priv *priv,
423 const char *fname, const struct firmware **fw,
426 /* release current image */
428 mwl8k_release_fw(fw);
431 return request_firmware_nowait(THIS_MODULE, 1, fname,
432 &priv->pdev->dev, GFP_KERNEL,
433 priv, mwl8k_fw_state_machine);
435 return request_firmware(fw, fname, &priv->pdev->dev);
438 static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
441 struct mwl8k_device_info *di = priv->device_info;
444 if (di->helper_image != NULL) {
446 rc = mwl8k_request_fw(priv, di->helper_image,
447 &priv->fw_helper, true);
449 rc = mwl8k_request_fw(priv, di->helper_image,
450 &priv->fw_helper, false);
452 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
453 pci_name(priv->pdev), di->helper_image);
461 * if we get here, no helper image is needed. Skip the
462 * FW_STATE_INIT state.
464 priv->fw_state = FW_STATE_LOADING_PREF;
465 rc = mwl8k_request_fw(priv, fw_image,
469 rc = mwl8k_request_fw(priv, fw_image,
470 &priv->fw_ucode, false);
472 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
473 pci_name(priv->pdev), fw_image);
474 mwl8k_release_fw(&priv->fw_helper);
481 struct mwl8k_cmd_pkt {
494 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
496 void __iomem *regs = priv->regs;
500 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
501 if (pci_dma_mapping_error(priv->pdev, dma_addr))
504 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
505 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
506 iowrite32(MWL8K_H2A_INT_DOORBELL,
507 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
508 iowrite32(MWL8K_H2A_INT_DUMMY,
509 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
515 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
516 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
517 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
525 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
527 return loops ? 0 : -ETIMEDOUT;
530 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
531 const u8 *data, size_t length)
533 struct mwl8k_cmd_pkt *cmd;
537 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
541 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
548 int block_size = length > 256 ? 256 : length;
550 memcpy(cmd->payload, data + done, block_size);
551 cmd->length = cpu_to_le16(block_size);
553 rc = mwl8k_send_fw_load_cmd(priv, cmd,
554 sizeof(*cmd) + block_size);
559 length -= block_size;
564 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
572 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
573 const u8 *data, size_t length)
575 unsigned char *buffer;
576 int may_continue, rc = 0;
577 u32 done, prev_block_size;
579 buffer = kmalloc(1024, GFP_KERNEL);
586 while (may_continue > 0) {
589 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
590 if (block_size & 1) {
594 done += prev_block_size;
595 length -= prev_block_size;
598 if (block_size > 1024 || block_size > length) {
608 if (block_size == 0) {
615 prev_block_size = block_size;
616 memcpy(buffer, data + done, block_size);
618 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
623 if (!rc && length != 0)
631 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
633 struct mwl8k_priv *priv = hw->priv;
634 const struct firmware *fw = priv->fw_ucode;
638 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
639 const struct firmware *helper = priv->fw_helper;
641 if (helper == NULL) {
642 printk(KERN_ERR "%s: helper image needed but none "
643 "given\n", pci_name(priv->pdev));
647 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
649 printk(KERN_ERR "%s: unable to load firmware "
650 "helper image\n", pci_name(priv->pdev));
655 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
657 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
661 printk(KERN_ERR "%s: unable to load firmware image\n",
662 pci_name(priv->pdev));
666 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
672 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
673 if (ready_code == MWL8K_FWAP_READY) {
676 } else if (ready_code == MWL8K_FWSTA_READY) {
685 return loops ? 0 : -ETIMEDOUT;
689 /* DMA header used by firmware and hardware. */
690 struct mwl8k_dma_data {
692 struct ieee80211_hdr wh;
696 /* Routines to add/remove DMA header from skb. */
697 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
699 struct mwl8k_dma_data *tr;
702 tr = (struct mwl8k_dma_data *)skb->data;
703 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
705 if (hdrlen != sizeof(tr->wh)) {
706 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
707 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
708 *((__le16 *)(tr->data - 2)) = qos;
710 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
714 if (hdrlen != sizeof(*tr))
715 skb_pull(skb, sizeof(*tr) - hdrlen);
719 mwl8k_add_dma_header(struct sk_buff *skb, int tail_pad)
721 struct ieee80211_hdr *wh;
724 struct mwl8k_dma_data *tr;
727 * Add a firmware DMA header; the firmware requires that we
728 * present a 2-byte payload length followed by a 4-address
729 * header (without QoS field), followed (optionally) by any
730 * WEP/ExtIV header (but only filled in for CCMP).
732 wh = (struct ieee80211_hdr *)skb->data;
734 hdrlen = ieee80211_hdrlen(wh->frame_control);
735 reqd_hdrlen = sizeof(*tr);
737 if (hdrlen != reqd_hdrlen)
738 skb_push(skb, reqd_hdrlen - hdrlen);
740 if (ieee80211_is_data_qos(wh->frame_control))
741 hdrlen -= IEEE80211_QOS_CTL_LEN;
743 tr = (struct mwl8k_dma_data *)skb->data;
745 memmove(&tr->wh, wh, hdrlen);
746 if (hdrlen != sizeof(tr->wh))
747 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
750 * Firmware length is the length of the fully formed "802.11
751 * payload". That is, everything except for the 802.11 header.
752 * This includes all crypto material including the MIC.
754 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
759 * Packet reception for 88w8366 AP firmware.
761 struct mwl8k_rxd_8366_ap {
765 __le32 pkt_phys_addr;
766 __le32 next_rxd_phys_addr;
770 __le32 hw_noise_floor_info;
779 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
780 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
781 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
783 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
785 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
787 struct mwl8k_rxd_8366_ap *rxd = _rxd;
789 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
790 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
793 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
795 struct mwl8k_rxd_8366_ap *rxd = _rxd;
797 rxd->pkt_len = cpu_to_le16(len);
798 rxd->pkt_phys_addr = cpu_to_le32(addr);
804 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
805 __le16 *qos, s8 *noise)
807 struct mwl8k_rxd_8366_ap *rxd = _rxd;
809 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
813 memset(status, 0, sizeof(*status));
815 status->signal = -rxd->rssi;
816 *noise = -rxd->noise_floor;
818 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
819 status->flag |= RX_FLAG_HT;
820 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
821 status->flag |= RX_FLAG_40MHZ;
822 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
826 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
827 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
828 status->rate_idx = i;
834 if (rxd->channel > 14) {
835 status->band = IEEE80211_BAND_5GHZ;
836 if (!(status->flag & RX_FLAG_HT))
837 status->rate_idx -= 5;
839 status->band = IEEE80211_BAND_2GHZ;
841 status->freq = ieee80211_channel_to_frequency(rxd->channel);
843 *qos = rxd->qos_control;
845 return le16_to_cpu(rxd->pkt_len);
848 static struct rxd_ops rxd_8366_ap_ops = {
849 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
850 .rxd_init = mwl8k_rxd_8366_ap_init,
851 .rxd_refill = mwl8k_rxd_8366_ap_refill,
852 .rxd_process = mwl8k_rxd_8366_ap_process,
856 * Packet reception for STA firmware.
858 struct mwl8k_rxd_sta {
862 __le32 pkt_phys_addr;
863 __le32 next_rxd_phys_addr;
875 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
876 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
877 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
878 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
879 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
880 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
882 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
884 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
886 struct mwl8k_rxd_sta *rxd = _rxd;
888 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
889 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
892 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
894 struct mwl8k_rxd_sta *rxd = _rxd;
896 rxd->pkt_len = cpu_to_le16(len);
897 rxd->pkt_phys_addr = cpu_to_le32(addr);
903 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
904 __le16 *qos, s8 *noise)
906 struct mwl8k_rxd_sta *rxd = _rxd;
909 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
913 rate_info = le16_to_cpu(rxd->rate_info);
915 memset(status, 0, sizeof(*status));
917 status->signal = -rxd->rssi;
918 *noise = -rxd->noise_level;
919 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
920 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
922 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
923 status->flag |= RX_FLAG_SHORTPRE;
924 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
925 status->flag |= RX_FLAG_40MHZ;
926 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
927 status->flag |= RX_FLAG_SHORT_GI;
928 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
929 status->flag |= RX_FLAG_HT;
931 if (rxd->channel > 14) {
932 status->band = IEEE80211_BAND_5GHZ;
933 if (!(status->flag & RX_FLAG_HT))
934 status->rate_idx -= 5;
936 status->band = IEEE80211_BAND_2GHZ;
938 status->freq = ieee80211_channel_to_frequency(rxd->channel);
940 *qos = rxd->qos_control;
942 return le16_to_cpu(rxd->pkt_len);
945 static struct rxd_ops rxd_sta_ops = {
946 .rxd_size = sizeof(struct mwl8k_rxd_sta),
947 .rxd_init = mwl8k_rxd_sta_init,
948 .rxd_refill = mwl8k_rxd_sta_refill,
949 .rxd_process = mwl8k_rxd_sta_process,
953 #define MWL8K_RX_DESCS 256
954 #define MWL8K_RX_MAXSZ 3800
956 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
958 struct mwl8k_priv *priv = hw->priv;
959 struct mwl8k_rx_queue *rxq = priv->rxq + index;
967 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
969 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
970 if (rxq->rxd == NULL) {
971 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
974 memset(rxq->rxd, 0, size);
976 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
977 if (rxq->buf == NULL) {
978 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
979 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
982 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
984 for (i = 0; i < MWL8K_RX_DESCS; i++) {
988 dma_addr_t next_dma_addr;
990 desc_size = priv->rxd_ops->rxd_size;
991 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
994 if (nexti == MWL8K_RX_DESCS)
996 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
998 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
1004 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1006 struct mwl8k_priv *priv = hw->priv;
1007 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1011 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
1012 struct sk_buff *skb;
1017 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1021 addr = pci_map_single(priv->pdev, skb->data,
1022 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
1026 if (rxq->tail == MWL8K_RX_DESCS)
1028 rxq->buf[rx].skb = skb;
1029 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
1031 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1032 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
1040 /* Must be called only when the card's reception is completely halted */
1041 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1043 struct mwl8k_priv *priv = hw->priv;
1044 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1047 for (i = 0; i < MWL8K_RX_DESCS; i++) {
1048 if (rxq->buf[i].skb != NULL) {
1049 pci_unmap_single(priv->pdev,
1050 dma_unmap_addr(&rxq->buf[i], dma),
1051 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1052 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
1054 kfree_skb(rxq->buf[i].skb);
1055 rxq->buf[i].skb = NULL;
1062 pci_free_consistent(priv->pdev,
1063 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
1064 rxq->rxd, rxq->rxd_dma);
1070 * Scan a list of BSSIDs to process for finalize join.
1071 * Allows for extension to process multiple BSSIDs.
1074 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1076 return priv->capture_beacon &&
1077 ieee80211_is_beacon(wh->frame_control) &&
1078 !compare_ether_addr(wh->addr3, priv->capture_bssid);
1081 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1082 struct sk_buff *skb)
1084 struct mwl8k_priv *priv = hw->priv;
1086 priv->capture_beacon = false;
1087 memset(priv->capture_bssid, 0, ETH_ALEN);
1090 * Use GFP_ATOMIC as rxq_process is called from
1091 * the primary interrupt handler, memory allocation call
1094 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1095 if (priv->beacon_skb != NULL)
1096 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1099 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1101 struct mwl8k_priv *priv = hw->priv;
1102 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1106 while (rxq->rxd_count && limit--) {
1107 struct sk_buff *skb;
1110 struct ieee80211_rx_status status;
1113 skb = rxq->buf[rxq->head].skb;
1117 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1119 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1124 rxq->buf[rxq->head].skb = NULL;
1126 pci_unmap_single(priv->pdev,
1127 dma_unmap_addr(&rxq->buf[rxq->head], dma),
1128 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1129 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1132 if (rxq->head == MWL8K_RX_DESCS)
1137 skb_put(skb, pkt_len);
1138 mwl8k_remove_dma_header(skb, qos);
1141 * Check for a pending join operation. Save a
1142 * copy of the beacon and schedule a tasklet to
1143 * send a FINALIZE_JOIN command to the firmware.
1145 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1146 mwl8k_save_beacon(hw, skb);
1148 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1149 ieee80211_rx_irqsafe(hw, skb);
1159 * Packet transmission.
1162 #define MWL8K_TXD_STATUS_OK 0x00000001
1163 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1164 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1165 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1166 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1168 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1169 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1170 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1171 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1172 #define MWL8K_QOS_EOSP 0x0010
1174 struct mwl8k_tx_desc {
1179 __le32 pkt_phys_addr;
1181 __u8 dest_MAC_addr[ETH_ALEN];
1182 __le32 next_txd_phys_addr;
1189 #define MWL8K_TX_DESCS 128
1191 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1193 struct mwl8k_priv *priv = hw->priv;
1194 struct mwl8k_tx_queue *txq = priv->txq + index;
1202 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1204 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1205 if (txq->txd == NULL) {
1206 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
1209 memset(txq->txd, 0, size);
1211 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1212 if (txq->skb == NULL) {
1213 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
1214 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1217 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1219 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1220 struct mwl8k_tx_desc *tx_desc;
1223 tx_desc = txq->txd + i;
1224 nexti = (i + 1) % MWL8K_TX_DESCS;
1226 tx_desc->status = 0;
1227 tx_desc->next_txd_phys_addr =
1228 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1234 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1236 iowrite32(MWL8K_H2A_INT_PPA_READY,
1237 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1238 iowrite32(MWL8K_H2A_INT_DUMMY,
1239 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1240 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1243 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1245 struct mwl8k_priv *priv = hw->priv;
1248 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1249 struct mwl8k_tx_queue *txq = priv->txq + i;
1255 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1256 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1259 status = le32_to_cpu(tx_desc->status);
1260 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1265 if (tx_desc->pkt_len == 0)
1269 wiphy_err(hw->wiphy,
1270 "txq[%d] len=%d head=%d tail=%d "
1271 "fw_owned=%d drv_owned=%d unused=%d\n",
1273 txq->len, txq->head, txq->tail,
1274 fw_owned, drv_owned, unused);
1279 * Must be called with priv->fw_mutex held and tx queues stopped.
1281 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1283 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1285 struct mwl8k_priv *priv = hw->priv;
1286 DECLARE_COMPLETION_ONSTACK(tx_wait);
1293 * The TX queues are stopped at this point, so this test
1294 * doesn't need to take ->tx_lock.
1296 if (!priv->pending_tx_pkts)
1302 spin_lock_bh(&priv->tx_lock);
1303 priv->tx_wait = &tx_wait;
1306 unsigned long timeout;
1308 oldcount = priv->pending_tx_pkts;
1310 spin_unlock_bh(&priv->tx_lock);
1311 timeout = wait_for_completion_timeout(&tx_wait,
1312 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1313 spin_lock_bh(&priv->tx_lock);
1316 WARN_ON(priv->pending_tx_pkts);
1318 wiphy_notice(hw->wiphy, "tx rings drained\n");
1323 if (priv->pending_tx_pkts < oldcount) {
1324 wiphy_notice(hw->wiphy,
1325 "waiting for tx rings to drain (%d -> %d pkts)\n",
1326 oldcount, priv->pending_tx_pkts);
1331 priv->tx_wait = NULL;
1333 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1334 MWL8K_TX_WAIT_TIMEOUT_MS);
1335 mwl8k_dump_tx_rings(hw);
1339 spin_unlock_bh(&priv->tx_lock);
1344 #define MWL8K_TXD_SUCCESS(status) \
1345 ((status) & (MWL8K_TXD_STATUS_OK | \
1346 MWL8K_TXD_STATUS_OK_RETRY | \
1347 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1350 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1352 struct mwl8k_priv *priv = hw->priv;
1353 struct mwl8k_tx_queue *txq = priv->txq + index;
1357 while (txq->len > 0 && limit--) {
1359 struct mwl8k_tx_desc *tx_desc;
1362 struct sk_buff *skb;
1363 struct ieee80211_tx_info *info;
1367 tx_desc = txq->txd + tx;
1369 status = le32_to_cpu(tx_desc->status);
1371 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1375 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1378 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1379 BUG_ON(txq->len == 0);
1381 priv->pending_tx_pkts--;
1383 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1384 size = le16_to_cpu(tx_desc->pkt_len);
1386 txq->skb[tx] = NULL;
1388 BUG_ON(skb == NULL);
1389 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1391 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1393 /* Mark descriptor as unused */
1394 tx_desc->pkt_phys_addr = 0;
1395 tx_desc->pkt_len = 0;
1397 info = IEEE80211_SKB_CB(skb);
1398 ieee80211_tx_info_clear_status(info);
1399 if (MWL8K_TXD_SUCCESS(status))
1400 info->flags |= IEEE80211_TX_STAT_ACK;
1402 ieee80211_tx_status_irqsafe(hw, skb);
1407 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1408 ieee80211_wake_queue(hw, index);
1413 /* must be called only when the card's transmit is completely halted */
1414 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1416 struct mwl8k_priv *priv = hw->priv;
1417 struct mwl8k_tx_queue *txq = priv->txq + index;
1419 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1424 pci_free_consistent(priv->pdev,
1425 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1426 txq->txd, txq->txd_dma);
1431 mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1433 struct mwl8k_priv *priv = hw->priv;
1434 struct ieee80211_tx_info *tx_info;
1435 struct mwl8k_vif *mwl8k_vif;
1436 struct ieee80211_hdr *wh;
1437 struct mwl8k_tx_queue *txq;
1438 struct mwl8k_tx_desc *tx;
1444 wh = (struct ieee80211_hdr *)skb->data;
1445 if (ieee80211_is_data_qos(wh->frame_control))
1446 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1450 mwl8k_add_dma_header(skb, 0);
1451 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1453 tx_info = IEEE80211_SKB_CB(skb);
1454 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1456 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1457 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1458 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1459 mwl8k_vif->seqno += 0x10;
1462 /* Setup firmware control bit fields for each frame type. */
1465 if (ieee80211_is_mgmt(wh->frame_control) ||
1466 ieee80211_is_ctl(wh->frame_control)) {
1468 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1469 } else if (ieee80211_is_data(wh->frame_control)) {
1471 if (is_multicast_ether_addr(wh->addr1))
1472 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1474 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1475 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1476 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1478 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1481 dma = pci_map_single(priv->pdev, skb->data,
1482 skb->len, PCI_DMA_TODEVICE);
1484 if (pci_dma_mapping_error(priv->pdev, dma)) {
1485 wiphy_debug(hw->wiphy,
1486 "failed to dma map skb, dropping TX frame.\n");
1488 return NETDEV_TX_OK;
1491 spin_lock_bh(&priv->tx_lock);
1493 txq = priv->txq + index;
1495 BUG_ON(txq->skb[txq->tail] != NULL);
1496 txq->skb[txq->tail] = skb;
1498 tx = txq->txd + txq->tail;
1499 tx->data_rate = txdatarate;
1500 tx->tx_priority = index;
1501 tx->qos_control = cpu_to_le16(qos);
1502 tx->pkt_phys_addr = cpu_to_le32(dma);
1503 tx->pkt_len = cpu_to_le16(skb->len);
1505 if (!priv->ap_fw && tx_info->control.sta != NULL)
1506 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1510 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1513 priv->pending_tx_pkts++;
1516 if (txq->tail == MWL8K_TX_DESCS)
1519 if (txq->head == txq->tail)
1520 ieee80211_stop_queue(hw, index);
1522 mwl8k_tx_start(priv);
1524 spin_unlock_bh(&priv->tx_lock);
1526 return NETDEV_TX_OK;
1533 * We have the following requirements for issuing firmware commands:
1534 * - Some commands require that the packet transmit path is idle when
1535 * the command is issued. (For simplicity, we'll just quiesce the
1536 * transmit path for every command.)
1537 * - There are certain sequences of commands that need to be issued to
1538 * the hardware sequentially, with no other intervening commands.
1540 * This leads to an implementation of a "firmware lock" as a mutex that
1541 * can be taken recursively, and which is taken by both the low-level
1542 * command submission function (mwl8k_post_cmd) as well as any users of
1543 * that function that require issuing of an atomic sequence of commands,
1544 * and quiesces the transmit path whenever it's taken.
1546 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
1548 struct mwl8k_priv *priv = hw->priv;
1550 if (priv->fw_mutex_owner != current) {
1553 mutex_lock(&priv->fw_mutex);
1554 ieee80211_stop_queues(hw);
1556 rc = mwl8k_tx_wait_empty(hw);
1558 ieee80211_wake_queues(hw);
1559 mutex_unlock(&priv->fw_mutex);
1564 priv->fw_mutex_owner = current;
1567 priv->fw_mutex_depth++;
1572 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1574 struct mwl8k_priv *priv = hw->priv;
1576 if (!--priv->fw_mutex_depth) {
1577 ieee80211_wake_queues(hw);
1578 priv->fw_mutex_owner = NULL;
1579 mutex_unlock(&priv->fw_mutex);
1585 * Command processing.
1588 /* Timeout firmware commands after 10s */
1589 #define MWL8K_CMD_TIMEOUT_MS 10000
1591 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1593 DECLARE_COMPLETION_ONSTACK(cmd_wait);
1594 struct mwl8k_priv *priv = hw->priv;
1595 void __iomem *regs = priv->regs;
1596 dma_addr_t dma_addr;
1597 unsigned int dma_size;
1599 unsigned long timeout = 0;
1602 cmd->result = (__force __le16) 0xffff;
1603 dma_size = le16_to_cpu(cmd->length);
1604 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1605 PCI_DMA_BIDIRECTIONAL);
1606 if (pci_dma_mapping_error(priv->pdev, dma_addr))
1609 rc = mwl8k_fw_lock(hw);
1611 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1612 PCI_DMA_BIDIRECTIONAL);
1616 priv->hostcmd_wait = &cmd_wait;
1617 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
1618 iowrite32(MWL8K_H2A_INT_DOORBELL,
1619 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1620 iowrite32(MWL8K_H2A_INT_DUMMY,
1621 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1623 timeout = wait_for_completion_timeout(&cmd_wait,
1624 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
1626 priv->hostcmd_wait = NULL;
1628 mwl8k_fw_unlock(hw);
1630 pci_unmap_single(priv->pdev, dma_addr, dma_size,
1631 PCI_DMA_BIDIRECTIONAL);
1634 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
1635 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1636 MWL8K_CMD_TIMEOUT_MS);
1641 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1643 rc = cmd->result ? -EINVAL : 0;
1645 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
1646 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1647 le16_to_cpu(cmd->result));
1649 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
1650 mwl8k_cmd_name(cmd->code,
1658 static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
1659 struct ieee80211_vif *vif,
1660 struct mwl8k_cmd_pkt *cmd)
1663 cmd->macid = MWL8K_VIF(vif)->macid;
1664 return mwl8k_post_cmd(hw, cmd);
1668 * Setup code shared between STA and AP firmware images.
1670 static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1672 struct mwl8k_priv *priv = hw->priv;
1674 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1675 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1677 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1678 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1680 priv->band_24.band = IEEE80211_BAND_2GHZ;
1681 priv->band_24.channels = priv->channels_24;
1682 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1683 priv->band_24.bitrates = priv->rates_24;
1684 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1686 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1689 static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1691 struct mwl8k_priv *priv = hw->priv;
1693 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1694 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1696 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1697 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1699 priv->band_50.band = IEEE80211_BAND_5GHZ;
1700 priv->band_50.channels = priv->channels_50;
1701 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1702 priv->band_50.bitrates = priv->rates_50;
1703 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1705 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1709 * CMD_GET_HW_SPEC (STA version).
1711 struct mwl8k_cmd_get_hw_spec_sta {
1712 struct mwl8k_cmd_pkt header;
1714 __u8 host_interface;
1716 __u8 perm_addr[ETH_ALEN];
1721 __u8 mcs_bitmap[16];
1722 __le32 rx_queue_ptr;
1723 __le32 num_tx_queues;
1724 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1726 __le32 num_tx_desc_per_queue;
1730 #define MWL8K_CAP_MAX_AMSDU 0x20000000
1731 #define MWL8K_CAP_GREENFIELD 0x08000000
1732 #define MWL8K_CAP_AMPDU 0x04000000
1733 #define MWL8K_CAP_RX_STBC 0x01000000
1734 #define MWL8K_CAP_TX_STBC 0x00800000
1735 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1736 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1737 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1738 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1739 #define MWL8K_CAP_DELAY_BA 0x00003000
1740 #define MWL8K_CAP_MIMO 0x00000200
1741 #define MWL8K_CAP_40MHZ 0x00000100
1742 #define MWL8K_CAP_BAND_MASK 0x00000007
1743 #define MWL8K_CAP_5GHZ 0x00000004
1744 #define MWL8K_CAP_2GHZ4 0x00000001
1747 mwl8k_set_ht_caps(struct ieee80211_hw *hw,
1748 struct ieee80211_supported_band *band, u32 cap)
1753 band->ht_cap.ht_supported = 1;
1755 if (cap & MWL8K_CAP_MAX_AMSDU)
1756 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1757 if (cap & MWL8K_CAP_GREENFIELD)
1758 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1759 if (cap & MWL8K_CAP_AMPDU) {
1760 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1761 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1762 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1764 if (cap & MWL8K_CAP_RX_STBC)
1765 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1766 if (cap & MWL8K_CAP_TX_STBC)
1767 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1768 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1769 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1770 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1771 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1772 if (cap & MWL8K_CAP_DELAY_BA)
1773 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1774 if (cap & MWL8K_CAP_40MHZ)
1775 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1777 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1778 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1780 band->ht_cap.mcs.rx_mask[0] = 0xff;
1781 if (rx_streams >= 2)
1782 band->ht_cap.mcs.rx_mask[1] = 0xff;
1783 if (rx_streams >= 3)
1784 band->ht_cap.mcs.rx_mask[2] = 0xff;
1785 band->ht_cap.mcs.rx_mask[4] = 0x01;
1786 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1788 if (rx_streams != tx_streams) {
1789 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1790 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1791 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1796 mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
1798 struct mwl8k_priv *priv = hw->priv;
1800 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
1801 mwl8k_setup_2ghz_band(hw);
1802 if (caps & MWL8K_CAP_MIMO)
1803 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
1806 if (caps & MWL8K_CAP_5GHZ) {
1807 mwl8k_setup_5ghz_band(hw);
1808 if (caps & MWL8K_CAP_MIMO)
1809 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
1813 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1815 struct mwl8k_priv *priv = hw->priv;
1816 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1820 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1824 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1825 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1827 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1828 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1829 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1830 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1831 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1832 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1833 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1834 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1836 rc = mwl8k_post_cmd(hw, &cmd->header);
1839 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1840 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1841 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1842 priv->hw_rev = cmd->hw_rev;
1843 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
1844 priv->ap_macids_supported = 0x00000000;
1845 priv->sta_macids_supported = 0x00000001;
1853 * CMD_GET_HW_SPEC (AP version).
1855 struct mwl8k_cmd_get_hw_spec_ap {
1856 struct mwl8k_cmd_pkt header;
1858 __u8 host_interface;
1861 __u8 perm_addr[ETH_ALEN];
1872 __le32 fw_api_version;
1875 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1877 struct mwl8k_priv *priv = hw->priv;
1878 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1882 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1886 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1887 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1889 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1890 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1892 rc = mwl8k_post_cmd(hw, &cmd->header);
1897 api_version = le32_to_cpu(cmd->fw_api_version);
1898 if (priv->device_info->fw_api_ap != api_version) {
1899 printk(KERN_ERR "%s: Unsupported fw API version for %s."
1900 " Expected %d got %d.\n", MWL8K_NAME,
1901 priv->device_info->part_name,
1902 priv->device_info->fw_api_ap,
1907 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1908 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1909 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1910 priv->hw_rev = cmd->hw_rev;
1911 mwl8k_setup_2ghz_band(hw);
1912 priv->ap_macids_supported = 0x000000ff;
1913 priv->sta_macids_supported = 0x00000000;
1915 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1916 iowrite32(priv->txq[0].txd_dma, priv->sram + off);
1918 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1919 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
1921 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1922 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
1924 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1925 iowrite32(priv->txq[1].txd_dma, priv->sram + off);
1927 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1928 iowrite32(priv->txq[2].txd_dma, priv->sram + off);
1930 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1931 iowrite32(priv->txq[3].txd_dma, priv->sram + off);
1942 struct mwl8k_cmd_set_hw_spec {
1943 struct mwl8k_cmd_pkt header;
1945 __u8 host_interface;
1947 __u8 perm_addr[ETH_ALEN];
1952 __le32 rx_queue_ptr;
1953 __le32 num_tx_queues;
1954 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1956 __le32 num_tx_desc_per_queue;
1960 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1961 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1962 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1964 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1966 struct mwl8k_priv *priv = hw->priv;
1967 struct mwl8k_cmd_set_hw_spec *cmd;
1971 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1975 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1976 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1978 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1979 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1980 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1981 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1982 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1983 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1984 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1985 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1986 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1987 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1989 rc = mwl8k_post_cmd(hw, &cmd->header);
1996 * CMD_MAC_MULTICAST_ADR.
1998 struct mwl8k_cmd_mac_multicast_adr {
1999 struct mwl8k_cmd_pkt header;
2002 __u8 addr[0][ETH_ALEN];
2005 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
2006 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
2007 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2008 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
2010 static struct mwl8k_cmd_pkt *
2011 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
2012 struct netdev_hw_addr_list *mc_list)
2014 struct mwl8k_priv *priv = hw->priv;
2015 struct mwl8k_cmd_mac_multicast_adr *cmd;
2020 mc_count = netdev_hw_addr_list_count(mc_list);
2022 if (allmulti || mc_count > priv->num_mcaddrs) {
2027 size = sizeof(*cmd) + mc_count * ETH_ALEN;
2029 cmd = kzalloc(size, GFP_ATOMIC);
2033 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2034 cmd->header.length = cpu_to_le16(size);
2035 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2036 MWL8K_ENABLE_RX_BROADCAST);
2039 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2040 } else if (mc_count) {
2041 struct netdev_hw_addr *ha;
2044 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2045 cmd->numaddr = cpu_to_le16(mc_count);
2046 netdev_hw_addr_list_for_each(ha, mc_list) {
2047 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
2051 return &cmd->header;
2057 struct mwl8k_cmd_get_stat {
2058 struct mwl8k_cmd_pkt header;
2062 #define MWL8K_STAT_ACK_FAILURE 9
2063 #define MWL8K_STAT_RTS_FAILURE 12
2064 #define MWL8K_STAT_FCS_ERROR 24
2065 #define MWL8K_STAT_RTS_SUCCESS 11
2067 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2068 struct ieee80211_low_level_stats *stats)
2070 struct mwl8k_cmd_get_stat *cmd;
2073 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2077 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2078 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2080 rc = mwl8k_post_cmd(hw, &cmd->header);
2082 stats->dot11ACKFailureCount =
2083 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2084 stats->dot11RTSFailureCount =
2085 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2086 stats->dot11FCSErrorCount =
2087 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2088 stats->dot11RTSSuccessCount =
2089 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2097 * CMD_RADIO_CONTROL.
2099 struct mwl8k_cmd_radio_control {
2100 struct mwl8k_cmd_pkt header;
2107 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
2109 struct mwl8k_priv *priv = hw->priv;
2110 struct mwl8k_cmd_radio_control *cmd;
2113 if (enable == priv->radio_on && !force)
2116 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2120 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2121 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2122 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2123 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
2124 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2126 rc = mwl8k_post_cmd(hw, &cmd->header);
2130 priv->radio_on = enable;
2135 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
2137 return mwl8k_cmd_radio_control(hw, 0, 0);
2140 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
2142 return mwl8k_cmd_radio_control(hw, 1, 0);
2146 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2148 struct mwl8k_priv *priv = hw->priv;
2150 priv->radio_short_preamble = short_preamble;
2152 return mwl8k_cmd_radio_control(hw, 1, 1);
2158 #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
2160 struct mwl8k_cmd_rf_tx_power {
2161 struct mwl8k_cmd_pkt header;
2163 __le16 support_level;
2164 __le16 current_level;
2166 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
2169 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
2171 struct mwl8k_cmd_rf_tx_power *cmd;
2174 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2178 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2179 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2180 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2181 cmd->support_level = cpu_to_le16(dBm);
2183 rc = mwl8k_post_cmd(hw, &cmd->header);
2192 #define MWL8K_TX_POWER_LEVEL_TOTAL 12
2194 struct mwl8k_cmd_tx_power {
2195 struct mwl8k_cmd_pkt header;
2201 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2202 } __attribute__((packed));
2204 static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2205 struct ieee80211_conf *conf,
2208 struct ieee80211_channel *channel = conf->channel;
2209 struct mwl8k_cmd_tx_power *cmd;
2213 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2217 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2218 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2219 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2221 if (channel->band == IEEE80211_BAND_2GHZ)
2222 cmd->band = cpu_to_le16(0x1);
2223 else if (channel->band == IEEE80211_BAND_5GHZ)
2224 cmd->band = cpu_to_le16(0x4);
2226 cmd->channel = channel->hw_value;
2228 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2229 conf->channel_type == NL80211_CHAN_HT20) {
2230 cmd->bw = cpu_to_le16(0x2);
2232 cmd->bw = cpu_to_le16(0x4);
2233 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2234 cmd->sub_ch = cpu_to_le16(0x3);
2235 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2236 cmd->sub_ch = cpu_to_le16(0x1);
2239 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2240 cmd->power_level_list[i] = cpu_to_le16(pwr);
2242 rc = mwl8k_post_cmd(hw, &cmd->header);
2251 struct mwl8k_cmd_rf_antenna {
2252 struct mwl8k_cmd_pkt header;
2257 #define MWL8K_RF_ANTENNA_RX 1
2258 #define MWL8K_RF_ANTENNA_TX 2
2261 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2263 struct mwl8k_cmd_rf_antenna *cmd;
2266 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2270 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2271 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2272 cmd->antenna = cpu_to_le16(antenna);
2273 cmd->mode = cpu_to_le16(mask);
2275 rc = mwl8k_post_cmd(hw, &cmd->header);
2284 struct mwl8k_cmd_set_beacon {
2285 struct mwl8k_cmd_pkt header;
2290 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2291 struct ieee80211_vif *vif, u8 *beacon, int len)
2293 struct mwl8k_cmd_set_beacon *cmd;
2296 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2300 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2301 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2302 cmd->beacon_len = cpu_to_le16(len);
2303 memcpy(cmd->beacon, beacon, len);
2305 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2314 struct mwl8k_cmd_set_pre_scan {
2315 struct mwl8k_cmd_pkt header;
2318 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2320 struct mwl8k_cmd_set_pre_scan *cmd;
2323 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2327 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2328 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2330 rc = mwl8k_post_cmd(hw, &cmd->header);
2337 * CMD_SET_POST_SCAN.
2339 struct mwl8k_cmd_set_post_scan {
2340 struct mwl8k_cmd_pkt header;
2342 __u8 bssid[ETH_ALEN];
2346 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2348 struct mwl8k_cmd_set_post_scan *cmd;
2351 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2355 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2356 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2358 memcpy(cmd->bssid, mac, ETH_ALEN);
2360 rc = mwl8k_post_cmd(hw, &cmd->header);
2367 * CMD_SET_RF_CHANNEL.
2369 struct mwl8k_cmd_set_rf_channel {
2370 struct mwl8k_cmd_pkt header;
2372 __u8 current_channel;
2373 __le32 channel_flags;
2376 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2377 struct ieee80211_conf *conf)
2379 struct ieee80211_channel *channel = conf->channel;
2380 struct mwl8k_cmd_set_rf_channel *cmd;
2383 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2387 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2388 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2389 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2390 cmd->current_channel = channel->hw_value;
2392 if (channel->band == IEEE80211_BAND_2GHZ)
2393 cmd->channel_flags |= cpu_to_le32(0x00000001);
2394 else if (channel->band == IEEE80211_BAND_5GHZ)
2395 cmd->channel_flags |= cpu_to_le32(0x00000004);
2397 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2398 conf->channel_type == NL80211_CHAN_HT20)
2399 cmd->channel_flags |= cpu_to_le32(0x00000080);
2400 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2401 cmd->channel_flags |= cpu_to_le32(0x000001900);
2402 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2403 cmd->channel_flags |= cpu_to_le32(0x000000900);
2405 rc = mwl8k_post_cmd(hw, &cmd->header);
2414 #define MWL8K_FRAME_PROT_DISABLED 0x00
2415 #define MWL8K_FRAME_PROT_11G 0x07
2416 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
2417 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
2419 struct mwl8k_cmd_update_set_aid {
2420 struct mwl8k_cmd_pkt header;
2423 /* AP's MAC address (BSSID) */
2424 __u8 bssid[ETH_ALEN];
2425 __le16 protection_mode;
2426 __u8 supp_rates[14];
2429 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
2435 * Clear nonstandard rates 4 and 13.
2439 for (i = 0, j = 0; i < 14; i++) {
2440 if (mask & (1 << i))
2441 rates[j++] = mwl8k_rates_24[i].hw_value;
2446 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
2447 struct ieee80211_vif *vif, u32 legacy_rate_mask)
2449 struct mwl8k_cmd_update_set_aid *cmd;
2453 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2457 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
2458 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2459 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
2460 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
2462 if (vif->bss_conf.use_cts_prot) {
2463 prot_mode = MWL8K_FRAME_PROT_11G;
2465 switch (vif->bss_conf.ht_operation_mode &
2466 IEEE80211_HT_OP_MODE_PROTECTION) {
2467 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2468 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2470 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2471 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2474 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2478 cmd->protection_mode = cpu_to_le16(prot_mode);
2480 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
2482 rc = mwl8k_post_cmd(hw, &cmd->header);
2491 struct mwl8k_cmd_set_rate {
2492 struct mwl8k_cmd_pkt header;
2493 __u8 legacy_rates[14];
2495 /* Bitmap for supported MCS codes. */
2501 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2502 u32 legacy_rate_mask, u8 *mcs_rates)
2504 struct mwl8k_cmd_set_rate *cmd;
2507 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2511 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
2512 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2513 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2514 memcpy(cmd->mcs_set, mcs_rates, 16);
2516 rc = mwl8k_post_cmd(hw, &cmd->header);
2523 * CMD_FINALIZE_JOIN.
2525 #define MWL8K_FJ_BEACON_MAXLEN 128
2527 struct mwl8k_cmd_finalize_join {
2528 struct mwl8k_cmd_pkt header;
2529 __le32 sleep_interval; /* Number of beacon periods to sleep */
2530 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2533 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2534 int framelen, int dtim)
2536 struct mwl8k_cmd_finalize_join *cmd;
2537 struct ieee80211_mgmt *payload = frame;
2541 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2545 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
2546 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2547 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
2549 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2550 if (payload_len < 0)
2552 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2553 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2555 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
2557 rc = mwl8k_post_cmd(hw, &cmd->header);
2564 * CMD_SET_RTS_THRESHOLD.
2566 struct mwl8k_cmd_set_rts_threshold {
2567 struct mwl8k_cmd_pkt header;
2573 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
2575 struct mwl8k_cmd_set_rts_threshold *cmd;
2578 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2582 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
2583 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2584 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2585 cmd->threshold = cpu_to_le16(rts_thresh);
2587 rc = mwl8k_post_cmd(hw, &cmd->header);
2596 struct mwl8k_cmd_set_slot {
2597 struct mwl8k_cmd_pkt header;
2602 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
2604 struct mwl8k_cmd_set_slot *cmd;
2607 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2611 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
2612 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2613 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2614 cmd->short_slot = short_slot_time;
2616 rc = mwl8k_post_cmd(hw, &cmd->header);
2623 * CMD_SET_EDCA_PARAMS.
2625 struct mwl8k_cmd_set_edca_params {
2626 struct mwl8k_cmd_pkt header;
2628 /* See MWL8K_SET_EDCA_XXX below */
2631 /* TX opportunity in units of 32 us */
2636 /* Log exponent of max contention period: 0...15 */
2639 /* Log exponent of min contention period: 0...15 */
2642 /* Adaptive interframe spacing in units of 32us */
2645 /* TX queue to configure */
2649 /* Log exponent of max contention period: 0...15 */
2652 /* Log exponent of min contention period: 0...15 */
2655 /* Adaptive interframe spacing in units of 32us */
2658 /* TX queue to configure */
2664 #define MWL8K_SET_EDCA_CW 0x01
2665 #define MWL8K_SET_EDCA_TXOP 0x02
2666 #define MWL8K_SET_EDCA_AIFS 0x04
2668 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
2669 MWL8K_SET_EDCA_TXOP | \
2670 MWL8K_SET_EDCA_AIFS)
2673 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2674 __u16 cw_min, __u16 cw_max,
2675 __u8 aifs, __u16 txop)
2677 struct mwl8k_priv *priv = hw->priv;
2678 struct mwl8k_cmd_set_edca_params *cmd;
2681 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2685 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
2686 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2687 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2688 cmd->txop = cpu_to_le16(txop);
2690 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2691 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2692 cmd->ap.aifs = aifs;
2695 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2696 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2697 cmd->sta.aifs = aifs;
2698 cmd->sta.txq = qnum;
2701 rc = mwl8k_post_cmd(hw, &cmd->header);
2710 struct mwl8k_cmd_set_wmm_mode {
2711 struct mwl8k_cmd_pkt header;
2715 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2717 struct mwl8k_priv *priv = hw->priv;
2718 struct mwl8k_cmd_set_wmm_mode *cmd;
2721 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2725 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2726 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2727 cmd->action = cpu_to_le16(!!enable);
2729 rc = mwl8k_post_cmd(hw, &cmd->header);
2733 priv->wmm_enabled = enable;
2741 struct mwl8k_cmd_mimo_config {
2742 struct mwl8k_cmd_pkt header;
2744 __u8 rx_antenna_map;
2745 __u8 tx_antenna_map;
2748 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2750 struct mwl8k_cmd_mimo_config *cmd;
2753 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2757 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2758 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2759 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2760 cmd->rx_antenna_map = rx;
2761 cmd->tx_antenna_map = tx;
2763 rc = mwl8k_post_cmd(hw, &cmd->header);
2770 * CMD_USE_FIXED_RATE (STA version).
2772 struct mwl8k_cmd_use_fixed_rate_sta {
2773 struct mwl8k_cmd_pkt header;
2775 __le32 allow_rate_drop;
2779 __le32 enable_retry;
2788 #define MWL8K_USE_AUTO_RATE 0x0002
2789 #define MWL8K_UCAST_RATE 0
2791 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2793 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2796 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2800 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2801 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2802 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2803 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2805 rc = mwl8k_post_cmd(hw, &cmd->header);
2812 * CMD_USE_FIXED_RATE (AP version).
2814 struct mwl8k_cmd_use_fixed_rate_ap {
2815 struct mwl8k_cmd_pkt header;
2817 __le32 allow_rate_drop;
2819 struct mwl8k_rate_entry_ap {
2821 __le32 enable_retry;
2826 u8 multicast_rate_type;
2831 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2833 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2836 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2840 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2841 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2842 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2843 cmd->multicast_rate = mcast;
2844 cmd->management_rate = mgmt;
2846 rc = mwl8k_post_cmd(hw, &cmd->header);
2853 * CMD_ENABLE_SNIFFER.
2855 struct mwl8k_cmd_enable_sniffer {
2856 struct mwl8k_cmd_pkt header;
2860 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2862 struct mwl8k_cmd_enable_sniffer *cmd;
2865 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2869 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2870 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2871 cmd->action = cpu_to_le32(!!enable);
2873 rc = mwl8k_post_cmd(hw, &cmd->header);
2882 struct mwl8k_cmd_set_mac_addr {
2883 struct mwl8k_cmd_pkt header;
2887 __u8 mac_addr[ETH_ALEN];
2889 __u8 mac_addr[ETH_ALEN];
2893 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2894 #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
2895 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
2896 #define MWL8K_MAC_TYPE_SECONDARY_AP 3
2898 static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
2899 struct ieee80211_vif *vif, u8 *mac)
2901 struct mwl8k_priv *priv = hw->priv;
2902 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2903 struct mwl8k_cmd_set_mac_addr *cmd;
2907 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2908 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
2909 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
2910 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
2912 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
2913 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
2914 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
2915 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2917 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
2920 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2924 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2925 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2927 cmd->mbss.mac_type = cpu_to_le16(mac_type);
2928 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2930 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2933 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2940 * CMD_SET_RATEADAPT_MODE.
2942 struct mwl8k_cmd_set_rate_adapt_mode {
2943 struct mwl8k_cmd_pkt header;
2948 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2950 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2953 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2957 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2958 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2959 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2960 cmd->mode = cpu_to_le16(mode);
2962 rc = mwl8k_post_cmd(hw, &cmd->header);
2971 struct mwl8k_cmd_bss_start {
2972 struct mwl8k_cmd_pkt header;
2976 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
2977 struct ieee80211_vif *vif, int enable)
2979 struct mwl8k_cmd_bss_start *cmd;
2982 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2986 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2987 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2988 cmd->enable = cpu_to_le32(enable);
2990 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2999 struct mwl8k_cmd_set_new_stn {
3000 struct mwl8k_cmd_pkt header;
3006 __le32 legacy_rates;
3009 __le16 ht_capabilities_info;
3010 __u8 mac_ht_param_info;
3012 __u8 control_channel;
3021 #define MWL8K_STA_ACTION_ADD 0
3022 #define MWL8K_STA_ACTION_REMOVE 2
3024 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3025 struct ieee80211_vif *vif,
3026 struct ieee80211_sta *sta)
3028 struct mwl8k_cmd_set_new_stn *cmd;
3032 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3036 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3037 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3038 cmd->aid = cpu_to_le16(sta->aid);
3039 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3040 cmd->stn_id = cpu_to_le16(sta->aid);
3041 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
3042 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3043 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3045 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3046 cmd->legacy_rates = cpu_to_le32(rates);
3047 if (sta->ht_cap.ht_supported) {
3048 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3049 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3050 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3051 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3052 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3053 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3054 ((sta->ht_cap.ampdu_density & 7) << 2);
3055 cmd->is_qos_sta = 1;
3058 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3064 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3065 struct ieee80211_vif *vif)
3067 struct mwl8k_cmd_set_new_stn *cmd;
3070 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3074 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3075 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3076 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3078 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3084 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3085 struct ieee80211_vif *vif, u8 *addr)
3087 struct mwl8k_cmd_set_new_stn *cmd;
3090 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3094 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3095 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3096 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3097 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3099 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3108 struct ewc_ht_info {
3114 struct peer_capability_info {
3115 /* Peer type - AP vs. STA. */
3118 /* Basic 802.11 capabilities from assoc resp. */
3121 /* Set if peer supports 802.11n high throughput (HT). */
3124 /* Valid if HT is supported. */
3126 __u8 extended_ht_caps;
3127 struct ewc_ht_info ewc_info;
3129 /* Legacy rate table. Intersection of our rates and peer rates. */
3130 __u8 legacy_rates[12];
3132 /* HT rate table. Intersection of our rates and peer rates. */
3136 /* If set, interoperability mode, no proprietary extensions. */
3140 __le16 amsdu_enabled;
3143 struct mwl8k_cmd_update_stadb {
3144 struct mwl8k_cmd_pkt header;
3146 /* See STADB_ACTION_TYPE */
3149 /* Peer MAC address */
3150 __u8 peer_addr[ETH_ALEN];
3154 /* Peer info - valid during add/update. */
3155 struct peer_capability_info peer_info;
3158 #define MWL8K_STA_DB_MODIFY_ENTRY 1
3159 #define MWL8K_STA_DB_DEL_ENTRY 2
3161 /* Peer Entry flags - used to define the type of the peer node */
3162 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
3164 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
3165 struct ieee80211_vif *vif,
3166 struct ieee80211_sta *sta)
3168 struct mwl8k_cmd_update_stadb *cmd;
3169 struct peer_capability_info *p;
3173 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3177 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3178 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3179 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
3180 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
3182 p = &cmd->peer_info;
3183 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
3184 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
3185 p->ht_support = sta->ht_cap.ht_supported;
3186 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
3187 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
3188 ((sta->ht_cap.ampdu_density & 7) << 2);
3189 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3190 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3192 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3193 legacy_rate_mask_to_array(p->legacy_rates, rates);
3194 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
3196 p->amsdu_enabled = 0;
3198 rc = mwl8k_post_cmd(hw, &cmd->header);
3201 return rc ? rc : p->station_id;
3204 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
3205 struct ieee80211_vif *vif, u8 *addr)
3207 struct mwl8k_cmd_update_stadb *cmd;
3210 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3214 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
3215 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3216 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
3217 memcpy(cmd->peer_addr, addr, ETH_ALEN);
3219 rc = mwl8k_post_cmd(hw, &cmd->header);
3227 * Interrupt handling.
3229 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
3231 struct ieee80211_hw *hw = dev_id;
3232 struct mwl8k_priv *priv = hw->priv;
3235 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3239 if (status & MWL8K_A2H_INT_TX_DONE) {
3240 status &= ~MWL8K_A2H_INT_TX_DONE;
3241 tasklet_schedule(&priv->poll_tx_task);
3244 if (status & MWL8K_A2H_INT_RX_READY) {
3245 status &= ~MWL8K_A2H_INT_RX_READY;
3246 tasklet_schedule(&priv->poll_rx_task);
3250 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3252 if (status & MWL8K_A2H_INT_OPC_DONE) {
3253 if (priv->hostcmd_wait != NULL)
3254 complete(priv->hostcmd_wait);
3257 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
3258 if (!mutex_is_locked(&priv->fw_mutex) &&
3259 priv->radio_on && priv->pending_tx_pkts)
3260 mwl8k_tx_start(priv);
3266 static void mwl8k_tx_poll(unsigned long data)
3268 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3269 struct mwl8k_priv *priv = hw->priv;
3275 spin_lock_bh(&priv->tx_lock);
3277 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3278 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3280 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3281 complete(priv->tx_wait);
3282 priv->tx_wait = NULL;
3285 spin_unlock_bh(&priv->tx_lock);
3288 writel(~MWL8K_A2H_INT_TX_DONE,
3289 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3291 tasklet_schedule(&priv->poll_tx_task);
3295 static void mwl8k_rx_poll(unsigned long data)
3297 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3298 struct mwl8k_priv *priv = hw->priv;
3302 limit -= rxq_process(hw, 0, limit);
3303 limit -= rxq_refill(hw, 0, limit);
3306 writel(~MWL8K_A2H_INT_RX_READY,
3307 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3309 tasklet_schedule(&priv->poll_rx_task);
3315 * Core driver operations.
3317 static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3319 struct mwl8k_priv *priv = hw->priv;
3320 int index = skb_get_queue_mapping(skb);
3323 if (!priv->radio_on) {
3324 wiphy_debug(hw->wiphy,
3325 "dropped TX frame since radio disabled\n");
3327 return NETDEV_TX_OK;
3330 rc = mwl8k_txq_xmit(hw, index, skb);
3335 static int mwl8k_start(struct ieee80211_hw *hw)
3337 struct mwl8k_priv *priv = hw->priv;
3340 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
3341 IRQF_SHARED, MWL8K_NAME, hw);
3343 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
3347 /* Enable TX reclaim and RX tasklets. */
3348 tasklet_enable(&priv->poll_tx_task);
3349 tasklet_enable(&priv->poll_rx_task);
3351 /* Enable interrupts */
3352 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3354 rc = mwl8k_fw_lock(hw);
3356 rc = mwl8k_cmd_radio_enable(hw);
3360 rc = mwl8k_cmd_enable_sniffer(hw, 0);
3363 rc = mwl8k_cmd_set_pre_scan(hw);
3366 rc = mwl8k_cmd_set_post_scan(hw,
3367 "\x00\x00\x00\x00\x00\x00");
3371 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
3374 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
3376 mwl8k_fw_unlock(hw);
3380 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3381 free_irq(priv->pdev->irq, hw);
3382 tasklet_disable(&priv->poll_tx_task);
3383 tasklet_disable(&priv->poll_rx_task);
3389 static void mwl8k_stop(struct ieee80211_hw *hw)
3391 struct mwl8k_priv *priv = hw->priv;
3394 mwl8k_cmd_radio_disable(hw);
3396 ieee80211_stop_queues(hw);
3398 /* Disable interrupts */
3399 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3400 free_irq(priv->pdev->irq, hw);
3402 /* Stop finalize join worker */
3403 cancel_work_sync(&priv->finalize_join_worker);
3404 if (priv->beacon_skb != NULL)
3405 dev_kfree_skb(priv->beacon_skb);
3407 /* Stop TX reclaim and RX tasklets. */
3408 tasklet_disable(&priv->poll_tx_task);
3409 tasklet_disable(&priv->poll_rx_task);
3411 /* Return all skbs to mac80211 */
3412 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3413 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3416 static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
3418 static int mwl8k_add_interface(struct ieee80211_hw *hw,
3419 struct ieee80211_vif *vif)
3421 struct mwl8k_priv *priv = hw->priv;
3422 struct mwl8k_vif *mwl8k_vif;
3423 u32 macids_supported;
3425 struct mwl8k_device_info *di;
3428 * Reject interface creation if sniffer mode is active, as
3429 * STA operation is mutually exclusive with hardware sniffer
3430 * mode. (Sniffer mode is only used on STA firmware.)
3432 if (priv->sniffer_enabled) {
3433 wiphy_info(hw->wiphy,
3434 "unable to create STA interface because sniffer mode is enabled\n");
3438 di = priv->device_info;
3439 switch (vif->type) {
3440 case NL80211_IFTYPE_AP:
3441 if (!priv->ap_fw && di->fw_image_ap) {
3442 /* we must load the ap fw to meet this request */
3443 if (!list_empty(&priv->vif_list))
3445 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
3449 macids_supported = priv->ap_macids_supported;
3451 case NL80211_IFTYPE_STATION:
3452 if (priv->ap_fw && di->fw_image_sta) {
3453 /* we must load the sta fw to meet this request */
3454 if (!list_empty(&priv->vif_list))
3456 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
3460 macids_supported = priv->sta_macids_supported;
3466 macid = ffs(macids_supported & ~priv->macids_used);
3470 /* Setup driver private area. */
3471 mwl8k_vif = MWL8K_VIF(vif);
3472 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3473 mwl8k_vif->vif = vif;
3474 mwl8k_vif->macid = macid;
3475 mwl8k_vif->seqno = 0;
3477 /* Set the mac address. */
3478 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
3481 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3483 priv->macids_used |= 1 << mwl8k_vif->macid;
3484 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
3489 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
3490 struct ieee80211_vif *vif)
3492 struct mwl8k_priv *priv = hw->priv;
3493 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3496 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3498 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
3500 priv->macids_used &= ~(1 << mwl8k_vif->macid);
3501 list_del(&mwl8k_vif->list);
3504 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
3506 struct ieee80211_conf *conf = &hw->conf;
3507 struct mwl8k_priv *priv = hw->priv;
3510 if (conf->flags & IEEE80211_CONF_IDLE) {
3511 mwl8k_cmd_radio_disable(hw);
3515 rc = mwl8k_fw_lock(hw);
3519 rc = mwl8k_cmd_radio_enable(hw);
3523 rc = mwl8k_cmd_set_rf_channel(hw, conf);
3527 if (conf->power_level > 18)
3528 conf->power_level = 18;
3531 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
3535 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3537 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3539 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
3542 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3546 mwl8k_fw_unlock(hw);
3552 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3553 struct ieee80211_bss_conf *info, u32 changed)
3555 struct mwl8k_priv *priv = hw->priv;
3556 u32 ap_legacy_rates;
3557 u8 ap_mcs_rates[16];
3560 if (mwl8k_fw_lock(hw))
3564 * No need to capture a beacon if we're no longer associated.
3566 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3567 priv->capture_beacon = false;
3570 * Get the AP's legacy and MCS rates.
3572 if (vif->bss_conf.assoc) {
3573 struct ieee80211_sta *ap;
3577 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
3583 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
3584 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
3587 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3589 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3594 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3595 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
3599 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
3604 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3605 rc = mwl8k_set_radio_preamble(hw,
3606 vif->bss_conf.use_short_preamble);
3611 if (changed & BSS_CHANGED_ERP_SLOT) {
3612 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
3617 if (vif->bss_conf.assoc &&
3618 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3620 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
3625 if (vif->bss_conf.assoc &&
3626 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
3628 * Finalize the join. Tell rx handler to process
3629 * next beacon from our BSSID.
3631 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
3632 priv->capture_beacon = true;
3636 mwl8k_fw_unlock(hw);
3640 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3641 struct ieee80211_bss_conf *info, u32 changed)
3645 if (mwl8k_fw_lock(hw))
3648 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3649 rc = mwl8k_set_radio_preamble(hw,
3650 vif->bss_conf.use_short_preamble);
3655 if (changed & BSS_CHANGED_BASIC_RATES) {
3660 * Use lowest supported basic rate for multicasts
3661 * and management frames (such as probe responses --
3662 * beacons will always go out at 1 Mb/s).
3664 idx = ffs(vif->bss_conf.basic_rates);
3668 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3669 rate = mwl8k_rates_24[idx].hw_value;
3671 rate = mwl8k_rates_50[idx].hw_value;
3673 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3676 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3677 struct sk_buff *skb;
3679 skb = ieee80211_beacon_get(hw, vif);
3681 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
3686 if (changed & BSS_CHANGED_BEACON_ENABLED)
3687 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
3690 mwl8k_fw_unlock(hw);
3694 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3695 struct ieee80211_bss_conf *info, u32 changed)
3697 struct mwl8k_priv *priv = hw->priv;
3700 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3702 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3705 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
3706 struct netdev_hw_addr_list *mc_list)
3708 struct mwl8k_cmd_pkt *cmd;
3711 * Synthesize and return a command packet that programs the
3712 * hardware multicast address filter. At this point we don't
3713 * know whether FIF_ALLMULTI is being requested, but if it is,
3714 * we'll end up throwing this packet away and creating a new
3715 * one in mwl8k_configure_filter().
3717 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
3719 return (unsigned long)cmd;
3723 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3724 unsigned int changed_flags,
3725 unsigned int *total_flags)
3727 struct mwl8k_priv *priv = hw->priv;
3730 * Hardware sniffer mode is mutually exclusive with STA
3731 * operation, so refuse to enable sniffer mode if a STA
3732 * interface is active.
3734 if (!list_empty(&priv->vif_list)) {
3735 if (net_ratelimit())
3736 wiphy_info(hw->wiphy,
3737 "not enabling sniffer mode because STA interface is active\n");
3741 if (!priv->sniffer_enabled) {
3742 if (mwl8k_cmd_enable_sniffer(hw, 1))
3744 priv->sniffer_enabled = true;
3747 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3748 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3754 static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
3756 if (!list_empty(&priv->vif_list))
3757 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
3762 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
3763 unsigned int changed_flags,
3764 unsigned int *total_flags,
3767 struct mwl8k_priv *priv = hw->priv;
3768 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3771 * AP firmware doesn't allow fine-grained control over
3772 * the receive filter.
3775 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3781 * Enable hardware sniffer mode if FIF_CONTROL or
3782 * FIF_OTHER_BSS is requested.
3784 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3785 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3790 /* Clear unsupported feature flags */
3791 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3793 if (mwl8k_fw_lock(hw)) {
3798 if (priv->sniffer_enabled) {
3799 mwl8k_cmd_enable_sniffer(hw, 0);
3800 priv->sniffer_enabled = false;
3803 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
3804 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3806 * Disable the BSS filter.
3808 mwl8k_cmd_set_pre_scan(hw);
3810 struct mwl8k_vif *mwl8k_vif;
3814 * Enable the BSS filter.
3816 * If there is an active STA interface, use that
3817 * interface's BSSID, otherwise use a dummy one
3818 * (where the OUI part needs to be nonzero for
3819 * the BSSID to be accepted by POST_SCAN).
3821 mwl8k_vif = mwl8k_first_vif(priv);
3822 if (mwl8k_vif != NULL)
3823 bssid = mwl8k_vif->vif->bss_conf.bssid;
3825 bssid = "\x01\x00\x00\x00\x00\x00";
3827 mwl8k_cmd_set_post_scan(hw, bssid);
3832 * If FIF_ALLMULTI is being requested, throw away the command
3833 * packet that ->prepare_multicast() built and replace it with
3834 * a command packet that enables reception of all multicast
3837 if (*total_flags & FIF_ALLMULTI) {
3839 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
3843 mwl8k_post_cmd(hw, cmd);
3847 mwl8k_fw_unlock(hw);
3850 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
3852 return mwl8k_cmd_set_rts_threshold(hw, value);
3855 static int mwl8k_sta_remove(struct ieee80211_hw *hw,
3856 struct ieee80211_vif *vif,
3857 struct ieee80211_sta *sta)
3859 struct mwl8k_priv *priv = hw->priv;
3862 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
3864 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
3867 static int mwl8k_sta_add(struct ieee80211_hw *hw,
3868 struct ieee80211_vif *vif,
3869 struct ieee80211_sta *sta)
3871 struct mwl8k_priv *priv = hw->priv;
3875 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
3877 MWL8K_STA(sta)->peer_id = ret;
3884 return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
3887 static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
3888 const struct ieee80211_tx_queue_params *params)
3890 struct mwl8k_priv *priv = hw->priv;
3893 rc = mwl8k_fw_lock(hw);
3895 BUG_ON(queue > MWL8K_TX_QUEUES - 1);
3896 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
3898 if (!priv->wmm_enabled)
3899 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
3902 rc = mwl8k_cmd_set_edca_params(hw, queue,
3908 mwl8k_fw_unlock(hw);
3914 static int mwl8k_get_stats(struct ieee80211_hw *hw,
3915 struct ieee80211_low_level_stats *stats)
3917 return mwl8k_cmd_get_stat(hw, stats);
3920 static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
3921 struct survey_info *survey)
3923 struct mwl8k_priv *priv = hw->priv;
3924 struct ieee80211_conf *conf = &hw->conf;
3929 survey->channel = conf->channel;
3930 survey->filled = SURVEY_INFO_NOISE_DBM;
3931 survey->noise = priv->noise;
3937 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3938 enum ieee80211_ampdu_mlme_action action,
3939 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3942 case IEEE80211_AMPDU_RX_START:
3943 case IEEE80211_AMPDU_RX_STOP:
3944 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3952 static const struct ieee80211_ops mwl8k_ops = {
3954 .start = mwl8k_start,
3956 .add_interface = mwl8k_add_interface,
3957 .remove_interface = mwl8k_remove_interface,
3958 .config = mwl8k_config,
3959 .bss_info_changed = mwl8k_bss_info_changed,
3960 .prepare_multicast = mwl8k_prepare_multicast,
3961 .configure_filter = mwl8k_configure_filter,
3962 .set_rts_threshold = mwl8k_set_rts_threshold,
3963 .sta_add = mwl8k_sta_add,
3964 .sta_remove = mwl8k_sta_remove,
3965 .conf_tx = mwl8k_conf_tx,
3966 .get_stats = mwl8k_get_stats,
3967 .get_survey = mwl8k_get_survey,
3968 .ampdu_action = mwl8k_ampdu_action,
3971 static void mwl8k_finalize_join_worker(struct work_struct *work)
3973 struct mwl8k_priv *priv =
3974 container_of(work, struct mwl8k_priv, finalize_join_worker);
3975 struct sk_buff *skb = priv->beacon_skb;
3976 struct ieee80211_mgmt *mgmt = (void *)skb->data;
3977 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
3978 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
3979 mgmt->u.beacon.variable, len);
3980 int dtim_period = 1;
3982 if (tim && tim[1] >= 2)
3983 dtim_period = tim[3];
3985 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
3988 priv->beacon_skb = NULL;
3997 #define MWL8K_8366_AP_FW_API 1
3998 #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
3999 #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
4001 static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
4003 .part_name = "88w8363",
4004 .helper_image = "mwl8k/helper_8363.fw",
4005 .fw_image_sta = "mwl8k/fmimage_8363.fw",
4008 .part_name = "88w8687",
4009 .helper_image = "mwl8k/helper_8687.fw",
4010 .fw_image_sta = "mwl8k/fmimage_8687.fw",
4013 .part_name = "88w8366",
4014 .helper_image = "mwl8k/helper_8366.fw",
4015 .fw_image_sta = "mwl8k/fmimage_8366.fw",
4016 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
4017 .fw_api_ap = MWL8K_8366_AP_FW_API,
4018 .ap_rxd_ops = &rxd_8366_ap_ops,
4022 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
4023 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
4024 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
4025 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
4026 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
4027 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
4028 MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
4030 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
4031 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
4032 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
4033 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
4034 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
4035 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
4036 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
4037 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
4040 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
4042 static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
4045 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
4046 "Trying alternative firmware %s\n", pci_name(priv->pdev),
4047 priv->fw_pref, priv->fw_alt);
4048 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
4050 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
4051 pci_name(priv->pdev), priv->fw_alt);
4057 static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
4058 static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
4060 struct mwl8k_priv *priv = context;
4061 struct mwl8k_device_info *di = priv->device_info;
4064 switch (priv->fw_state) {
4067 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
4068 pci_name(priv->pdev), di->helper_image);
4071 priv->fw_helper = fw;
4072 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
4074 if (rc && priv->fw_alt) {
4075 rc = mwl8k_request_alt_fw(priv);
4078 priv->fw_state = FW_STATE_LOADING_ALT;
4082 priv->fw_state = FW_STATE_LOADING_PREF;
4085 case FW_STATE_LOADING_PREF:
4088 rc = mwl8k_request_alt_fw(priv);
4091 priv->fw_state = FW_STATE_LOADING_ALT;
4095 priv->fw_ucode = fw;
4096 rc = mwl8k_firmware_load_success(priv);
4100 complete(&priv->firmware_loading_complete);
4104 case FW_STATE_LOADING_ALT:
4106 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
4107 pci_name(priv->pdev), di->helper_image);
4110 priv->fw_ucode = fw;
4111 rc = mwl8k_firmware_load_success(priv);
4115 complete(&priv->firmware_loading_complete);
4119 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
4120 MWL8K_NAME, priv->fw_state);
4127 priv->fw_state = FW_STATE_ERROR;
4128 complete(&priv->firmware_loading_complete);
4129 device_release_driver(&priv->pdev->dev);
4130 mwl8k_release_firmware(priv);
4133 static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
4136 struct mwl8k_priv *priv = hw->priv;
4139 /* Reset firmware and hardware */
4140 mwl8k_hw_reset(priv);
4142 /* Ask userland hotplug daemon for the device firmware */
4143 rc = mwl8k_request_firmware(priv, fw_image, nowait);
4145 wiphy_err(hw->wiphy, "Firmware files not found\n");
4152 /* Load firmware into hardware */
4153 rc = mwl8k_load_firmware(hw);
4155 wiphy_err(hw->wiphy, "Cannot start firmware\n");
4157 /* Reclaim memory once firmware is successfully loaded */
4158 mwl8k_release_firmware(priv);
4163 /* initialize hw after successfully loading a firmware image */
4164 static int mwl8k_probe_hw(struct ieee80211_hw *hw)
4166 struct mwl8k_priv *priv = hw->priv;
4171 priv->rxd_ops = priv->device_info->ap_rxd_ops;
4172 if (priv->rxd_ops == NULL) {
4173 wiphy_err(hw->wiphy,
4174 "Driver does not have AP firmware image support for this hardware\n");
4175 goto err_stop_firmware;
4178 priv->rxd_ops = &rxd_sta_ops;
4181 priv->sniffer_enabled = false;
4182 priv->wmm_enabled = false;
4183 priv->pending_tx_pkts = 0;
4185 rc = mwl8k_rxq_init(hw, 0);
4187 goto err_stop_firmware;
4188 rxq_refill(hw, 0, INT_MAX);
4190 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4191 rc = mwl8k_txq_init(hw, i);
4193 goto err_free_queues;
4196 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4197 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4198 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
4199 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
4200 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4202 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
4203 IRQF_SHARED, MWL8K_NAME, hw);
4205 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
4206 goto err_free_queues;
4210 * Temporarily enable interrupts. Initial firmware host
4211 * commands use interrupts and avoid polling. Disable
4212 * interrupts when done.
4214 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4216 /* Get config data, mac addrs etc */
4218 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4220 rc = mwl8k_cmd_set_hw_spec(hw);
4222 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4225 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
4229 /* Turn radio off */
4230 rc = mwl8k_cmd_radio_disable(hw);
4232 wiphy_err(hw->wiphy, "Cannot disable\n");
4236 /* Clear MAC address */
4237 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
4239 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
4243 /* Disable interrupts */
4244 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4245 free_irq(priv->pdev->irq, hw);
4247 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
4248 priv->device_info->part_name,
4249 priv->hw_rev, hw->wiphy->perm_addr,
4250 priv->ap_fw ? "AP" : "STA",
4251 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
4252 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
4257 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4258 free_irq(priv->pdev->irq, hw);
4261 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4262 mwl8k_txq_deinit(hw, i);
4263 mwl8k_rxq_deinit(hw, 0);
4266 mwl8k_hw_reset(priv);
4272 * invoke mwl8k_reload_firmware to change the firmware image after the device
4273 * has already been registered
4275 static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
4278 struct mwl8k_priv *priv = hw->priv;
4281 mwl8k_rxq_deinit(hw, 0);
4283 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4284 mwl8k_txq_deinit(hw, i);
4286 rc = mwl8k_init_firmware(hw, fw_image, false);
4290 rc = mwl8k_probe_hw(hw);
4294 rc = mwl8k_start(hw);
4298 rc = mwl8k_config(hw, ~0);
4302 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
4303 rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
4311 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
4315 static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
4317 struct ieee80211_hw *hw = priv->hw;
4320 rc = mwl8k_load_firmware(hw);
4321 mwl8k_release_firmware(priv);
4323 wiphy_err(hw->wiphy, "Cannot start firmware\n");
4328 * Extra headroom is the size of the required DMA header
4329 * minus the size of the smallest 802.11 frame (CTS frame).
4331 hw->extra_tx_headroom =
4332 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
4334 hw->channel_change_time = 10;
4336 hw->queues = MWL8K_TX_QUEUES;
4338 /* Set rssi values to dBm */
4339 hw->flags |= IEEE80211_HW_SIGNAL_DBM;
4340 hw->vif_data_size = sizeof(struct mwl8k_vif);
4341 hw->sta_data_size = sizeof(struct mwl8k_sta);
4343 priv->macids_used = 0;
4344 INIT_LIST_HEAD(&priv->vif_list);
4346 /* Set default radio state and preamble */
4348 priv->radio_short_preamble = 0;
4350 /* Finalize join worker */
4351 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
4353 /* TX reclaim and RX tasklets. */
4354 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
4355 tasklet_disable(&priv->poll_tx_task);
4356 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
4357 tasklet_disable(&priv->poll_rx_task);
4359 /* Power management cookie */
4360 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
4361 if (priv->cookie == NULL)
4364 mutex_init(&priv->fw_mutex);
4365 priv->fw_mutex_owner = NULL;
4366 priv->fw_mutex_depth = 0;
4367 priv->hostcmd_wait = NULL;
4369 spin_lock_init(&priv->tx_lock);
4371 priv->tx_wait = NULL;
4373 rc = mwl8k_probe_hw(hw);
4375 goto err_free_cookie;
4377 hw->wiphy->interface_modes = 0;
4378 if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
4379 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
4380 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
4381 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
4383 rc = ieee80211_register_hw(hw);
4385 wiphy_err(hw->wiphy, "Cannot register device\n");
4386 goto err_unprobe_hw;
4392 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4393 mwl8k_txq_deinit(hw, i);
4394 mwl8k_rxq_deinit(hw, 0);
4397 if (priv->cookie != NULL)
4398 pci_free_consistent(priv->pdev, 4,
4399 priv->cookie, priv->cookie_dma);
4403 static int __devinit mwl8k_probe(struct pci_dev *pdev,
4404 const struct pci_device_id *id)
4406 static int printed_version;
4407 struct ieee80211_hw *hw;
4408 struct mwl8k_priv *priv;
4409 struct mwl8k_device_info *di;
4412 if (!printed_version) {
4413 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
4414 printed_version = 1;
4418 rc = pci_enable_device(pdev);
4420 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
4425 rc = pci_request_regions(pdev, MWL8K_NAME);
4427 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
4429 goto err_disable_device;
4432 pci_set_master(pdev);
4435 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
4437 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
4442 SET_IEEE80211_DEV(hw, &pdev->dev);
4443 pci_set_drvdata(pdev, hw);
4448 priv->device_info = &mwl8k_info_tbl[id->driver_data];
4451 priv->sram = pci_iomap(pdev, 0, 0x10000);
4452 if (priv->sram == NULL) {
4453 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
4458 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
4459 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
4461 priv->regs = pci_iomap(pdev, 1, 0x10000);
4462 if (priv->regs == NULL) {
4463 priv->regs = pci_iomap(pdev, 2, 0x10000);
4464 if (priv->regs == NULL) {
4465 wiphy_err(hw->wiphy, "Cannot map device registers\n");
4471 * Choose the initial fw image depending on user input. If a second
4472 * image is available, make it the alternative image that will be
4473 * loaded if the first one fails.
4475 init_completion(&priv->firmware_loading_complete);
4476 di = priv->device_info;
4477 if (ap_mode_default && di->fw_image_ap) {
4478 priv->fw_pref = di->fw_image_ap;
4479 priv->fw_alt = di->fw_image_sta;
4480 } else if (!ap_mode_default && di->fw_image_sta) {
4481 priv->fw_pref = di->fw_image_sta;
4482 priv->fw_alt = di->fw_image_ap;
4483 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
4484 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
4485 priv->fw_pref = di->fw_image_sta;
4486 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
4487 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
4488 priv->fw_pref = di->fw_image_ap;
4490 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
4492 goto err_stop_firmware;
4496 mwl8k_hw_reset(priv);
4499 if (priv->regs != NULL)
4500 pci_iounmap(pdev, priv->regs);
4502 if (priv->sram != NULL)
4503 pci_iounmap(pdev, priv->sram);
4505 pci_set_drvdata(pdev, NULL);
4506 ieee80211_free_hw(hw);
4509 pci_release_regions(pdev);
4512 pci_disable_device(pdev);
4517 static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
4519 printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
4522 static void __devexit mwl8k_remove(struct pci_dev *pdev)
4524 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
4525 struct mwl8k_priv *priv;
4532 wait_for_completion(&priv->firmware_loading_complete);
4534 if (priv->fw_state == FW_STATE_ERROR) {
4535 mwl8k_hw_reset(priv);
4539 ieee80211_stop_queues(hw);
4541 ieee80211_unregister_hw(hw);
4543 /* Remove TX reclaim and RX tasklets. */
4544 tasklet_kill(&priv->poll_tx_task);
4545 tasklet_kill(&priv->poll_rx_task);
4548 mwl8k_hw_reset(priv);
4550 /* Return all skbs to mac80211 */
4551 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4552 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4554 for (i = 0; i < MWL8K_TX_QUEUES; i++)
4555 mwl8k_txq_deinit(hw, i);
4557 mwl8k_rxq_deinit(hw, 0);
4559 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
4562 pci_iounmap(pdev, priv->regs);
4563 pci_iounmap(pdev, priv->sram);
4564 pci_set_drvdata(pdev, NULL);
4565 ieee80211_free_hw(hw);
4566 pci_release_regions(pdev);
4567 pci_disable_device(pdev);
4570 static struct pci_driver mwl8k_driver = {
4572 .id_table = mwl8k_pci_id_table,
4573 .probe = mwl8k_probe,
4574 .remove = __devexit_p(mwl8k_remove),
4575 .shutdown = __devexit_p(mwl8k_shutdown),
4578 static int __init mwl8k_init(void)
4580 return pci_register_driver(&mwl8k_driver);
4583 static void __exit mwl8k_exit(void)
4585 pci_unregister_driver(&mwl8k_driver);
4588 module_init(mwl8k_init);
4589 module_exit(mwl8k_exit);
4591 MODULE_DESCRIPTION(MWL8K_DESC);
4592 MODULE_VERSION(MWL8K_VERSION);
4593 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4594 MODULE_LICENSE("GPL");