1 /******************************************************************************
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
48 #include <net/mac80211.h>
50 #include <asm/div64.h>
52 #define DRV_NAME "iwlagn"
54 #include "iwl-eeprom.h"
58 #include "iwl-helpers.h"
60 #include "iwl-calib.h"
64 /******************************************************************************
68 ******************************************************************************/
71 * module name, copyright, version, etc.
73 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
75 #ifdef CONFIG_IWLWIFI_DEBUG
81 #define DRV_VERSION IWLWIFI_VERSION VD
84 MODULE_DESCRIPTION(DRV_DESCRIPTION);
85 MODULE_VERSION(DRV_VERSION);
86 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
87 MODULE_LICENSE("GPL");
88 MODULE_ALIAS("iwl4965");
90 static int iwlagn_ant_coupling;
91 static bool iwlagn_bt_ch_announce = 1;
94 * iwl_commit_rxon - commit staging_rxon to hardware
96 * The RXON command in staging_rxon is committed to the hardware and
97 * the active_rxon structure is updated with the new data. This
98 * function correctly transitions out of the RXON_ASSOC_MSK state if
99 * a HW tune is required based on the RXON structure changes.
101 int iwl_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
103 /* cast away the const for active_rxon in this function */
104 struct iwl_rxon_cmd *active_rxon = (void *)&ctx->active;
107 !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
109 if (!iwl_is_alive(priv))
112 /* always get timestamp with Rx frame */
113 ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
115 ret = iwl_check_rxon_cmd(priv, ctx);
117 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
122 * receive commit_rxon request
123 * abort any previous channel switch if still in process
125 if (priv->switch_rxon.switch_in_progress &&
126 (priv->switch_rxon.channel != ctx->staging.channel)) {
127 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
128 le16_to_cpu(priv->switch_rxon.channel));
129 iwl_chswitch_done(priv, false);
132 /* If we don't need to send a full RXON, we can use
133 * iwl_rxon_assoc_cmd which is used to reconfigure filter
134 * and other flags for the current radio configuration. */
135 if (!iwl_full_rxon_required(priv, ctx)) {
136 ret = iwl_send_rxon_assoc(priv, ctx);
138 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
142 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
143 iwl_print_rx_config_cmd(priv, ctx);
147 /* If we are currently associated and the new config requires
148 * an RXON_ASSOC and the new config wants the associated mask enabled,
149 * we must clear the associated from the active configuration
150 * before we apply the new config */
151 if (iwl_is_associated_ctx(ctx) && new_assoc) {
152 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
153 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
155 ret = iwl_send_cmd_pdu(priv, ctx->rxon_cmd,
156 sizeof(struct iwl_rxon_cmd),
159 /* If the mask clearing failed then we set
160 * active_rxon back to what it was previously */
162 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
163 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
166 iwl_clear_ucode_stations(priv, ctx);
167 iwl_restore_stations(priv, ctx);
168 ret = iwl_restore_default_wep_keys(priv, ctx);
170 IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
175 IWL_DEBUG_INFO(priv, "Sending RXON\n"
176 "* with%s RXON_FILTER_ASSOC_MSK\n"
179 (new_assoc ? "" : "out"),
180 le16_to_cpu(ctx->staging.channel),
181 ctx->staging.bssid_addr);
183 iwl_set_rxon_hwcrypto(priv, ctx, !priv->cfg->mod_params->sw_crypto);
185 /* Apply the new configuration
186 * RXON unassoc clears the station table in uCode so restoration of
187 * stations is needed after it (the RXON command) completes
190 ret = iwl_send_cmd_pdu(priv, ctx->rxon_cmd,
191 sizeof(struct iwl_rxon_cmd), &ctx->staging);
193 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
196 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
197 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
198 iwl_clear_ucode_stations(priv, ctx);
199 iwl_restore_stations(priv, ctx);
200 ret = iwl_restore_default_wep_keys(priv, ctx);
202 IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
207 priv->start_calib = 0;
209 /* Apply the new configuration
210 * RXON assoc doesn't clear the station table in uCode,
212 ret = iwl_send_cmd_pdu(priv, ctx->rxon_cmd,
213 sizeof(struct iwl_rxon_cmd), &ctx->staging);
215 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
218 memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
220 iwl_print_rx_config_cmd(priv, ctx);
222 iwl_init_sensitivity(priv);
224 /* If we issue a new RXON command which required a tune then we must
225 * send a new TXPOWER command or we won't be able to Tx any frames */
226 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
228 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
235 void iwl_update_chain_flags(struct iwl_priv *priv)
237 struct iwl_rxon_context *ctx;
239 if (priv->cfg->ops->hcmd->set_rxon_chain) {
240 for_each_context(priv, ctx) {
241 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
242 iwlcore_commit_rxon(priv, ctx);
247 static void iwl_clear_free_frames(struct iwl_priv *priv)
249 struct list_head *element;
251 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
254 while (!list_empty(&priv->free_frames)) {
255 element = priv->free_frames.next;
257 kfree(list_entry(element, struct iwl_frame, list));
258 priv->frames_count--;
261 if (priv->frames_count) {
262 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
264 priv->frames_count = 0;
268 static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
270 struct iwl_frame *frame;
271 struct list_head *element;
272 if (list_empty(&priv->free_frames)) {
273 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
275 IWL_ERR(priv, "Could not allocate frame!\n");
279 priv->frames_count++;
283 element = priv->free_frames.next;
285 return list_entry(element, struct iwl_frame, list);
288 static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
290 memset(frame, 0, sizeof(*frame));
291 list_add(&frame->list, &priv->free_frames);
294 static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
295 struct ieee80211_hdr *hdr,
298 if (!priv->ibss_beacon)
301 if (priv->ibss_beacon->len > left)
304 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
306 return priv->ibss_beacon->len;
309 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
310 static void iwl_set_beacon_tim(struct iwl_priv *priv,
311 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
312 u8 *beacon, u32 frame_size)
315 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
318 * The index is relative to frame start but we start looking at the
319 * variable-length part of the beacon.
321 tim_idx = mgmt->u.beacon.variable - beacon;
323 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
324 while ((tim_idx < (frame_size - 2)) &&
325 (beacon[tim_idx] != WLAN_EID_TIM))
326 tim_idx += beacon[tim_idx+1] + 2;
328 /* If TIM field was found, set variables */
329 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
330 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
331 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
333 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
336 static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
337 struct iwl_frame *frame)
339 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
344 * We have to set up the TX command, the TX Beacon command, and the
348 lockdep_assert_held(&priv->mutex);
350 if (!priv->beacon_ctx) {
351 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
355 /* Initialize memory */
356 tx_beacon_cmd = &frame->u.beacon;
357 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
359 /* Set up TX beacon contents */
360 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
361 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
362 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
365 /* Set up TX command fields */
366 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
367 tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
368 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
369 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
370 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
372 /* Set up TX beacon command fields */
373 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
376 /* Set up packet rate and flags */
377 rate = iwl_rate_get_lowest_plcp(priv, priv->beacon_ctx);
378 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
379 priv->hw_params.valid_tx_ant);
380 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
381 if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
382 rate_flags |= RATE_MCS_CCK_MSK;
383 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
386 return sizeof(*tx_beacon_cmd) + frame_size;
388 static int iwl_send_beacon_cmd(struct iwl_priv *priv)
390 struct iwl_frame *frame;
391 unsigned int frame_size;
394 frame = iwl_get_free_frame(priv);
396 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
401 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
403 IWL_ERR(priv, "Error configuring the beacon command\n");
404 iwl_free_frame(priv, frame);
408 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
411 iwl_free_frame(priv, frame);
416 static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
418 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
420 dma_addr_t addr = get_unaligned_le32(&tb->lo);
421 if (sizeof(dma_addr_t) > sizeof(u32))
423 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
428 static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
430 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
432 return le16_to_cpu(tb->hi_n_len) >> 4;
435 static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
436 dma_addr_t addr, u16 len)
438 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
439 u16 hi_n_len = len << 4;
441 put_unaligned_le32(addr, &tb->lo);
442 if (sizeof(dma_addr_t) > sizeof(u32))
443 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
445 tb->hi_n_len = cpu_to_le16(hi_n_len);
447 tfd->num_tbs = idx + 1;
450 static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd)
452 return tfd->num_tbs & 0x1f;
456 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
457 * @priv - driver private data
460 * Does NOT advance any TFD circular buffer read/write indexes
461 * Does NOT free the TFD itself (which is within circular buffer)
463 void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
465 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds;
467 struct pci_dev *dev = priv->pci_dev;
468 int index = txq->q.read_ptr;
472 tfd = &tfd_tmp[index];
474 /* Sanity check on number of chunks */
475 num_tbs = iwl_tfd_get_num_tbs(tfd);
477 if (num_tbs >= IWL_NUM_OF_TBS) {
478 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs);
479 /* @todo issue fatal error, it is quite serious situation */
485 pci_unmap_single(dev,
486 dma_unmap_addr(&txq->meta[index], mapping),
487 dma_unmap_len(&txq->meta[index], len),
488 PCI_DMA_BIDIRECTIONAL);
490 /* Unmap chunks, if any. */
491 for (i = 1; i < num_tbs; i++)
492 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
493 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
499 skb = txq->txb[txq->q.read_ptr].skb;
501 /* can be called from irqs-disabled context */
503 dev_kfree_skb_any(skb);
504 txq->txb[txq->q.read_ptr].skb = NULL;
509 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
510 struct iwl_tx_queue *txq,
511 dma_addr_t addr, u16 len,
515 struct iwl_tfd *tfd, *tfd_tmp;
519 tfd_tmp = (struct iwl_tfd *)txq->tfds;
520 tfd = &tfd_tmp[q->write_ptr];
523 memset(tfd, 0, sizeof(*tfd));
525 num_tbs = iwl_tfd_get_num_tbs(tfd);
527 /* Each TFD can point to a maximum 20 Tx buffers */
528 if (num_tbs >= IWL_NUM_OF_TBS) {
529 IWL_ERR(priv, "Error can not send more than %d chunks\n",
534 BUG_ON(addr & ~DMA_BIT_MASK(36));
535 if (unlikely(addr & ~IWL_TX_DMA_MASK))
536 IWL_ERR(priv, "Unaligned address = %llx\n",
537 (unsigned long long)addr);
539 iwl_tfd_set_tb(tfd, num_tbs, addr, len);
545 * Tell nic where to find circular buffer of Tx Frame Descriptors for
546 * given Tx queue, and enable the DMA channel used for that queue.
548 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
549 * channels supported in hardware.
551 int iwl_hw_tx_queue_init(struct iwl_priv *priv,
552 struct iwl_tx_queue *txq)
554 int txq_id = txq->q.id;
556 /* Circular buffer (TFD queue in DRAM) physical base address */
557 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
558 txq->q.dma_addr >> 8);
563 /******************************************************************************
565 * Generic RX handler implementations
567 ******************************************************************************/
568 static void iwl_rx_reply_alive(struct iwl_priv *priv,
569 struct iwl_rx_mem_buffer *rxb)
571 struct iwl_rx_packet *pkt = rxb_addr(rxb);
572 struct iwl_alive_resp *palive;
573 struct delayed_work *pwork;
575 palive = &pkt->u.alive_frame;
577 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
579 palive->is_valid, palive->ver_type,
580 palive->ver_subtype);
582 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
583 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
584 memcpy(&priv->card_alive_init,
586 sizeof(struct iwl_init_alive_resp));
587 pwork = &priv->init_alive_start;
589 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
590 memcpy(&priv->card_alive, &pkt->u.alive_frame,
591 sizeof(struct iwl_alive_resp));
592 pwork = &priv->alive_start;
595 /* We delay the ALIVE response by 5ms to
596 * give the HW RF Kill time to activate... */
597 if (palive->is_valid == UCODE_VALID_OK)
598 queue_delayed_work(priv->workqueue, pwork,
599 msecs_to_jiffies(5));
601 IWL_WARN(priv, "uCode did not respond OK.\n");
604 static void iwl_bg_beacon_update(struct work_struct *work)
606 struct iwl_priv *priv =
607 container_of(work, struct iwl_priv, beacon_update);
608 struct sk_buff *beacon;
610 mutex_lock(&priv->mutex);
611 if (!priv->beacon_ctx) {
612 IWL_ERR(priv, "updating beacon w/o beacon context!\n");
616 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
617 beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
619 IWL_ERR(priv, "update beacon failed\n");
623 /* new beacon skb is allocated every time; dispose previous.*/
624 if (priv->ibss_beacon)
625 dev_kfree_skb(priv->ibss_beacon);
627 priv->ibss_beacon = beacon;
629 iwl_send_beacon_cmd(priv);
631 mutex_unlock(&priv->mutex);
634 static void iwl_bg_bt_runtime_config(struct work_struct *work)
636 struct iwl_priv *priv =
637 container_of(work, struct iwl_priv, bt_runtime_config);
639 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
642 /* dont send host command if rf-kill is on */
643 if (!iwl_is_ready_rf(priv))
645 priv->cfg->ops->hcmd->send_bt_config(priv);
648 static void iwl_bg_bt_full_concurrency(struct work_struct *work)
650 struct iwl_priv *priv =
651 container_of(work, struct iwl_priv, bt_full_concurrency);
652 struct iwl_rxon_context *ctx;
654 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
657 /* dont send host command if rf-kill is on */
658 if (!iwl_is_ready_rf(priv))
661 IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
662 priv->bt_full_concurrent ?
663 "full concurrency" : "3-wire");
666 * LQ & RXON updated cmds must be sent before BT Config cmd
667 * to avoid 3-wire collisions
669 mutex_lock(&priv->mutex);
670 for_each_context(priv, ctx) {
671 if (priv->cfg->ops->hcmd->set_rxon_chain)
672 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
673 iwlcore_commit_rxon(priv, ctx);
675 mutex_unlock(&priv->mutex);
677 priv->cfg->ops->hcmd->send_bt_config(priv);
681 * iwl_bg_statistics_periodic - Timer callback to queue statistics
683 * This callback is provided in order to send a statistics request.
685 * This timer function is continually reset to execute within
686 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
687 * was received. We need to ensure we receive the statistics in order
688 * to update the temperature used for calibrating the TXPOWER.
690 static void iwl_bg_statistics_periodic(unsigned long data)
692 struct iwl_priv *priv = (struct iwl_priv *)data;
694 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
697 /* dont send host command if rf-kill is on */
698 if (!iwl_is_ready_rf(priv))
701 iwl_send_statistics_request(priv, CMD_ASYNC, false);
705 static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
706 u32 start_idx, u32 num_events,
710 u32 ptr; /* SRAM byte address of log data */
711 u32 ev, time, data; /* event log data */
712 unsigned long reg_flags;
715 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
717 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
719 /* Make sure device is powered up for SRAM reads */
720 spin_lock_irqsave(&priv->reg_lock, reg_flags);
721 if (iwl_grab_nic_access(priv)) {
722 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
726 /* Set starting address; reads will auto-increment */
727 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
731 * "time" is actually "data" for mode 0 (no timestamp).
732 * place event id # at far right for easier visual parsing.
734 for (i = 0; i < num_events; i++) {
735 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
736 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
738 trace_iwlwifi_dev_ucode_cont_event(priv,
741 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
742 trace_iwlwifi_dev_ucode_cont_event(priv,
746 /* Allow device to power down */
747 iwl_release_nic_access(priv);
748 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
751 static void iwl_continuous_event_trace(struct iwl_priv *priv)
753 u32 capacity; /* event log capacity in # entries */
754 u32 base; /* SRAM byte address of event log header */
755 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
756 u32 num_wraps; /* # times uCode wrapped to top of log */
757 u32 next_entry; /* index of next entry to be written by uCode */
759 if (priv->ucode_type == UCODE_INIT)
760 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
762 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
763 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
764 capacity = iwl_read_targ_mem(priv, base);
765 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
766 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
767 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
771 if (num_wraps == priv->event_log.num_wraps) {
772 iwl_print_cont_event_trace(priv,
773 base, priv->event_log.next_entry,
774 next_entry - priv->event_log.next_entry,
776 priv->event_log.non_wraps_count++;
778 if ((num_wraps - priv->event_log.num_wraps) > 1)
779 priv->event_log.wraps_more_count++;
781 priv->event_log.wraps_once_count++;
782 trace_iwlwifi_dev_ucode_wrap_event(priv,
783 num_wraps - priv->event_log.num_wraps,
784 next_entry, priv->event_log.next_entry);
785 if (next_entry < priv->event_log.next_entry) {
786 iwl_print_cont_event_trace(priv, base,
787 priv->event_log.next_entry,
788 capacity - priv->event_log.next_entry,
791 iwl_print_cont_event_trace(priv, base, 0,
794 iwl_print_cont_event_trace(priv, base,
795 next_entry, capacity - next_entry,
798 iwl_print_cont_event_trace(priv, base, 0,
802 priv->event_log.num_wraps = num_wraps;
803 priv->event_log.next_entry = next_entry;
807 * iwl_bg_ucode_trace - Timer callback to log ucode event
809 * The timer is continually set to execute every
810 * UCODE_TRACE_PERIOD milliseconds after the last timer expired
811 * this function is to perform continuous uCode event logging operation
814 static void iwl_bg_ucode_trace(unsigned long data)
816 struct iwl_priv *priv = (struct iwl_priv *)data;
818 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
821 if (priv->event_log.ucode_trace) {
822 iwl_continuous_event_trace(priv);
823 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
824 mod_timer(&priv->ucode_trace,
825 jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
829 static void iwl_rx_beacon_notif(struct iwl_priv *priv,
830 struct iwl_rx_mem_buffer *rxb)
832 struct iwl_rx_packet *pkt = rxb_addr(rxb);
833 struct iwl4965_beacon_notif *beacon =
834 (struct iwl4965_beacon_notif *)pkt->u.raw;
835 #ifdef CONFIG_IWLWIFI_DEBUG
836 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
838 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
839 "tsf %d %d rate %d\n",
840 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
841 beacon->beacon_notify_hdr.failure_frame,
842 le32_to_cpu(beacon->ibss_mgr_status),
843 le32_to_cpu(beacon->high_tsf),
844 le32_to_cpu(beacon->low_tsf), rate);
847 priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
849 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
850 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
851 queue_work(priv->workqueue, &priv->beacon_update);
854 /* Handle notification from uCode that card's power state is changing
855 * due to software, hardware, or critical temperature RFKILL */
856 static void iwl_rx_card_state_notif(struct iwl_priv *priv,
857 struct iwl_rx_mem_buffer *rxb)
859 struct iwl_rx_packet *pkt = rxb_addr(rxb);
860 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
861 unsigned long status = priv->status;
863 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
864 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
865 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
866 (flags & CT_CARD_DISABLED) ?
867 "Reached" : "Not reached");
869 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
872 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
873 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
875 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
876 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
878 if (!(flags & RXON_CARD_DISABLED)) {
879 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
880 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
881 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
882 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
884 if (flags & CT_CARD_DISABLED)
885 iwl_tt_enter_ct_kill(priv);
887 if (!(flags & CT_CARD_DISABLED))
888 iwl_tt_exit_ct_kill(priv);
890 if (flags & HW_CARD_DISABLED)
891 set_bit(STATUS_RF_KILL_HW, &priv->status);
893 clear_bit(STATUS_RF_KILL_HW, &priv->status);
896 if (!(flags & RXON_CARD_DISABLED))
897 iwl_scan_cancel(priv);
899 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
900 test_bit(STATUS_RF_KILL_HW, &priv->status)))
901 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
902 test_bit(STATUS_RF_KILL_HW, &priv->status));
904 wake_up_interruptible(&priv->wait_command_queue);
907 int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
909 if (src == IWL_PWR_SRC_VAUX) {
910 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
911 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
912 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
913 ~APMG_PS_CTRL_MSK_PWR_SRC);
915 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
916 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
917 ~APMG_PS_CTRL_MSK_PWR_SRC);
923 static void iwl_bg_tx_flush(struct work_struct *work)
925 struct iwl_priv *priv =
926 container_of(work, struct iwl_priv, tx_flush);
928 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
931 /* do nothing if rf-kill is on */
932 if (!iwl_is_ready_rf(priv))
935 if (priv->cfg->ops->lib->txfifo_flush) {
936 IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
937 iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
942 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
944 * Setup the RX handlers for each of the reply types sent from the uCode
947 * This function chains into the hardware specific files for them to setup
948 * any hardware specific handlers as well.
950 static void iwl_setup_rx_handlers(struct iwl_priv *priv)
952 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
953 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
954 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
955 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
956 iwl_rx_spectrum_measure_notif;
957 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
958 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
959 iwl_rx_pm_debug_statistics_notif;
960 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
963 * The same handler is used for both the REPLY to a discrete
964 * statistics request from the host as well as for the periodic
965 * statistics notifications (after received beacons) from the uCode.
967 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
968 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
970 iwl_setup_rx_scan_handlers(priv);
972 /* status change handler */
973 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
975 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
976 iwl_rx_missed_beacon_notif;
978 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
979 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
981 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
982 /* Set up hardware specific Rx handlers */
983 priv->cfg->ops->lib->rx_handler_setup(priv);
987 * iwl_rx_handle - Main entry function for receiving responses from uCode
989 * Uses the priv->rx_handlers callback function array to invoke
990 * the appropriate handlers, including command responses,
991 * frame-received notifications, and other notifications.
993 void iwl_rx_handle(struct iwl_priv *priv)
995 struct iwl_rx_mem_buffer *rxb;
996 struct iwl_rx_packet *pkt;
997 struct iwl_rx_queue *rxq = &priv->rxq;
1000 unsigned long flags;
1005 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1006 * buffer that the driver may process (last buffer filled by ucode). */
1007 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1010 /* Rx interrupt, but nothing sent from uCode */
1012 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1014 /* calculate total frames need to be restock after handling RX */
1015 total_empty = r - rxq->write_actual;
1016 if (total_empty < 0)
1017 total_empty += RX_QUEUE_SIZE;
1019 if (total_empty > (RX_QUEUE_SIZE / 2))
1025 rxb = rxq->queue[i];
1027 /* If an RXB doesn't have a Rx queue slot associated with it,
1028 * then a bug has been introduced in the queue refilling
1029 * routines -- catch it here */
1030 BUG_ON(rxb == NULL);
1032 rxq->queue[i] = NULL;
1034 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1035 PAGE_SIZE << priv->hw_params.rx_page_order,
1036 PCI_DMA_FROMDEVICE);
1037 pkt = rxb_addr(rxb);
1039 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1040 len += sizeof(u32); /* account for status word */
1041 trace_iwlwifi_dev_rx(priv, pkt, len);
1043 /* Reclaim a command buffer only if this packet is a response
1044 * to a (driver-originated) command.
1045 * If the packet (e.g. Rx frame) originated from uCode,
1046 * there is no command buffer to reclaim.
1047 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1048 * but apparently a few don't get set; catch them here. */
1049 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1050 (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
1051 (pkt->hdr.cmd != REPLY_RX) &&
1052 (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
1053 (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
1054 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1055 (pkt->hdr.cmd != REPLY_TX);
1057 /* Based on type of command response or notification,
1058 * handle those that need handling via function in
1059 * rx_handlers table. See iwl_setup_rx_handlers() */
1060 if (priv->rx_handlers[pkt->hdr.cmd]) {
1061 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
1062 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1063 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1064 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1066 /* No handling needed */
1068 "r %d i %d No handler needed for %s, 0x%02x\n",
1069 r, i, get_cmd_string(pkt->hdr.cmd),
1074 * XXX: After here, we should always check rxb->page
1075 * against NULL before touching it or its virtual
1076 * memory (pkt). Because some rx_handler might have
1077 * already taken or freed the pages.
1081 /* Invoke any callbacks, transfer the buffer to caller,
1082 * and fire off the (possibly) blocking iwl_send_cmd()
1083 * as we reclaim the driver command queue */
1085 iwl_tx_cmd_complete(priv, rxb);
1087 IWL_WARN(priv, "Claim null rxb?\n");
1090 /* Reuse the page if possible. For notification packets and
1091 * SKBs that fail to Rx correctly, add them back into the
1092 * rx_free list for reuse later. */
1093 spin_lock_irqsave(&rxq->lock, flags);
1094 if (rxb->page != NULL) {
1095 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1096 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1097 PCI_DMA_FROMDEVICE);
1098 list_add_tail(&rxb->list, &rxq->rx_free);
1101 list_add_tail(&rxb->list, &rxq->rx_used);
1103 spin_unlock_irqrestore(&rxq->lock, flags);
1105 i = (i + 1) & RX_QUEUE_MASK;
1106 /* If there are a lot of unused frames,
1107 * restock the Rx queue so ucode wont assert. */
1112 iwlagn_rx_replenish_now(priv);
1118 /* Backtrack one entry */
1121 iwlagn_rx_replenish_now(priv);
1123 iwlagn_rx_queue_restock(priv);
1126 /* call this function to flush any scheduled tasklet */
1127 static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1129 /* wait to make sure we flush pending tasklet*/
1130 synchronize_irq(priv->pci_dev->irq);
1131 tasklet_kill(&priv->irq_tasklet);
1134 static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1136 u32 inta, handled = 0;
1138 unsigned long flags;
1140 #ifdef CONFIG_IWLWIFI_DEBUG
1144 spin_lock_irqsave(&priv->lock, flags);
1146 /* Ack/clear/reset pending uCode interrupts.
1147 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1148 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1149 inta = iwl_read32(priv, CSR_INT);
1150 iwl_write32(priv, CSR_INT, inta);
1152 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1153 * Any new interrupts that happen after this, either while we're
1154 * in this tasklet, or later, will show up in next ISR/tasklet. */
1155 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1156 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1158 #ifdef CONFIG_IWLWIFI_DEBUG
1159 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1160 /* just for debug */
1161 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1162 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1163 inta, inta_mask, inta_fh);
1167 spin_unlock_irqrestore(&priv->lock, flags);
1169 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1170 * atomic, make sure that inta covers all the interrupts that
1171 * we've discovered, even if FH interrupt came in just after
1172 * reading CSR_INT. */
1173 if (inta_fh & CSR49_FH_INT_RX_MASK)
1174 inta |= CSR_INT_BIT_FH_RX;
1175 if (inta_fh & CSR49_FH_INT_TX_MASK)
1176 inta |= CSR_INT_BIT_FH_TX;
1178 /* Now service all interrupt bits discovered above. */
1179 if (inta & CSR_INT_BIT_HW_ERR) {
1180 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1182 /* Tell the device to stop sending interrupts */
1183 iwl_disable_interrupts(priv);
1185 priv->isr_stats.hw++;
1186 iwl_irq_handle_error(priv);
1188 handled |= CSR_INT_BIT_HW_ERR;
1193 #ifdef CONFIG_IWLWIFI_DEBUG
1194 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1195 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1196 if (inta & CSR_INT_BIT_SCD) {
1197 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1198 "the frame/frames.\n");
1199 priv->isr_stats.sch++;
1202 /* Alive notification via Rx interrupt will do the real work */
1203 if (inta & CSR_INT_BIT_ALIVE) {
1204 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1205 priv->isr_stats.alive++;
1209 /* Safely ignore these bits for debug checks below */
1210 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1212 /* HW RF KILL switch toggled */
1213 if (inta & CSR_INT_BIT_RF_KILL) {
1215 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1216 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1219 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1220 hw_rf_kill ? "disable radio" : "enable radio");
1222 priv->isr_stats.rfkill++;
1224 /* driver only loads ucode once setting the interface up.
1225 * the driver allows loading the ucode even if the radio
1226 * is killed. Hence update the killswitch state here. The
1227 * rfkill handler will care about restarting if needed.
1229 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1231 set_bit(STATUS_RF_KILL_HW, &priv->status);
1233 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1234 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1237 handled |= CSR_INT_BIT_RF_KILL;
1240 /* Chip got too hot and stopped itself */
1241 if (inta & CSR_INT_BIT_CT_KILL) {
1242 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1243 priv->isr_stats.ctkill++;
1244 handled |= CSR_INT_BIT_CT_KILL;
1247 /* Error detected by uCode */
1248 if (inta & CSR_INT_BIT_SW_ERR) {
1249 IWL_ERR(priv, "Microcode SW error detected. "
1250 " Restarting 0x%X.\n", inta);
1251 priv->isr_stats.sw++;
1252 priv->isr_stats.sw_err = inta;
1253 iwl_irq_handle_error(priv);
1254 handled |= CSR_INT_BIT_SW_ERR;
1258 * uCode wakes up after power-down sleep.
1259 * Tell device about any new tx or host commands enqueued,
1260 * and about any Rx buffers made available while asleep.
1262 if (inta & CSR_INT_BIT_WAKEUP) {
1263 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1264 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1265 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1266 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1267 priv->isr_stats.wakeup++;
1268 handled |= CSR_INT_BIT_WAKEUP;
1271 /* All uCode command responses, including Tx command responses,
1272 * Rx "responses" (frame-received notification), and other
1273 * notifications from uCode come through here*/
1274 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1275 iwl_rx_handle(priv);
1276 priv->isr_stats.rx++;
1277 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1280 /* This "Tx" DMA channel is used only for loading uCode */
1281 if (inta & CSR_INT_BIT_FH_TX) {
1282 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1283 priv->isr_stats.tx++;
1284 handled |= CSR_INT_BIT_FH_TX;
1285 /* Wake up uCode load routine, now that load is complete */
1286 priv->ucode_write_complete = 1;
1287 wake_up_interruptible(&priv->wait_command_queue);
1290 if (inta & ~handled) {
1291 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1292 priv->isr_stats.unhandled++;
1295 if (inta & ~(priv->inta_mask)) {
1296 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1297 inta & ~priv->inta_mask);
1298 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1301 /* Re-enable all interrupts */
1302 /* only Re-enable if diabled by irq */
1303 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1304 iwl_enable_interrupts(priv);
1306 #ifdef CONFIG_IWLWIFI_DEBUG
1307 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1308 inta = iwl_read32(priv, CSR_INT);
1309 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1310 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1311 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1312 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1317 /* tasklet for iwlagn interrupt */
1318 static void iwl_irq_tasklet(struct iwl_priv *priv)
1322 unsigned long flags;
1324 #ifdef CONFIG_IWLWIFI_DEBUG
1328 spin_lock_irqsave(&priv->lock, flags);
1330 /* Ack/clear/reset pending uCode interrupts.
1331 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1333 /* There is a hardware bug in the interrupt mask function that some
1334 * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1335 * they are disabled in the CSR_INT_MASK register. Furthermore the
1336 * ICT interrupt handling mechanism has another bug that might cause
1337 * these unmasked interrupts fail to be detected. We workaround the
1338 * hardware bugs here by ACKing all the possible interrupts so that
1339 * interrupt coalescing can still be achieved.
1341 iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
1343 inta = priv->_agn.inta;
1345 #ifdef CONFIG_IWLWIFI_DEBUG
1346 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1347 /* just for debug */
1348 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1349 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
1354 spin_unlock_irqrestore(&priv->lock, flags);
1356 /* saved interrupt in inta variable now we can reset priv->_agn.inta */
1357 priv->_agn.inta = 0;
1359 /* Now service all interrupt bits discovered above. */
1360 if (inta & CSR_INT_BIT_HW_ERR) {
1361 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1363 /* Tell the device to stop sending interrupts */
1364 iwl_disable_interrupts(priv);
1366 priv->isr_stats.hw++;
1367 iwl_irq_handle_error(priv);
1369 handled |= CSR_INT_BIT_HW_ERR;
1374 #ifdef CONFIG_IWLWIFI_DEBUG
1375 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1376 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1377 if (inta & CSR_INT_BIT_SCD) {
1378 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1379 "the frame/frames.\n");
1380 priv->isr_stats.sch++;
1383 /* Alive notification via Rx interrupt will do the real work */
1384 if (inta & CSR_INT_BIT_ALIVE) {
1385 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1386 priv->isr_stats.alive++;
1390 /* Safely ignore these bits for debug checks below */
1391 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1393 /* HW RF KILL switch toggled */
1394 if (inta & CSR_INT_BIT_RF_KILL) {
1396 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1397 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1400 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1401 hw_rf_kill ? "disable radio" : "enable radio");
1403 priv->isr_stats.rfkill++;
1405 /* driver only loads ucode once setting the interface up.
1406 * the driver allows loading the ucode even if the radio
1407 * is killed. Hence update the killswitch state here. The
1408 * rfkill handler will care about restarting if needed.
1410 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1412 set_bit(STATUS_RF_KILL_HW, &priv->status);
1414 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1415 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1418 handled |= CSR_INT_BIT_RF_KILL;
1421 /* Chip got too hot and stopped itself */
1422 if (inta & CSR_INT_BIT_CT_KILL) {
1423 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1424 priv->isr_stats.ctkill++;
1425 handled |= CSR_INT_BIT_CT_KILL;
1428 /* Error detected by uCode */
1429 if (inta & CSR_INT_BIT_SW_ERR) {
1430 IWL_ERR(priv, "Microcode SW error detected. "
1431 " Restarting 0x%X.\n", inta);
1432 priv->isr_stats.sw++;
1433 priv->isr_stats.sw_err = inta;
1434 iwl_irq_handle_error(priv);
1435 handled |= CSR_INT_BIT_SW_ERR;
1438 /* uCode wakes up after power-down sleep */
1439 if (inta & CSR_INT_BIT_WAKEUP) {
1440 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1441 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1442 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1443 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1445 priv->isr_stats.wakeup++;
1447 handled |= CSR_INT_BIT_WAKEUP;
1450 /* All uCode command responses, including Tx command responses,
1451 * Rx "responses" (frame-received notification), and other
1452 * notifications from uCode come through here*/
1453 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
1454 CSR_INT_BIT_RX_PERIODIC)) {
1455 IWL_DEBUG_ISR(priv, "Rx interrupt\n");
1456 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1457 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1458 iwl_write32(priv, CSR_FH_INT_STATUS,
1459 CSR49_FH_INT_RX_MASK);
1461 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1462 handled |= CSR_INT_BIT_RX_PERIODIC;
1463 iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
1465 /* Sending RX interrupt require many steps to be done in the
1467 * 1- write interrupt to current index in ICT table.
1469 * 3- update RX shared data to indicate last write index.
1470 * 4- send interrupt.
1471 * This could lead to RX race, driver could receive RX interrupt
1472 * but the shared data changes does not reflect this;
1473 * periodic interrupt will detect any dangling Rx activity.
1476 /* Disable periodic interrupt; we use it as just a one-shot. */
1477 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1478 CSR_INT_PERIODIC_DIS);
1479 iwl_rx_handle(priv);
1482 * Enable periodic interrupt in 8 msec only if we received
1483 * real RX interrupt (instead of just periodic int), to catch
1484 * any dangling Rx interrupt. If it was just the periodic
1485 * interrupt, there was no dangling Rx activity, and no need
1486 * to extend the periodic interrupt; one-shot is enough.
1488 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1489 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1490 CSR_INT_PERIODIC_ENA);
1492 priv->isr_stats.rx++;
1495 /* This "Tx" DMA channel is used only for loading uCode */
1496 if (inta & CSR_INT_BIT_FH_TX) {
1497 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1498 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1499 priv->isr_stats.tx++;
1500 handled |= CSR_INT_BIT_FH_TX;
1501 /* Wake up uCode load routine, now that load is complete */
1502 priv->ucode_write_complete = 1;
1503 wake_up_interruptible(&priv->wait_command_queue);
1506 if (inta & ~handled) {
1507 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1508 priv->isr_stats.unhandled++;
1511 if (inta & ~(priv->inta_mask)) {
1512 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1513 inta & ~priv->inta_mask);
1516 /* Re-enable all interrupts */
1517 /* only Re-enable if diabled by irq */
1518 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1519 iwl_enable_interrupts(priv);
1522 /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1523 #define ACK_CNT_RATIO (50)
1524 #define BA_TIMEOUT_CNT (5)
1525 #define BA_TIMEOUT_MAX (16)
1528 * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1530 * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1531 * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1534 bool iwl_good_ack_health(struct iwl_priv *priv,
1535 struct iwl_rx_packet *pkt)
1538 int actual_ack_cnt_delta, expected_ack_cnt_delta;
1539 int ba_timeout_delta;
1541 actual_ack_cnt_delta =
1542 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1543 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1544 expected_ack_cnt_delta =
1545 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1546 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1548 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1549 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1550 if ((priv->_agn.agg_tids_count > 0) &&
1551 (expected_ack_cnt_delta > 0) &&
1552 (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1554 (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1555 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1556 " expected_ack_cnt = %d\n",
1557 actual_ack_cnt_delta, expected_ack_cnt_delta);
1559 #ifdef CONFIG_IWLWIFI_DEBUGFS
1561 * This is ifdef'ed on DEBUGFS because otherwise the
1562 * statistics aren't available. If DEBUGFS is set but
1563 * DEBUG is not, these will just compile out.
1565 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1566 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1567 IWL_DEBUG_RADIO(priv,
1568 "ack_or_ba_timeout_collision delta = %d\n",
1569 priv->_agn.delta_statistics.tx.
1570 ack_or_ba_timeout_collision);
1572 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1574 if (!actual_ack_cnt_delta &&
1575 (ba_timeout_delta >= BA_TIMEOUT_MAX))
1582 /*****************************************************************************
1586 *****************************************************************************/
1588 #ifdef CONFIG_IWLWIFI_DEBUG
1591 * The following adds a new attribute to the sysfs representation
1592 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
1593 * used for controlling the debug level.
1595 * See the level definitions in iwl for details.
1597 * The debug_level being managed using sysfs below is a per device debug
1598 * level that is used instead of the global debug level if it (the per
1599 * device debug level) is set.
1601 static ssize_t show_debug_level(struct device *d,
1602 struct device_attribute *attr, char *buf)
1604 struct iwl_priv *priv = dev_get_drvdata(d);
1605 return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
1607 static ssize_t store_debug_level(struct device *d,
1608 struct device_attribute *attr,
1609 const char *buf, size_t count)
1611 struct iwl_priv *priv = dev_get_drvdata(d);
1615 ret = strict_strtoul(buf, 0, &val);
1617 IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
1619 priv->debug_level = val;
1620 if (iwl_alloc_traffic_mem(priv))
1622 "Not enough memory to generate traffic log\n");
1624 return strnlen(buf, count);
1627 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
1628 show_debug_level, store_debug_level);
1631 #endif /* CONFIG_IWLWIFI_DEBUG */
1634 static ssize_t show_temperature(struct device *d,
1635 struct device_attribute *attr, char *buf)
1637 struct iwl_priv *priv = dev_get_drvdata(d);
1639 if (!iwl_is_alive(priv))
1642 return sprintf(buf, "%d\n", priv->temperature);
1645 static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
1647 static ssize_t show_tx_power(struct device *d,
1648 struct device_attribute *attr, char *buf)
1650 struct iwl_priv *priv = dev_get_drvdata(d);
1652 if (!iwl_is_ready_rf(priv))
1653 return sprintf(buf, "off\n");
1655 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
1658 static ssize_t store_tx_power(struct device *d,
1659 struct device_attribute *attr,
1660 const char *buf, size_t count)
1662 struct iwl_priv *priv = dev_get_drvdata(d);
1666 ret = strict_strtoul(buf, 10, &val);
1668 IWL_INFO(priv, "%s is not in decimal form.\n", buf);
1670 ret = iwl_set_tx_power(priv, val, false);
1672 IWL_ERR(priv, "failed setting tx power (0x%d).\n",
1680 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
1682 static struct attribute *iwl_sysfs_entries[] = {
1683 &dev_attr_temperature.attr,
1684 &dev_attr_tx_power.attr,
1685 #ifdef CONFIG_IWLWIFI_DEBUG
1686 &dev_attr_debug_level.attr,
1691 static struct attribute_group iwl_attribute_group = {
1692 .name = NULL, /* put in device directory */
1693 .attrs = iwl_sysfs_entries,
1696 /******************************************************************************
1698 * uCode download functions
1700 ******************************************************************************/
1702 static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1704 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1705 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1706 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1707 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1708 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1709 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1712 static void iwl_nic_start(struct iwl_priv *priv)
1714 /* Remove all resets to allow NIC to operate */
1715 iwl_write32(priv, CSR_RESET, 0);
1718 struct iwlagn_ucode_capabilities {
1719 u32 max_probe_length;
1720 u32 standard_phy_calibration_size;
1723 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1724 static int iwl_mac_setup_register(struct iwl_priv *priv,
1725 struct iwlagn_ucode_capabilities *capa);
1727 #define UCODE_EXPERIMENTAL_INDEX 100
1728 #define UCODE_EXPERIMENTAL_TAG "exp"
1730 static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1732 const char *name_pre = priv->cfg->fw_name_pre;
1736 #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1737 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1738 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1739 } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1741 priv->fw_index = priv->cfg->ucode_api_max;
1742 sprintf(tag, "%d", priv->fw_index);
1745 sprintf(tag, "%d", priv->fw_index);
1748 if (priv->fw_index < priv->cfg->ucode_api_min) {
1749 IWL_ERR(priv, "no suitable firmware found!\n");
1753 sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1755 IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1756 (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1757 ? "EXPERIMENTAL " : "",
1758 priv->firmware_name);
1760 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1761 &priv->pci_dev->dev, GFP_KERNEL, priv,
1762 iwl_ucode_callback);
1765 struct iwlagn_firmware_pieces {
1766 const void *inst, *data, *init, *init_data, *boot;
1767 size_t inst_size, data_size, init_size, init_data_size, boot_size;
1771 u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
1772 u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
1775 static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1776 const struct firmware *ucode_raw,
1777 struct iwlagn_firmware_pieces *pieces)
1779 struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
1780 u32 api_ver, hdr_size;
1783 priv->ucode_ver = le32_to_cpu(ucode->ver);
1784 api_ver = IWL_UCODE_API(priv->ucode_ver);
1789 * 4965 doesn't revision the firmware file format
1790 * along with the API version, it always uses v1
1793 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1794 CSR_HW_REV_TYPE_4965) {
1796 if (ucode_raw->size < hdr_size) {
1797 IWL_ERR(priv, "File size too small!\n");
1800 pieces->build = le32_to_cpu(ucode->u.v2.build);
1801 pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1802 pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1803 pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1804 pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1805 pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1806 src = ucode->u.v2.data;
1809 /* fall through for 4965 */
1814 if (ucode_raw->size < hdr_size) {
1815 IWL_ERR(priv, "File size too small!\n");
1819 pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
1820 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1821 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1822 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1823 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1824 src = ucode->u.v1.data;
1828 /* Verify size of file vs. image size info in file's header */
1829 if (ucode_raw->size != hdr_size + pieces->inst_size +
1830 pieces->data_size + pieces->init_size +
1831 pieces->init_data_size + pieces->boot_size) {
1834 "uCode file size %d does not match expected size\n",
1835 (int)ucode_raw->size);
1840 src += pieces->inst_size;
1842 src += pieces->data_size;
1844 src += pieces->init_size;
1845 pieces->init_data = src;
1846 src += pieces->init_data_size;
1848 src += pieces->boot_size;
1853 static int iwlagn_wanted_ucode_alternative = 1;
1855 static int iwlagn_load_firmware(struct iwl_priv *priv,
1856 const struct firmware *ucode_raw,
1857 struct iwlagn_firmware_pieces *pieces,
1858 struct iwlagn_ucode_capabilities *capa)
1860 struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
1861 struct iwl_ucode_tlv *tlv;
1862 size_t len = ucode_raw->size;
1864 int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
1867 enum iwl_ucode_tlv_type tlv_type;
1870 if (len < sizeof(*ucode)) {
1871 IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
1875 if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
1876 IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
1877 le32_to_cpu(ucode->magic));
1882 * Check which alternatives are present, and "downgrade"
1883 * when the chosen alternative is not present, warning
1884 * the user when that happens. Some files may not have
1885 * any alternatives, so don't warn in that case.
1887 alternatives = le64_to_cpu(ucode->alternatives);
1888 tmp = wanted_alternative;
1889 if (wanted_alternative > 63)
1890 wanted_alternative = 63;
1891 while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
1892 wanted_alternative--;
1893 if (wanted_alternative && wanted_alternative != tmp)
1895 "uCode alternative %d not available, choosing %d\n",
1896 tmp, wanted_alternative);
1898 priv->ucode_ver = le32_to_cpu(ucode->ver);
1899 pieces->build = le32_to_cpu(ucode->build);
1902 len -= sizeof(*ucode);
1904 while (len >= sizeof(*tlv)) {
1907 len -= sizeof(*tlv);
1910 tlv_len = le32_to_cpu(tlv->length);
1911 tlv_type = le16_to_cpu(tlv->type);
1912 tlv_alt = le16_to_cpu(tlv->alternative);
1913 tlv_data = tlv->data;
1915 if (len < tlv_len) {
1916 IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
1920 len -= ALIGN(tlv_len, 4);
1921 data += sizeof(*tlv) + ALIGN(tlv_len, 4);
1924 * Alternative 0 is always valid.
1926 * Skip alternative TLVs that are not selected.
1928 if (tlv_alt != 0 && tlv_alt != wanted_alternative)
1932 case IWL_UCODE_TLV_INST:
1933 pieces->inst = tlv_data;
1934 pieces->inst_size = tlv_len;
1936 case IWL_UCODE_TLV_DATA:
1937 pieces->data = tlv_data;
1938 pieces->data_size = tlv_len;
1940 case IWL_UCODE_TLV_INIT:
1941 pieces->init = tlv_data;
1942 pieces->init_size = tlv_len;
1944 case IWL_UCODE_TLV_INIT_DATA:
1945 pieces->init_data = tlv_data;
1946 pieces->init_data_size = tlv_len;
1948 case IWL_UCODE_TLV_BOOT:
1949 pieces->boot = tlv_data;
1950 pieces->boot_size = tlv_len;
1952 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1953 if (tlv_len != sizeof(u32))
1954 goto invalid_tlv_len;
1955 capa->max_probe_length =
1956 le32_to_cpup((__le32 *)tlv_data);
1958 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1959 if (tlv_len != sizeof(u32))
1960 goto invalid_tlv_len;
1961 pieces->init_evtlog_ptr =
1962 le32_to_cpup((__le32 *)tlv_data);
1964 case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
1965 if (tlv_len != sizeof(u32))
1966 goto invalid_tlv_len;
1967 pieces->init_evtlog_size =
1968 le32_to_cpup((__le32 *)tlv_data);
1970 case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
1971 if (tlv_len != sizeof(u32))
1972 goto invalid_tlv_len;
1973 pieces->init_errlog_ptr =
1974 le32_to_cpup((__le32 *)tlv_data);
1976 case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
1977 if (tlv_len != sizeof(u32))
1978 goto invalid_tlv_len;
1979 pieces->inst_evtlog_ptr =
1980 le32_to_cpup((__le32 *)tlv_data);
1982 case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
1983 if (tlv_len != sizeof(u32))
1984 goto invalid_tlv_len;
1985 pieces->inst_evtlog_size =
1986 le32_to_cpup((__le32 *)tlv_data);
1988 case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
1989 if (tlv_len != sizeof(u32))
1990 goto invalid_tlv_len;
1991 pieces->inst_errlog_ptr =
1992 le32_to_cpup((__le32 *)tlv_data);
1994 case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
1996 goto invalid_tlv_len;
1997 priv->enhance_sensitivity_table = true;
1999 case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
2000 if (tlv_len != sizeof(u32))
2001 goto invalid_tlv_len;
2002 capa->standard_phy_calibration_size =
2003 le32_to_cpup((__le32 *)tlv_data);
2006 IWL_WARN(priv, "unknown TLV: %d\n", tlv_type);
2012 IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
2013 iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
2020 IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
2021 iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
2027 * iwl_ucode_callback - callback when firmware was loaded
2029 * If loaded successfully, copies the firmware into buffers
2030 * for the card to fetch (via DMA).
2032 static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
2034 struct iwl_priv *priv = context;
2035 struct iwl_ucode_header *ucode;
2037 struct iwlagn_firmware_pieces pieces;
2038 const unsigned int api_max = priv->cfg->ucode_api_max;
2039 const unsigned int api_min = priv->cfg->ucode_api_min;
2043 struct iwlagn_ucode_capabilities ucode_capa = {
2044 .max_probe_length = 200,
2045 .standard_phy_calibration_size =
2046 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE,
2049 memset(&pieces, 0, sizeof(pieces));
2052 if (priv->fw_index <= priv->cfg->ucode_api_max)
2054 "request for firmware file '%s' failed.\n",
2055 priv->firmware_name);
2059 IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
2060 priv->firmware_name, ucode_raw->size);
2062 /* Make sure that we got at least the API version number */
2063 if (ucode_raw->size < 4) {
2064 IWL_ERR(priv, "File size way too small!\n");
2068 /* Data from ucode file: header followed by uCode images */
2069 ucode = (struct iwl_ucode_header *)ucode_raw->data;
2072 err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
2074 err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
2080 api_ver = IWL_UCODE_API(priv->ucode_ver);
2081 build = pieces.build;
2084 * api_ver should match the api version forming part of the
2085 * firmware filename ... but we don't check for that and only rely
2086 * on the API version read from firmware header from here on forward
2088 if (api_ver < api_min || api_ver > api_max) {
2089 IWL_ERR(priv, "Driver unable to support your firmware API. "
2090 "Driver supports v%u, firmware is v%u.\n",
2095 if (api_ver != api_max)
2096 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
2097 "got v%u. New firmware can be obtained "
2098 "from http://www.intellinuxwireless.org.\n",
2102 sprintf(buildstr, " build %u%s", build,
2103 (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
2108 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
2109 IWL_UCODE_MAJOR(priv->ucode_ver),
2110 IWL_UCODE_MINOR(priv->ucode_ver),
2111 IWL_UCODE_API(priv->ucode_ver),
2112 IWL_UCODE_SERIAL(priv->ucode_ver),
2115 snprintf(priv->hw->wiphy->fw_version,
2116 sizeof(priv->hw->wiphy->fw_version),
2118 IWL_UCODE_MAJOR(priv->ucode_ver),
2119 IWL_UCODE_MINOR(priv->ucode_ver),
2120 IWL_UCODE_API(priv->ucode_ver),
2121 IWL_UCODE_SERIAL(priv->ucode_ver),
2125 * For any of the failures below (before allocating pci memory)
2126 * we will try to load a version with a smaller API -- maybe the
2127 * user just got a corrupted version of the latest API.
2130 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2132 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
2134 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
2136 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
2138 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2139 pieces.init_data_size);
2140 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2143 /* Verify that uCode images will fit in card's SRAM */
2144 if (pieces.inst_size > priv->hw_params.max_inst_size) {
2145 IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
2150 if (pieces.data_size > priv->hw_params.max_data_size) {
2151 IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
2156 if (pieces.init_size > priv->hw_params.max_inst_size) {
2157 IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
2162 if (pieces.init_data_size > priv->hw_params.max_data_size) {
2163 IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
2164 pieces.init_data_size);
2168 if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2169 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2174 /* Allocate ucode buffers for card's bus-master loading ... */
2176 /* Runtime instructions and 2 copies of data:
2177 * 1) unmodified from disk
2178 * 2) backup cache for save/restore during power-downs */
2179 priv->ucode_code.len = pieces.inst_size;
2180 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2182 priv->ucode_data.len = pieces.data_size;
2183 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2185 priv->ucode_data_backup.len = pieces.data_size;
2186 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2188 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2189 !priv->ucode_data_backup.v_addr)
2192 /* Initialization instructions and data */
2193 if (pieces.init_size && pieces.init_data_size) {
2194 priv->ucode_init.len = pieces.init_size;
2195 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2197 priv->ucode_init_data.len = pieces.init_data_size;
2198 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2200 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2204 /* Bootstrap (instructions only, no data) */
2205 if (pieces.boot_size) {
2206 priv->ucode_boot.len = pieces.boot_size;
2207 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2209 if (!priv->ucode_boot.v_addr)
2213 /* Now that we can no longer fail, copy information */
2216 * The (size - 16) / 12 formula is based on the information recorded
2217 * for each event, which is of mode 1 (including timestamp) for all
2218 * new microcodes that include this information.
2220 priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
2221 if (pieces.init_evtlog_size)
2222 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2224 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size;
2225 priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2226 priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2227 if (pieces.inst_evtlog_size)
2228 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2230 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size;
2231 priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2233 if (priv->valid_contexts == BIT(IWL_RXON_CTX_BSS))
2234 priv->sta_key_max_num = STA_KEY_MAX_NUM;
2236 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
2238 /* Copy images into buffers for card's bus-master reads ... */
2240 /* Runtime instructions (first block of data in file) */
2241 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2243 memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2245 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2246 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2250 * NOTE: Copy into backup buffer will be done in iwl_up()
2252 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2254 memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2255 memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2257 /* Initialization instructions */
2258 if (pieces.init_size) {
2259 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2261 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2264 /* Initialization data */
2265 if (pieces.init_data_size) {
2266 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
2267 pieces.init_data_size);
2268 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
2269 pieces.init_data_size);
2272 /* Bootstrap instructions */
2273 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
2275 memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
2278 * figure out the offset of chain noise reset and gain commands
2279 * base on the size of standard phy calibration commands table size
2281 if (ucode_capa.standard_phy_calibration_size >
2282 IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
2283 ucode_capa.standard_phy_calibration_size =
2284 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
2286 priv->_agn.phy_calib_chain_noise_reset_cmd =
2287 ucode_capa.standard_phy_calibration_size;
2288 priv->_agn.phy_calib_chain_noise_gain_cmd =
2289 ucode_capa.standard_phy_calibration_size + 1;
2291 /**************************************************
2292 * This is still part of probe() in a sense...
2294 * 9. Setup and register with mac80211 and debugfs
2295 **************************************************/
2296 err = iwl_mac_setup_register(priv, &ucode_capa);
2300 err = iwl_dbgfs_register(priv, DRV_NAME);
2302 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
2304 err = sysfs_create_group(&priv->pci_dev->dev.kobj,
2305 &iwl_attribute_group);
2307 IWL_ERR(priv, "failed to create sysfs device attributes\n");
2311 /* We have our copies now, allow OS release its copies */
2312 release_firmware(ucode_raw);
2313 complete(&priv->_agn.firmware_loading_complete);
2317 /* try next, if any */
2318 if (iwl_request_firmware(priv, false))
2320 release_firmware(ucode_raw);
2324 IWL_ERR(priv, "failed to allocate pci memory\n");
2325 iwl_dealloc_ucode_pci(priv);
2327 complete(&priv->_agn.firmware_loading_complete);
2328 device_release_driver(&priv->pci_dev->dev);
2329 release_firmware(ucode_raw);
2332 static const char *desc_lookup_text[] = {
2337 "NMI_INTERRUPT_WDG",
2341 "HW_ERROR_TUNE_LOCK",
2342 "HW_ERROR_TEMPERATURE",
2343 "ILLEGAL_CHAN_FREQ",
2346 "NMI_INTERRUPT_HOST",
2347 "NMI_INTERRUPT_ACTION_PT",
2348 "NMI_INTERRUPT_UNKNOWN",
2349 "UCODE_VERSION_MISMATCH",
2350 "HW_ERROR_ABS_LOCK",
2351 "HW_ERROR_CAL_LOCK_FAIL",
2352 "NMI_INTERRUPT_INST_ACTION_PT",
2353 "NMI_INTERRUPT_DATA_ACTION_PT",
2355 "NMI_INTERRUPT_TRM",
2356 "NMI_INTERRUPT_BREAK_POINT"
2363 static struct { char *name; u8 num; } advanced_lookup[] = {
2364 { "NMI_INTERRUPT_WDG", 0x34 },
2365 { "SYSASSERT", 0x35 },
2366 { "UCODE_VERSION_MISMATCH", 0x37 },
2367 { "BAD_COMMAND", 0x38 },
2368 { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
2369 { "FATAL_ERROR", 0x3D },
2370 { "NMI_TRM_HW_ERR", 0x46 },
2371 { "NMI_INTERRUPT_TRM", 0x4C },
2372 { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
2373 { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
2374 { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
2375 { "NMI_INTERRUPT_HOST", 0x66 },
2376 { "NMI_INTERRUPT_ACTION_PT", 0x7C },
2377 { "NMI_INTERRUPT_UNKNOWN", 0x84 },
2378 { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
2379 { "ADVANCED_SYSASSERT", 0 },
2382 static const char *desc_lookup(u32 num)
2385 int max = ARRAY_SIZE(desc_lookup_text);
2388 return desc_lookup_text[num];
2390 max = ARRAY_SIZE(advanced_lookup) - 1;
2391 for (i = 0; i < max; i++) {
2392 if (advanced_lookup[i].num == num)
2395 return advanced_lookup[i].name;
2398 #define ERROR_START_OFFSET (1 * sizeof(u32))
2399 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
2401 void iwl_dump_nic_error_log(struct iwl_priv *priv)
2404 u32 desc, time, count, base, data1;
2405 u32 blink1, blink2, ilink1, ilink2;
2408 if (priv->ucode_type == UCODE_INIT) {
2409 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
2411 base = priv->_agn.init_errlog_ptr;
2413 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2415 base = priv->_agn.inst_errlog_ptr;
2418 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2420 "Not valid error log pointer 0x%08X for %s uCode\n",
2421 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2425 count = iwl_read_targ_mem(priv, base);
2427 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2428 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2429 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2430 priv->status, count);
2433 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
2434 pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32));
2435 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
2436 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
2437 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
2438 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
2439 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
2440 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
2441 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
2442 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
2443 hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32));
2445 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2446 blink1, blink2, ilink1, ilink2);
2448 IWL_ERR(priv, "Desc Time "
2449 "data1 data2 line\n");
2450 IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
2451 desc_lookup(desc), desc, time, data1, data2, line);
2452 IWL_ERR(priv, "pc blink1 blink2 ilink1 ilink2 hcmd\n");
2453 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n",
2454 pc, blink1, blink2, ilink1, ilink2, hcmd);
2457 #define EVENT_START_OFFSET (4 * sizeof(u32))
2460 * iwl_print_event_log - Dump error event log to syslog
2463 static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2464 u32 num_events, u32 mode,
2465 int pos, char **buf, size_t bufsz)
2468 u32 base; /* SRAM byte address of event log header */
2469 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
2470 u32 ptr; /* SRAM byte address of log data */
2471 u32 ev, time, data; /* event log data */
2472 unsigned long reg_flags;
2474 if (num_events == 0)
2477 if (priv->ucode_type == UCODE_INIT) {
2478 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2480 base = priv->_agn.init_evtlog_ptr;
2482 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2484 base = priv->_agn.inst_evtlog_ptr;
2488 event_size = 2 * sizeof(u32);
2490 event_size = 3 * sizeof(u32);
2492 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
2494 /* Make sure device is powered up for SRAM reads */
2495 spin_lock_irqsave(&priv->reg_lock, reg_flags);
2496 iwl_grab_nic_access(priv);
2498 /* Set starting address; reads will auto-increment */
2499 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
2502 /* "time" is actually "data" for mode 0 (no timestamp).
2503 * place event id # at far right for easier visual parsing. */
2504 for (i = 0; i < num_events; i++) {
2505 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2506 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2510 pos += scnprintf(*buf + pos, bufsz - pos,
2511 "EVT_LOG:0x%08x:%04u\n",
2514 trace_iwlwifi_dev_ucode_event(priv, 0,
2516 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
2520 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
2522 pos += scnprintf(*buf + pos, bufsz - pos,
2523 "EVT_LOGT:%010u:0x%08x:%04u\n",
2526 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
2528 trace_iwlwifi_dev_ucode_event(priv, time,
2534 /* Allow device to power down */
2535 iwl_release_nic_access(priv);
2536 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
2541 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
2543 static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
2544 u32 num_wraps, u32 next_entry,
2546 int pos, char **buf, size_t bufsz)
2549 * display the newest DEFAULT_LOG_ENTRIES entries
2550 * i.e the entries just before the next ont that uCode would fill.
2553 if (next_entry < size) {
2554 pos = iwl_print_event_log(priv,
2555 capacity - (size - next_entry),
2556 size - next_entry, mode,
2558 pos = iwl_print_event_log(priv, 0,
2562 pos = iwl_print_event_log(priv, next_entry - size,
2563 size, mode, pos, buf, bufsz);
2565 if (next_entry < size) {
2566 pos = iwl_print_event_log(priv, 0, next_entry,
2567 mode, pos, buf, bufsz);
2569 pos = iwl_print_event_log(priv, next_entry - size,
2570 size, mode, pos, buf, bufsz);
2576 #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
2578 int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2579 char **buf, bool display)
2581 u32 base; /* SRAM byte address of event log header */
2582 u32 capacity; /* event log capacity in # entries */
2583 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
2584 u32 num_wraps; /* # times uCode wrapped to top of log */
2585 u32 next_entry; /* index of next entry to be written by uCode */
2586 u32 size; /* # entries that we'll print */
2591 if (priv->ucode_type == UCODE_INIT) {
2592 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
2593 logsize = priv->_agn.init_evtlog_size;
2595 base = priv->_agn.init_evtlog_ptr;
2597 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2598 logsize = priv->_agn.inst_evtlog_size;
2600 base = priv->_agn.inst_evtlog_ptr;
2603 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2605 "Invalid event log pointer 0x%08X for %s uCode\n",
2606 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
2610 /* event log header */
2611 capacity = iwl_read_targ_mem(priv, base);
2612 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
2613 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
2614 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
2616 if (capacity > logsize) {
2617 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2622 if (next_entry > logsize) {
2623 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2624 next_entry, logsize);
2625 next_entry = logsize;
2628 size = num_wraps ? capacity : next_entry;
2630 /* bail out if nothing in log */
2632 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
2636 /* enable/disable bt channel announcement */
2637 priv->bt_ch_announce = iwlagn_bt_ch_announce;
2639 #ifdef CONFIG_IWLWIFI_DEBUG
2640 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2641 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2642 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2644 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
2645 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
2647 IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
2650 #ifdef CONFIG_IWLWIFI_DEBUG
2653 bufsz = capacity * 48;
2656 *buf = kmalloc(bufsz, GFP_KERNEL);
2660 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2662 * if uCode has wrapped back to top of log,
2663 * start at the oldest entry,
2664 * i.e the next one that uCode would fill.
2667 pos = iwl_print_event_log(priv, next_entry,
2668 capacity - next_entry, mode,
2670 /* (then/else) start at top of log */
2671 pos = iwl_print_event_log(priv, 0,
2672 next_entry, mode, pos, buf, bufsz);
2674 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2675 next_entry, size, mode,
2678 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2679 next_entry, size, mode,
2685 static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2687 struct iwl_ct_kill_config cmd;
2688 struct iwl_ct_kill_throttling_config adv_cmd;
2689 unsigned long flags;
2692 spin_lock_irqsave(&priv->lock, flags);
2693 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2694 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
2695 spin_unlock_irqrestore(&priv->lock, flags);
2696 priv->thermal_throttle.ct_kill_toggle = false;
2698 if (priv->cfg->support_ct_kill_exit) {
2699 adv_cmd.critical_temperature_enter =
2700 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2701 adv_cmd.critical_temperature_exit =
2702 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
2704 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2705 sizeof(adv_cmd), &adv_cmd);
2707 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2709 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2711 "critical temperature enter is %d,"
2713 priv->hw_params.ct_kill_threshold,
2714 priv->hw_params.ct_kill_exit_threshold);
2716 cmd.critical_temperature_R =
2717 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2719 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
2722 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
2724 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
2726 "critical temperature is %d\n",
2727 priv->hw_params.ct_kill_threshold);
2732 * iwl_alive_start - called after REPLY_ALIVE notification received
2733 * from protocol/runtime uCode (initialization uCode's
2734 * Alive gets handled by iwl_init_alive_start()).
2736 static void iwl_alive_start(struct iwl_priv *priv)
2739 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2741 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2743 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2744 /* We had an error bringing up the hardware, so take it
2745 * all the way back down so we can try again */
2746 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2750 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2751 * This is a paranoid check, because we would not have gotten the
2752 * "runtime" alive if code weren't properly loaded. */
2753 if (iwl_verify_ucode(priv)) {
2754 /* Runtime instruction load was bad;
2755 * take it all the way back down so we can try again */
2756 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2760 ret = priv->cfg->ops->lib->alive_notify(priv);
2763 "Could not complete ALIVE transition [ntf]: %d\n", ret);
2767 /* After the ALIVE response, we can send host commands to the uCode */
2768 set_bit(STATUS_ALIVE, &priv->status);
2770 if (priv->cfg->ops->lib->recover_from_tx_stall) {
2771 /* Enable timer to monitor the driver queues */
2772 mod_timer(&priv->monitor_recover,
2774 msecs_to_jiffies(priv->cfg->monitor_recover_period));
2777 if (iwl_is_rfkill(priv))
2780 ieee80211_wake_queues(priv->hw);
2782 priv->active_rate = IWL_RATES_MASK;
2784 /* Configure Tx antenna selection based on H/W config */
2785 if (priv->cfg->ops->hcmd->set_tx_ant)
2786 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2788 if (iwl_is_associated_ctx(ctx)) {
2789 struct iwl_rxon_cmd *active_rxon =
2790 (struct iwl_rxon_cmd *)&ctx->active;
2791 /* apply any changes in staging */
2792 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2793 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2795 /* Initialize our rx_config data */
2796 iwl_connection_init_rx_config(priv, NULL);
2798 if (priv->cfg->ops->hcmd->set_rxon_chain)
2799 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2802 if (!priv->cfg->advanced_bt_coexist) {
2803 /* Configure Bluetooth device coexistence support */
2804 priv->cfg->ops->hcmd->send_bt_config(priv);
2807 iwl_reset_run_time_calib(priv);
2809 /* Configure the adapter for unassociated operation */
2810 iwlcore_commit_rxon(priv, ctx);
2812 /* At this point, the NIC is initialized and operational */
2813 iwl_rf_kill_ct_config(priv);
2815 iwl_leds_init(priv);
2817 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2818 set_bit(STATUS_READY, &priv->status);
2819 wake_up_interruptible(&priv->wait_command_queue);
2821 iwl_power_update_mode(priv, true);
2822 IWL_DEBUG_INFO(priv, "Updated power mode\n");
2828 queue_work(priv->workqueue, &priv->restart);
2831 static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2833 static void __iwl_down(struct iwl_priv *priv)
2835 unsigned long flags;
2836 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2838 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2841 set_bit(STATUS_EXIT_PENDING, &priv->status);
2843 /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2844 * to prevent rearm timer */
2845 if (priv->cfg->ops->lib->recover_from_tx_stall)
2846 del_timer_sync(&priv->monitor_recover);
2848 iwl_clear_ucode_stations(priv, NULL);
2849 iwl_dealloc_bcast_stations(priv);
2850 iwl_clear_driver_stations(priv);
2852 /* reset BT coex data */
2853 priv->bt_status = 0;
2854 priv->bt_traffic_load = priv->cfg->bt_init_traffic_load;
2855 priv->bt_sco_active = false;
2856 priv->bt_full_concurrent = false;
2857 priv->bt_ci_compliance = 0;
2859 /* Unblock any waiting calls */
2860 wake_up_interruptible_all(&priv->wait_command_queue);
2862 /* Wipe out the EXIT_PENDING status bit if we are not actually
2863 * exiting the module */
2865 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2867 /* stop and reset the on-board processor */
2868 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2870 /* tell the device to stop sending interrupts */
2871 spin_lock_irqsave(&priv->lock, flags);
2872 iwl_disable_interrupts(priv);
2873 spin_unlock_irqrestore(&priv->lock, flags);
2874 iwl_synchronize_irq(priv);
2876 if (priv->mac80211_registered)
2877 ieee80211_stop_queues(priv->hw);
2879 /* If we have not previously called iwl_init() then
2880 * clear all bits but the RF Kill bit and return */
2881 if (!iwl_is_init(priv)) {
2882 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2884 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2885 STATUS_GEO_CONFIGURED |
2886 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2887 STATUS_EXIT_PENDING;
2891 /* ...otherwise clear out all the status bits but the RF Kill
2892 * bit and continue taking the NIC down. */
2893 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2895 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2896 STATUS_GEO_CONFIGURED |
2897 test_bit(STATUS_FW_ERROR, &priv->status) <<
2899 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2900 STATUS_EXIT_PENDING;
2902 /* device going down, Stop using ICT table */
2903 iwl_disable_ict(priv);
2905 iwlagn_txq_ctx_stop(priv);
2906 iwlagn_rxq_stop(priv);
2908 /* Power-down device's busmaster DMA clocks */
2909 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2912 /* Make sure (redundant) we've released our request to stay awake */
2913 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2915 /* Stop the device, and put it in low power state */
2916 priv->cfg->ops->lib->apm_ops.stop(priv);
2919 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2921 if (priv->ibss_beacon)
2922 dev_kfree_skb(priv->ibss_beacon);
2923 priv->ibss_beacon = NULL;
2925 /* clear out any free frames */
2926 iwl_clear_free_frames(priv);
2929 static void iwl_down(struct iwl_priv *priv)
2931 mutex_lock(&priv->mutex);
2933 mutex_unlock(&priv->mutex);
2935 iwl_cancel_deferred_work(priv);
2938 #define HW_READY_TIMEOUT (50)
2940 static int iwl_set_hw_ready(struct iwl_priv *priv)
2944 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2945 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
2947 /* See if we got it */
2948 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2949 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2950 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2952 if (ret != -ETIMEDOUT)
2953 priv->hw_ready = true;
2955 priv->hw_ready = false;
2957 IWL_DEBUG_INFO(priv, "hardware %s\n",
2958 (priv->hw_ready == 1) ? "ready" : "not ready");
2962 static int iwl_prepare_card_hw(struct iwl_priv *priv)
2966 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2968 ret = iwl_set_hw_ready(priv);
2972 /* If HW is not ready, prepare the conditions to check again */
2973 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2974 CSR_HW_IF_CONFIG_REG_PREPARE);
2976 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
2977 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2978 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2980 /* HW should be ready by now, check again. */
2981 if (ret != -ETIMEDOUT)
2982 iwl_set_hw_ready(priv);
2987 #define MAX_HW_RESTARTS 5
2989 static int __iwl_up(struct iwl_priv *priv)
2991 struct iwl_rxon_context *ctx;
2995 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2996 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
3000 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
3001 IWL_ERR(priv, "ucode not available for device bringup\n");
3005 for_each_context(priv, ctx) {
3006 ret = iwl_alloc_bcast_station(priv, ctx, true);
3008 iwl_dealloc_bcast_stations(priv);
3013 iwl_prepare_card_hw(priv);
3015 if (!priv->hw_ready) {
3016 IWL_WARN(priv, "Exit HW not ready\n");
3020 /* If platform's RF_KILL switch is NOT set to KILL */
3021 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3022 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3024 set_bit(STATUS_RF_KILL_HW, &priv->status);
3026 if (iwl_is_rfkill(priv)) {
3027 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
3029 iwl_enable_interrupts(priv);
3030 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
3034 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3036 /* must be initialised before iwl_hw_nic_init */
3037 if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
3038 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
3040 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
3042 ret = iwlagn_hw_nic_init(priv);
3044 IWL_ERR(priv, "Unable to init nic\n");
3048 /* make sure rfkill handshake bits are cleared */
3049 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3050 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
3051 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3053 /* clear (again), then enable host interrupts */
3054 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3055 iwl_enable_interrupts(priv);
3057 /* really make sure rfkill handshake bits are cleared */
3058 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3059 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
3061 /* Copy original ucode data image from disk into backup cache.
3062 * This will be used to initialize the on-board processor's
3063 * data SRAM for a clean start when the runtime program first loads. */
3064 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
3065 priv->ucode_data.len);
3067 for (i = 0; i < MAX_HW_RESTARTS; i++) {
3069 /* load bootstrap state machine,
3070 * load bootstrap program into processor's memory,
3071 * prepare to load the "initialize" uCode */
3072 ret = priv->cfg->ops->lib->load_ucode(priv);
3075 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
3080 /* start card; "initialize" will load runtime ucode */
3081 iwl_nic_start(priv);
3083 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
3088 set_bit(STATUS_EXIT_PENDING, &priv->status);
3090 clear_bit(STATUS_EXIT_PENDING, &priv->status);
3092 /* tried to restart and config the device for as long as our
3093 * patience could withstand */
3094 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
3099 /*****************************************************************************
3101 * Workqueue callbacks
3103 *****************************************************************************/
3105 static void iwl_bg_init_alive_start(struct work_struct *data)
3107 struct iwl_priv *priv =
3108 container_of(data, struct iwl_priv, init_alive_start.work);
3110 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3113 mutex_lock(&priv->mutex);
3114 priv->cfg->ops->lib->init_alive_start(priv);
3115 mutex_unlock(&priv->mutex);
3118 static void iwl_bg_alive_start(struct work_struct *data)
3120 struct iwl_priv *priv =
3121 container_of(data, struct iwl_priv, alive_start.work);
3123 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3126 /* enable dram interrupt */
3127 iwl_reset_ict(priv);
3129 mutex_lock(&priv->mutex);
3130 iwl_alive_start(priv);
3131 mutex_unlock(&priv->mutex);
3134 static void iwl_bg_run_time_calib_work(struct work_struct *work)
3136 struct iwl_priv *priv = container_of(work, struct iwl_priv,
3137 run_time_calib_work);
3139 mutex_lock(&priv->mutex);
3141 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3142 test_bit(STATUS_SCANNING, &priv->status)) {
3143 mutex_unlock(&priv->mutex);
3147 if (priv->start_calib) {
3148 if (priv->cfg->bt_statistics) {
3149 iwl_chain_noise_calibration(priv,
3150 (void *)&priv->_agn.statistics_bt);
3151 iwl_sensitivity_calibration(priv,
3152 (void *)&priv->_agn.statistics_bt);
3154 iwl_chain_noise_calibration(priv,
3155 (void *)&priv->_agn.statistics);
3156 iwl_sensitivity_calibration(priv,
3157 (void *)&priv->_agn.statistics);
3161 mutex_unlock(&priv->mutex);
3164 static void iwl_bg_restart(struct work_struct *data)
3166 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
3168 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3171 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3172 struct iwl_rxon_context *ctx;
3173 bool bt_sco, bt_full_concurrent;
3174 u8 bt_ci_compliance;
3178 mutex_lock(&priv->mutex);
3179 for_each_context(priv, ctx)
3184 * __iwl_down() will clear the BT status variables,
3185 * which is correct, but when we restart we really
3186 * want to keep them so restore them afterwards.
3188 * The restart process will later pick them up and
3189 * re-configure the hw when we reconfigure the BT
3192 bt_sco = priv->bt_sco_active;
3193 bt_full_concurrent = priv->bt_full_concurrent;
3194 bt_ci_compliance = priv->bt_ci_compliance;
3195 bt_load = priv->bt_traffic_load;
3196 bt_status = priv->bt_status;
3200 priv->bt_sco_active = bt_sco;
3201 priv->bt_full_concurrent = bt_full_concurrent;
3202 priv->bt_ci_compliance = bt_ci_compliance;
3203 priv->bt_traffic_load = bt_load;
3204 priv->bt_status = bt_status;
3206 mutex_unlock(&priv->mutex);
3207 iwl_cancel_deferred_work(priv);
3208 ieee80211_restart_hw(priv->hw);
3212 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3215 mutex_lock(&priv->mutex);
3217 mutex_unlock(&priv->mutex);
3221 static void iwl_bg_rx_replenish(struct work_struct *data)
3223 struct iwl_priv *priv =
3224 container_of(data, struct iwl_priv, rx_replenish);
3226 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3229 mutex_lock(&priv->mutex);
3230 iwlagn_rx_replenish(priv);
3231 mutex_unlock(&priv->mutex);
3234 #define IWL_DELAY_NEXT_SCAN (HZ*2)
3236 void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3238 struct iwl_rxon_context *ctx;
3239 struct ieee80211_conf *conf = NULL;
3242 if (!vif || !priv->is_open)
3245 ctx = iwl_rxon_ctx_from_vif(vif);
3247 if (vif->type == NL80211_IFTYPE_AP) {
3248 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
3252 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3255 iwl_scan_cancel_timeout(priv, 200);
3257 conf = ieee80211_get_hw_conf(priv->hw);
3259 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3260 iwlcore_commit_rxon(priv, ctx);
3262 ret = iwl_send_rxon_timing(priv, vif);
3264 IWL_WARN(priv, "RXON timing - "
3265 "Attempting to continue.\n");
3267 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
3269 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3271 if (priv->cfg->ops->hcmd->set_rxon_chain)
3272 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
3274 ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
3276 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
3277 vif->bss_conf.aid, vif->bss_conf.beacon_int);
3279 if (vif->bss_conf.use_short_preamble)
3280 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3282 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3284 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
3285 if (vif->bss_conf.use_short_slot)
3286 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3288 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3291 iwlcore_commit_rxon(priv, ctx);
3293 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
3294 vif->bss_conf.aid, ctx->active.bssid_addr);
3296 switch (vif->type) {
3297 case NL80211_IFTYPE_STATION:
3299 case NL80211_IFTYPE_ADHOC:
3300 iwl_send_beacon_cmd(priv);
3303 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3304 __func__, vif->type);
3308 /* the chain noise calibration will enabled PM upon completion
3309 * If chain noise has already been run, then we need to enable
3310 * power management here */
3311 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3312 iwl_power_update_mode(priv, false);
3314 /* Enable Rx differential gain and sensitivity calibrations */
3315 iwl_chain_noise_reset(priv);
3316 priv->start_calib = 1;
3320 /*****************************************************************************
3322 * mac80211 entry point functions
3324 *****************************************************************************/
3326 #define UCODE_READY_TIMEOUT (4 * HZ)
3329 * Not a mac80211 entry point function, but it fits in with all the
3330 * other mac80211 functions grouped here.
3332 static int iwl_mac_setup_register(struct iwl_priv *priv,
3333 struct iwlagn_ucode_capabilities *capa)
3336 struct ieee80211_hw *hw = priv->hw;
3337 hw->rate_control_algorithm = "iwl-agn-rs";
3339 /* Tell mac80211 our characteristics */
3340 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3341 IEEE80211_HW_AMPDU_AGGREGATION |
3342 IEEE80211_HW_SPECTRUM_MGMT;
3344 if (!priv->cfg->broken_powersave)
3345 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3346 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3348 if (priv->cfg->sku & IWL_SKU_N)
3349 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3350 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3352 hw->sta_data_size = sizeof(struct iwl_station_priv);
3353 hw->vif_data_size = sizeof(struct iwl_vif_priv);
3355 hw->wiphy->interface_modes =
3356 BIT(NL80211_IFTYPE_STATION) |
3357 BIT(NL80211_IFTYPE_ADHOC);
3359 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3360 WIPHY_FLAG_DISABLE_BEACON_HINTS;
3363 * For now, disable PS by default because it affects
3364 * RX performance significantly.
3366 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3368 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
3369 /* we create the 802.11 header and a zero-length SSID element */
3370 hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
3372 /* Default value; 4 EDCA QOS priorities */
3375 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
3377 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3378 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3379 &priv->bands[IEEE80211_BAND_2GHZ];
3380 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3381 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3382 &priv->bands[IEEE80211_BAND_5GHZ];
3384 ret = ieee80211_register_hw(priv->hw);
3386 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3389 priv->mac80211_registered = 1;
3395 static int iwl_mac_start(struct ieee80211_hw *hw)
3397 struct iwl_priv *priv = hw->priv;
3400 IWL_DEBUG_MAC80211(priv, "enter\n");
3402 /* we should be verifying the device is ready to be opened */
3403 mutex_lock(&priv->mutex);
3404 ret = __iwl_up(priv);
3405 mutex_unlock(&priv->mutex);
3410 if (iwl_is_rfkill(priv))
3413 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3415 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
3416 * mac80211 will not be run successfully. */
3417 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
3418 test_bit(STATUS_READY, &priv->status),
3419 UCODE_READY_TIMEOUT);
3421 if (!test_bit(STATUS_READY, &priv->status)) {
3422 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3423 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3428 iwl_led_start(priv);
3432 IWL_DEBUG_MAC80211(priv, "leave\n");
3436 static void iwl_mac_stop(struct ieee80211_hw *hw)
3438 struct iwl_priv *priv = hw->priv;
3440 IWL_DEBUG_MAC80211(priv, "enter\n");
3447 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3448 /* stop mac, cancel any scan request and clear
3449 * RXON_FILTER_ASSOC_MSK BIT
3451 mutex_lock(&priv->mutex);
3452 iwl_scan_cancel_timeout(priv, 100);
3453 mutex_unlock(&priv->mutex);
3458 flush_workqueue(priv->workqueue);
3460 /* enable interrupts again in order to receive rfkill changes */
3461 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3462 iwl_enable_interrupts(priv);
3464 IWL_DEBUG_MAC80211(priv, "leave\n");
3467 static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3469 struct iwl_priv *priv = hw->priv;
3471 IWL_DEBUG_MACDUMP(priv, "enter\n");
3473 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
3474 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
3476 if (iwlagn_tx_skb(priv, skb))
3477 dev_kfree_skb_any(skb);
3479 IWL_DEBUG_MACDUMP(priv, "leave\n");
3480 return NETDEV_TX_OK;
3483 void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3485 struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
3488 lockdep_assert_held(&priv->mutex);
3490 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3493 /* The following should be done only at AP bring up */
3494 if (!iwl_is_associated_ctx(ctx)) {
3496 /* RXON - unassoc (to set timing command) */
3497 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3498 iwlcore_commit_rxon(priv, ctx);
3501 ret = iwl_send_rxon_timing(priv, vif);
3503 IWL_WARN(priv, "RXON timing failed - "
3504 "Attempting to continue.\n");
3506 /* AP has all antennas */
3507 priv->chain_noise_data.active_chains =
3508 priv->hw_params.valid_rx_ant;
3509 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3510 if (priv->cfg->ops->hcmd->set_rxon_chain)
3511 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
3513 ctx->staging.assoc_id = 0;
3515 if (vif->bss_conf.use_short_preamble)
3516 ctx->staging.flags |=
3517 RXON_FLG_SHORT_PREAMBLE_MSK;
3519 ctx->staging.flags &=
3520 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3522 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
3523 if (vif->bss_conf.use_short_slot)
3524 ctx->staging.flags |=
3525 RXON_FLG_SHORT_SLOT_MSK;
3527 ctx->staging.flags &=
3528 ~RXON_FLG_SHORT_SLOT_MSK;
3530 /* restore RXON assoc */
3531 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
3532 iwlcore_commit_rxon(priv, ctx);
3534 iwl_send_beacon_cmd(priv);
3536 /* FIXME - we need to add code here to detect a totally new
3537 * configuration, reset the AP, unassoc, rxon timing, assoc,
3538 * clear sta table, add BCAST sta... */
3541 static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
3542 struct ieee80211_vif *vif,
3543 struct ieee80211_key_conf *keyconf,
3544 struct ieee80211_sta *sta,
3545 u32 iv32, u16 *phase1key)
3548 struct iwl_priv *priv = hw->priv;
3549 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3551 IWL_DEBUG_MAC80211(priv, "enter\n");
3553 iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
3556 IWL_DEBUG_MAC80211(priv, "leave\n");
3559 static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3560 struct ieee80211_vif *vif,
3561 struct ieee80211_sta *sta,
3562 struct ieee80211_key_conf *key)
3564 struct iwl_priv *priv = hw->priv;
3565 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3566 struct iwl_rxon_context *ctx = vif_priv->ctx;
3569 bool is_default_wep_key = false;
3571 IWL_DEBUG_MAC80211(priv, "enter\n");
3573 if (priv->cfg->mod_params->sw_crypto) {
3574 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3578 sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
3579 if (sta_id == IWL_INVALID_STATION)
3582 mutex_lock(&priv->mutex);
3583 iwl_scan_cancel_timeout(priv, 100);
3586 * If we are getting WEP group key and we didn't receive any key mapping
3587 * so far, we are in legacy wep mode (group key only), otherwise we are
3589 * In legacy wep mode, we use another host command to the uCode.
3591 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
3592 key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
3595 is_default_wep_key = !ctx->key_mapping_keys;
3597 is_default_wep_key =
3598 (key->hw_key_idx == HW_KEY_DEFAULT);
3603 if (is_default_wep_key)
3604 ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
3606 ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
3609 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3612 if (is_default_wep_key)
3613 ret = iwl_remove_default_wep_key(priv, ctx, key);
3615 ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
3617 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3623 mutex_unlock(&priv->mutex);
3624 IWL_DEBUG_MAC80211(priv, "leave\n");
3629 static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3630 struct ieee80211_vif *vif,
3631 enum ieee80211_ampdu_mlme_action action,
3632 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
3634 struct iwl_priv *priv = hw->priv;
3637 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3640 if (!(priv->cfg->sku & IWL_SKU_N))
3643 mutex_lock(&priv->mutex);
3646 case IEEE80211_AMPDU_RX_START:
3647 IWL_DEBUG_HT(priv, "start Rx\n");
3648 ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
3650 case IEEE80211_AMPDU_RX_STOP:
3651 IWL_DEBUG_HT(priv, "stop Rx\n");
3652 ret = iwl_sta_rx_agg_stop(priv, sta, tid);
3653 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3656 case IEEE80211_AMPDU_TX_START:
3657 IWL_DEBUG_HT(priv, "start Tx\n");
3658 ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
3660 priv->_agn.agg_tids_count++;
3661 IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3662 priv->_agn.agg_tids_count);
3665 case IEEE80211_AMPDU_TX_STOP:
3666 IWL_DEBUG_HT(priv, "stop Tx\n");
3667 ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
3668 if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
3669 priv->_agn.agg_tids_count--;
3670 IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
3671 priv->_agn.agg_tids_count);
3673 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3675 if (priv->cfg->use_rts_for_aggregation) {
3676 struct iwl_station_priv *sta_priv =
3677 (void *) sta->drv_priv;
3679 * switch off RTS/CTS if it was previously enabled
3682 sta_priv->lq_sta.lq.general_params.flags &=
3683 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3684 iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3685 &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3688 case IEEE80211_AMPDU_TX_OPERATIONAL:
3689 if (priv->cfg->use_rts_for_aggregation) {
3690 struct iwl_station_priv *sta_priv =
3691 (void *) sta->drv_priv;
3694 * switch to RTS/CTS if it is the prefer protection
3695 * method for HT traffic
3698 sta_priv->lq_sta.lq.general_params.flags |=
3699 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3700 iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3701 &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3706 mutex_unlock(&priv->mutex);
3711 static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3712 struct ieee80211_vif *vif,
3713 enum sta_notify_cmd cmd,
3714 struct ieee80211_sta *sta)
3716 struct iwl_priv *priv = hw->priv;
3717 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3721 case STA_NOTIFY_SLEEP:
3722 WARN_ON(!sta_priv->client);
3723 sta_priv->asleep = true;
3724 if (atomic_read(&sta_priv->pending_frames) > 0)
3725 ieee80211_sta_block_awake(hw, sta, true);
3727 case STA_NOTIFY_AWAKE:
3728 WARN_ON(!sta_priv->client);
3729 if (!sta_priv->asleep)
3731 sta_priv->asleep = false;
3732 sta_id = iwl_sta_id(sta);
3733 if (sta_id != IWL_INVALID_STATION)
3734 iwl_sta_modify_ps_wake(priv, sta_id);
3741 static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3742 struct ieee80211_vif *vif,
3743 struct ieee80211_sta *sta)
3745 struct iwl_priv *priv = hw->priv;
3746 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3747 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3748 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3752 IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3754 mutex_lock(&priv->mutex);
3755 IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3757 sta_priv->common.sta_id = IWL_INVALID_STATION;
3759 atomic_set(&sta_priv->pending_frames, 0);
3760 if (vif->type == NL80211_IFTYPE_AP)
3761 sta_priv->client = true;
3763 ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
3764 is_ap, sta, &sta_id);
3766 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3768 /* Should we return success if return code is EEXIST ? */
3769 mutex_unlock(&priv->mutex);
3773 sta_priv->common.sta_id = sta_id;
3775 /* Initialize rate scaling */
3776 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3778 iwl_rs_rate_init(priv, sta, sta_id);
3779 mutex_unlock(&priv->mutex);
3784 static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3785 struct ieee80211_channel_switch *ch_switch)
3787 struct iwl_priv *priv = hw->priv;
3788 const struct iwl_channel_info *ch_info;
3789 struct ieee80211_conf *conf = &hw->conf;
3790 struct ieee80211_channel *channel = ch_switch->channel;
3791 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
3794 * When we add support for multiple interfaces, we need to
3795 * revisit this. The channel switch command in the device
3796 * only affects the BSS context, but what does that really
3797 * mean? And what if we get a CSA on the second interface?
3798 * This needs a lot of work.
3800 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3802 unsigned long flags = 0;
3804 IWL_DEBUG_MAC80211(priv, "enter\n");
3806 if (iwl_is_rfkill(priv))
3809 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3810 test_bit(STATUS_SCANNING, &priv->status))
3813 if (!iwl_is_associated_ctx(ctx))
3816 /* channel switch in progress */
3817 if (priv->switch_rxon.switch_in_progress == true)
3820 mutex_lock(&priv->mutex);
3821 if (priv->cfg->ops->lib->set_channel_switch) {
3823 ch = channel->hw_value;
3824 if (le16_to_cpu(ctx->active.channel) != ch) {
3825 ch_info = iwl_get_channel_info(priv,
3828 if (!is_channel_valid(ch_info)) {
3829 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
3832 spin_lock_irqsave(&priv->lock, flags);
3834 priv->current_ht_config.smps = conf->smps_mode;
3836 /* Configure HT40 channels */
3837 ctx->ht.enabled = conf_is_ht(conf);
3838 if (ctx->ht.enabled) {
3839 if (conf_is_ht40_minus(conf)) {
3840 ctx->ht.extension_chan_offset =
3841 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3842 ctx->ht.is_40mhz = true;
3843 } else if (conf_is_ht40_plus(conf)) {
3844 ctx->ht.extension_chan_offset =
3845 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3846 ctx->ht.is_40mhz = true;
3848 ctx->ht.extension_chan_offset =
3849 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3850 ctx->ht.is_40mhz = false;
3853 ctx->ht.is_40mhz = false;
3855 if ((le16_to_cpu(ctx->staging.channel) != ch))
3856 ctx->staging.flags = 0;
3858 iwl_set_rxon_channel(priv, channel, ctx);
3859 iwl_set_rxon_ht(priv, ht_conf);
3860 iwl_set_flags_for_band(priv, ctx, channel->band,
3862 spin_unlock_irqrestore(&priv->lock, flags);
3866 * at this point, staging_rxon has the
3867 * configuration for channel switch
3869 if (priv->cfg->ops->lib->set_channel_switch(priv,
3871 priv->switch_rxon.switch_in_progress = false;
3875 mutex_unlock(&priv->mutex);
3877 if (!priv->switch_rxon.switch_in_progress)
3878 ieee80211_chswitch_done(ctx->vif, false);
3879 IWL_DEBUG_MAC80211(priv, "leave\n");
3882 static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3883 unsigned int changed_flags,
3884 unsigned int *total_flags,
3887 struct iwl_priv *priv = hw->priv;
3888 __le32 filter_or = 0, filter_nand = 0;
3889 struct iwl_rxon_context *ctx;
3891 #define CHK(test, flag) do { \
3892 if (*total_flags & (test)) \
3893 filter_or |= (flag); \
3895 filter_nand |= (flag); \
3898 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3899 changed_flags, *total_flags);
3901 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3902 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3903 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3907 mutex_lock(&priv->mutex);
3909 for_each_context(priv, ctx) {
3910 ctx->staging.filter_flags &= ~filter_nand;
3911 ctx->staging.filter_flags |= filter_or;
3912 iwlcore_commit_rxon(priv, ctx);
3915 mutex_unlock(&priv->mutex);
3918 * Receiving all multicast frames is always enabled by the
3919 * default flags setup in iwl_connection_init_rx_config()
3920 * since we currently do not support programming multicast
3921 * filters into the device.
3923 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3924 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3927 static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop)
3929 struct iwl_priv *priv = hw->priv;
3931 mutex_lock(&priv->mutex);
3932 IWL_DEBUG_MAC80211(priv, "enter\n");
3934 /* do not support "flush" */
3935 if (!priv->cfg->ops->lib->txfifo_flush)
3938 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
3939 IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
3942 if (iwl_is_rfkill(priv)) {
3943 IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
3948 * mac80211 will not push any more frames for transmit
3949 * until the flush is completed
3952 IWL_DEBUG_MAC80211(priv, "send flush command\n");
3953 if (priv->cfg->ops->lib->txfifo_flush(priv, IWL_DROP_ALL)) {
3954 IWL_ERR(priv, "flush request fail\n");
3958 IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
3959 iwlagn_wait_tx_queue_empty(priv);
3961 mutex_unlock(&priv->mutex);
3962 IWL_DEBUG_MAC80211(priv, "leave\n");
3965 /*****************************************************************************
3967 * driver setup and teardown
3969 *****************************************************************************/
3971 static void iwl_setup_deferred_work(struct iwl_priv *priv)
3973 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3975 init_waitqueue_head(&priv->wait_command_queue);
3977 INIT_WORK(&priv->restart, iwl_bg_restart);
3978 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
3979 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3980 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3981 INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3982 INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3983 INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3984 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3985 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3987 iwl_setup_scan_deferred_work(priv);
3989 if (priv->cfg->ops->lib->setup_deferred_work)
3990 priv->cfg->ops->lib->setup_deferred_work(priv);
3992 init_timer(&priv->statistics_periodic);
3993 priv->statistics_periodic.data = (unsigned long)priv;
3994 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
3996 init_timer(&priv->ucode_trace);
3997 priv->ucode_trace.data = (unsigned long)priv;
3998 priv->ucode_trace.function = iwl_bg_ucode_trace;
4000 if (priv->cfg->ops->lib->recover_from_tx_stall) {
4001 init_timer(&priv->monitor_recover);
4002 priv->monitor_recover.data = (unsigned long)priv;
4003 priv->monitor_recover.function =
4004 priv->cfg->ops->lib->recover_from_tx_stall;
4007 if (!priv->cfg->use_isr_legacy)
4008 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
4009 iwl_irq_tasklet, (unsigned long)priv);
4011 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
4012 iwl_irq_tasklet_legacy, (unsigned long)priv);
4015 static void iwl_cancel_deferred_work(struct iwl_priv *priv)
4017 if (priv->cfg->ops->lib->cancel_deferred_work)
4018 priv->cfg->ops->lib->cancel_deferred_work(priv);
4020 cancel_delayed_work_sync(&priv->init_alive_start);
4021 cancel_delayed_work(&priv->scan_check);
4022 cancel_work_sync(&priv->start_internal_scan);
4023 cancel_delayed_work(&priv->alive_start);
4024 cancel_work_sync(&priv->run_time_calib_work);
4025 cancel_work_sync(&priv->beacon_update);
4026 cancel_work_sync(&priv->bt_full_concurrency);
4027 cancel_work_sync(&priv->bt_runtime_config);
4028 del_timer_sync(&priv->statistics_periodic);
4029 del_timer_sync(&priv->ucode_trace);
4032 static void iwl_init_hw_rates(struct iwl_priv *priv,
4033 struct ieee80211_rate *rates)
4037 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
4038 rates[i].bitrate = iwl_rates[i].ieee * 5;
4039 rates[i].hw_value = i; /* Rate scaling will work on indexes */
4040 rates[i].hw_value_short = i;
4042 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
4044 * If CCK != 1M then set short preamble rate flag.
4047 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
4048 0 : IEEE80211_RATE_SHORT_PREAMBLE;
4053 static int iwl_init_drv(struct iwl_priv *priv)
4057 priv->ibss_beacon = NULL;
4059 spin_lock_init(&priv->sta_lock);
4060 spin_lock_init(&priv->hcmd_lock);
4062 INIT_LIST_HEAD(&priv->free_frames);
4064 mutex_init(&priv->mutex);
4065 mutex_init(&priv->sync_cmd_mutex);
4067 priv->ieee_channels = NULL;
4068 priv->ieee_rates = NULL;
4069 priv->band = IEEE80211_BAND_2GHZ;
4071 priv->iw_mode = NL80211_IFTYPE_STATION;
4072 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
4073 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
4074 priv->_agn.agg_tids_count = 0;
4076 /* initialize force reset */
4077 priv->force_reset[IWL_RF_RESET].reset_duration =
4078 IWL_DELAY_NEXT_FORCE_RF_RESET;
4079 priv->force_reset[IWL_FW_RESET].reset_duration =
4080 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
4082 /* Choose which receivers/antennas to use */
4083 if (priv->cfg->ops->hcmd->set_rxon_chain)
4084 priv->cfg->ops->hcmd->set_rxon_chain(priv,
4085 &priv->contexts[IWL_RXON_CTX_BSS]);
4087 iwl_init_scan_params(priv);
4090 if (priv->cfg->advanced_bt_coexist) {
4091 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
4092 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
4093 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
4094 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
4095 priv->bt_duration = BT_DURATION_LIMIT_DEF;
4096 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
4097 priv->dynamic_agg_thresh = BT_AGG_THRESHOLD_DEF;
4100 /* Set the tx_power_user_lmt to the lowest power level
4101 * this value will get overwritten by channel max power avg
4103 priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
4105 ret = iwl_init_channel_map(priv);
4107 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
4111 ret = iwlcore_init_geos(priv);
4113 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
4114 goto err_free_channel_map;
4116 iwl_init_hw_rates(priv, priv->ieee_rates);
4120 err_free_channel_map:
4121 iwl_free_channel_map(priv);
4126 static void iwl_uninit_drv(struct iwl_priv *priv)
4128 iwl_calib_free_results(priv);
4129 iwlcore_free_geos(priv);
4130 iwl_free_channel_map(priv);
4131 kfree(priv->scan_cmd);
4134 static struct ieee80211_ops iwl_hw_ops = {
4136 .start = iwl_mac_start,
4137 .stop = iwl_mac_stop,
4138 .add_interface = iwl_mac_add_interface,
4139 .remove_interface = iwl_mac_remove_interface,
4140 .config = iwl_mac_config,
4141 .configure_filter = iwlagn_configure_filter,
4142 .set_key = iwl_mac_set_key,
4143 .update_tkip_key = iwl_mac_update_tkip_key,
4144 .conf_tx = iwl_mac_conf_tx,
4145 .reset_tsf = iwl_mac_reset_tsf,
4146 .bss_info_changed = iwl_bss_info_changed,
4147 .ampdu_action = iwl_mac_ampdu_action,
4148 .hw_scan = iwl_mac_hw_scan,
4149 .sta_notify = iwl_mac_sta_notify,
4150 .sta_add = iwlagn_mac_sta_add,
4151 .sta_remove = iwl_mac_sta_remove,
4152 .channel_switch = iwl_mac_channel_switch,
4153 .flush = iwl_mac_flush,
4154 .tx_last_beacon = iwl_mac_tx_last_beacon,
4157 static void iwl_hw_detect(struct iwl_priv *priv)
4159 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
4160 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
4161 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
4162 IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id);
4165 static int iwl_set_hw_params(struct iwl_priv *priv)
4167 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
4168 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
4169 if (priv->cfg->mod_params->amsdu_size_8K)
4170 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
4172 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
4174 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
4176 if (priv->cfg->mod_params->disable_11n)
4177 priv->cfg->sku &= ~IWL_SKU_N;
4179 /* Device-specific setup */
4180 return priv->cfg->ops->lib->set_hw_params(priv);
4183 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4186 struct iwl_priv *priv;
4187 struct ieee80211_hw *hw;
4188 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
4189 unsigned long flags;
4190 u16 pci_cmd, num_mac;
4192 /************************
4193 * 1. Allocating HW data
4194 ************************/
4196 /* Disabling hardware scan means that mac80211 will perform scans
4197 * "the hard way", rather than using device's scan. */
4198 if (cfg->mod_params->disable_hw_scan) {
4199 if (iwl_debug_level & IWL_DL_INFO)
4200 dev_printk(KERN_DEBUG, &(pdev->dev),
4201 "Disabling hw_scan\n");
4202 iwl_hw_ops.hw_scan = NULL;
4205 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
4211 /* At this point both hw and priv are allocated. */
4214 * The default context is always valid,
4215 * more may be discovered when firmware
4218 priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
4220 for (i = 0; i < NUM_IWL_RXON_CTX; i++)
4221 priv->contexts[i].ctxid = i;
4223 priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
4224 priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
4225 priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
4226 priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
4227 priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
4228 priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
4229 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 1);
4231 SET_IEEE80211_DEV(hw, &pdev->dev);
4233 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
4235 priv->pci_dev = pdev;
4236 priv->inta_mask = CSR_INI_SET_MASK;
4238 /* is antenna coupling more than 35dB ? */
4239 priv->bt_ant_couple_ok =
4240 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
4243 /* enable/disable bt channel announcement */
4244 priv->bt_ch_announce = iwlagn_bt_ch_announce;
4246 if (iwl_alloc_traffic_mem(priv))
4247 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
4249 /**************************
4250 * 2. Initializing PCI bus
4251 **************************/
4252 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
4253 PCIE_LINK_STATE_CLKPM);
4255 if (pci_enable_device(pdev)) {
4257 goto out_ieee80211_free_hw;
4260 pci_set_master(pdev);
4262 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
4264 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
4266 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4268 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
4269 /* both attempts failed: */
4271 IWL_WARN(priv, "No suitable DMA available.\n");
4272 goto out_pci_disable_device;
4276 err = pci_request_regions(pdev, DRV_NAME);
4278 goto out_pci_disable_device;
4280 pci_set_drvdata(pdev, priv);
4283 /***********************
4284 * 3. Read REV register
4285 ***********************/
4286 priv->hw_base = pci_iomap(pdev, 0, 0);
4287 if (!priv->hw_base) {
4289 goto out_pci_release_regions;
4292 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
4293 (unsigned long long) pci_resource_len(pdev, 0));
4294 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
4296 /* these spin locks will be used in apm_ops.init and EEPROM access
4297 * we should init now
4299 spin_lock_init(&priv->reg_lock);
4300 spin_lock_init(&priv->lock);
4303 * stop and reset the on-board processor just in case it is in a
4304 * strange state ... like being left stranded by a primary kernel
4305 * and this is now the kdump kernel trying to start up
4307 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4309 iwl_hw_detect(priv);
4310 IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4311 priv->cfg->name, priv->hw_rev);
4313 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4314 * PCI Tx retries from interfering with C3 CPU state */
4315 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4317 iwl_prepare_card_hw(priv);
4318 if (!priv->hw_ready) {
4319 IWL_WARN(priv, "Failed, HW not ready\n");
4326 /* Read the EEPROM */
4327 err = iwl_eeprom_init(priv);
4329 IWL_ERR(priv, "Unable to init EEPROM\n");
4332 err = iwl_eeprom_check_version(priv);
4334 goto out_free_eeprom;
4336 /* extract MAC Address */
4337 iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4338 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
4339 priv->hw->wiphy->addresses = priv->addresses;
4340 priv->hw->wiphy->n_addresses = 1;
4341 num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
4343 memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
4345 priv->addresses[1].addr[5]++;
4346 priv->hw->wiphy->n_addresses++;
4349 /************************
4350 * 5. Setup HW constants
4351 ************************/
4352 if (iwl_set_hw_params(priv)) {
4353 IWL_ERR(priv, "failed to set hw parameters\n");
4354 goto out_free_eeprom;
4357 /*******************
4359 *******************/
4361 err = iwl_init_drv(priv);
4363 goto out_free_eeprom;
4364 /* At this point both hw and priv are initialized. */
4366 /********************
4368 ********************/
4369 spin_lock_irqsave(&priv->lock, flags);
4370 iwl_disable_interrupts(priv);
4371 spin_unlock_irqrestore(&priv->lock, flags);
4373 pci_enable_msi(priv->pci_dev);
4375 iwl_alloc_isr_ict(priv);
4376 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
4377 IRQF_SHARED, DRV_NAME, priv);
4379 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
4380 goto out_disable_msi;
4383 iwl_setup_deferred_work(priv);
4384 iwl_setup_rx_handlers(priv);
4386 /*********************************************
4387 * 8. Enable interrupts and read RFKILL state
4388 *********************************************/
4390 /* enable interrupts if needed: hw bug w/a */
4391 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4392 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4393 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4394 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4397 iwl_enable_interrupts(priv);
4399 /* If platform's RF_KILL switch is NOT set to KILL */
4400 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
4401 clear_bit(STATUS_RF_KILL_HW, &priv->status);
4403 set_bit(STATUS_RF_KILL_HW, &priv->status);
4405 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
4406 test_bit(STATUS_RF_KILL_HW, &priv->status));
4408 iwl_power_initialize(priv);
4409 iwl_tt_initialize(priv);
4411 init_completion(&priv->_agn.firmware_loading_complete);
4413 err = iwl_request_firmware(priv, true);
4415 goto out_destroy_workqueue;
4419 out_destroy_workqueue:
4420 destroy_workqueue(priv->workqueue);
4421 priv->workqueue = NULL;
4422 free_irq(priv->pci_dev->irq, priv);
4423 iwl_free_isr_ict(priv);
4425 pci_disable_msi(priv->pci_dev);
4426 iwl_uninit_drv(priv);
4428 iwl_eeprom_free(priv);
4430 pci_iounmap(pdev, priv->hw_base);
4431 out_pci_release_regions:
4432 pci_set_drvdata(pdev, NULL);
4433 pci_release_regions(pdev);
4434 out_pci_disable_device:
4435 pci_disable_device(pdev);
4436 out_ieee80211_free_hw:
4437 iwl_free_traffic_mem(priv);
4438 ieee80211_free_hw(priv->hw);
4443 static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4445 struct iwl_priv *priv = pci_get_drvdata(pdev);
4446 unsigned long flags;
4451 wait_for_completion(&priv->_agn.firmware_loading_complete);
4453 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
4455 iwl_dbgfs_unregister(priv);
4456 sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
4458 /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
4459 * to be called and iwl_down since we are removing the device
4460 * we need to set STATUS_EXIT_PENDING bit.
4462 set_bit(STATUS_EXIT_PENDING, &priv->status);
4463 if (priv->mac80211_registered) {
4464 ieee80211_unregister_hw(priv->hw);
4465 priv->mac80211_registered = 0;
4471 * Make sure device is reset to low power before unloading driver.
4472 * This may be redundant with iwl_down(), but there are paths to
4473 * run iwl_down() without calling apm_ops.stop(), and there are
4474 * paths to avoid running iwl_down() at all before leaving driver.
4475 * This (inexpensive) call *makes sure* device is reset.
4477 priv->cfg->ops->lib->apm_ops.stop(priv);
4481 /* make sure we flush any pending irq or
4482 * tasklet for the driver
4484 spin_lock_irqsave(&priv->lock, flags);
4485 iwl_disable_interrupts(priv);
4486 spin_unlock_irqrestore(&priv->lock, flags);
4488 iwl_synchronize_irq(priv);
4490 iwl_dealloc_ucode_pci(priv);
4493 iwlagn_rx_queue_free(priv, &priv->rxq);
4494 iwlagn_hw_txq_ctx_free(priv);
4496 iwl_eeprom_free(priv);
4499 /*netif_stop_queue(dev); */
4500 flush_workqueue(priv->workqueue);
4502 /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
4503 * priv->workqueue... so we can't take down the workqueue
4505 destroy_workqueue(priv->workqueue);
4506 priv->workqueue = NULL;
4507 iwl_free_traffic_mem(priv);
4509 free_irq(priv->pci_dev->irq, priv);
4510 pci_disable_msi(priv->pci_dev);
4511 pci_iounmap(pdev, priv->hw_base);
4512 pci_release_regions(pdev);
4513 pci_disable_device(pdev);
4514 pci_set_drvdata(pdev, NULL);
4516 iwl_uninit_drv(priv);
4518 iwl_free_isr_ict(priv);
4520 if (priv->ibss_beacon)
4521 dev_kfree_skb(priv->ibss_beacon);
4523 ieee80211_free_hw(priv->hw);
4527 /*****************************************************************************
4529 * driver and module entry point
4531 *****************************************************************************/
4533 /* Hardware specific file defines the PCI IDs table for that hardware module */
4534 static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4535 #ifdef CONFIG_IWL4965
4536 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4537 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4538 #endif /* CONFIG_IWL4965 */
4539 #ifdef CONFIG_IWL5000
4540 /* 5100 Series WiFi */
4541 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4542 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4543 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
4544 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
4545 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
4546 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
4547 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
4548 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
4549 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
4550 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
4551 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
4552 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
4553 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
4554 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
4555 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
4556 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
4557 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
4558 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
4559 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
4560 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
4561 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
4562 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
4563 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
4564 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
4566 /* 5300 Series WiFi */
4567 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
4568 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
4569 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
4570 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
4571 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
4572 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
4573 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
4574 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
4575 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
4576 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
4577 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
4578 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
4580 /* 5350 Series WiFi/WiMax */
4581 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
4582 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
4583 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
4585 /* 5150 Series Wifi/WiMax */
4586 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
4587 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
4588 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
4589 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
4590 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
4591 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
4593 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
4594 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
4595 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
4596 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
4599 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
4600 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
4601 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
4602 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
4603 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
4604 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
4605 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
4606 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
4607 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4608 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4610 /* 6x00 Series Gen2a */
4611 {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)},
4612 {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)},
4613 {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)},
4614 {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)},
4615 {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)},
4616 {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)},
4617 {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)},
4618 {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)},
4619 {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)},
4620 {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)},
4621 {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)},
4622 {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)},
4623 {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)},
4624 {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)},
4626 /* 6x00 Series Gen2b */
4627 {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)},
4628 {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)},
4629 {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)},
4630 {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)},
4631 {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)},
4632 {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4633 {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)},
4634 {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)},
4635 {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4636 {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4637 {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4638 {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4639 {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4640 {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4641 {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4642 {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4643 {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4644 {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4645 {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4646 {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4647 {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4648 {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4649 {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4650 {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4651 {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4652 {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4653 {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4654 {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4656 /* 6x50 WiFi/WiMax Series */
4657 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
4658 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
4659 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
4660 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
4661 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4662 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4664 /* 6x50 WiFi/WiMax Series Gen2 */
4665 {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)},
4666 {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)},
4667 {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)},
4668 {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)},
4669 {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)},
4670 {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)},
4672 /* 1000 Series WiFi */
4673 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
4674 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
4675 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
4676 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
4677 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
4678 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
4679 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
4680 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
4681 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
4682 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4683 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4684 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4685 #endif /* CONFIG_IWL5000 */
4689 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
4691 static struct pci_driver iwl_driver = {
4693 .id_table = iwl_hw_card_ids,
4694 .probe = iwl_pci_probe,
4695 .remove = __devexit_p(iwl_pci_remove),
4697 .suspend = iwl_pci_suspend,
4698 .resume = iwl_pci_resume,
4702 static int __init iwl_init(void)
4706 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
4707 pr_info(DRV_COPYRIGHT "\n");
4709 ret = iwlagn_rate_control_register();
4711 pr_err("Unable to register rate control algorithm: %d\n", ret);
4715 ret = pci_register_driver(&iwl_driver);
4717 pr_err("Unable to initialize PCI module\n");
4718 goto error_register;
4724 iwlagn_rate_control_unregister();
4728 static void __exit iwl_exit(void)
4730 pci_unregister_driver(&iwl_driver);
4731 iwlagn_rate_control_unregister();
4734 module_exit(iwl_exit);
4735 module_init(iwl_init);
4737 #ifdef CONFIG_IWLWIFI_DEBUG
4738 module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4739 MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4740 module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4741 MODULE_PARM_DESC(debug, "debug output mask");
4744 module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4745 MODULE_PARM_DESC(swcrypto50,
4746 "using crypto in software (default 0 [hardware]) (deprecated)");
4747 module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4748 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4749 module_param_named(queues_num50,
4750 iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4751 MODULE_PARM_DESC(queues_num50,
4752 "number of hw queues in 50xx series (deprecated)");
4753 module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4754 MODULE_PARM_DESC(queues_num, "number of hw queues.");
4755 module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4756 MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4757 module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4758 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4759 module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4761 MODULE_PARM_DESC(amsdu_size_8K50,
4762 "enable 8K amsdu size in 50XX series (deprecated)");
4763 module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4765 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4766 module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4767 MODULE_PARM_DESC(fw_restart50,
4768 "restart firmware in case of error (deprecated)");
4769 module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4770 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4772 disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4773 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4775 module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4777 MODULE_PARM_DESC(ucode_alternative,
4778 "specify ucode alternative to use from ucode file");
4780 module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
4781 MODULE_PARM_DESC(antenna_coupling,
4782 "specify antenna coupling in dB (defualt: 0 dB)");
4784 module_param_named(bt_ch_announce, iwlagn_bt_ch_announce, bool, S_IRUGO);
4785 MODULE_PARM_DESC(bt_ch_announce,
4786 "Enable BT channel announcement mode (default: enable)");