drivers/net/wireless/iwlwifi/iwl-agn-lib.c

   1 /******************************************************************************
   2  *
   3  * GPL LICENSE SUMMARY
   4  *
   5  * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of version 2 of the GNU General Public License as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19  * USA
  20  *
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * Contact Information:
  25  *  Intel Linux Wireless <ilw@linux.intel.com>
  26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27  *
  28  *****************************************************************************/
  29 #include <linux/etherdevice.h>
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/init.h>
  33 #include <linux/sched.h>
  34
  35 #include "iwl-dev.h"
  36 #include "iwl-core.h"
  37 #include "iwl-io.h"
  38 #include "iwl-helpers.h"
  39 #include "iwl-agn-hw.h"
  40 #include "iwl-agn.h"
  41 #include "iwl-sta.h"
  42
  43 static inline u32 iwlagn_get_scd_ssn(struct iwl5000_tx_resp *tx_resp)
  44 {
  45         return le32_to_cpup((__le32 *)&tx_resp->status +
  46                             tx_resp->frame_count) & MAX_SN;
  47 }
  48
  49 static int iwlagn_tx_status_reply_tx(struct iwl_priv *priv,
  50                                       struct iwl_ht_agg *agg,
  51                                       struct iwl5000_tx_resp *tx_resp,
  52                                       int txq_id, u16 start_idx)
  53 {
  54         u16 status;
  55         struct agg_tx_status *frame_status = &tx_resp->status;
  56         struct ieee80211_tx_info *info = NULL;
  57         struct ieee80211_hdr *hdr = NULL;
  58         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  59         int i, sh, idx;
  60         u16 seq;
  61
  62         if (agg->wait_for_ba)
  63                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
  64
  65         agg->frame_count = tx_resp->frame_count;
  66         agg->start_idx = start_idx;
  67         agg->rate_n_flags = rate_n_flags;
  68         agg->bitmap = 0;
  69
  70         /* # frames attempted by Tx command */
  71         if (agg->frame_count == 1) {
  72                 /* Only one frame was attempted; no block-ack will arrive */
  73                 status = le16_to_cpu(frame_status[0].status);
  74                 idx = start_idx;
  75
  76                 /* FIXME: code repetition */
  77                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
  78                                    agg->frame_count, agg->start_idx, idx);
  79
  80                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
  81                 info->status.rates[0].count = tx_resp->failure_frame + 1;
  82                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
  83                 info->flags |= iwl_tx_status_to_mac80211(status);
  84                 iwlagn_hwrate_to_tx_control(priv, rate_n_flags, info);
  85
  86                 /* FIXME: code repetition end */
  87
  88                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
  89                                     status & 0xff, tx_resp->failure_frame);
  90                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
  91
  92                 agg->wait_for_ba = 0;
  93         } else {
  94                 /* Two or more frames were attempted; expect block-ack */
  95                 u64 bitmap = 0;
  96                 int start = agg->start_idx;
  97
  98                 /* Construct bit-map of pending frames within Tx window */
  99                 for (i = 0; i < agg->frame_count; i++) {
 100                         u16 sc;
 101                         status = le16_to_cpu(frame_status[i].status);
 102                         seq  = le16_to_cpu(frame_status[i].sequence);
 103                         idx = SEQ_TO_INDEX(seq);
 104                         txq_id = SEQ_TO_QUEUE(seq);
 105
 106                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
 107                                       AGG_TX_STATE_ABORT_MSK))
 108                                 continue;
 109
 110                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
 111                                            agg->frame_count, txq_id, idx);
 112
 113                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
 114                         if (!hdr) {
 115                                 IWL_ERR(priv,
 116                                         "BUG_ON idx doesn't point to valid skb"
 117                                         " idx=%d, txq_id=%d\n", idx, txq_id);
 118                                 return -1;
 119                         }
 120
 121                         sc = le16_to_cpu(hdr->seq_ctrl);
 122                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
 123                                 IWL_ERR(priv,
 124                                         "BUG_ON idx doesn't match seq control"
 125                                         " idx=%d, seq_idx=%d, seq=%d\n",
 126                                           idx, SEQ_TO_SN(sc),
 127                                           hdr->seq_ctrl);
 128                                 return -1;
 129                         }
 130
 131                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
 132                                            i, idx, SEQ_TO_SN(sc));
 133
 134                         sh = idx - start;
 135                         if (sh > 64) {
 136                                 sh = (start - idx) + 0xff;
 137                                 bitmap = bitmap << sh;
 138                                 sh = 0;
 139                                 start = idx;
 140                         } else if (sh < -64)
 141                                 sh  = 0xff - (start - idx);
 142                         else if (sh < 0) {
 143                                 sh = start - idx;
 144                                 start = idx;
 145                                 bitmap = bitmap << sh;
 146                                 sh = 0;
 147                         }
 148                         bitmap |= 1ULL << sh;
 149                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
 150                                            start, (unsigned long long)bitmap);
 151                 }
 152
 153                 agg->bitmap = bitmap;
 154                 agg->start_idx = start;
 155                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
 156                                    agg->frame_count, agg->start_idx,
 157                                    (unsigned long long)agg->bitmap);
 158
 159                 if (bitmap)
 160                         agg->wait_for_ba = 1;
 161         }
 162         return 0;
 163 }
 164
 165 void iwl_check_abort_status(struct iwl_priv *priv,
 166                             u8 frame_count, u32 status)
 167 {
 168         if (frame_count == 1 && status == TX_STATUS_FAIL_RFKILL_FLUSH) {
 169                 IWL_ERR(priv, "TODO: Implement Tx flush command!!!\n");
 170         }
 171 }
 172
 173 static void iwlagn_rx_reply_tx(struct iwl_priv *priv,
 174                                 struct iwl_rx_mem_buffer *rxb)
 175 {
 176         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 177         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 178         int txq_id = SEQ_TO_QUEUE(sequence);
 179         int index = SEQ_TO_INDEX(sequence);
 180         struct iwl_tx_queue *txq = &priv->txq[txq_id];
 181         struct ieee80211_tx_info *info;
 182         struct iwl5000_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 183         u32  status = le16_to_cpu(tx_resp->status.status);
 184         int tid;
 185         int sta_id;
 186         int freed;
 187         unsigned long flags;
 188
 189         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
 190                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
 191                           "is out of range [0-%d] %d %d\n", txq_id,
 192                           index, txq->q.n_bd, txq->q.write_ptr,
 193                           txq->q.read_ptr);
 194                 return;
 195         }
 196
 197         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
 198         memset(&info->status, 0, sizeof(info->status));
 199
 200         tid = (tx_resp->ra_tid & IWL50_TX_RES_TID_MSK) >> IWL50_TX_RES_TID_POS;
 201         sta_id = (tx_resp->ra_tid & IWL50_TX_RES_RA_MSK) >> IWL50_TX_RES_RA_POS;
 202
 203         spin_lock_irqsave(&priv->sta_lock, flags);
 204         if (txq->sched_retry) {
 205                 const u32 scd_ssn = iwlagn_get_scd_ssn(tx_resp);
 206                 struct iwl_ht_agg *agg;
 207
 208                 agg = &priv->stations[sta_id].tid[tid].agg;
 209
 210                 iwlagn_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
 211
 212                 /* check if BAR is needed */
 213                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
 214                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
 215
 216                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
 217                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
 218                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim "
 219                                         "scd_ssn=%d idx=%d txq=%d swq=%d\n",
 220                                         scd_ssn , index, txq_id, txq->swq_id);
 221
 222                         freed = iwlagn_tx_queue_reclaim(priv, txq_id, index);
 223                         iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
 224
 225                         if (priv->mac80211_registered &&
 226                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
 227                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
 228                                 if (agg->state == IWL_AGG_OFF)
 229                                         iwl_wake_queue(priv, txq_id);
 230                                 else
 231                                         iwl_wake_queue(priv, txq->swq_id);
 232                         }
 233                 }
 234         } else {
 235                 BUG_ON(txq_id != txq->swq_id);
 236
 237                 info->status.rates[0].count = tx_resp->failure_frame + 1;
 238                 info->flags |= iwl_tx_status_to_mac80211(status);
 239                 iwlagn_hwrate_to_tx_control(priv,
 240                                         le32_to_cpu(tx_resp->rate_n_flags),
 241                                         info);
 242
 243                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) rate_n_flags "
 244                                    "0x%x retries %d\n",
 245                                    txq_id,
 246                                    iwl_get_tx_fail_reason(status), status,
 247                                    le32_to_cpu(tx_resp->rate_n_flags),
 248                                    tx_resp->failure_frame);
 249
 250                 freed = iwlagn_tx_queue_reclaim(priv, txq_id, index);
 251                 iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
 252
 253                 if (priv->mac80211_registered &&
 254                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
 255                         iwl_wake_queue(priv, txq_id);
 256         }
 257
 258         iwlagn_txq_check_empty(priv, sta_id, tid, txq_id);
 259
 260         iwl_check_abort_status(priv, tx_resp->frame_count, status);
 261         spin_unlock_irqrestore(&priv->sta_lock, flags);
 262 }
 263
 264 void iwlagn_rx_handler_setup(struct iwl_priv *priv)
 265 {
 266         /* init calibration handlers */
 267         priv->rx_handlers[CALIBRATION_RES_NOTIFICATION] =
 268                                         iwlagn_rx_calib_result;
 269         priv->rx_handlers[CALIBRATION_COMPLETE_NOTIFICATION] =
 270                                         iwlagn_rx_calib_complete;
 271         priv->rx_handlers[REPLY_TX] = iwlagn_rx_reply_tx;
 272 }
 273
 274 void iwlagn_setup_deferred_work(struct iwl_priv *priv)
 275 {
 276         /* in agn, the tx power calibration is done in uCode */
 277         priv->disable_tx_power_cal = 1;
 278 }
 279
 280 int iwlagn_hw_valid_rtc_data_addr(u32 addr)
 281 {
 282         return (addr >= IWLAGN_RTC_DATA_LOWER_BOUND) &&
 283                 (addr < IWLAGN_RTC_DATA_UPPER_BOUND);
 284 }
 285
 286 int iwlagn_send_tx_power(struct iwl_priv *priv)
 287 {
 288         struct iwl5000_tx_power_dbm_cmd tx_power_cmd;
 289         u8 tx_ant_cfg_cmd;
 290
 291         /* half dBm need to multiply */
 292         tx_power_cmd.global_lmt = (s8)(2 * priv->tx_power_user_lmt);
 293
 294         if (priv->tx_power_lmt_in_half_dbm &&
 295             priv->tx_power_lmt_in_half_dbm < tx_power_cmd.global_lmt) {
 296                 /*
 297                  * For the newer devices which using enhanced/extend tx power
 298                  * table in EEPROM, the format is in half dBm. driver need to
 299                  * convert to dBm format before report to mac80211.
 300                  * By doing so, there is a possibility of 1/2 dBm resolution
 301                  * lost. driver will perform "round-up" operation before
 302                  * reporting, but it will cause 1/2 dBm tx power over the
 303                  * regulatory limit. Perform the checking here, if the
 304                  * "tx_power_user_lmt" is higher than EEPROM value (in
 305                  * half-dBm format), lower the tx power based on EEPROM
 306                  */
 307                 tx_power_cmd.global_lmt = priv->tx_power_lmt_in_half_dbm;
 308         }
 309         tx_power_cmd.flags = IWL50_TX_POWER_NO_CLOSED;
 310         tx_power_cmd.srv_chan_lmt = IWL50_TX_POWER_AUTO;
 311
 312         if (IWL_UCODE_API(priv->ucode_ver) == 1)
 313                 tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD_V1;
 314         else
 315                 tx_ant_cfg_cmd = REPLY_TX_POWER_DBM_CMD;
 316
 317         return  iwl_send_cmd_pdu_async(priv, tx_ant_cfg_cmd,
 318                                        sizeof(tx_power_cmd), &tx_power_cmd,
 319                                        NULL);
 320 }
 321
 322 void iwlagn_temperature(struct iwl_priv *priv)
 323 {
 324         /* store temperature from statistics (in Celsius) */
 325         priv->temperature = le32_to_cpu(priv->statistics.general.temperature);
 326         iwl_tt_handler(priv);
 327 }
 328
 329 u16 iwlagn_eeprom_calib_version(struct iwl_priv *priv)
 330 {
 331         struct iwl_eeprom_calib_hdr {
 332                 u8 version;
 333                 u8 pa_type;
 334                 u16 voltage;
 335         } *hdr;
 336
 337         hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
 338                                                         EEPROM_CALIB_ALL);
 339         return hdr->version;
 340
 341 }
 342
 343 /*
 344  * EEPROM
 345  */
 346 static u32 eeprom_indirect_address(const struct iwl_priv *priv, u32 address)
 347 {
 348         u16 offset = 0;
 349
 350         if ((address & INDIRECT_ADDRESS) == 0)
 351                 return address;
 352
 353         switch (address & INDIRECT_TYPE_MSK) {
 354         case INDIRECT_HOST:
 355                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_HOST);
 356                 break;
 357         case INDIRECT_GENERAL:
 358                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_GENERAL);
 359                 break;
 360         case INDIRECT_REGULATORY:
 361                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_REGULATORY);
 362                 break;
 363         case INDIRECT_CALIBRATION:
 364                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_CALIBRATION);
 365                 break;
 366         case INDIRECT_PROCESS_ADJST:
 367                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_PROCESS_ADJST);
 368                 break;
 369         case INDIRECT_OTHERS:
 370                 offset = iwl_eeprom_query16(priv, EEPROM_LINK_OTHERS);
 371                 break;
 372         default:
 373                 IWL_ERR(priv, "illegal indirect type: 0x%X\n",
 374                 address & INDIRECT_TYPE_MSK);
 375                 break;
 376         }
 377
 378         /* translate the offset from words to byte */
 379         return (address & ADDRESS_MSK) + (offset << 1);
 380 }
 381
 382 const u8 *iwlagn_eeprom_query_addr(const struct iwl_priv *priv,
 383                                            size_t offset)
 384 {
 385         u32 address = eeprom_indirect_address(priv, offset);
 386         BUG_ON(address >= priv->cfg->eeprom_size);
 387         return &priv->eeprom[address];
 388 }
 389
 390 struct iwl_mod_params iwlagn_mod_params = {
 391         .amsdu_size_8K = 1,
 392         .restart_fw = 1,
 393         /* the rest are 0 by default */
 394 };
 395
 396 void iwlagn_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 397 {
 398         unsigned long flags;
 399         int i;
 400         spin_lock_irqsave(&rxq->lock, flags);
 401         INIT_LIST_HEAD(&rxq->rx_free);
 402         INIT_LIST_HEAD(&rxq->rx_used);
 403         /* Fill the rx_used queue with _all_ of the Rx buffers */
 404         for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
 405                 /* In the reset function, these buffers may have been allocated
 406                  * to an SKB, so we need to unmap and free potential storage */
 407                 if (rxq->pool[i].page != NULL) {
 408                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
 409                                 PAGE_SIZE << priv->hw_params.rx_page_order,
 410                                 PCI_DMA_FROMDEVICE);
 411                         __iwl_free_pages(priv, rxq->pool[i].page);
 412                         rxq->pool[i].page = NULL;
 413                 }
 414                 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
 415         }
 416
 417         for (i = 0; i < RX_QUEUE_SIZE; i++)
 418                 rxq->queue[i] = NULL;
 419
 420         /* Set us so that we have processed and used all buffers, but have
 421          * not restocked the Rx queue with fresh buffers */
 422         rxq->read = rxq->write = 0;
 423         rxq->write_actual = 0;
 424         rxq->free_count = 0;
 425         spin_unlock_irqrestore(&rxq->lock, flags);
 426 }
 427
 428 int iwlagn_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 429 {
 430         u32 rb_size;
 431         const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
 432         u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT for all devices? */
 433
 434         if (!priv->cfg->use_isr_legacy)
 435                 rb_timeout = RX_RB_TIMEOUT;
 436
 437         if (priv->cfg->mod_params->amsdu_size_8K)
 438                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
 439         else
 440                 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
 441
 442         /* Stop Rx DMA */
 443         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 444
 445         /* Reset driver's Rx queue write index */
 446         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
 447
 448         /* Tell device where to find RBD circular buffer in DRAM */
 449         iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
 450                            (u32)(rxq->dma_addr >> 8));
 451
 452         /* Tell device where in DRAM to update its Rx status */
 453         iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
 454                            rxq->rb_stts_dma >> 4);
 455
 456         /* Enable Rx DMA
 457          * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
 458          *      the credit mechanism in 5000 HW RX FIFO
 459          * Direct rx interrupts to hosts
 460          * Rx buffer size 4 or 8k
 461          * RB timeout 0x10
 462          * 256 RBDs
 463          */
 464         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
 465                            FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
 466                            FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
 467                            FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
 468                            FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
 469                            rb_size|
 470                            (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
 471                            (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
 472
 473         /* Set interrupt coalescing timer to default (2048 usecs) */
 474         iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
 475
 476         return 0;
 477 }
 478
 479 int iwlagn_hw_nic_init(struct iwl_priv *priv)
 480 {
 481         unsigned long flags;
 482         struct iwl_rx_queue *rxq = &priv->rxq;
 483         int ret;
 484
 485         /* nic_init */
 486         spin_lock_irqsave(&priv->lock, flags);
 487         priv->cfg->ops->lib->apm_ops.init(priv);
 488
 489         /* Set interrupt coalescing calibration timer to default (512 usecs) */
 490         iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_CALIB_TIMEOUT_DEF);
 491
 492         spin_unlock_irqrestore(&priv->lock, flags);
 493
 494         ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
 495
 496         priv->cfg->ops->lib->apm_ops.config(priv);
 497
 498         /* Allocate the RX queue, or reset if it is already allocated */
 499         if (!rxq->bd) {
 500                 ret = iwl_rx_queue_alloc(priv);
 501                 if (ret) {
 502                         IWL_ERR(priv, "Unable to initialize Rx queue\n");
 503                         return -ENOMEM;
 504                 }
 505         } else
 506                 iwlagn_rx_queue_reset(priv, rxq);
 507
 508         iwlagn_rx_replenish(priv);
 509
 510         iwlagn_rx_init(priv, rxq);
 511
 512         spin_lock_irqsave(&priv->lock, flags);
 513
 514         rxq->need_update = 1;
 515         iwl_rx_queue_update_write_ptr(priv, rxq);
 516
 517         spin_unlock_irqrestore(&priv->lock, flags);
 518
 519         /* Allocate or reset and init all Tx and Command queues */
 520         if (!priv->txq) {
 521                 ret = iwlagn_txq_ctx_alloc(priv);
 522                 if (ret)
 523                         return ret;
 524         } else
 525                 iwlagn_txq_ctx_reset(priv);
 526
 527         set_bit(STATUS_INIT, &priv->status);
 528
 529         return 0;
 530 }
 531
 532 /**
 533  * iwlagn_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
 534  */
 535 static inline __le32 iwlagn_dma_addr2rbd_ptr(struct iwl_priv *priv,
 536                                           dma_addr_t dma_addr)
 537 {
 538         return cpu_to_le32((u32)(dma_addr >> 8));
 539 }
 540
 541 /**
 542  * iwlagn_rx_queue_restock - refill RX queue from pre-allocated pool
 543  *
 544  * If there are slots in the RX queue that need to be restocked,
 545  * and we have free pre-allocated buffers, fill the ranks as much
 546  * as we can, pulling from rx_free.
 547  *
 548  * This moves the 'write' index forward to catch up with 'processed', and
 549  * also updates the memory address in the firmware to reference the new
 550  * target buffer.
 551  */
 552 void iwlagn_rx_queue_restock(struct iwl_priv *priv)
 553 {
 554         struct iwl_rx_queue *rxq = &priv->rxq;
 555         struct list_head *element;
 556         struct iwl_rx_mem_buffer *rxb;
 557         unsigned long flags;
 558
 559         spin_lock_irqsave(&rxq->lock, flags);
 560         while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
 561                 /* The overwritten rxb must be a used one */
 562                 rxb = rxq->queue[rxq->write];
 563                 BUG_ON(rxb && rxb->page);
 564
 565                 /* Get next free Rx buffer, remove from free list */
 566                 element = rxq->rx_free.next;
 567                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 568                 list_del(element);
 569
 570                 /* Point to Rx buffer via next RBD in circular buffer */
 571                 rxq->bd[rxq->write] = iwlagn_dma_addr2rbd_ptr(priv,
 572                                                               rxb->page_dma);
 573                 rxq->queue[rxq->write] = rxb;
 574                 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
 575                 rxq->free_count--;
 576         }
 577         spin_unlock_irqrestore(&rxq->lock, flags);
 578         /* If the pre-allocated buffer pool is dropping low, schedule to
 579          * refill it */
 580         if (rxq->free_count <= RX_LOW_WATERMARK)
 581                 queue_work(priv->workqueue, &priv->rx_replenish);
 582
 583
 584         /* If we've added more space for the firmware to place data, tell it.
 585          * Increment device's write pointer in multiples of 8. */
 586         if (rxq->write_actual != (rxq->write & ~0x7)) {
 587                 spin_lock_irqsave(&rxq->lock, flags);
 588                 rxq->need_update = 1;
 589                 spin_unlock_irqrestore(&rxq->lock, flags);
 590                 iwl_rx_queue_update_write_ptr(priv, rxq);
 591         }
 592 }
 593
 594 /**
 595  * iwlagn_rx_replenish - Move all used packet from rx_used to rx_free
 596  *
 597  * When moving to rx_free an SKB is allocated for the slot.
 598  *
 599  * Also restock the Rx queue via iwl_rx_queue_restock.
 600  * This is called as a scheduled work item (except for during initialization)
 601  */
 602 void iwlagn_rx_allocate(struct iwl_priv *priv, gfp_t priority)
 603 {
 604         struct iwl_rx_queue *rxq = &priv->rxq;
 605         struct list_head *element;
 606         struct iwl_rx_mem_buffer *rxb;
 607         struct page *page;
 608         unsigned long flags;
 609         gfp_t gfp_mask = priority;
 610
 611         while (1) {
 612                 spin_lock_irqsave(&rxq->lock, flags);
 613                 if (list_empty(&rxq->rx_used)) {
 614                         spin_unlock_irqrestore(&rxq->lock, flags);
 615                         return;
 616                 }
 617                 spin_unlock_irqrestore(&rxq->lock, flags);
 618
 619                 if (rxq->free_count > RX_LOW_WATERMARK)
 620                         gfp_mask |= __GFP_NOWARN;
 621
 622                 if (priv->hw_params.rx_page_order > 0)
 623                         gfp_mask |= __GFP_COMP;
 624
 625                 /* Alloc a new receive buffer */
 626                 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
 627                 if (!page) {
 628                         if (net_ratelimit())
 629                                 IWL_DEBUG_INFO(priv, "alloc_pages failed, "
 630                                                "order: %d\n",
 631                                                priv->hw_params.rx_page_order);
 632
 633                         if ((rxq->free_count <= RX_LOW_WATERMARK) &&
 634                             net_ratelimit())
 635                                 IWL_CRIT(priv, "Failed to alloc_pages with %s. Only %u free buffers remaining.\n",
 636                                          priority == GFP_ATOMIC ?  "GFP_ATOMIC" : "GFP_KERNEL",
 637                                          rxq->free_count);
 638                         /* We don't reschedule replenish work here -- we will
 639                          * call the restock method and if it still needs
 640                          * more buffers it will schedule replenish */
 641                         return;
 642                 }
 643
 644                 spin_lock_irqsave(&rxq->lock, flags);
 645
 646                 if (list_empty(&rxq->rx_used)) {
 647                         spin_unlock_irqrestore(&rxq->lock, flags);
 648                         __free_pages(page, priv->hw_params.rx_page_order);
 649                         return;
 650                 }
 651                 element = rxq->rx_used.next;
 652                 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
 653                 list_del(element);
 654
 655                 spin_unlock_irqrestore(&rxq->lock, flags);
 656
 657                 BUG_ON(rxb->page);
 658                 rxb->page = page;
 659                 /* Get physical address of the RB */
 660                 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
 661                                 PAGE_SIZE << priv->hw_params.rx_page_order,
 662                                 PCI_DMA_FROMDEVICE);
 663                 /* dma address must be no more than 36 bits */
 664                 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
 665                 /* and also 256 byte aligned! */
 666                 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
 667
 668                 spin_lock_irqsave(&rxq->lock, flags);
 669
 670                 list_add_tail(&rxb->list, &rxq->rx_free);
 671                 rxq->free_count++;
 672                 priv->alloc_rxb_page++;
 673
 674                 spin_unlock_irqrestore(&rxq->lock, flags);
 675         }
 676 }
 677
 678 void iwlagn_rx_replenish(struct iwl_priv *priv)
 679 {
 680         unsigned long flags;
 681
 682         iwlagn_rx_allocate(priv, GFP_KERNEL);
 683
 684         spin_lock_irqsave(&priv->lock, flags);
 685         iwlagn_rx_queue_restock(priv);
 686         spin_unlock_irqrestore(&priv->lock, flags);
 687 }
 688
 689 void iwlagn_rx_replenish_now(struct iwl_priv *priv)
 690 {
 691         iwlagn_rx_allocate(priv, GFP_ATOMIC);
 692
 693         iwlagn_rx_queue_restock(priv);
 694 }
 695
 696 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
 697  * If an SKB has been detached, the POOL needs to have its SKB set to NULL
 698  * This free routine walks the list of POOL entries and if SKB is set to
 699  * non NULL it is unmapped and freed
 700  */
 701 void iwlagn_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 702 {
 703         int i;
 704         for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
 705                 if (rxq->pool[i].page != NULL) {
 706                         pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
 707                                 PAGE_SIZE << priv->hw_params.rx_page_order,
 708                                 PCI_DMA_FROMDEVICE);
 709                         __iwl_free_pages(priv, rxq->pool[i].page);
 710                         rxq->pool[i].page = NULL;
 711                 }
 712         }
 713
 714         dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
 715                           rxq->dma_addr);
 716         dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
 717                           rxq->rb_stts, rxq->rb_stts_dma);
 718         rxq->bd = NULL;
 719         rxq->rb_stts  = NULL;
 720 }
 721
 722 int iwlagn_rxq_stop(struct iwl_priv *priv)
 723 {
 724
 725         /* stop Rx DMA */
 726         iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
 727         iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
 728                             FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
 729
 730         return 0;
 731 }
 732
 733 int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
 734 {
 735         int idx = 0;
 736         int band_offset = 0;
 737
 738         /* HT rate format: mac80211 wants an MCS number, which is just LSB */
 739         if (rate_n_flags & RATE_MCS_HT_MSK) {
 740                 idx = (rate_n_flags & 0xff);
 741                 return idx;
 742         /* Legacy rate format, search for match in table */
 743         } else {
 744                 if (band == IEEE80211_BAND_5GHZ)
 745                         band_offset = IWL_FIRST_OFDM_RATE;
 746                 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
 747                         if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
 748                                 return idx - band_offset;
 749         }
 750
 751         return -1;
 752 }
 753
 754 /* Calc max signal level (dBm) among 3 possible receivers */
 755 static inline int iwlagn_calc_rssi(struct iwl_priv *priv,
 756                                 struct iwl_rx_phy_res *rx_resp)
 757 {
 758         return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
 759 }
 760
 761 #ifdef CONFIG_IWLWIFI_DEBUG
 762 /**
 763  * iwlagn_dbg_report_frame - dump frame to syslog during debug sessions
 764  *
 765  * You may hack this function to show different aspects of received frames,
 766  * including selective frame dumps.
 767  * group100 parameter selects whether to show 1 out of 100 good data frames.
 768  *    All beacon and probe response frames are printed.
 769  */
 770 static void iwlagn_dbg_report_frame(struct iwl_priv *priv,
 771                       struct iwl_rx_phy_res *phy_res, u16 length,
 772                       struct ieee80211_hdr *header, int group100)
 773 {
 774         u32 to_us;
 775         u32 print_summary = 0;
 776         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 777         u32 hundred = 0;
 778         u32 dataframe = 0;
 779         __le16 fc;
 780         u16 seq_ctl;
 781         u16 channel;
 782         u16 phy_flags;
 783         u32 rate_n_flags;
 784         u32 tsf_low;
 785         int rssi;
 786
 787         if (likely(!(iwl_get_debug_level(priv) & IWL_DL_RX)))
 788                 return;
 789
 790         /* MAC header */
 791         fc = header->frame_control;
 792         seq_ctl = le16_to_cpu(header->seq_ctrl);
 793
 794         /* metadata */
 795         channel = le16_to_cpu(phy_res->channel);
 796         phy_flags = le16_to_cpu(phy_res->phy_flags);
 797         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
 798
 799         /* signal statistics */
 800         rssi = iwlagn_calc_rssi(priv, phy_res);
 801         tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
 802
 803         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 804
 805         /* if data frame is to us and all is good,
 806          *   (optionally) print summary for only 1 out of every 100 */
 807         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 808             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 809                 dataframe = 1;
 810                 if (!group100)
 811                         print_summary = 1;      /* print each frame */
 812                 else if (priv->framecnt_to_us < 100) {
 813                         priv->framecnt_to_us++;
 814                         print_summary = 0;
 815                 } else {
 816                         priv->framecnt_to_us = 0;
 817                         print_summary = 1;
 818                         hundred = 1;
 819                 }
 820         } else {
 821                 /* print summary for all other frames */
 822                 print_summary = 1;
 823         }
 824
 825         if (print_summary) {
 826                 char *title;
 827                 int rate_idx;
 828                 u32 bitrate;
 829
 830                 if (hundred)
 831                         title = "100Frames";
 832                 else if (ieee80211_has_retry(fc))
 833                         title = "Retry";
 834                 else if (ieee80211_is_assoc_resp(fc))
 835                         title = "AscRsp";
 836                 else if (ieee80211_is_reassoc_resp(fc))
 837                         title = "RasRsp";
 838                 else if (ieee80211_is_probe_resp(fc)) {
 839                         title = "PrbRsp";
 840                         print_dump = 1; /* dump frame contents */
 841                 } else if (ieee80211_is_beacon(fc)) {
 842                         title = "Beacon";
 843                         print_dump = 1; /* dump frame contents */
 844                 } else if (ieee80211_is_atim(fc))
 845                         title = "ATIM";
 846                 else if (ieee80211_is_auth(fc))
 847                         title = "Auth";
 848                 else if (ieee80211_is_deauth(fc))
 849                         title = "DeAuth";
 850                 else if (ieee80211_is_disassoc(fc))
 851                         title = "DisAssoc";
 852                 else
 853                         title = "Frame";
 854
 855                 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
 856                 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
 857                         bitrate = 0;
 858                         WARN_ON_ONCE(1);
 859                 } else {
 860                         bitrate = iwl_rates[rate_idx].ieee / 2;
 861                 }
 862
 863                 /* print frame summary.
 864                  * MAC addresses show just the last byte (for brevity),
 865                  *    but you can hack it to show more, if you'd like to. */
 866                 if (dataframe)
 867                         IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
 868                                      "len=%u, rssi=%d, chnl=%d, rate=%u,\n",
 869                                      title, le16_to_cpu(fc), header->addr1[5],
 870                                      length, rssi, channel, bitrate);
 871                 else {
 872                         /* src/dst addresses assume managed mode */
 873                         IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
 874                                      "len=%u, rssi=%d, tim=%lu usec, "
 875                                      "phy=0x%02x, chnl=%d\n",
 876                                      title, le16_to_cpu(fc), header->addr1[5],
 877                                      header->addr3[5], length, rssi,
 878                                      tsf_low - priv->scan_start_tsf,
 879                                      phy_flags, channel);
 880                 }
 881         }
 882         if (print_dump)
 883                 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
 884 }
 885 #endif
 886
 887 static u32 iwlagn_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
 888 {
 889         u32 decrypt_out = 0;
 890
 891         if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
 892                                         RX_RES_STATUS_STATION_FOUND)
 893                 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
 894                                 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
 895
 896         decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
 897
 898         /* packet was not encrypted */
 899         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 900                                         RX_RES_STATUS_SEC_TYPE_NONE)
 901                 return decrypt_out;
 902
 903         /* packet was encrypted with unknown alg */
 904         if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
 905                                         RX_RES_STATUS_SEC_TYPE_ERR)
 906                 return decrypt_out;
 907
 908         /* decryption was not done in HW */
 909         if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
 910                                         RX_MPDU_RES_STATUS_DEC_DONE_MSK)
 911                 return decrypt_out;
 912
 913         switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
 914
 915         case RX_RES_STATUS_SEC_TYPE_CCMP:
 916                 /* alg is CCM: check MIC only */
 917                 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
 918                         /* Bad MIC */
 919                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 920                 else
 921                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 922
 923                 break;
 924
 925         case RX_RES_STATUS_SEC_TYPE_TKIP:
 926                 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
 927                         /* Bad TTAK */
 928                         decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
 929                         break;
 930                 }
 931                 /* fall through if TTAK OK */
 932         default:
 933                 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
 934                         decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
 935                 else
 936                         decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
 937                 break;
 938         }
 939
 940         IWL_DEBUG_RX(priv, "decrypt_in:0x%x  decrypt_out = 0x%x\n",
 941                                         decrypt_in, decrypt_out);
 942
 943         return decrypt_out;
 944 }
 945
 946 static void iwlagn_pass_packet_to_mac80211(struct iwl_priv *priv,
 947                                         struct ieee80211_hdr *hdr,
 948                                         u16 len,
 949                                         u32 ampdu_status,
 950                                         struct iwl_rx_mem_buffer *rxb,
 951                                         struct ieee80211_rx_status *stats)
 952 {
 953         struct sk_buff *skb;
 954         __le16 fc = hdr->frame_control;
 955
 956         /* We only process data packets if the interface is open */
 957         if (unlikely(!priv->is_open)) {
 958                 IWL_DEBUG_DROP_LIMIT(priv,
 959                     "Dropping packet while interface is not open.\n");
 960                 return;
 961         }
 962
 963         /* In case of HW accelerated crypto and bad decryption, drop */
 964         if (!priv->cfg->mod_params->sw_crypto &&
 965             iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
 966                 return;
 967
 968         skb = dev_alloc_skb(128);
 969         if (!skb) {
 970                 IWL_ERR(priv, "dev_alloc_skb failed\n");
 971                 return;
 972         }
 973
 974         skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
 975
 976         iwl_update_stats(priv, false, fc, len);
 977         memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
 978
 979         ieee80211_rx(priv->hw, skb);
 980         priv->alloc_rxb_page--;
 981         rxb->page = NULL;
 982 }
 983
 984 /* Called for REPLY_RX (legacy ABG frames), or
 985  * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
 986 void iwlagn_rx_reply_rx(struct iwl_priv *priv,
 987                                 struct iwl_rx_mem_buffer *rxb)
 988 {
 989         struct ieee80211_hdr *header;
 990         struct ieee80211_rx_status rx_status;
 991         struct iwl_rx_packet *pkt = rxb_addr(rxb);
 992         struct iwl_rx_phy_res *phy_res;
 993         __le32 rx_pkt_status;
 994         struct iwl4965_rx_mpdu_res_start *amsdu;
 995         u32 len;
 996         u32 ampdu_status;
 997         u32 rate_n_flags;
 998
 999         /**
1000          * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
1001          *      REPLY_RX: physical layer info is in this buffer
1002          *      REPLY_RX_MPDU_CMD: physical layer info was sent in separate
1003          *              command and cached in priv->last_phy_res
1004          *
1005          * Here we set up local variables depending on which command is
1006          * received.
1007          */
1008         if (pkt->hdr.cmd == REPLY_RX) {
1009                 phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
1010                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
1011                                 + phy_res->cfg_phy_cnt);
1012
1013                 len = le16_to_cpu(phy_res->byte_count);
1014                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
1015                                 phy_res->cfg_phy_cnt + len);
1016                 ampdu_status = le32_to_cpu(rx_pkt_status);
1017         } else {
1018                 if (!priv->_agn.last_phy_res_valid) {
1019                         IWL_ERR(priv, "MPDU frame without cached PHY data\n");
1020                         return;
1021                 }
1022                 phy_res = &priv->_agn.last_phy_res;
1023                 amsdu = (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1024                 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
1025                 len = le16_to_cpu(amsdu->byte_count);
1026                 rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
1027                 ampdu_status = iwlagn_translate_rx_status(priv,
1028                                 le32_to_cpu(rx_pkt_status));
1029         }
1030
1031         if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
1032                 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
1033                                 phy_res->cfg_phy_cnt);
1034                 return;
1035         }
1036
1037         if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
1038             !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1039                 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
1040                                 le32_to_cpu(rx_pkt_status));
1041                 return;
1042         }
1043
1044         /* This will be used in several places later */
1045         rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
1046
1047         /* rx_status carries information about the packet to mac80211 */
1048         rx_status.mactime = le64_to_cpu(phy_res->timestamp);
1049         rx_status.freq =
1050                 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel));
1051         rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
1052                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1053         rx_status.rate_idx =
1054                 iwlagn_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
1055         rx_status.flag = 0;
1056
1057         /* TSF isn't reliable. In order to allow smooth user experience,
1058          * this W/A doesn't propagate it to the mac80211 */
1059         /*rx_status.flag |= RX_FLAG_TSFT;*/
1060
1061         priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
1062
1063         /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1064         rx_status.signal = iwlagn_calc_rssi(priv, phy_res);
1065
1066 #ifdef CONFIG_IWLWIFI_DEBUG
1067         /* Set "1" to report good data frames in groups of 100 */
1068         if (unlikely(iwl_get_debug_level(priv) & IWL_DL_RX))
1069                 iwlagn_dbg_report_frame(priv, phy_res, len, header, 1);
1070 #endif
1071         iwl_dbg_log_rx_data_frame(priv, len, header);
1072         IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, TSF %llu\n",
1073                 rx_status.signal, (unsigned long long)rx_status.mactime);
1074
1075         /*
1076          * "antenna number"
1077          *
1078          * It seems that the antenna field in the phy flags value
1079          * is actually a bit field. This is undefined by radiotap,
1080          * it wants an actual antenna number but I always get "7"
1081          * for most legacy frames I receive indicating that the
1082          * same frame was received on all three RX chains.
1083          *
1084          * I think this field should be removed in favor of a
1085          * new 802.11n radiotap field "RX chains" that is defined
1086          * as a bitmask.
1087          */
1088         rx_status.antenna =
1089                 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
1090                 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
1091
1092         /* set the preamble flag if appropriate */
1093         if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1094                 rx_status.flag |= RX_FLAG_SHORTPRE;
1095
1096         /* Set up the HT phy flags */
1097         if (rate_n_flags & RATE_MCS_HT_MSK)
1098                 rx_status.flag |= RX_FLAG_HT;
1099         if (rate_n_flags & RATE_MCS_HT40_MSK)
1100                 rx_status.flag |= RX_FLAG_40MHZ;
1101         if (rate_n_flags & RATE_MCS_SGI_MSK)
1102                 rx_status.flag |= RX_FLAG_SHORT_GI;
1103
1104         iwlagn_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1105                                     rxb, &rx_status);
1106 }
1107
1108 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1109  * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1110 void iwlagn_rx_reply_rx_phy(struct iwl_priv *priv,
1111                             struct iwl_rx_mem_buffer *rxb)
1112 {
1113         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1114         priv->_agn.last_phy_res_valid = true;
1115         memcpy(&priv->_agn.last_phy_res, pkt->u.raw,
1116                sizeof(struct iwl_rx_phy_res));
1117 }
1118
1119 static int iwl_get_single_channel_for_scan(struct iwl_priv *priv,
1120                                            struct ieee80211_vif *vif,
1121                                            enum ieee80211_band band,
1122                                            struct iwl_scan_channel *scan_ch)
1123 {
1124         const struct ieee80211_supported_band *sband;
1125         const struct iwl_channel_info *ch_info;
1126         u16 passive_dwell = 0;
1127         u16 active_dwell = 0;
1128         int i, added = 0;
1129         u16 channel = 0;
1130
1131         sband = iwl_get_hw_mode(priv, band);
1132         if (!sband) {
1133                 IWL_ERR(priv, "invalid band\n");
1134                 return added;
1135         }
1136
1137         active_dwell = iwl_get_active_dwell_time(priv, band, 0);
1138         passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
1139
1140         if (passive_dwell <= active_dwell)
1141                 passive_dwell = active_dwell + 1;
1142
1143         /* only scan single channel, good enough to reset the RF */
1144         /* pick the first valid not in-use channel */
1145         if (band == IEEE80211_BAND_5GHZ) {
1146                 for (i = 14; i < priv->channel_count; i++) {
1147                         if (priv->channel_info[i].channel !=
1148                             le16_to_cpu(priv->staging_rxon.channel)) {
1149                                 channel = priv->channel_info[i].channel;
1150                                 ch_info = iwl_get_channel_info(priv,
1151                                         band, channel);
1152                                 if (is_channel_valid(ch_info))
1153                                         break;
1154                         }
1155                 }
1156         } else {
1157                 for (i = 0; i < 14; i++) {
1158                         if (priv->channel_info[i].channel !=
1159                             le16_to_cpu(priv->staging_rxon.channel)) {
1160                                         channel =
1161                                                 priv->channel_info[i].channel;
1162                                         ch_info = iwl_get_channel_info(priv,
1163                                                 band, channel);
1164                                         if (is_channel_valid(ch_info))
1165                                                 break;
1166                         }
1167                 }
1168         }
1169         if (channel) {
1170                 scan_ch->channel = cpu_to_le16(channel);
1171                 scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
1172                 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1173                 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1174                 /* Set txpower levels to defaults */
1175                 scan_ch->dsp_atten = 110;
1176                 if (band == IEEE80211_BAND_5GHZ)
1177                         scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
1178                 else
1179                         scan_ch->tx_gain = ((1 << 5) | (5 << 3));
1180                 added++;
1181         } else
1182                 IWL_ERR(priv, "no valid channel found\n");
1183         return added;
1184 }
1185
1186 static int iwl_get_channels_for_scan(struct iwl_priv *priv,
1187                                      struct ieee80211_vif *vif,
1188                                      enum ieee80211_band band,
1189                                      u8 is_active, u8 n_probes,
1190                                      struct iwl_scan_channel *scan_ch)
1191 {
1192         struct ieee80211_channel *chan;
1193         const struct ieee80211_supported_band *sband;
1194         const struct iwl_channel_info *ch_info;
1195         u16 passive_dwell = 0;
1196         u16 active_dwell = 0;
1197         int added, i;
1198         u16 channel;
1199
1200         sband = iwl_get_hw_mode(priv, band);
1201         if (!sband)
1202                 return 0;
1203
1204         active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
1205         passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
1206
1207         if (passive_dwell <= active_dwell)
1208                 passive_dwell = active_dwell + 1;
1209
1210         for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1211                 chan = priv->scan_request->channels[i];
1212
1213                 if (chan->band != band)
1214                         continue;
1215
1216                 channel = ieee80211_frequency_to_channel(chan->center_freq);
1217                 scan_ch->channel = cpu_to_le16(channel);
1218
1219                 ch_info = iwl_get_channel_info(priv, band, channel);
1220                 if (!is_channel_valid(ch_info)) {
1221                         IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
1222                                         channel);
1223                         continue;
1224                 }
1225
1226                 if (!is_active || is_channel_passive(ch_info) ||
1227                     (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
1228                         scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
1229                 else
1230                         scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
1231
1232                 if (n_probes)
1233                         scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
1234
1235                 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1236                 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1237
1238                 /* Set txpower levels to defaults */
1239                 scan_ch->dsp_atten = 110;
1240
1241                 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1242                  * power level:
1243                  * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
1244                  */
1245                 if (band == IEEE80211_BAND_5GHZ)
1246                         scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
1247                 else
1248                         scan_ch->tx_gain = ((1 << 5) | (5 << 3));
1249
1250                 IWL_DEBUG_SCAN(priv, "Scanning ch=%d prob=0x%X [%s %d]\n",
1251                                channel, le32_to_cpu(scan_ch->type),
1252                                (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ?
1253                                 "ACTIVE" : "PASSIVE",
1254                                (scan_ch->type & SCAN_CHANNEL_TYPE_ACTIVE) ?
1255                                active_dwell : passive_dwell);
1256
1257                 scan_ch++;
1258                 added++;
1259         }
1260
1261         IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
1262         return added;
1263 }
1264
1265 void iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
1266 {
1267         struct iwl_host_cmd cmd = {
1268                 .id = REPLY_SCAN_CMD,
1269                 .len = sizeof(struct iwl_scan_cmd),
1270                 .flags = CMD_SIZE_HUGE,
1271         };
1272         struct iwl_scan_cmd *scan;
1273         struct ieee80211_conf *conf = NULL;
1274         u32 rate_flags = 0;
1275         u16 cmd_len;
1276         u16 rx_chain = 0;
1277         enum ieee80211_band band;
1278         u8 n_probes = 0;
1279         u8 rx_ant = priv->hw_params.valid_rx_ant;
1280         u8 rate;
1281         bool is_active = false;
1282         int  chan_mod;
1283         u8 active_chains;
1284
1285         conf = ieee80211_get_hw_conf(priv->hw);
1286
1287         cancel_delayed_work(&priv->scan_check);
1288
1289         if (!iwl_is_ready(priv)) {
1290                 IWL_WARN(priv, "request scan called when driver not ready.\n");
1291                 goto done;
1292         }
1293
1294         /* Make sure the scan wasn't canceled before this queued work
1295          * was given the chance to run... */
1296         if (!test_bit(STATUS_SCANNING, &priv->status))
1297                 goto done;
1298
1299         /* This should never be called or scheduled if there is currently
1300          * a scan active in the hardware. */
1301         if (test_bit(STATUS_SCAN_HW, &priv->status)) {
1302                 IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests in parallel. "
1303                                "Ignoring second request.\n");
1304                 goto done;
1305         }
1306
1307         if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
1308                 IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
1309                 goto done;
1310         }
1311
1312         if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
1313                 IWL_DEBUG_HC(priv, "Scan request while abort pending.  Queuing.\n");
1314                 goto done;
1315         }
1316
1317         if (iwl_is_rfkill(priv)) {
1318                 IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
1319                 goto done;
1320         }
1321
1322         if (!test_bit(STATUS_READY, &priv->status)) {
1323                 IWL_DEBUG_HC(priv, "Scan request while uninitialized.  Queuing.\n");
1324                 goto done;
1325         }
1326
1327         if (!priv->scan_cmd) {
1328                 priv->scan_cmd = kmalloc(sizeof(struct iwl_scan_cmd) +
1329                                          IWL_MAX_SCAN_SIZE, GFP_KERNEL);
1330                 if (!priv->scan_cmd) {
1331                         IWL_DEBUG_SCAN(priv,
1332                                        "fail to allocate memory for scan\n");
1333                         goto done;
1334                 }
1335         }
1336         scan = priv->scan_cmd;
1337         memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
1338
1339         scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
1340         scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
1341
1342         if (iwl_is_associated(priv)) {
1343                 u16 interval = 0;
1344                 u32 extra;
1345                 u32 suspend_time = 100;
1346                 u32 scan_suspend_time = 100;
1347                 unsigned long flags;
1348
1349                 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
1350                 spin_lock_irqsave(&priv->lock, flags);
1351                 interval = vif ? vif->bss_conf.beacon_int : 0;
1352                 spin_unlock_irqrestore(&priv->lock, flags);
1353
1354                 scan->suspend_time = 0;
1355                 scan->max_out_time = cpu_to_le32(200 * 1024);
1356                 if (!interval)
1357                         interval = suspend_time;
1358
1359                 extra = (suspend_time / interval) << 22;
1360                 scan_suspend_time = (extra |
1361                     ((suspend_time % interval) * 1024));
1362                 scan->suspend_time = cpu_to_le32(scan_suspend_time);
1363                 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
1364                                scan_suspend_time, interval);
1365         }
1366
1367         if (priv->is_internal_short_scan) {
1368                 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
1369         } else if (priv->scan_request->n_ssids) {
1370                 int i, p = 0;
1371                 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
1372                 for (i = 0; i < priv->scan_request->n_ssids; i++) {
1373                         /* always does wildcard anyway */
1374                         if (!priv->scan_request->ssids[i].ssid_len)
1375                                 continue;
1376                         scan->direct_scan[p].id = WLAN_EID_SSID;
1377                         scan->direct_scan[p].len =
1378                                 priv->scan_request->ssids[i].ssid_len;
1379                         memcpy(scan->direct_scan[p].ssid,
1380                                priv->scan_request->ssids[i].ssid,
1381                                priv->scan_request->ssids[i].ssid_len);
1382                         n_probes++;
1383                         p++;
1384                 }
1385                 is_active = true;
1386         } else
1387                 IWL_DEBUG_SCAN(priv, "Start passive scan.\n");
1388
1389         scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
1390         scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
1391         scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1392
1393         switch (priv->scan_band) {
1394         case IEEE80211_BAND_2GHZ:
1395                 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
1396                 chan_mod = le32_to_cpu(priv->active_rxon.flags & RXON_FLG_CHANNEL_MODE_MSK)
1397                                        >> RXON_FLG_CHANNEL_MODE_POS;
1398                 if (chan_mod == CHANNEL_MODE_PURE_40) {
1399                         rate = IWL_RATE_6M_PLCP;
1400                 } else {
1401                         rate = IWL_RATE_1M_PLCP;
1402                         rate_flags = RATE_MCS_CCK_MSK;
1403                 }
1404                 scan->good_CRC_th = IWL_GOOD_CRC_TH_DISABLED;
1405                 break;
1406         case IEEE80211_BAND_5GHZ:
1407                 rate = IWL_RATE_6M_PLCP;
1408                 /*
1409                  * If active scanning is requested but a certain channel is
1410                  * marked passive, we can do active scanning if we detect
1411                  * transmissions.
1412                  *
1413                  * There is an issue with some firmware versions that triggers
1414                  * a sysassert on a "good CRC threshold" of zero (== disabled),
1415                  * on a radar channel even though this means that we should NOT
1416                  * send probes.
1417                  *
1418                  * The "good CRC threshold" is the number of frames that we
1419                  * need to receive during our dwell time on a channel before
1420                  * sending out probes -- setting this to a huge value will
1421                  * mean we never reach it, but at the same time work around
1422                  * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
1423                  * here instead of IWL_GOOD_CRC_TH_DISABLED.
1424                  */
1425                 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
1426                                                 IWL_GOOD_CRC_TH_NEVER;
1427                 break;
1428         default:
1429                 IWL_WARN(priv, "Invalid scan band count\n");
1430                 goto done;
1431         }
1432
1433         band = priv->scan_band;
1434
1435         if (priv->cfg->scan_antennas[band])
1436                 rx_ant = priv->cfg->scan_antennas[band];
1437
1438         priv->scan_tx_ant[band] =
1439                         iwl_toggle_tx_ant(priv, priv->scan_tx_ant[band]);
1440         rate_flags |= iwl_ant_idx_to_flags(priv->scan_tx_ant[band]);
1441         scan->tx_cmd.rate_n_flags = iwl_hw_set_rate_n_flags(rate, rate_flags);
1442
1443         /* In power save mode use one chain, otherwise use all chains */
1444         if (test_bit(STATUS_POWER_PMI, &priv->status)) {
1445                 /* rx_ant has been set to all valid chains previously */
1446                 active_chains = rx_ant &
1447                                 ((u8)(priv->chain_noise_data.active_chains));
1448                 if (!active_chains)
1449                         active_chains = rx_ant;
1450
1451                 IWL_DEBUG_SCAN(priv, "chain_noise_data.active_chains: %u\n",
1452                                 priv->chain_noise_data.active_chains);
1453
1454                 rx_ant = first_antenna(active_chains);
1455         }
1456         /* MIMO is not used here, but value is required */
1457         rx_chain |= priv->hw_params.valid_rx_ant << RXON_RX_CHAIN_VALID_POS;
1458         rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
1459         rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_SEL_POS;
1460         rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
1461         scan->rx_chain = cpu_to_le16(rx_chain);
1462         if (!priv->is_internal_short_scan) {
1463                 cmd_len = iwl_fill_probe_req(priv,
1464                                         (struct ieee80211_mgmt *)scan->data,
1465                                         vif->addr,
1466                                         priv->scan_request->ie,
1467                                         priv->scan_request->ie_len,
1468                                         IWL_MAX_SCAN_SIZE - sizeof(*scan));
1469         } else {
1470                 /* use bcast addr, will not be transmitted but must be valid */
1471                 cmd_len = iwl_fill_probe_req(priv,
1472                                         (struct ieee80211_mgmt *)scan->data,
1473                                         iwl_bcast_addr, NULL, 0,
1474                                         IWL_MAX_SCAN_SIZE - sizeof(*scan));
1475
1476         }
1477         scan->tx_cmd.len = cpu_to_le16(cmd_len);
1478
1479         scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK |
1480                                RXON_FILTER_BCON_AWARE_MSK);
1481
1482         if (priv->is_internal_short_scan) {
1483                 scan->channel_count =
1484                         iwl_get_single_channel_for_scan(priv, vif, band,
1485                                 (void *)&scan->data[le16_to_cpu(
1486                                 scan->tx_cmd.len)]);
1487         } else {
1488                 scan->channel_count =
1489                         iwl_get_channels_for_scan(priv, vif, band,
1490                                 is_active, n_probes,
1491                                 (void *)&scan->data[le16_to_cpu(
1492                                 scan->tx_cmd.len)]);
1493         }
1494         if (scan->channel_count == 0) {
1495                 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
1496                 goto done;
1497         }
1498
1499         cmd.len += le16_to_cpu(scan->tx_cmd.len) +
1500             scan->channel_count * sizeof(struct iwl_scan_channel);
1501         cmd.data = scan;
1502         scan->len = cpu_to_le16(cmd.len);
1503
1504         set_bit(STATUS_SCAN_HW, &priv->status);
1505         if (iwl_send_cmd_sync(priv, &cmd))
1506                 goto done;
1507
1508         queue_delayed_work(priv->workqueue, &priv->scan_check,
1509                            IWL_SCAN_CHECK_WATCHDOG);
1510
1511         return;
1512
1513  done:
1514         /* Cannot perform scan. Make sure we clear scanning
1515         * bits from status so next scan request can be performed.
1516         * If we don't clear scanning status bit here all next scan
1517         * will fail
1518         */
1519         clear_bit(STATUS_SCAN_HW, &priv->status);
1520         clear_bit(STATUS_SCANNING, &priv->status);
1521         /* inform mac80211 scan aborted */
1522         queue_work(priv->workqueue, &priv->scan_completed);
1523 }
1524
1525 int iwlagn_manage_ibss_station(struct iwl_priv *priv,
1526                                struct ieee80211_vif *vif, bool add)
1527 {
1528         struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
1529
1530         if (add)
1531                 return iwl_add_bssid_station(priv, vif->bss_conf.bssid, true,
1532                                              &vif_priv->ibss_bssid_sta_id);
1533         return iwl_remove_station(priv, vif_priv->ibss_bssid_sta_id,
1534                                   vif->bss_conf.bssid);
1535 }
1536
1537 void iwl_free_tfds_in_queue(struct iwl_priv *priv,
1538                             int sta_id, int tid, int freed)
1539 {
1540         WARN_ON(!spin_is_locked(&priv->sta_lock));
1541
1542         if (priv->stations[sta_id].tid[tid].tfds_in_queue >= freed)
1543                 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
1544         else {
1545                 IWL_DEBUG_TX(priv, "free more than tfds_in_queue (%u:%d)\n",
1546                         priv->stations[sta_id].tid[tid].tfds_in_queue,
1547                         freed);
1548                 priv->stations[sta_id].tid[tid].tfds_in_queue = 0;
1549         }
1550 }