drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <net/mac80211.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40
  41 #include "iwl-eeprom.h"
  42 #include "iwl-dev.h"
  43 #include "iwl-core.h"
  44 #include "iwl-io.h"
  45 #include "iwl-helpers.h"
  46 #include "iwl-calib.h"
  47 #include "iwl-sta.h"
  48
  49 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  50 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv);
  51
  52 /* module parameters */
  53 static struct iwl_mod_params iwl4965_mod_params = {
  54         .num_of_queues = IWL49_NUM_QUEUES,
  55         .enable_qos = 1,
  56         .amsdu_size_8K = 1,
  57         .restart_fw = 1,
  58         /* the rest are 0 by default */
  59 };
  60
  61 /* check contents of special bootstrap uCode SRAM */
  62 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  63 {
  64         __le32 *image = priv->ucode_boot.v_addr;
  65         u32 len = priv->ucode_boot.len;
  66         u32 reg;
  67         u32 val;
  68
  69         IWL_DEBUG_INFO("Begin verify bsm\n");
  70
  71         /* verify BSM SRAM contents */
  72         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  73         for (reg = BSM_SRAM_LOWER_BOUND;
  74              reg < BSM_SRAM_LOWER_BOUND + len;
  75              reg += sizeof(u32), image++) {
  76                 val = iwl_read_prph(priv, reg);
  77                 if (val != le32_to_cpu(*image)) {
  78                         IWL_ERROR("BSM uCode verification failed at "
  79                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  80                                   BSM_SRAM_LOWER_BOUND,
  81                                   reg - BSM_SRAM_LOWER_BOUND, len,
  82                                   val, le32_to_cpu(*image));
  83                         return -EIO;
  84                 }
  85         }
  86
  87         IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  88
  89         return 0;
  90 }
  91
  92 /**
  93  * iwl4965_load_bsm - Load bootstrap instructions
  94  *
  95  * BSM operation:
  96  *
  97  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  98  * in special SRAM that does not power down during RFKILL.  When powering back
  99  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 100  * the bootstrap program into the on-board processor, and starts it.
 101  *
 102  * The bootstrap program loads (via DMA) instructions and data for a new
 103  * program from host DRAM locations indicated by the host driver in the
 104  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 105  * automatically.
 106  *
 107  * When initializing the NIC, the host driver points the BSM to the
 108  * "initialize" uCode image.  This uCode sets up some internal data, then
 109  * notifies host via "initialize alive" that it is complete.
 110  *
 111  * The host then replaces the BSM_DRAM_* pointer values to point to the
 112  * normal runtime uCode instructions and a backup uCode data cache buffer
 113  * (filled initially with starting data values for the on-board processor),
 114  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 115  * which begins normal operation.
 116  *
 117  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 118  * the backup data cache in DRAM before SRAM is powered down.
 119  *
 120  * When powering back up, the BSM loads the bootstrap program.  This reloads
 121  * the runtime uCode instructions and the backup data cache into SRAM,
 122  * and re-launches the runtime uCode from where it left off.
 123  */
 124 static int iwl4965_load_bsm(struct iwl_priv *priv)
 125 {
 126         __le32 *image = priv->ucode_boot.v_addr;
 127         u32 len = priv->ucode_boot.len;
 128         dma_addr_t pinst;
 129         dma_addr_t pdata;
 130         u32 inst_len;
 131         u32 data_len;
 132         int i;
 133         u32 done;
 134         u32 reg_offset;
 135         int ret;
 136
 137         IWL_DEBUG_INFO("Begin load bsm\n");
 138
 139         priv->ucode_type = UCODE_RT;
 140
 141         /* make sure bootstrap program is no larger than BSM's SRAM size */
 142         if (len > IWL_MAX_BSM_SIZE)
 143                 return -EINVAL;
 144
 145         /* Tell bootstrap uCode where to find the "Initialize" uCode
 146          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 147          * NOTE:  iwl_init_alive_start() will replace these values,
 148          *        after the "initialize" uCode has run, to point to
 149          *        runtime/protocol instructions and backup data cache.
 150          */
 151         pinst = priv->ucode_init.p_addr >> 4;
 152         pdata = priv->ucode_init_data.p_addr >> 4;
 153         inst_len = priv->ucode_init.len;
 154         data_len = priv->ucode_init_data.len;
 155
 156         ret = iwl_grab_nic_access(priv);
 157         if (ret)
 158                 return ret;
 159
 160         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 161         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 162         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 163         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 164
 165         /* Fill BSM memory with bootstrap instructions */
 166         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 167              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 168              reg_offset += sizeof(u32), image++)
 169                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 170
 171         ret = iwl4965_verify_bsm(priv);
 172         if (ret) {
 173                 iwl_release_nic_access(priv);
 174                 return ret;
 175         }
 176
 177         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 178         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 179         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
 180         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 181
 182         /* Load bootstrap code into instruction SRAM now,
 183          *   to prepare to load "initialize" uCode */
 184         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 185
 186         /* Wait for load of bootstrap uCode to finish */
 187         for (i = 0; i < 100; i++) {
 188                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 189                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 190                         break;
 191                 udelay(10);
 192         }
 193         if (i < 100)
 194                 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
 195         else {
 196                 IWL_ERROR("BSM write did not complete!\n");
 197                 return -EIO;
 198         }
 199
 200         /* Enable future boot loads whenever power management unit triggers it
 201          *   (e.g. when powering back up after power-save shutdown) */
 202         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 203
 204         iwl_release_nic_access(priv);
 205
 206         return 0;
 207 }
 208
 209 /**
 210  * iwl4965_set_ucode_ptrs - Set uCode address location
 211  *
 212  * Tell initialization uCode where to find runtime uCode.
 213  *
 214  * BSM registers initially contain pointers to initialization uCode.
 215  * We need to replace them to load runtime uCode inst and data,
 216  * and to save runtime data when powering down.
 217  */
 218 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 219 {
 220         dma_addr_t pinst;
 221         dma_addr_t pdata;
 222         unsigned long flags;
 223         int ret = 0;
 224
 225         /* bits 35:4 for 4965 */
 226         pinst = priv->ucode_code.p_addr >> 4;
 227         pdata = priv->ucode_data_backup.p_addr >> 4;
 228
 229         spin_lock_irqsave(&priv->lock, flags);
 230         ret = iwl_grab_nic_access(priv);
 231         if (ret) {
 232                 spin_unlock_irqrestore(&priv->lock, flags);
 233                 return ret;
 234         }
 235
 236         /* Tell bootstrap uCode where to find image to load */
 237         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 238         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 239         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 240                                  priv->ucode_data.len);
 241
 242         /* Inst bytecount must be last to set up, bit 31 signals uCode
 243          *   that all new ptr/size info is in place */
 244         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 245                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 246         iwl_release_nic_access(priv);
 247
 248         spin_unlock_irqrestore(&priv->lock, flags);
 249
 250         IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
 251
 252         return ret;
 253 }
 254
 255 /**
 256  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 257  *
 258  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 259  *
 260  * The 4965 "initialize" ALIVE reply contains calibration data for:
 261  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 262  *   (3945 does not contain this data).
 263  *
 264  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 265 */
 266 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 267 {
 268         /* Check alive response for "valid" sign from uCode */
 269         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 270                 /* We had an error bringing up the hardware, so take it
 271                  * all the way back down so we can try again */
 272                 IWL_DEBUG_INFO("Initialize Alive failed.\n");
 273                 goto restart;
 274         }
 275
 276         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 277          * This is a paranoid check, because we would not have gotten the
 278          * "initialize" alive if code weren't properly loaded.  */
 279         if (iwl_verify_ucode(priv)) {
 280                 /* Runtime instruction load was bad;
 281                  * take it all the way back down so we can try again */
 282                 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
 283                 goto restart;
 284         }
 285
 286         /* Calculate temperature */
 287         priv->temperature = iwl4965_hw_get_temperature(priv);
 288
 289         /* Send pointers to protocol/runtime uCode image ... init code will
 290          * load and launch runtime uCode, which will send us another "Alive"
 291          * notification. */
 292         IWL_DEBUG_INFO("Initialization Alive received.\n");
 293         if (iwl4965_set_ucode_ptrs(priv)) {
 294                 /* Runtime instruction load won't happen;
 295                  * take it all the way back down so we can try again */
 296                 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
 297                 goto restart;
 298         }
 299         return;
 300
 301 restart:
 302         queue_work(priv->workqueue, &priv->restart);
 303 }
 304
 305 static int is_fat_channel(__le32 rxon_flags)
 306 {
 307         return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
 308                 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
 309 }
 310
 311 /*
 312  * EEPROM handlers
 313  */
 314
 315 static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
 316 {
 317         u16 eeprom_ver;
 318         u16 calib_ver;
 319
 320         eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
 321
 322         calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 323
 324         if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
 325             calib_ver < EEPROM_4965_TX_POWER_VERSION)
 326                 goto err;
 327
 328         return 0;
 329 err:
 330         IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
 331                   eeprom_ver, EEPROM_4965_EEPROM_VERSION,
 332                   calib_ver, EEPROM_4965_TX_POWER_VERSION);
 333         return -EINVAL;
 334
 335 }
 336 int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
 337 {
 338         int ret;
 339         unsigned long flags;
 340
 341         spin_lock_irqsave(&priv->lock, flags);
 342         ret = iwl_grab_nic_access(priv);
 343         if (ret) {
 344                 spin_unlock_irqrestore(&priv->lock, flags);
 345                 return ret;
 346         }
 347
 348         if (src == IWL_PWR_SRC_VAUX) {
 349                 u32 val;
 350                 ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
 351                                             &val);
 352
 353                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 354                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 355                                                APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 356                                                ~APMG_PS_CTRL_MSK_PWR_SRC);
 357                 }
 358         } else {
 359                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 360                                        APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 361                                        ~APMG_PS_CTRL_MSK_PWR_SRC);
 362         }
 363
 364         iwl_release_nic_access(priv);
 365         spin_unlock_irqrestore(&priv->lock, flags);
 366
 367         return ret;
 368 }
 369
 370 /*
 371  * Activate/Deactivat Tx DMA/FIFO channels according tx fifos mask
 372  * must be called under priv->lock and mac access
 373  */
 374 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 375 {
 376         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 377 }
 378
 379 static int iwl4965_apm_init(struct iwl_priv *priv)
 380 {
 381         int ret = 0;
 382
 383         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 384                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
 385
 386         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
 387         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 388                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 389
 390         /* set "initialization complete" bit to move adapter
 391          * D0U* --> D0A* state */
 392         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 393
 394         /* wait for clock stabilization */
 395         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
 396                            CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 397                            CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 398         if (ret < 0) {
 399                 IWL_DEBUG_INFO("Failed to init the card\n");
 400                 goto out;
 401         }
 402
 403         ret = iwl_grab_nic_access(priv);
 404         if (ret)
 405                 goto out;
 406
 407         /* enable DMA */
 408         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 409                                                 APMG_CLK_VAL_BSM_CLK_RQT);
 410
 411         udelay(20);
 412
 413         /* disable L1-Active */
 414         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 415                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 416
 417         iwl_release_nic_access(priv);
 418 out:
 419         return ret;
 420 }
 421
 422
 423 static void iwl4965_nic_config(struct iwl_priv *priv)
 424 {
 425         unsigned long flags;
 426         u32 val;
 427         u16 radio_cfg;
 428         u8 val_link;
 429
 430         spin_lock_irqsave(&priv->lock, flags);
 431
 432         if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
 433                 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
 434                 /* Enable No Snoop field */
 435                 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
 436                                        val & ~(1 << 11));
 437         }
 438
 439         pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
 440
 441         /* L1 is enabled by BIOS */
 442         if ((val_link & PCI_LINK_VAL_L1_EN) == PCI_LINK_VAL_L1_EN)
 443                 /* diable L0S disabled L1A enabled */
 444                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 445         else
 446                 /* L0S enabled L1A disabled */
 447                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 448
 449         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 450
 451         /* write radio config values to register */
 452         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 453                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 454                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 455                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 456                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 457
 458         /* set CSR_HW_CONFIG_REG for uCode use */
 459         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 460                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 461                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 462
 463         priv->calib_info = (struct iwl_eeprom_calib_info *)
 464                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 465
 466         spin_unlock_irqrestore(&priv->lock, flags);
 467 }
 468
 469 static int iwl4965_apm_stop_master(struct iwl_priv *priv)
 470 {
 471         int ret = 0;
 472         unsigned long flags;
 473
 474         spin_lock_irqsave(&priv->lock, flags);
 475
 476         /* set stop master bit */
 477         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
 478
 479         ret = iwl_poll_bit(priv, CSR_RESET,
 480                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
 481                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
 482         if (ret < 0)
 483                 goto out;
 484
 485 out:
 486         spin_unlock_irqrestore(&priv->lock, flags);
 487         IWL_DEBUG_INFO("stop master\n");
 488
 489         return ret;
 490 }
 491
 492 static void iwl4965_apm_stop(struct iwl_priv *priv)
 493 {
 494         unsigned long flags;
 495
 496         iwl4965_apm_stop_master(priv);
 497
 498         spin_lock_irqsave(&priv->lock, flags);
 499
 500         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 501
 502         udelay(10);
 503
 504         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 505         spin_unlock_irqrestore(&priv->lock, flags);
 506 }
 507
 508 static int iwl4965_apm_reset(struct iwl_priv *priv)
 509 {
 510         int ret = 0;
 511         unsigned long flags;
 512
 513         iwl4965_apm_stop_master(priv);
 514
 515         spin_lock_irqsave(&priv->lock, flags);
 516
 517         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 518
 519         udelay(10);
 520
 521         /* FIXME: put here L1A -L0S w/a */
 522
 523         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 524
 525         ret = iwl_poll_bit(priv, CSR_RESET,
 526                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 527                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
 528
 529         if (ret)
 530                 goto out;
 531
 532         udelay(10);
 533
 534         ret = iwl_grab_nic_access(priv);
 535         if (ret)
 536                 goto out;
 537         /* Enable DMA and BSM Clock */
 538         iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 539                                               APMG_CLK_VAL_BSM_CLK_RQT);
 540
 541         udelay(10);
 542
 543         /* disable L1A */
 544         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 545                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 546
 547         iwl_release_nic_access(priv);
 548
 549         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
 550         wake_up_interruptible(&priv->wait_command_queue);
 551
 552 out:
 553         spin_unlock_irqrestore(&priv->lock, flags);
 554
 555         return ret;
 556 }
 557
 558 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 559  * Called after every association, but this runs only once!
 560  *  ... once chain noise is calibrated the first time, it's good forever.  */
 561 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 562 {
 563         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 564
 565         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 566                 struct iwl4965_calibration_cmd cmd;
 567
 568                 memset(&cmd, 0, sizeof(cmd));
 569                 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
 570                 cmd.diff_gain_a = 0;
 571                 cmd.diff_gain_b = 0;
 572                 cmd.diff_gain_c = 0;
 573                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 574                                  sizeof(cmd), &cmd))
 575                         IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
 576                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 577                 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
 578         }
 579 }
 580
 581 static void iwl4965_gain_computation(struct iwl_priv *priv,
 582                 u32 *average_noise,
 583                 u16 min_average_noise_antenna_i,
 584                 u32 min_average_noise)
 585 {
 586         int i, ret;
 587         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 588
 589         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 590
 591         for (i = 0; i < NUM_RX_CHAINS; i++) {
 592                 s32 delta_g = 0;
 593
 594                 if (!(data->disconn_array[i]) &&
 595                     (data->delta_gain_code[i] ==
 596                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 597                         delta_g = average_noise[i] - min_average_noise;
 598                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 599                         data->delta_gain_code[i] =
 600                                 min(data->delta_gain_code[i],
 601                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 602
 603                         data->delta_gain_code[i] =
 604                                 (data->delta_gain_code[i] | (1 << 2));
 605                 } else {
 606                         data->delta_gain_code[i] = 0;
 607                 }
 608         }
 609         IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
 610                      data->delta_gain_code[0],
 611                      data->delta_gain_code[1],
 612                      data->delta_gain_code[2]);
 613
 614         /* Differential gain gets sent to uCode only once */
 615         if (!data->radio_write) {
 616                 struct iwl4965_calibration_cmd cmd;
 617                 data->radio_write = 1;
 618
 619                 memset(&cmd, 0, sizeof(cmd));
 620                 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
 621                 cmd.diff_gain_a = data->delta_gain_code[0];
 622                 cmd.diff_gain_b = data->delta_gain_code[1];
 623                 cmd.diff_gain_c = data->delta_gain_code[2];
 624                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 625                                       sizeof(cmd), &cmd);
 626                 if (ret)
 627                         IWL_DEBUG_CALIB("fail sending cmd "
 628                                      "REPLY_PHY_CALIBRATION_CMD \n");
 629
 630                 /* TODO we might want recalculate
 631                  * rx_chain in rxon cmd */
 632
 633                 /* Mark so we run this algo only once! */
 634                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 635         }
 636         data->chain_noise_a = 0;
 637         data->chain_noise_b = 0;
 638         data->chain_noise_c = 0;
 639         data->chain_signal_a = 0;
 640         data->chain_signal_b = 0;
 641         data->chain_signal_c = 0;
 642         data->beacon_count = 0;
 643 }
 644
 645 static void iwl4965_bg_txpower_work(struct work_struct *work)
 646 {
 647         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 648                         txpower_work);
 649
 650         /* If a scan happened to start before we got here
 651          * then just return; the statistics notification will
 652          * kick off another scheduled work to compensate for
 653          * any temperature delta we missed here. */
 654         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 655             test_bit(STATUS_SCANNING, &priv->status))
 656                 return;
 657
 658         mutex_lock(&priv->mutex);
 659
 660         /* Regardless of if we are assocaited, we must reconfigure the
 661          * TX power since frames can be sent on non-radar channels while
 662          * not associated */
 663         iwl4965_send_tx_power(priv);
 664
 665         /* Update last_temperature to keep is_calib_needed from running
 666          * when it isn't needed... */
 667         priv->last_temperature = priv->temperature;
 668
 669         mutex_unlock(&priv->mutex);
 670 }
 671
 672 /*
 673  * Acquire priv->lock before calling this function !
 674  */
 675 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 676 {
 677         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 678                              (index & 0xff) | (txq_id << 8));
 679         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 680 }
 681
 682 /**
 683  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 684  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 685  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 686  *
 687  * NOTE:  Acquire priv->lock before calling this function !
 688  */
 689 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 690                                         struct iwl_tx_queue *txq,
 691                                         int tx_fifo_id, int scd_retry)
 692 {
 693         int txq_id = txq->q.id;
 694
 695         /* Find out whether to activate Tx queue */
 696         int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
 697
 698         /* Set up and activate */
 699         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 700                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 701                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 702                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 703                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 704                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 705
 706         txq->sched_retry = scd_retry;
 707
 708         IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
 709                        active ? "Activate" : "Deactivate",
 710                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 711 }
 712
 713 static const u16 default_queue_to_tx_fifo[] = {
 714         IWL_TX_FIFO_AC3,
 715         IWL_TX_FIFO_AC2,
 716         IWL_TX_FIFO_AC1,
 717         IWL_TX_FIFO_AC0,
 718         IWL49_CMD_FIFO_NUM,
 719         IWL_TX_FIFO_HCCA_1,
 720         IWL_TX_FIFO_HCCA_2
 721 };
 722
 723 static int iwl4965_alive_notify(struct iwl_priv *priv)
 724 {
 725         u32 a;
 726         int i = 0;
 727         unsigned long flags;
 728         int ret;
 729
 730         spin_lock_irqsave(&priv->lock, flags);
 731
 732         ret = iwl_grab_nic_access(priv);
 733         if (ret) {
 734                 spin_unlock_irqrestore(&priv->lock, flags);
 735                 return ret;
 736         }
 737
 738         /* Clear 4965's internal Tx Scheduler data base */
 739         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 740         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 741         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 742                 iwl_write_targ_mem(priv, a, 0);
 743         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 744                 iwl_write_targ_mem(priv, a, 0);
 745         for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
 746                 iwl_write_targ_mem(priv, a, 0);
 747
 748         /* Tel 4965 where to find Tx byte count tables */
 749         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 750                 (priv->shared_phys +
 751                  offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
 752
 753         /* Disable chain mode for all queues */
 754         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 755
 756         /* Initialize each Tx queue (including the command queue) */
 757         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 758
 759                 /* TFD circular buffer read/write indexes */
 760                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 761                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 762
 763                 /* Max Tx Window size for Scheduler-ACK mode */
 764                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 765                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 766                                 (SCD_WIN_SIZE <<
 767                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 768                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 769
 770                 /* Frame limit */
 771                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 772                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 773                                 sizeof(u32),
 774                                 (SCD_FRAME_LIMIT <<
 775                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 776                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 777
 778         }
 779         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 780                                  (1 << priv->hw_params.max_txq_num) - 1);
 781
 782         /* Activate all Tx DMA/FIFO channels */
 783         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 7));
 784
 785         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 786
 787         /* Map each Tx/cmd queue to its corresponding fifo */
 788         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 789                 int ac = default_queue_to_tx_fifo[i];
 790                 iwl_txq_ctx_activate(priv, i);
 791                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 792         }
 793
 794         iwl_release_nic_access(priv);
 795         spin_unlock_irqrestore(&priv->lock, flags);
 796
 797         return ret;
 798 }
 799
 800 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 801         .min_nrg_cck = 97,
 802         .max_nrg_cck = 0,
 803
 804         .auto_corr_min_ofdm = 85,
 805         .auto_corr_min_ofdm_mrc = 170,
 806         .auto_corr_min_ofdm_x1 = 105,
 807         .auto_corr_min_ofdm_mrc_x1 = 220,
 808
 809         .auto_corr_max_ofdm = 120,
 810         .auto_corr_max_ofdm_mrc = 210,
 811         .auto_corr_max_ofdm_x1 = 140,
 812         .auto_corr_max_ofdm_mrc_x1 = 270,
 813
 814         .auto_corr_min_cck = 125,
 815         .auto_corr_max_cck = 200,
 816         .auto_corr_min_cck_mrc = 200,
 817         .auto_corr_max_cck_mrc = 400,
 818
 819         .nrg_th_cck = 100,
 820         .nrg_th_ofdm = 100,
 821 };
 822
 823 /**
 824  * iwl4965_hw_set_hw_params
 825  *
 826  * Called when initializing driver
 827  */
 828 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 829 {
 830
 831         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
 832             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
 833                 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
 834                           IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
 835                 return -EINVAL;
 836         }
 837
 838         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
 839         priv->hw_params.first_ampdu_q = IWL49_FIRST_AMPDU_QUEUE;
 840         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 841         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 842         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 843         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 844         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 845         priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
 846
 847         priv->hw_params.tx_chains_num = 2;
 848         priv->hw_params.rx_chains_num = 2;
 849         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
 850         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
 851         priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
 852
 853         priv->hw_params.sens = &iwl4965_sensitivity;
 854
 855         return 0;
 856 }
 857
 858 /* set card power command */
 859 static int iwl4965_set_power(struct iwl_priv *priv,
 860                       void *cmd)
 861 {
 862         int ret = 0;
 863
 864         ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
 865                                     sizeof(struct iwl4965_powertable_cmd),
 866                                     cmd, NULL);
 867         return ret;
 868 }
 869
 870 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 871 {
 872         s32 sign = 1;
 873
 874         if (num < 0) {
 875                 sign = -sign;
 876                 num = -num;
 877         }
 878         if (denom < 0) {
 879                 sign = -sign;
 880                 denom = -denom;
 881         }
 882         *res = 1;
 883         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 884
 885         return 1;
 886 }
 887
 888 /**
 889  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 890  *
 891  * Determines power supply voltage compensation for txpower calculations.
 892  * Returns number of 1/2-dB steps to subtract from gain table index,
 893  * to compensate for difference between power supply voltage during
 894  * factory measurements, vs. current power supply voltage.
 895  *
 896  * Voltage indication is higher for lower voltage.
 897  * Lower voltage requires more gain (lower gain table index).
 898  */
 899 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 900                                             s32 current_voltage)
 901 {
 902         s32 comp = 0;
 903
 904         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 905             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 906                 return 0;
 907
 908         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 909                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 910
 911         if (current_voltage > eeprom_voltage)
 912                 comp *= 2;
 913         if ((comp < -2) || (comp > 2))
 914                 comp = 0;
 915
 916         return comp;
 917 }
 918
 919 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 920 {
 921         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 922             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 923                 return CALIB_CH_GROUP_5;
 924
 925         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 926             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 927                 return CALIB_CH_GROUP_1;
 928
 929         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 930             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 931                 return CALIB_CH_GROUP_2;
 932
 933         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 934             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 935                 return CALIB_CH_GROUP_3;
 936
 937         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 938             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 939                 return CALIB_CH_GROUP_4;
 940
 941         IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
 942         return -1;
 943 }
 944
 945 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 946 {
 947         s32 b = -1;
 948
 949         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 950                 if (priv->calib_info->band_info[b].ch_from == 0)
 951                         continue;
 952
 953                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 954                     && (channel <= priv->calib_info->band_info[b].ch_to))
 955                         break;
 956         }
 957
 958         return b;
 959 }
 960
 961 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 962 {
 963         s32 val;
 964
 965         if (x2 == x1)
 966                 return y1;
 967         else {
 968                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 969                 return val + y2;
 970         }
 971 }
 972
 973 /**
 974  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 975  *
 976  * Interpolates factory measurements from the two sample channels within a
 977  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 978  * differences in channel frequencies, which is proportional to differences
 979  * in channel number.
 980  */
 981 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 982                                     struct iwl_eeprom_calib_ch_info *chan_info)
 983 {
 984         s32 s = -1;
 985         u32 c;
 986         u32 m;
 987         const struct iwl_eeprom_calib_measure *m1;
 988         const struct iwl_eeprom_calib_measure *m2;
 989         struct iwl_eeprom_calib_measure *omeas;
 990         u32 ch_i1;
 991         u32 ch_i2;
 992
 993         s = iwl4965_get_sub_band(priv, channel);
 994         if (s >= EEPROM_TX_POWER_BANDS) {
 995                 IWL_ERROR("Tx Power can not find channel %d ", channel);
 996                 return -1;
 997         }
 998
 999         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
1000         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
1001         chan_info->ch_num = (u8) channel;
1002
1003         IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1004                           channel, s, ch_i1, ch_i2);
1005
1006         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1007                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
1008                         m1 = &(priv->calib_info->band_info[s].ch1.
1009                                measurements[c][m]);
1010                         m2 = &(priv->calib_info->band_info[s].ch2.
1011                                measurements[c][m]);
1012                         omeas = &(chan_info->measurements[c][m]);
1013
1014                         omeas->actual_pow =
1015                             (u8) iwl4965_interpolate_value(channel, ch_i1,
1016                                                            m1->actual_pow,
1017                                                            ch_i2,
1018                                                            m2->actual_pow);
1019                         omeas->gain_idx =
1020                             (u8) iwl4965_interpolate_value(channel, ch_i1,
1021                                                            m1->gain_idx, ch_i2,
1022                                                            m2->gain_idx);
1023                         omeas->temperature =
1024                             (u8) iwl4965_interpolate_value(channel, ch_i1,
1025                                                            m1->temperature,
1026                                                            ch_i2,
1027                                                            m2->temperature);
1028                         omeas->pa_det =
1029                             (s8) iwl4965_interpolate_value(channel, ch_i1,
1030                                                            m1->pa_det, ch_i2,
1031                                                            m2->pa_det);
1032
1033                         IWL_DEBUG_TXPOWER
1034                             ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1035                              m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1036                         IWL_DEBUG_TXPOWER
1037                             ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1038                              m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1039                         IWL_DEBUG_TXPOWER
1040                             ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1041                              m1->pa_det, m2->pa_det, omeas->pa_det);
1042                         IWL_DEBUG_TXPOWER
1043                             ("chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
1044                              m1->temperature, m2->temperature,
1045                              omeas->temperature);
1046                 }
1047         }
1048
1049         return 0;
1050 }
1051
1052 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1053  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1054 static s32 back_off_table[] = {
1055         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1056         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1057         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1058         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1059         10                      /* CCK */
1060 };
1061
1062 /* Thermal compensation values for txpower for various frequency ranges ...
1063  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
1064 static struct iwl4965_txpower_comp_entry {
1065         s32 degrees_per_05db_a;
1066         s32 degrees_per_05db_a_denom;
1067 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
1068         {9, 2},                 /* group 0 5.2, ch  34-43 */
1069         {4, 1},                 /* group 1 5.2, ch  44-70 */
1070         {4, 1},                 /* group 2 5.2, ch  71-124 */
1071         {4, 1},                 /* group 3 5.2, ch 125-200 */
1072         {3, 1}                  /* group 4 2.4, ch   all */
1073 };
1074
1075 static s32 get_min_power_index(s32 rate_power_index, u32 band)
1076 {
1077         if (!band) {
1078                 if ((rate_power_index & 7) <= 4)
1079                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
1080         }
1081         return MIN_TX_GAIN_INDEX;
1082 }
1083
1084 struct gain_entry {
1085         u8 dsp;
1086         u8 radio;
1087 };
1088
1089 static const struct gain_entry gain_table[2][108] = {
1090         /* 5.2GHz power gain index table */
1091         {
1092          {123, 0x3F},           /* highest txpower */
1093          {117, 0x3F},
1094          {110, 0x3F},
1095          {104, 0x3F},
1096          {98, 0x3F},
1097          {110, 0x3E},
1098          {104, 0x3E},
1099          {98, 0x3E},
1100          {110, 0x3D},
1101          {104, 0x3D},
1102          {98, 0x3D},
1103          {110, 0x3C},
1104          {104, 0x3C},
1105          {98, 0x3C},
1106          {110, 0x3B},
1107          {104, 0x3B},
1108          {98, 0x3B},
1109          {110, 0x3A},
1110          {104, 0x3A},
1111          {98, 0x3A},
1112          {110, 0x39},
1113          {104, 0x39},
1114          {98, 0x39},
1115          {110, 0x38},
1116          {104, 0x38},
1117          {98, 0x38},
1118          {110, 0x37},
1119          {104, 0x37},
1120          {98, 0x37},
1121          {110, 0x36},
1122          {104, 0x36},
1123          {98, 0x36},
1124          {110, 0x35},
1125          {104, 0x35},
1126          {98, 0x35},
1127          {110, 0x34},
1128          {104, 0x34},
1129          {98, 0x34},
1130          {110, 0x33},
1131          {104, 0x33},
1132          {98, 0x33},
1133          {110, 0x32},
1134          {104, 0x32},
1135          {98, 0x32},
1136          {110, 0x31},
1137          {104, 0x31},
1138          {98, 0x31},
1139          {110, 0x30},
1140          {104, 0x30},
1141          {98, 0x30},
1142          {110, 0x25},
1143          {104, 0x25},
1144          {98, 0x25},
1145          {110, 0x24},
1146          {104, 0x24},
1147          {98, 0x24},
1148          {110, 0x23},
1149          {104, 0x23},
1150          {98, 0x23},
1151          {110, 0x22},
1152          {104, 0x18},
1153          {98, 0x18},
1154          {110, 0x17},
1155          {104, 0x17},
1156          {98, 0x17},
1157          {110, 0x16},
1158          {104, 0x16},
1159          {98, 0x16},
1160          {110, 0x15},
1161          {104, 0x15},
1162          {98, 0x15},
1163          {110, 0x14},
1164          {104, 0x14},
1165          {98, 0x14},
1166          {110, 0x13},
1167          {104, 0x13},
1168          {98, 0x13},
1169          {110, 0x12},
1170          {104, 0x08},
1171          {98, 0x08},
1172          {110, 0x07},
1173          {104, 0x07},
1174          {98, 0x07},
1175          {110, 0x06},
1176          {104, 0x06},
1177          {98, 0x06},
1178          {110, 0x05},
1179          {104, 0x05},
1180          {98, 0x05},
1181          {110, 0x04},
1182          {104, 0x04},
1183          {98, 0x04},
1184          {110, 0x03},
1185          {104, 0x03},
1186          {98, 0x03},
1187          {110, 0x02},
1188          {104, 0x02},
1189          {98, 0x02},
1190          {110, 0x01},
1191          {104, 0x01},
1192          {98, 0x01},
1193          {110, 0x00},
1194          {104, 0x00},
1195          {98, 0x00},
1196          {93, 0x00},
1197          {88, 0x00},
1198          {83, 0x00},
1199          {78, 0x00},
1200          },
1201         /* 2.4GHz power gain index table */
1202         {
1203          {110, 0x3f},           /* highest txpower */
1204          {104, 0x3f},
1205          {98, 0x3f},
1206          {110, 0x3e},
1207          {104, 0x3e},
1208          {98, 0x3e},
1209          {110, 0x3d},
1210          {104, 0x3d},
1211          {98, 0x3d},
1212          {110, 0x3c},
1213          {104, 0x3c},
1214          {98, 0x3c},
1215          {110, 0x3b},
1216          {104, 0x3b},
1217          {98, 0x3b},
1218          {110, 0x3a},
1219          {104, 0x3a},
1220          {98, 0x3a},
1221          {110, 0x39},
1222          {104, 0x39},
1223          {98, 0x39},
1224          {110, 0x38},
1225          {104, 0x38},
1226          {98, 0x38},
1227          {110, 0x37},
1228          {104, 0x37},
1229          {98, 0x37},
1230          {110, 0x36},
1231          {104, 0x36},
1232          {98, 0x36},
1233          {110, 0x35},
1234          {104, 0x35},
1235          {98, 0x35},
1236          {110, 0x34},
1237          {104, 0x34},
1238          {98, 0x34},
1239          {110, 0x33},
1240          {104, 0x33},
1241          {98, 0x33},
1242          {110, 0x32},
1243          {104, 0x32},
1244          {98, 0x32},
1245          {110, 0x31},
1246          {104, 0x31},
1247          {98, 0x31},
1248          {110, 0x30},
1249          {104, 0x30},
1250          {98, 0x30},
1251          {110, 0x6},
1252          {104, 0x6},
1253          {98, 0x6},
1254          {110, 0x5},
1255          {104, 0x5},
1256          {98, 0x5},
1257          {110, 0x4},
1258          {104, 0x4},
1259          {98, 0x4},
1260          {110, 0x3},
1261          {104, 0x3},
1262          {98, 0x3},
1263          {110, 0x2},
1264          {104, 0x2},
1265          {98, 0x2},
1266          {110, 0x1},
1267          {104, 0x1},
1268          {98, 0x1},
1269          {110, 0x0},
1270          {104, 0x0},
1271          {98, 0x0},
1272          {97, 0},
1273          {96, 0},
1274          {95, 0},
1275          {94, 0},
1276          {93, 0},
1277          {92, 0},
1278          {91, 0},
1279          {90, 0},
1280          {89, 0},
1281          {88, 0},
1282          {87, 0},
1283          {86, 0},
1284          {85, 0},
1285          {84, 0},
1286          {83, 0},
1287          {82, 0},
1288          {81, 0},
1289          {80, 0},
1290          {79, 0},
1291          {78, 0},
1292          {77, 0},
1293          {76, 0},
1294          {75, 0},
1295          {74, 0},
1296          {73, 0},
1297          {72, 0},
1298          {71, 0},
1299          {70, 0},
1300          {69, 0},
1301          {68, 0},
1302          {67, 0},
1303          {66, 0},
1304          {65, 0},
1305          {64, 0},
1306          {63, 0},
1307          {62, 0},
1308          {61, 0},
1309          {60, 0},
1310          {59, 0},
1311          }
1312 };
1313
1314 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1315                                     u8 is_fat, u8 ctrl_chan_high,
1316                                     struct iwl4965_tx_power_db *tx_power_tbl)
1317 {
1318         u8 saturation_power;
1319         s32 target_power;
1320         s32 user_target_power;
1321         s32 power_limit;
1322         s32 current_temp;
1323         s32 reg_limit;
1324         s32 current_regulatory;
1325         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1326         int i;
1327         int c;
1328         const struct iwl_channel_info *ch_info = NULL;
1329         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1330         const struct iwl_eeprom_calib_measure *measurement;
1331         s16 voltage;
1332         s32 init_voltage;
1333         s32 voltage_compensation;
1334         s32 degrees_per_05db_num;
1335         s32 degrees_per_05db_denom;
1336         s32 factory_temp;
1337         s32 temperature_comp[2];
1338         s32 factory_gain_index[2];
1339         s32 factory_actual_pwr[2];
1340         s32 power_index;
1341
1342         /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
1343          *   are used for indexing into txpower table) */
1344         user_target_power = 2 * priv->tx_power_user_lmt;
1345
1346         /* Get current (RXON) channel, band, width */
1347         IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
1348                           is_fat);
1349
1350         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1351
1352         if (!is_channel_valid(ch_info))
1353                 return -EINVAL;
1354
1355         /* get txatten group, used to select 1) thermal txpower adjustment
1356          *   and 2) mimo txpower balance between Tx chains. */
1357         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1358         if (txatten_grp < 0)
1359                 return -EINVAL;
1360
1361         IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
1362                           channel, txatten_grp);
1363
1364         if (is_fat) {
1365                 if (ctrl_chan_high)
1366                         channel -= 2;
1367                 else
1368                         channel += 2;
1369         }
1370
1371         /* hardware txpower limits ...
1372          * saturation (clipping distortion) txpowers are in half-dBm */
1373         if (band)
1374                 saturation_power = priv->calib_info->saturation_power24;
1375         else
1376                 saturation_power = priv->calib_info->saturation_power52;
1377
1378         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1379             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1380                 if (band)
1381                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1382                 else
1383                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1384         }
1385
1386         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1387          *   max_power_avg values are in dBm, convert * 2 */
1388         if (is_fat)
1389                 reg_limit = ch_info->fat_max_power_avg * 2;
1390         else
1391                 reg_limit = ch_info->max_power_avg * 2;
1392
1393         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1394             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1395                 if (band)
1396                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1397                 else
1398                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1399         }
1400
1401         /* Interpolate txpower calibration values for this channel,
1402          *   based on factory calibration tests on spaced channels. */
1403         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1404
1405         /* calculate tx gain adjustment based on power supply voltage */
1406         voltage = priv->calib_info->voltage;
1407         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1408         voltage_compensation =
1409             iwl4965_get_voltage_compensation(voltage, init_voltage);
1410
1411         IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
1412                           init_voltage,
1413                           voltage, voltage_compensation);
1414
1415         /* get current temperature (Celsius) */
1416         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1417         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1418         current_temp = KELVIN_TO_CELSIUS(current_temp);
1419
1420         /* select thermal txpower adjustment params, based on channel group
1421          *   (same frequency group used for mimo txatten adjustment) */
1422         degrees_per_05db_num =
1423             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1424         degrees_per_05db_denom =
1425             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1426
1427         /* get per-chain txpower values from factory measurements */
1428         for (c = 0; c < 2; c++) {
1429                 measurement = &ch_eeprom_info.measurements[c][1];
1430
1431                 /* txgain adjustment (in half-dB steps) based on difference
1432                  *   between factory and current temperature */
1433                 factory_temp = measurement->temperature;
1434                 iwl4965_math_div_round((current_temp - factory_temp) *
1435                                        degrees_per_05db_denom,
1436                                        degrees_per_05db_num,
1437                                        &temperature_comp[c]);
1438
1439                 factory_gain_index[c] = measurement->gain_idx;
1440                 factory_actual_pwr[c] = measurement->actual_pow;
1441
1442                 IWL_DEBUG_TXPOWER("chain = %d\n", c);
1443                 IWL_DEBUG_TXPOWER("fctry tmp %d, "
1444                                   "curr tmp %d, comp %d steps\n",
1445                                   factory_temp, current_temp,
1446                                   temperature_comp[c]);
1447
1448                 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
1449                                   factory_gain_index[c],
1450                                   factory_actual_pwr[c]);
1451         }
1452
1453         /* for each of 33 bit-rates (including 1 for CCK) */
1454         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1455                 u8 is_mimo_rate;
1456                 union iwl4965_tx_power_dual_stream tx_power;
1457
1458                 /* for mimo, reduce each chain's txpower by half
1459                  * (3dB, 6 steps), so total output power is regulatory
1460                  * compliant. */
1461                 if (i & 0x8) {
1462                         current_regulatory = reg_limit -
1463                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1464                         is_mimo_rate = 1;
1465                 } else {
1466                         current_regulatory = reg_limit;
1467                         is_mimo_rate = 0;
1468                 }
1469
1470                 /* find txpower limit, either hardware or regulatory */
1471                 power_limit = saturation_power - back_off_table[i];
1472                 if (power_limit > current_regulatory)
1473                         power_limit = current_regulatory;
1474
1475                 /* reduce user's txpower request if necessary
1476                  * for this rate on this channel */
1477                 target_power = user_target_power;
1478                 if (target_power > power_limit)
1479                         target_power = power_limit;
1480
1481                 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
1482                                   i, saturation_power - back_off_table[i],
1483                                   current_regulatory, user_target_power,
1484                                   target_power);
1485
1486                 /* for each of 2 Tx chains (radio transmitters) */
1487                 for (c = 0; c < 2; c++) {
1488                         s32 atten_value;
1489
1490                         if (is_mimo_rate)
1491                                 atten_value =
1492                                     (s32)le32_to_cpu(priv->card_alive_init.
1493                                     tx_atten[txatten_grp][c]);
1494                         else
1495                                 atten_value = 0;
1496
1497                         /* calculate index; higher index means lower txpower */
1498                         power_index = (u8) (factory_gain_index[c] -
1499                                             (target_power -
1500                                              factory_actual_pwr[c]) -
1501                                             temperature_comp[c] -
1502                                             voltage_compensation +
1503                                             atten_value);
1504
1505 /*                      IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
1506                                                 power_index); */
1507
1508                         if (power_index < get_min_power_index(i, band))
1509                                 power_index = get_min_power_index(i, band);
1510
1511                         /* adjust 5 GHz index to support negative indexes */
1512                         if (!band)
1513                                 power_index += 9;
1514
1515                         /* CCK, rate 32, reduce txpower for CCK */
1516                         if (i == POWER_TABLE_CCK_ENTRY)
1517                                 power_index +=
1518                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1519
1520                         /* stay within the table! */
1521                         if (power_index > 107) {
1522                                 IWL_WARNING("txpower index %d > 107\n",
1523                                             power_index);
1524                                 power_index = 107;
1525                         }
1526                         if (power_index < 0) {
1527                                 IWL_WARNING("txpower index %d < 0\n",
1528                                             power_index);
1529                                 power_index = 0;
1530                         }
1531
1532                         /* fill txpower command for this rate/chain */
1533                         tx_power.s.radio_tx_gain[c] =
1534                                 gain_table[band][power_index].radio;
1535                         tx_power.s.dsp_predis_atten[c] =
1536                                 gain_table[band][power_index].dsp;
1537
1538                         IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
1539                                           "gain 0x%02x dsp %d\n",
1540                                           c, atten_value, power_index,
1541                                         tx_power.s.radio_tx_gain[c],
1542                                         tx_power.s.dsp_predis_atten[c]);
1543                 }/* for each chain */
1544
1545                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1546
1547         }/* for each rate */
1548
1549         return 0;
1550 }
1551
1552 /**
1553  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1554  *
1555  * Uses the active RXON for channel, band, and characteristics (fat, high)
1556  * The power limit is taken from priv->tx_power_user_lmt.
1557  */
1558 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1559 {
1560         struct iwl4965_txpowertable_cmd cmd = { 0 };
1561         int ret;
1562         u8 band = 0;
1563         u8 is_fat = 0;
1564         u8 ctrl_chan_high = 0;
1565
1566         if (test_bit(STATUS_SCANNING, &priv->status)) {
1567                 /* If this gets hit a lot, switch it to a BUG() and catch
1568                  * the stack trace to find out who is calling this during
1569                  * a scan. */
1570                 IWL_WARNING("TX Power requested while scanning!\n");
1571                 return -EAGAIN;
1572         }
1573
1574         band = priv->band == IEEE80211_BAND_2GHZ;
1575
1576         is_fat =  is_fat_channel(priv->active_rxon.flags);
1577
1578         if (is_fat &&
1579             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1580                 ctrl_chan_high = 1;
1581
1582         cmd.band = band;
1583         cmd.channel = priv->active_rxon.channel;
1584
1585         ret = iwl4965_fill_txpower_tbl(priv, band,
1586                                 le16_to_cpu(priv->active_rxon.channel),
1587                                 is_fat, ctrl_chan_high, &cmd.tx_power);
1588         if (ret)
1589                 goto out;
1590
1591         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1592
1593 out:
1594         return ret;
1595 }
1596
1597 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1598 {
1599         int ret = 0;
1600         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1601         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1602         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1603
1604         if ((rxon1->flags == rxon2->flags) &&
1605             (rxon1->filter_flags == rxon2->filter_flags) &&
1606             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1607             (rxon1->ofdm_ht_single_stream_basic_rates ==
1608              rxon2->ofdm_ht_single_stream_basic_rates) &&
1609             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1610              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1611             (rxon1->rx_chain == rxon2->rx_chain) &&
1612             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1613                 IWL_DEBUG_INFO("Using current RXON_ASSOC.  Not resending.\n");
1614                 return 0;
1615         }
1616
1617         rxon_assoc.flags = priv->staging_rxon.flags;
1618         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1619         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1620         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1621         rxon_assoc.reserved = 0;
1622         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1623             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1624         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1625             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1626         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1627
1628         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1629                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1630         if (ret)
1631                 return ret;
1632
1633         return ret;
1634 }
1635
1636
1637 int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1638 {
1639         int rc;
1640         u8 band = 0;
1641         u8 is_fat = 0;
1642         u8 ctrl_chan_high = 0;
1643         struct iwl4965_channel_switch_cmd cmd = { 0 };
1644         const struct iwl_channel_info *ch_info;
1645
1646         band = priv->band == IEEE80211_BAND_2GHZ;
1647
1648         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1649
1650         is_fat = is_fat_channel(priv->staging_rxon.flags);
1651
1652         if (is_fat &&
1653             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1654                 ctrl_chan_high = 1;
1655
1656         cmd.band = band;
1657         cmd.expect_beacon = 0;
1658         cmd.channel = cpu_to_le16(channel);
1659         cmd.rxon_flags = priv->active_rxon.flags;
1660         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1661         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1662         if (ch_info)
1663                 cmd.expect_beacon = is_channel_radar(ch_info);
1664         else
1665                 cmd.expect_beacon = 1;
1666
1667         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
1668                                       ctrl_chan_high, &cmd.tx_power);
1669         if (rc) {
1670                 IWL_DEBUG_11H("error:%d  fill txpower_tbl\n", rc);
1671                 return rc;
1672         }
1673
1674         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1675         return rc;
1676 }
1677
1678 static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
1679 {
1680         struct iwl4965_shared *s = priv->shared_virt;
1681         return le32_to_cpu(s->rb_closed) & 0xFFF;
1682 }
1683
1684 unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
1685                           struct iwl_frame *frame, u8 rate)
1686 {
1687         struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
1688         unsigned int frame_size;
1689
1690         tx_beacon_cmd = &frame->u.beacon;
1691         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
1692
1693         tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
1694         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1695
1696         frame_size = iwl4965_fill_beacon_frame(priv,
1697                                 tx_beacon_cmd->frame,
1698                                 iwl_bcast_addr,
1699                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
1700
1701         BUG_ON(frame_size > MAX_MPDU_SIZE);
1702         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
1703
1704         if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
1705                 tx_beacon_cmd->tx.rate_n_flags =
1706                         iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
1707         else
1708                 tx_beacon_cmd->tx.rate_n_flags =
1709                         iwl_hw_set_rate_n_flags(rate, 0);
1710
1711         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
1712                                 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
1713         return (sizeof(*tx_beacon_cmd) + frame_size);
1714 }
1715
1716 static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
1717 {
1718         priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
1719                                         sizeof(struct iwl4965_shared),
1720                                         &priv->shared_phys);
1721         if (!priv->shared_virt)
1722                 return -ENOMEM;
1723
1724         memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
1725
1726         priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
1727
1728         return 0;
1729 }
1730
1731 static void iwl4965_free_shared_mem(struct iwl_priv *priv)
1732 {
1733         if (priv->shared_virt)
1734                 pci_free_consistent(priv->pci_dev,
1735                                     sizeof(struct iwl4965_shared),
1736                                     priv->shared_virt,
1737                                     priv->shared_phys);
1738 }
1739
1740 /**
1741  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1742  */
1743 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1744                                             struct iwl_tx_queue *txq,
1745                                             u16 byte_cnt)
1746 {
1747         int len;
1748         int txq_id = txq->q.id;
1749         struct iwl4965_shared *shared_data = priv->shared_virt;
1750
1751         len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1752
1753         /* Set up byte count within first 256 entries */
1754         IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
1755                        tfd_offset[txq->q.write_ptr], byte_cnt, len);
1756
1757         /* If within first 64 entries, duplicate at end */
1758         if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
1759                 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
1760                         tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
1761                         byte_cnt, len);
1762 }
1763
1764 /**
1765  * sign_extend - Sign extend a value using specified bit as sign-bit
1766  *
1767  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1768  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1769  *
1770  * @param oper value to sign extend
1771  * @param index 0 based bit index (0<=index<32) to sign bit
1772  */
1773 static s32 sign_extend(u32 oper, int index)
1774 {
1775         u8 shift = 31 - index;
1776
1777         return (s32)(oper << shift) >> shift;
1778 }
1779
1780 /**
1781  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1782  * @statistics: Provides the temperature reading from the uCode
1783  *
1784  * A return of <0 indicates bogus data in the statistics
1785  */
1786 static int iwl4965_hw_get_temperature(const struct iwl_priv *priv)
1787 {
1788         s32 temperature;
1789         s32 vt;
1790         s32 R1, R2, R3;
1791         u32 R4;
1792
1793         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1794                 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
1795                 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
1796                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1797                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1798                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1799                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1800         } else {
1801                 IWL_DEBUG_TEMP("Running temperature calibration\n");
1802                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1803                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1804                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1805                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1806         }
1807
1808         /*
1809          * Temperature is only 23 bits, so sign extend out to 32.
1810          *
1811          * NOTE If we haven't received a statistics notification yet
1812          * with an updated temperature, use R4 provided to us in the
1813          * "initialize" ALIVE response.
1814          */
1815         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1816                 vt = sign_extend(R4, 23);
1817         else
1818                 vt = sign_extend(
1819                         le32_to_cpu(priv->statistics.general.temperature), 23);
1820
1821         IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1822
1823         if (R3 == R1) {
1824                 IWL_ERROR("Calibration conflict R1 == R3\n");
1825                 return -1;
1826         }
1827
1828         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1829          * Add offset to center the adjustment around 0 degrees Centigrade. */
1830         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1831         temperature /= (R3 - R1);
1832         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1833
1834         IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n",
1835                         temperature, KELVIN_TO_CELSIUS(temperature));
1836
1837         return temperature;
1838 }
1839
1840 /* Adjust Txpower only if temperature variance is greater than threshold. */
1841 #define IWL_TEMPERATURE_THRESHOLD   3
1842
1843 /**
1844  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1845  *
1846  * If the temperature changed has changed sufficiently, then a recalibration
1847  * is needed.
1848  *
1849  * Assumes caller will replace priv->last_temperature once calibration
1850  * executed.
1851  */
1852 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1853 {
1854         int temp_diff;
1855
1856         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1857                 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
1858                 return 0;
1859         }
1860
1861         temp_diff = priv->temperature - priv->last_temperature;
1862
1863         /* get absolute value */
1864         if (temp_diff < 0) {
1865                 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
1866                 temp_diff = -temp_diff;
1867         } else if (temp_diff == 0)
1868                 IWL_DEBUG_POWER("Same temp, \n");
1869         else
1870                 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
1871
1872         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1873                 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
1874                 return 0;
1875         }
1876
1877         IWL_DEBUG_POWER("Thermal txpower calib needed\n");
1878
1879         return 1;
1880 }
1881
1882 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1883 {
1884         s32 temp;
1885
1886         temp = iwl4965_hw_get_temperature(priv);
1887         if (temp < 0)
1888                 return;
1889
1890         if (priv->temperature != temp) {
1891                 if (priv->temperature)
1892                         IWL_DEBUG_TEMP("Temperature changed "
1893                                        "from %dC to %dC\n",
1894                                        KELVIN_TO_CELSIUS(priv->temperature),
1895                                        KELVIN_TO_CELSIUS(temp));
1896                 else
1897                         IWL_DEBUG_TEMP("Temperature "
1898                                        "initialized to %dC\n",
1899                                        KELVIN_TO_CELSIUS(temp));
1900         }
1901
1902         priv->temperature = temp;
1903         set_bit(STATUS_TEMPERATURE, &priv->status);
1904
1905         if (!priv->disable_tx_power_cal &&
1906              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1907              iwl4965_is_temp_calib_needed(priv))
1908                 queue_work(priv->workqueue, &priv->txpower_work);
1909 }
1910
1911 /**
1912  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1913  */
1914 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1915                                             u16 txq_id)
1916 {
1917         /* Simply stop the queue, but don't change any configuration;
1918          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1919         iwl_write_prph(priv,
1920                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1921                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1922                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1923 }
1924
1925 /**
1926  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1927  * priv->lock must be held by the caller
1928  */
1929 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1930                                    u16 ssn_idx, u8 tx_fifo)
1931 {
1932         int ret = 0;
1933
1934         if (IWL49_FIRST_AMPDU_QUEUE > txq_id) {
1935                 IWL_WARNING("queue number too small: %d, must be > %d\n",
1936                                 txq_id, IWL49_FIRST_AMPDU_QUEUE);
1937                 return -EINVAL;
1938         }
1939
1940         ret = iwl_grab_nic_access(priv);
1941         if (ret)
1942                 return ret;
1943
1944         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1945
1946         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1947
1948         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1949         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1950         /* supposes that ssn_idx is valid (!= 0xFFF) */
1951         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1952
1953         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1954         iwl_txq_ctx_deactivate(priv, txq_id);
1955         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1956
1957         iwl_release_nic_access(priv);
1958
1959         return 0;
1960 }
1961
1962 /**
1963  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1964  */
1965 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1966                                         u16 txq_id)
1967 {
1968         u32 tbl_dw_addr;
1969         u32 tbl_dw;
1970         u16 scd_q2ratid;
1971
1972         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1973
1974         tbl_dw_addr = priv->scd_base_addr +
1975                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1976
1977         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1978
1979         if (txq_id & 0x1)
1980                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1981         else
1982                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1983
1984         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1985
1986         return 0;
1987 }
1988
1989
1990 /**
1991  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1992  *
1993  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1994  *        i.e. it must be one of the higher queues used for aggregation
1995  */
1996 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1997                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1998 {
1999         unsigned long flags;
2000         int ret;
2001         u16 ra_tid;
2002
2003         if (IWL49_FIRST_AMPDU_QUEUE > txq_id)
2004                 IWL_WARNING("queue number too small: %d, must be > %d\n",
2005                         txq_id, IWL49_FIRST_AMPDU_QUEUE);
2006
2007         ra_tid = BUILD_RAxTID(sta_id, tid);
2008
2009         /* Modify device's station table to Tx this TID */
2010         iwl_sta_modify_enable_tid_tx(priv, sta_id, tid);
2011
2012         spin_lock_irqsave(&priv->lock, flags);
2013         ret = iwl_grab_nic_access(priv);
2014         if (ret) {
2015                 spin_unlock_irqrestore(&priv->lock, flags);
2016                 return ret;
2017         }
2018
2019         /* Stop this Tx queue before configuring it */
2020         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
2021
2022         /* Map receiver-address / traffic-ID to this queue */
2023         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
2024
2025         /* Set this queue as a chain-building queue */
2026         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2027
2028         /* Place first TFD at index corresponding to start sequence number.
2029          * Assumes that ssn_idx is valid (!= 0xFFF) */
2030         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2031         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2032         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
2033
2034         /* Set up Tx window size and frame limit for this queue */
2035         iwl_write_targ_mem(priv,
2036                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
2037                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
2038                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
2039
2040         iwl_write_targ_mem(priv, priv->scd_base_addr +
2041                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
2042                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
2043                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
2044
2045         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2046
2047         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
2048         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
2049
2050         iwl_release_nic_access(priv);
2051         spin_unlock_irqrestore(&priv->lock, flags);
2052
2053         return 0;
2054 }
2055
2056 int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
2057                              enum ieee80211_ampdu_mlme_action action,
2058                              const u8 *addr, u16 tid, u16 *ssn)
2059 {
2060         struct iwl_priv *priv = hw->priv;
2061         DECLARE_MAC_BUF(mac);
2062
2063         IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
2064                      print_mac(mac, addr), tid);
2065
2066         if (!(priv->cfg->sku & IWL_SKU_N))
2067                 return -EACCES;
2068
2069         switch (action) {
2070         case IEEE80211_AMPDU_RX_START:
2071                 IWL_DEBUG_HT("start Rx\n");
2072                 return iwl_rx_agg_start(priv, addr, tid, *ssn);
2073         case IEEE80211_AMPDU_RX_STOP:
2074                 IWL_DEBUG_HT("stop Rx\n");
2075                 return iwl_rx_agg_stop(priv, addr, tid);
2076         case IEEE80211_AMPDU_TX_START:
2077                 IWL_DEBUG_HT("start Tx\n");
2078                 return iwl_tx_agg_start(priv, addr, tid, ssn);
2079         case IEEE80211_AMPDU_TX_STOP:
2080                 IWL_DEBUG_HT("stop Tx\n");
2081                 return iwl_tx_agg_stop(priv, addr, tid);
2082         default:
2083                 IWL_DEBUG_HT("unknown\n");
2084                 return -EINVAL;
2085                 break;
2086         }
2087         return 0;
2088 }
2089
2090 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
2091 {
2092         switch (cmd_id) {
2093         case REPLY_RXON:
2094                 return (u16) sizeof(struct iwl4965_rxon_cmd);
2095         default:
2096                 return len;
2097         }
2098 }
2099
2100 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
2101 {
2102         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
2103         addsta->mode = cmd->mode;
2104         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
2105         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
2106         addsta->station_flags = cmd->station_flags;
2107         addsta->station_flags_msk = cmd->station_flags_msk;
2108         addsta->tid_disable_tx = cmd->tid_disable_tx;
2109         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
2110         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
2111         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
2112         addsta->reserved1 = __constant_cpu_to_le16(0);
2113         addsta->reserved2 = __constant_cpu_to_le32(0);
2114
2115         return (u16)sizeof(struct iwl4965_addsta_cmd);
2116 }
2117
2118 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
2119 {
2120         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
2121 }
2122
2123 /**
2124  * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
2125  */
2126 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
2127                                       struct iwl_ht_agg *agg,
2128                                       struct iwl4965_tx_resp *tx_resp,
2129                                       int txq_id, u16 start_idx)
2130 {
2131         u16 status;
2132         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2133         struct ieee80211_tx_info *info = NULL;
2134         struct ieee80211_hdr *hdr = NULL;
2135         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2136         int i, sh, idx;
2137         u16 seq;
2138         if (agg->wait_for_ba)
2139                 IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
2140
2141         agg->frame_count = tx_resp->frame_count;
2142         agg->start_idx = start_idx;
2143         agg->rate_n_flags = rate_n_flags;
2144         agg->bitmap = 0;
2145
2146         /* # frames attempted by Tx command */
2147         if (agg->frame_count == 1) {
2148                 /* Only one frame was attempted; no block-ack will arrive */
2149                 status = le16_to_cpu(frame_status[0].status);
2150                 idx = start_idx;
2151
2152                 /* FIXME: code repetition */
2153                 IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2154                                    agg->frame_count, agg->start_idx, idx);
2155
2156                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
2157                 info->status.retry_count = tx_resp->failure_frame;
2158                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2159                 info->flags |= iwl_is_tx_success(status)?
2160                         IEEE80211_TX_STAT_ACK : 0;
2161                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
2162                 /* FIXME: code repetition end */
2163
2164                 IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
2165                                     status & 0xff, tx_resp->failure_frame);
2166                 IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
2167
2168                 agg->wait_for_ba = 0;
2169         } else {
2170                 /* Two or more frames were attempted; expect block-ack */
2171                 u64 bitmap = 0;
2172                 int start = agg->start_idx;
2173
2174                 /* Construct bit-map of pending frames within Tx window */
2175                 for (i = 0; i < agg->frame_count; i++) {
2176                         u16 sc;
2177                         status = le16_to_cpu(frame_status[i].status);
2178                         seq  = le16_to_cpu(frame_status[i].sequence);
2179                         idx = SEQ_TO_INDEX(seq);
2180                         txq_id = SEQ_TO_QUEUE(seq);
2181
2182                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
2183                                       AGG_TX_STATE_ABORT_MSK))
2184                                 continue;
2185
2186                         IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2187                                            agg->frame_count, txq_id, idx);
2188
2189                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
2190
2191                         sc = le16_to_cpu(hdr->seq_ctrl);
2192                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2193                                 IWL_ERROR("BUG_ON idx doesn't match seq control"
2194                                           " idx=%d, seq_idx=%d, seq=%d\n",
2195                                           idx, SEQ_TO_SN(sc),
2196                                           hdr->seq_ctrl);
2197                                 return -1;
2198                         }
2199
2200                         IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
2201                                            i, idx, SEQ_TO_SN(sc));
2202
2203                         sh = idx - start;
2204                         if (sh > 64) {
2205                                 sh = (start - idx) + 0xff;
2206                                 bitmap = bitmap << sh;
2207                                 sh = 0;
2208                                 start = idx;
2209                         } else if (sh < -64)
2210                                 sh  = 0xff - (start - idx);
2211                         else if (sh < 0) {
2212                                 sh = start - idx;
2213                                 start = idx;
2214                                 bitmap = bitmap << sh;
2215                                 sh = 0;
2216                         }
2217                         bitmap |= (1 << sh);
2218                         IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
2219                                            start, (u32)(bitmap & 0xFFFFFFFF));
2220                 }
2221
2222                 agg->bitmap = bitmap;
2223                 agg->start_idx = start;
2224                 IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2225                                    agg->frame_count, agg->start_idx,
2226                                    (unsigned long long)agg->bitmap);
2227
2228                 if (bitmap)
2229                         agg->wait_for_ba = 1;
2230         }
2231         return 0;
2232 }
2233
2234 /**
2235  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2236  */
2237 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2238                                 struct iwl_rx_mem_buffer *rxb)
2239 {
2240         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2241         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2242         int txq_id = SEQ_TO_QUEUE(sequence);
2243         int index = SEQ_TO_INDEX(sequence);
2244         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2245         struct ieee80211_tx_info *info;
2246         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2247         u32  status = le32_to_cpu(tx_resp->u.status);
2248         int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
2249         __le16 fc;
2250         struct ieee80211_hdr *hdr;
2251         u8 *qc = NULL;
2252
2253         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2254                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
2255                           "is out of range [0-%d] %d %d\n", txq_id,
2256                           index, txq->q.n_bd, txq->q.write_ptr,
2257                           txq->q.read_ptr);
2258                 return;
2259         }
2260
2261         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2262         memset(&info->status, 0, sizeof(info->status));
2263
2264         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2265         fc = hdr->frame_control;
2266         if (ieee80211_is_data_qos(fc)) {
2267                 qc = ieee80211_get_qos_ctl(hdr);
2268                 tid = qc[0] & 0xf;
2269         }
2270
2271         sta_id = iwl_get_ra_sta_id(priv, hdr);
2272         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2273                 IWL_ERROR("Station not known\n");
2274                 return;
2275         }
2276
2277         if (txq->sched_retry) {
2278                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2279                 struct iwl_ht_agg *agg = NULL;
2280
2281                 if (!qc)
2282                         return;
2283
2284                 agg = &priv->stations[sta_id].tid[tid].agg;
2285
2286                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2287
2288                 /* check if BAR is needed */
2289                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2290                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2291
2292                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2293                         int freed, ampdu_q;
2294                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2295                         IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
2296                                            "%d index %d\n", scd_ssn , index);
2297                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2298                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2299
2300                         if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
2301                             txq_id >= 0 && priv->mac80211_registered &&
2302                             agg->state != IWL_EMPTYING_HW_QUEUE_DELBA) {
2303                                 /* calculate mac80211 ampdu sw queue to wake */
2304                                 ampdu_q = txq_id - IWL49_FIRST_AMPDU_QUEUE +
2305                                           priv->hw->queues;
2306                                 if (agg->state == IWL_AGG_OFF)
2307                                         ieee80211_wake_queue(priv->hw, txq_id);
2308                                 else
2309                                         ieee80211_wake_queue(priv->hw, ampdu_q);
2310                         }
2311                         iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2312                 }
2313         } else {
2314                 info->status.retry_count = tx_resp->failure_frame;
2315                 info->flags |=
2316                         iwl_is_tx_success(status) ? IEEE80211_TX_STAT_ACK : 0;
2317                 iwl_hwrate_to_tx_control(priv,
2318                                         le32_to_cpu(tx_resp->rate_n_flags),
2319                                         info);
2320
2321                 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags "
2322                              "0x%x retries %d\n", txq_id,
2323                                 iwl_get_tx_fail_reason(status),
2324                                 status, le32_to_cpu(tx_resp->rate_n_flags),
2325                                 tx_resp->failure_frame);
2326
2327                 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
2328
2329                 if (index != -1) {
2330                     int freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2331                     if (tid != MAX_TID_COUNT)
2332                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2333                     if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
2334                         (txq_id >= 0) && priv->mac80211_registered)
2335                         ieee80211_wake_queue(priv->hw, txq_id);
2336                     if (tid != MAX_TID_COUNT)
2337                         iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2338                 }
2339         }
2340
2341         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2342                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
2343 }
2344
2345
2346 /* Set up 4965-specific Rx frame reply handlers */
2347 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2348 {
2349         /* Legacy Rx frames */
2350         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2351         /* Tx response */
2352         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2353 }
2354
2355 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2356 {
2357         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2358 }
2359
2360 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2361 {
2362         cancel_work_sync(&priv->txpower_work);
2363 }
2364
2365
2366 static struct iwl_hcmd_ops iwl4965_hcmd = {
2367         .rxon_assoc = iwl4965_send_rxon_assoc,
2368 };
2369
2370 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2371         .get_hcmd_size = iwl4965_get_hcmd_size,
2372         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2373         .chain_noise_reset = iwl4965_chain_noise_reset,
2374         .gain_computation = iwl4965_gain_computation,
2375 };
2376
2377 static struct iwl_lib_ops iwl4965_lib = {
2378         .set_hw_params = iwl4965_hw_set_hw_params,
2379         .alloc_shared_mem = iwl4965_alloc_shared_mem,
2380         .free_shared_mem = iwl4965_free_shared_mem,
2381         .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
2382         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2383         .txq_set_sched = iwl4965_txq_set_sched,
2384         .txq_agg_enable = iwl4965_txq_agg_enable,
2385         .txq_agg_disable = iwl4965_txq_agg_disable,
2386         .rx_handler_setup = iwl4965_rx_handler_setup,
2387         .setup_deferred_work = iwl4965_setup_deferred_work,
2388         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2389         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2390         .alive_notify = iwl4965_alive_notify,
2391         .init_alive_start = iwl4965_init_alive_start,
2392         .load_ucode = iwl4965_load_bsm,
2393         .apm_ops = {
2394                 .init = iwl4965_apm_init,
2395                 .reset = iwl4965_apm_reset,
2396                 .stop = iwl4965_apm_stop,
2397                 .config = iwl4965_nic_config,
2398                 .set_pwr_src = iwl4965_set_pwr_src,
2399         },
2400         .eeprom_ops = {
2401                 .regulatory_bands = {
2402                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2403                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2404                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2405                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2406                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2407                         EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
2408                         EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
2409                 },
2410                 .verify_signature  = iwlcore_eeprom_verify_signature,
2411                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2412                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2413                 .check_version = iwl4965_eeprom_check_version,
2414                 .query_addr = iwlcore_eeprom_query_addr,
2415         },
2416         .set_power = iwl4965_set_power,
2417         .send_tx_power  = iwl4965_send_tx_power,
2418         .update_chain_flags = iwl4965_update_chain_flags,
2419         .temperature = iwl4965_temperature_calib,
2420 };
2421
2422 static struct iwl_ops iwl4965_ops = {
2423         .lib = &iwl4965_lib,
2424         .hcmd = &iwl4965_hcmd,
2425         .utils = &iwl4965_hcmd_utils,
2426 };
2427
2428 struct iwl_cfg iwl4965_agn_cfg = {
2429         .name = "4965AGN",
2430         .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
2431         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2432         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2433         .ops = &iwl4965_ops,
2434         .mod_params = &iwl4965_mod_params,
2435 };
2436
2437 module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
2438 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2439 module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
2440 MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
2441 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
2442 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
2443 module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
2444 MODULE_PARM_DESC(debug, "debug output mask");
2445 module_param_named(
2446         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
2447 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2448
2449 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
2450 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2451 /* QoS */
2452 module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
2453 MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
2454 /* 11n */
2455 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444);
2456 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2457 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
2458 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2459
2460 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
2461 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");