2 * Copyright (c) 2008 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 /* mac80211 and PCI callbacks */
19 #include <linux/nl80211.h>
22 #define ATH_PCI_VERSION "0.1"
24 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
26 static char *dev_info = "ath9k";
28 MODULE_AUTHOR("Atheros Communications");
29 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
30 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
31 MODULE_LICENSE("Dual BSD/GPL");
33 static struct pci_device_id ath_pci_id_table[] __devinitdata = {
34 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
35 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
36 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
38 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
42 static int ath_get_channel(struct ath_softc *sc,
43 struct ieee80211_channel *chan)
47 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
48 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
55 static u32 ath_get_extchanmode(struct ath_softc *sc,
56 struct ieee80211_channel *chan)
59 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
60 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
63 case IEEE80211_BAND_2GHZ:
64 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
65 (tx_chan_width == ATH9K_HT_MACMODE_20))
66 chanmode = CHANNEL_G_HT20;
67 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
68 (tx_chan_width == ATH9K_HT_MACMODE_2040))
69 chanmode = CHANNEL_G_HT40PLUS;
70 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
71 (tx_chan_width == ATH9K_HT_MACMODE_2040))
72 chanmode = CHANNEL_G_HT40MINUS;
74 case IEEE80211_BAND_5GHZ:
75 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE) &&
76 (tx_chan_width == ATH9K_HT_MACMODE_20))
77 chanmode = CHANNEL_A_HT20;
78 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE) &&
79 (tx_chan_width == ATH9K_HT_MACMODE_2040))
80 chanmode = CHANNEL_A_HT40PLUS;
81 if ((ext_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW) &&
82 (tx_chan_width == ATH9K_HT_MACMODE_2040))
83 chanmode = CHANNEL_A_HT40MINUS;
93 static int ath_setkey_tkip(struct ath_softc *sc,
94 struct ieee80211_key_conf *key,
95 struct ath9k_keyval *hk,
101 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
102 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
105 /* Group key installation */
106 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
107 return ath_keyset(sc, key->keyidx, hk, addr);
109 if (!sc->sc_splitmic) {
111 * data key goes at first index,
112 * the hal handles the MIC keys at index+64.
114 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
115 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
116 return ath_keyset(sc, key->keyidx, hk, addr);
119 * TX key goes at first index, RX key at +32.
120 * The hal handles the MIC keys at index+64.
122 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
123 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
124 /* Txmic entry failed. No need to proceed further */
125 DPRINTF(sc, ATH_DBG_KEYCACHE,
126 "%s Setting TX MIC Key Failed\n", __func__);
130 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
131 /* XXX delete tx key on failure? */
132 return ath_keyset(sc, key->keyidx+32, hk, addr);
135 static int ath_key_config(struct ath_softc *sc,
137 struct ieee80211_key_conf *key)
139 struct ieee80211_vif *vif;
140 struct ath9k_keyval hk;
141 const u8 *mac = NULL;
143 enum nl80211_iftype opmode;
145 memset(&hk, 0, sizeof(hk));
149 hk.kv_type = ATH9K_CIPHER_WEP;
152 hk.kv_type = ATH9K_CIPHER_TKIP;
155 hk.kv_type = ATH9K_CIPHER_AES_CCM;
161 hk.kv_len = key->keylen;
162 memcpy(hk.kv_val, key->key, key->keylen);
167 vif = sc->sc_vaps[0]->av_if_data;
172 * For _M_STA mc tx, we will not setup a key at all since we never
174 * _M_STA mc rx, we will use the keyID.
175 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
176 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
177 * peer node. BUT we will plumb a cleartext key so that we can do
178 * perSta default key table lookup in software.
180 if (is_broadcast_ether_addr(addr)) {
182 case NL80211_IFTYPE_STATION:
183 /* default key: could be group WPA key
184 * or could be static WEP key */
187 case NL80211_IFTYPE_ADHOC:
189 case NL80211_IFTYPE_AP:
199 if (key->alg == ALG_TKIP)
200 ret = ath_setkey_tkip(sc, key, &hk, mac);
202 ret = ath_keyset(sc, key->keyidx, &hk, mac);
210 static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
214 freeslot = (key->keyidx >= 4) ? 1 : 0;
215 ath_key_reset(sc, key->keyidx, freeslot);
218 static void setup_ht_cap(struct ieee80211_sta_ht_cap *ht_info)
220 #define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
221 #define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
223 ht_info->ht_supported = true;
224 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
225 IEEE80211_HT_CAP_SM_PS |
226 IEEE80211_HT_CAP_SGI_40 |
227 IEEE80211_HT_CAP_DSSSCCK40;
229 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
230 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
231 /* set up supported mcs set */
232 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
233 ht_info->mcs.rx_mask[0] = 0xff;
234 ht_info->mcs.rx_mask[1] = 0xff;
235 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
238 static int ath_rate2idx(struct ath_softc *sc, int rate)
240 int i = 0, cur_band, n_rates;
241 struct ieee80211_hw *hw = sc->hw;
243 cur_band = hw->conf.channel->band;
244 n_rates = sc->sbands[cur_band].n_bitrates;
246 for (i = 0; i < n_rates; i++) {
247 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
252 * NB:mac80211 validates rx rate index against the supported legacy rate
253 * index only (should be done against ht rates also), return the highest
254 * legacy rate index for rx rate which does not match any one of the
255 * supported basic and extended rates to make mac80211 happy.
256 * The following hack will be cleaned up once the issue with
257 * the rx rate index validation in mac80211 is fixed.
264 static void ath9k_rx_prepare(struct ath_softc *sc,
266 struct ath_recv_status *status,
267 struct ieee80211_rx_status *rx_status)
269 struct ieee80211_hw *hw = sc->hw;
270 struct ieee80211_channel *curchan = hw->conf.channel;
272 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
274 rx_status->mactime = status->tsf;
275 rx_status->band = curchan->band;
276 rx_status->freq = curchan->center_freq;
277 rx_status->noise = sc->sc_ani.sc_noise_floor;
278 rx_status->signal = rx_status->noise + status->rssi;
279 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
280 rx_status->antenna = status->antenna;
282 /* at 45 you will be able to use MCS 15 reliably. A more elaborate
283 * scheme can be used here but it requires tables of SNR/throughput for
284 * each possible mode used. */
285 rx_status->qual = status->rssi * 100 / 45;
287 /* rssi can be more than 45 though, anything above that
288 * should be considered at 100% */
289 if (rx_status->qual > 100)
290 rx_status->qual = 100;
292 if (status->flags & ATH_RX_MIC_ERROR)
293 rx_status->flag |= RX_FLAG_MMIC_ERROR;
294 if (status->flags & ATH_RX_FCS_ERROR)
295 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
297 rx_status->flag |= RX_FLAG_TSFT;
300 static u8 parse_mpdudensity(u8 mpdudensity)
303 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
304 * 0 for no restriction
313 switch (mpdudensity) {
319 /* Our lower layer calculations limit our precision to
335 static void ath9k_ht_conf(struct ath_softc *sc,
336 struct ieee80211_bss_conf *bss_conf)
338 struct ath_ht_info *ht_info = &sc->sc_ht_info;
340 if (sc->hw->conf.ht.enabled) {
341 ht_info->ext_chan_offset = bss_conf->ht.secondary_channel_offset;
343 if (bss_conf->ht.width_40_ok)
344 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
346 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
348 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
352 static void ath9k_bss_assoc_info(struct ath_softc *sc,
353 struct ieee80211_bss_conf *bss_conf)
355 struct ieee80211_hw *hw = sc->hw;
356 struct ieee80211_channel *curchan = hw->conf.channel;
360 if (bss_conf->assoc) {
361 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
365 avp = sc->sc_vaps[0];
367 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
372 /* New association, store aid */
373 if (avp->av_opmode == ATH9K_M_STA) {
374 sc->sc_curaid = bss_conf->aid;
375 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
379 /* Configure the beacon */
380 ath_beacon_config(sc, 0);
381 sc->sc_flags |= SC_OP_BEACONS;
383 /* Reset rssi stats */
384 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
385 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
386 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
387 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
389 /* Update chainmask */
390 ath_update_chainmask(sc, hw->conf.ht.enabled);
392 DPRINTF(sc, ATH_DBG_CONFIG,
393 "%s: bssid %pM aid 0x%x\n",
395 sc->sc_curbssid, sc->sc_curaid);
397 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
399 curchan->center_freq);
401 pos = ath_get_channel(sc, curchan);
403 DPRINTF(sc, ATH_DBG_FATAL,
404 "%s: Invalid channel\n", __func__);
408 if (hw->conf.ht.enabled)
409 sc->sc_ah->ah_channels[pos].chanmode =
410 ath_get_extchanmode(sc, curchan);
412 sc->sc_ah->ah_channels[pos].chanmode =
413 (curchan->band == IEEE80211_BAND_2GHZ) ?
414 CHANNEL_G : CHANNEL_A;
416 /* set h/w channel */
417 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
418 DPRINTF(sc, ATH_DBG_FATAL,
419 "%s: Unable to set channel\n",
422 ath_rate_newstate(sc, avp);
423 /* Update ratectrl about the new state */
424 ath_rc_node_update(hw, avp->rc_node);
427 mod_timer(&sc->sc_ani.timer,
428 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
431 DPRINTF(sc, ATH_DBG_CONFIG,
432 "%s: Bss Info DISSOC\n", __func__);
437 void ath_get_beaconconfig(struct ath_softc *sc,
439 struct ath_beacon_config *conf)
441 struct ieee80211_hw *hw = sc->hw;
443 /* fill in beacon config data */
445 conf->beacon_interval = hw->conf.beacon_int;
446 conf->listen_interval = 100;
447 conf->dtim_count = 1;
448 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
451 void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
452 struct ath_xmit_status *tx_status, struct ath_node *an)
454 struct ieee80211_hw *hw = sc->hw;
455 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
457 DPRINTF(sc, ATH_DBG_XMIT,
458 "%s: TX complete: skb: %p\n", __func__, skb);
460 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
461 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
462 /* free driver's private data area of tx_info */
463 if (tx_info->driver_data[0] != NULL)
464 kfree(tx_info->driver_data[0]);
465 tx_info->driver_data[0] = NULL;
468 if (tx_status->flags & ATH_TX_BAR) {
469 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
470 tx_status->flags &= ~ATH_TX_BAR;
473 if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
474 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
475 /* Frame was not ACKed, but an ACK was expected */
476 tx_info->status.excessive_retries = 1;
479 /* Frame was ACKed */
480 tx_info->flags |= IEEE80211_TX_STAT_ACK;
483 tx_info->status.retry_count = tx_status->retries;
485 ieee80211_tx_status(hw, skb);
487 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
490 int _ath_rx_indicate(struct ath_softc *sc,
492 struct ath_recv_status *status,
495 struct ieee80211_hw *hw = sc->hw;
496 struct ath_node *an = NULL;
497 struct ieee80211_rx_status rx_status;
498 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
499 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
503 /* see if any padding is done by the hw and remove it */
505 padsize = hdrlen % 4;
506 memmove(skb->data + padsize, skb->data, hdrlen);
507 skb_pull(skb, padsize);
510 /* Prepare rx status */
511 ath9k_rx_prepare(sc, skb, status, &rx_status);
513 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
514 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
515 rx_status.flag |= RX_FLAG_DECRYPTED;
516 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
517 && !(status->flags & ATH_RX_DECRYPT_ERROR)
518 && skb->len >= hdrlen + 4) {
519 keyix = skb->data[hdrlen + 3] >> 6;
521 if (test_bit(keyix, sc->sc_keymap))
522 rx_status.flag |= RX_FLAG_DECRYPTED;
525 spin_lock_bh(&sc->node_lock);
526 an = ath_node_find(sc, hdr->addr2);
527 spin_unlock_bh(&sc->node_lock);
533 if (!an || (st != ATH_RX_CONSUMED))
534 __ieee80211_rx(hw, skb, &rx_status);
539 int ath_rx_subframe(struct ath_node *an,
541 struct ath_recv_status *status)
543 struct ath_softc *sc = an->an_sc;
544 struct ieee80211_hw *hw = sc->hw;
545 struct ieee80211_rx_status rx_status;
547 /* Prepare rx status */
548 ath9k_rx_prepare(sc, skb, status, &rx_status);
549 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
550 rx_status.flag |= RX_FLAG_DECRYPTED;
552 __ieee80211_rx(hw, skb, &rx_status);
557 /********************************/
559 /********************************/
561 static void ath_led_brightness(struct led_classdev *led_cdev,
562 enum led_brightness brightness)
564 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
565 struct ath_softc *sc = led->sc;
567 switch (brightness) {
569 if (led->led_type == ATH_LED_ASSOC ||
570 led->led_type == ATH_LED_RADIO)
571 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
572 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
573 (led->led_type == ATH_LED_RADIO) ? 1 :
574 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
577 if (led->led_type == ATH_LED_ASSOC)
578 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
579 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
586 static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
592 led->led_cdev.name = led->name;
593 led->led_cdev.default_trigger = trigger;
594 led->led_cdev.brightness_set = ath_led_brightness;
596 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
598 DPRINTF(sc, ATH_DBG_FATAL,
599 "Failed to register led:%s", led->name);
605 static void ath_unregister_led(struct ath_led *led)
607 if (led->registered) {
608 led_classdev_unregister(&led->led_cdev);
613 static void ath_deinit_leds(struct ath_softc *sc)
615 ath_unregister_led(&sc->assoc_led);
616 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
617 ath_unregister_led(&sc->tx_led);
618 ath_unregister_led(&sc->rx_led);
619 ath_unregister_led(&sc->radio_led);
620 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
623 static void ath_init_leds(struct ath_softc *sc)
628 /* Configure gpio 1 for output */
629 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
630 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
631 /* LED off, active low */
632 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
634 trigger = ieee80211_get_radio_led_name(sc->hw);
635 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
636 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
637 ret = ath_register_led(sc, &sc->radio_led, trigger);
638 sc->radio_led.led_type = ATH_LED_RADIO;
642 trigger = ieee80211_get_assoc_led_name(sc->hw);
643 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
644 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
645 ret = ath_register_led(sc, &sc->assoc_led, trigger);
646 sc->assoc_led.led_type = ATH_LED_ASSOC;
650 trigger = ieee80211_get_tx_led_name(sc->hw);
651 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
652 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
653 ret = ath_register_led(sc, &sc->tx_led, trigger);
654 sc->tx_led.led_type = ATH_LED_TX;
658 trigger = ieee80211_get_rx_led_name(sc->hw);
659 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
660 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
661 ret = ath_register_led(sc, &sc->rx_led, trigger);
662 sc->rx_led.led_type = ATH_LED_RX;
673 /*******************/
675 /*******************/
677 static void ath_radio_enable(struct ath_softc *sc)
679 struct ath_hal *ah = sc->sc_ah;
682 spin_lock_bh(&sc->sc_resetlock);
683 if (!ath9k_hw_reset(ah, ah->ah_curchan,
684 sc->sc_ht_info.tx_chan_width,
687 sc->sc_ht_extprotspacing,
689 DPRINTF(sc, ATH_DBG_FATAL,
690 "%s: unable to reset channel %u (%uMhz) "
691 "flags 0x%x hal status %u\n", __func__,
692 ath9k_hw_mhz2ieee(ah,
693 ah->ah_curchan->channel,
694 ah->ah_curchan->channelFlags),
695 ah->ah_curchan->channel,
696 ah->ah_curchan->channelFlags, status);
698 spin_unlock_bh(&sc->sc_resetlock);
700 ath_update_txpow(sc);
701 if (ath_startrecv(sc) != 0) {
702 DPRINTF(sc, ATH_DBG_FATAL,
703 "%s: unable to restart recv logic\n", __func__);
707 if (sc->sc_flags & SC_OP_BEACONS)
708 ath_beacon_config(sc, ATH_IF_ID_ANY); /* restart beacons */
710 /* Re-Enable interrupts */
711 ath9k_hw_set_interrupts(ah, sc->sc_imask);
714 ath9k_hw_cfg_output(ah, ATH_LED_PIN,
715 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
716 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 0);
718 ieee80211_wake_queues(sc->hw);
721 static void ath_radio_disable(struct ath_softc *sc)
723 struct ath_hal *ah = sc->sc_ah;
727 ieee80211_stop_queues(sc->hw);
730 ath9k_hw_set_gpio(ah, ATH_LED_PIN, 1);
731 ath9k_hw_cfg_gpio_input(ah, ATH_LED_PIN);
733 /* Disable interrupts */
734 ath9k_hw_set_interrupts(ah, 0);
736 ath_draintxq(sc, false); /* clear pending tx frames */
737 ath_stoprecv(sc); /* turn off frame recv */
738 ath_flushrecv(sc); /* flush recv queue */
740 spin_lock_bh(&sc->sc_resetlock);
741 if (!ath9k_hw_reset(ah, ah->ah_curchan,
742 sc->sc_ht_info.tx_chan_width,
745 sc->sc_ht_extprotspacing,
747 DPRINTF(sc, ATH_DBG_FATAL,
748 "%s: unable to reset channel %u (%uMhz) "
749 "flags 0x%x hal status %u\n", __func__,
750 ath9k_hw_mhz2ieee(ah,
751 ah->ah_curchan->channel,
752 ah->ah_curchan->channelFlags),
753 ah->ah_curchan->channel,
754 ah->ah_curchan->channelFlags, status);
756 spin_unlock_bh(&sc->sc_resetlock);
758 ath9k_hw_phy_disable(ah);
759 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
762 static bool ath_is_rfkill_set(struct ath_softc *sc)
764 struct ath_hal *ah = sc->sc_ah;
766 return ath9k_hw_gpio_get(ah, ah->ah_rfkill_gpio) ==
767 ah->ah_rfkill_polarity;
770 /* h/w rfkill poll function */
771 static void ath_rfkill_poll(struct work_struct *work)
773 struct ath_softc *sc = container_of(work, struct ath_softc,
774 rf_kill.rfkill_poll.work);
777 if (sc->sc_flags & SC_OP_INVALID)
780 radio_on = !ath_is_rfkill_set(sc);
783 * enable/disable radio only when there is a
784 * state change in RF switch
786 if (radio_on == !!(sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED)) {
787 enum rfkill_state state;
789 if (sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED) {
790 state = radio_on ? RFKILL_STATE_SOFT_BLOCKED
791 : RFKILL_STATE_HARD_BLOCKED;
792 } else if (radio_on) {
793 ath_radio_enable(sc);
794 state = RFKILL_STATE_UNBLOCKED;
796 ath_radio_disable(sc);
797 state = RFKILL_STATE_HARD_BLOCKED;
800 if (state == RFKILL_STATE_HARD_BLOCKED)
801 sc->sc_flags |= SC_OP_RFKILL_HW_BLOCKED;
803 sc->sc_flags &= ~SC_OP_RFKILL_HW_BLOCKED;
805 rfkill_force_state(sc->rf_kill.rfkill, state);
808 queue_delayed_work(sc->hw->workqueue, &sc->rf_kill.rfkill_poll,
809 msecs_to_jiffies(ATH_RFKILL_POLL_INTERVAL));
812 /* s/w rfkill handler */
813 static int ath_sw_toggle_radio(void *data, enum rfkill_state state)
815 struct ath_softc *sc = data;
818 case RFKILL_STATE_SOFT_BLOCKED:
819 if (!(sc->sc_flags & (SC_OP_RFKILL_HW_BLOCKED |
820 SC_OP_RFKILL_SW_BLOCKED)))
821 ath_radio_disable(sc);
822 sc->sc_flags |= SC_OP_RFKILL_SW_BLOCKED;
824 case RFKILL_STATE_UNBLOCKED:
825 if ((sc->sc_flags & SC_OP_RFKILL_SW_BLOCKED)) {
826 sc->sc_flags &= ~SC_OP_RFKILL_SW_BLOCKED;
827 if (sc->sc_flags & SC_OP_RFKILL_HW_BLOCKED) {
828 DPRINTF(sc, ATH_DBG_FATAL, "Can't turn on the"
829 "radio as it is disabled by h/w \n");
832 ath_radio_enable(sc);
840 /* Init s/w rfkill */
841 static int ath_init_sw_rfkill(struct ath_softc *sc)
843 sc->rf_kill.rfkill = rfkill_allocate(wiphy_dev(sc->hw->wiphy),
845 if (!sc->rf_kill.rfkill) {
846 DPRINTF(sc, ATH_DBG_FATAL, "Failed to allocate rfkill\n");
850 snprintf(sc->rf_kill.rfkill_name, sizeof(sc->rf_kill.rfkill_name),
851 "ath9k-%s:rfkill", wiphy_name(sc->hw->wiphy));
852 sc->rf_kill.rfkill->name = sc->rf_kill.rfkill_name;
853 sc->rf_kill.rfkill->data = sc;
854 sc->rf_kill.rfkill->toggle_radio = ath_sw_toggle_radio;
855 sc->rf_kill.rfkill->state = RFKILL_STATE_UNBLOCKED;
856 sc->rf_kill.rfkill->user_claim_unsupported = 1;
861 /* Deinitialize rfkill */
862 static void ath_deinit_rfkill(struct ath_softc *sc)
864 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
865 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
867 if (sc->sc_flags & SC_OP_RFKILL_REGISTERED) {
868 rfkill_unregister(sc->rf_kill.rfkill);
869 sc->sc_flags &= ~SC_OP_RFKILL_REGISTERED;
870 sc->rf_kill.rfkill = NULL;
873 #endif /* CONFIG_RFKILL */
875 static int ath_detach(struct ath_softc *sc)
877 struct ieee80211_hw *hw = sc->hw;
879 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
881 /* Deinit LED control */
886 ath_deinit_rfkill(sc);
891 ieee80211_unregister_hw(hw);
893 /* unregister Rate control */
894 ath_rate_control_unregister();
908 static int ath_attach(u16 devid,
909 struct ath_softc *sc)
911 struct ieee80211_hw *hw = sc->hw;
914 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
916 error = ath_init(devid, sc);
922 INIT_LIST_HEAD(&sc->node_list);
923 spin_lock_init(&sc->node_lock);
925 /* get mac address from hardware and set in mac80211 */
927 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
929 /* setup channels and rates */
931 sc->sbands[IEEE80211_BAND_2GHZ].channels =
932 sc->channels[IEEE80211_BAND_2GHZ];
933 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
934 sc->rates[IEEE80211_BAND_2GHZ];
935 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
937 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
938 /* Setup HT capabilities for 2.4Ghz*/
939 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
941 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
942 &sc->sbands[IEEE80211_BAND_2GHZ];
944 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
945 sc->sbands[IEEE80211_BAND_5GHZ].channels =
946 sc->channels[IEEE80211_BAND_5GHZ];
947 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
948 sc->rates[IEEE80211_BAND_5GHZ];
949 sc->sbands[IEEE80211_BAND_5GHZ].band =
952 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
953 /* Setup HT capabilities for 5Ghz*/
954 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
956 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
957 &sc->sbands[IEEE80211_BAND_5GHZ];
960 /* FIXME: Have to figure out proper hw init values later */
963 hw->ampdu_queues = 1;
965 /* Register rate control */
966 hw->rate_control_algorithm = "ath9k_rate_control";
967 error = ath_rate_control_register();
969 DPRINTF(sc, ATH_DBG_FATAL,
970 "%s: Unable to register rate control "
971 "algorithm:%d\n", __func__, error);
972 ath_rate_control_unregister();
976 error = ieee80211_register_hw(hw);
978 ath_rate_control_unregister();
982 /* Initialize LED control */
986 /* Initialze h/w Rfkill */
987 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
988 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
990 /* Initialize s/w rfkill */
991 if (ath_init_sw_rfkill(sc))
995 /* initialize tx/rx engine */
997 error = ath_tx_init(sc, ATH_TXBUF);
1001 error = ath_rx_init(sc, ATH_RXBUF);
1012 static int ath9k_start(struct ieee80211_hw *hw)
1014 struct ath_softc *sc = hw->priv;
1015 struct ieee80211_channel *curchan = hw->conf.channel;
1018 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
1019 "initial channel: %d MHz\n", __func__, curchan->center_freq);
1021 /* setup initial channel */
1023 pos = ath_get_channel(sc, curchan);
1025 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1029 sc->sc_ah->ah_channels[pos].chanmode =
1030 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
1033 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
1035 DPRINTF(sc, ATH_DBG_FATAL,
1036 "%s: Unable to complete ath_open\n", __func__);
1040 #ifdef CONFIG_RFKILL
1041 /* Start rfkill polling */
1042 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1043 queue_delayed_work(sc->hw->workqueue,
1044 &sc->rf_kill.rfkill_poll, 0);
1046 if (!(sc->sc_flags & SC_OP_RFKILL_REGISTERED)) {
1047 if (rfkill_register(sc->rf_kill.rfkill)) {
1048 DPRINTF(sc, ATH_DBG_FATAL,
1049 "Unable to register rfkill\n");
1050 rfkill_free(sc->rf_kill.rfkill);
1052 /* Deinitialize the device */
1054 free_irq(sc->pdev->irq, sc);
1056 pci_iounmap(sc->pdev, sc->mem);
1057 pci_release_region(sc->pdev, 0);
1058 pci_disable_device(sc->pdev);
1059 ieee80211_free_hw(hw);
1062 sc->sc_flags |= SC_OP_RFKILL_REGISTERED;
1067 ieee80211_wake_queues(hw);
1071 static int ath9k_tx(struct ieee80211_hw *hw,
1072 struct sk_buff *skb)
1074 struct ath_softc *sc = hw->priv;
1075 int hdrlen, padsize;
1076 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1079 * As a temporary workaround, assign seq# here; this will likely need
1080 * to be cleaned up to work better with Beacon transmission and virtual
1083 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1084 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1085 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1087 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1088 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
1091 /* Add the padding after the header if this is not already done */
1092 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1094 padsize = hdrlen % 4;
1095 if (skb_headroom(skb) < padsize)
1097 skb_push(skb, padsize);
1098 memmove(skb->data, skb->data + padsize, hdrlen);
1101 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
1105 if (ath_tx_start(sc, skb) != 0) {
1106 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
1107 dev_kfree_skb_any(skb);
1108 /* FIXME: Check for proper return value from ATH_DEV */
1115 static void ath9k_stop(struct ieee80211_hw *hw)
1117 struct ath_softc *sc = hw->priv;
1120 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
1122 error = ath_suspend(sc);
1124 DPRINTF(sc, ATH_DBG_CONFIG,
1125 "%s: Device is no longer present\n", __func__);
1127 ieee80211_stop_queues(hw);
1129 #ifdef CONFIG_RFKILL
1130 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1131 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1135 static int ath9k_add_interface(struct ieee80211_hw *hw,
1136 struct ieee80211_if_init_conf *conf)
1138 struct ath_softc *sc = hw->priv;
1139 int error, ic_opmode = 0;
1141 /* Support only vap for now */
1146 switch (conf->type) {
1147 case NL80211_IFTYPE_STATION:
1148 ic_opmode = ATH9K_M_STA;
1150 case NL80211_IFTYPE_ADHOC:
1151 ic_opmode = ATH9K_M_IBSS;
1153 case NL80211_IFTYPE_AP:
1154 ic_opmode = ATH9K_M_HOSTAP;
1157 DPRINTF(sc, ATH_DBG_FATAL,
1158 "%s: Interface type %d not yet supported\n",
1159 __func__, conf->type);
1163 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
1167 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
1169 DPRINTF(sc, ATH_DBG_FATAL,
1170 "%s: Unable to attach vap, error: %d\n",
1175 if (conf->type == NL80211_IFTYPE_AP) {
1176 /* TODO: is this a suitable place to start ANI for AP mode? */
1178 mod_timer(&sc->sc_ani.timer,
1179 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
1185 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1186 struct ieee80211_if_init_conf *conf)
1188 struct ath_softc *sc = hw->priv;
1189 struct ath_vap *avp;
1192 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
1194 avp = sc->sc_vaps[0];
1196 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1201 #ifdef CONFIG_SLOW_ANT_DIV
1202 ath_slow_ant_div_stop(&sc->sc_antdiv);
1205 del_timer_sync(&sc->sc_ani.timer);
1207 /* Update ratectrl */
1208 ath_rate_newstate(sc, avp);
1210 /* Reclaim beacon resources */
1211 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
1212 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
1213 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1214 ath_beacon_return(sc, avp);
1217 /* Set interrupt mask */
1218 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1219 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
1220 sc->sc_flags &= ~SC_OP_BEACONS;
1222 error = ath_vap_detach(sc, 0);
1224 DPRINTF(sc, ATH_DBG_FATAL,
1225 "%s: Unable to detach vap, error: %d\n",
1229 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1231 struct ath_softc *sc = hw->priv;
1232 struct ieee80211_channel *curchan = hw->conf.channel;
1233 struct ieee80211_conf *conf = &hw->conf;
1236 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
1238 curchan->center_freq);
1240 /* Update chainmask */
1241 ath_update_chainmask(sc, conf->ht.enabled);
1243 pos = ath_get_channel(sc, curchan);
1245 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
1249 sc->sc_ah->ah_channels[pos].chanmode =
1250 (curchan->band == IEEE80211_BAND_2GHZ) ?
1251 CHANNEL_G : CHANNEL_A;
1253 if (sc->sc_curaid && hw->conf.ht.enabled)
1254 sc->sc_ah->ah_channels[pos].chanmode =
1255 ath_get_extchanmode(sc, curchan);
1257 sc->sc_config.txpowlimit = 2 * conf->power_level;
1259 /* set h/w channel */
1260 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1261 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1267 static int ath9k_config_interface(struct ieee80211_hw *hw,
1268 struct ieee80211_vif *vif,
1269 struct ieee80211_if_conf *conf)
1271 struct ath_softc *sc = hw->priv;
1272 struct ath_hal *ah = sc->sc_ah;
1273 struct ath_vap *avp;
1277 avp = sc->sc_vaps[0];
1279 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1284 /* TODO: Need to decide which hw opmode to use for multi-interface
1286 if (vif->type == NL80211_IFTYPE_AP &&
1287 ah->ah_opmode != ATH9K_M_HOSTAP) {
1288 ah->ah_opmode = ATH9K_M_HOSTAP;
1289 ath9k_hw_setopmode(ah);
1290 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1291 /* Request full reset to get hw opmode changed properly */
1292 sc->sc_flags |= SC_OP_FULL_RESET;
1295 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1296 !is_zero_ether_addr(conf->bssid)) {
1297 switch (vif->type) {
1298 case NL80211_IFTYPE_STATION:
1299 case NL80211_IFTYPE_ADHOC:
1300 /* Update ratectrl about the new state */
1301 ath_rate_newstate(sc, avp);
1304 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1306 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1309 /* Set aggregation protection mode parameters */
1310 sc->sc_config.ath_aggr_prot = 0;
1313 * Reset our TSF so that its value is lower than the
1314 * beacon that we are trying to catch.
1315 * Only then hw will update its TSF register with the
1316 * new beacon. Reset the TSF before setting the BSSID
1317 * to avoid allowing in any frames that would update
1318 * our TSF only to have us clear it
1319 * immediately thereafter.
1321 ath9k_hw_reset_tsf(sc->sc_ah);
1323 /* Disable BMISS interrupt when we're not associated */
1324 ath9k_hw_set_interrupts(sc->sc_ah,
1326 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
1327 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1329 DPRINTF(sc, ATH_DBG_CONFIG,
1330 "%s: RX filter 0x%x bssid %pM aid 0x%x\n",
1332 sc->sc_curbssid, sc->sc_curaid);
1334 /* need to reconfigure the beacon */
1335 sc->sc_flags &= ~SC_OP_BEACONS ;
1343 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
1344 ((vif->type == NL80211_IFTYPE_ADHOC) ||
1345 (vif->type == NL80211_IFTYPE_AP))) {
1347 * Allocate and setup the beacon frame.
1349 * Stop any previous beacon DMA. This may be
1350 * necessary, for example, when an ibss merge
1351 * causes reconfiguration; we may be called
1352 * with beacon transmission active.
1354 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1356 error = ath_beacon_alloc(sc, 0);
1360 ath_beacon_sync(sc, 0);
1363 /* Check for WLAN_CAPABILITY_PRIVACY ? */
1364 if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
1365 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1366 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1367 ath9k_hw_keysetmac(sc->sc_ah,
1372 /* Only legacy IBSS for now */
1373 if (vif->type == NL80211_IFTYPE_ADHOC)
1374 ath_update_chainmask(sc, 0);
1379 #define SUPPORTED_FILTERS \
1380 (FIF_PROMISC_IN_BSS | \
1384 FIF_BCN_PRBRESP_PROMISC | \
1387 /* FIXME: sc->sc_full_reset ? */
1388 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1389 unsigned int changed_flags,
1390 unsigned int *total_flags,
1392 struct dev_mc_list *mclist)
1394 struct ath_softc *sc = hw->priv;
1397 changed_flags &= SUPPORTED_FILTERS;
1398 *total_flags &= SUPPORTED_FILTERS;
1400 sc->rx_filter = *total_flags;
1401 rfilt = ath_calcrxfilter(sc);
1402 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1404 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1405 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1406 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
1409 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1410 __func__, sc->rx_filter);
1413 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1414 struct ieee80211_vif *vif,
1415 enum sta_notify_cmd cmd,
1416 struct ieee80211_sta *sta)
1418 struct ath_softc *sc = hw->priv;
1419 struct ath_node *an;
1420 unsigned long flags;
1422 spin_lock_irqsave(&sc->node_lock, flags);
1423 an = ath_node_find(sc, sta->addr);
1424 spin_unlock_irqrestore(&sc->node_lock, flags);
1427 case STA_NOTIFY_ADD:
1428 spin_lock_irqsave(&sc->node_lock, flags);
1430 ath_node_attach(sc, sta->addr, 0);
1431 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %pM\n",
1432 __func__, sta->addr);
1434 ath_node_get(sc, sta->addr);
1437 /* XXX: Is this right? Can the capabilities change? */
1438 an = ath_node_find(sc, sta->addr);
1439 an->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
1440 sta->ht_cap.ampdu_factor);
1442 parse_mpdudensity(sta->ht_cap.ampdu_density);
1444 spin_unlock_irqrestore(&sc->node_lock, flags);
1446 case STA_NOTIFY_REMOVE:
1448 DPRINTF(sc, ATH_DBG_FATAL,
1449 "%s: Removal of a non-existent node\n",
1452 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
1453 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %pM\n",
1463 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1465 const struct ieee80211_tx_queue_params *params)
1467 struct ath_softc *sc = hw->priv;
1468 struct ath9k_tx_queue_info qi;
1471 if (queue >= WME_NUM_AC)
1474 qi.tqi_aifs = params->aifs;
1475 qi.tqi_cwmin = params->cw_min;
1476 qi.tqi_cwmax = params->cw_max;
1477 qi.tqi_burstTime = params->txop;
1478 qnum = ath_get_hal_qnum(queue, sc);
1480 DPRINTF(sc, ATH_DBG_CONFIG,
1481 "%s: Configure tx [queue/halq] [%d/%d], "
1482 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1491 ret = ath_txq_update(sc, qnum, &qi);
1493 DPRINTF(sc, ATH_DBG_FATAL,
1494 "%s: TXQ Update failed\n", __func__);
1499 static int ath9k_set_key(struct ieee80211_hw *hw,
1500 enum set_key_cmd cmd,
1501 const u8 *local_addr,
1503 struct ieee80211_key_conf *key)
1505 struct ath_softc *sc = hw->priv;
1508 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1512 ret = ath_key_config(sc, addr, key);
1514 set_bit(key->keyidx, sc->sc_keymap);
1515 key->hw_key_idx = key->keyidx;
1516 /* push IV and Michael MIC generation to stack */
1517 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1518 if (key->alg == ALG_TKIP)
1519 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1523 ath_key_delete(sc, key);
1524 clear_bit(key->keyidx, sc->sc_keymap);
1533 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1534 struct ieee80211_vif *vif,
1535 struct ieee80211_bss_conf *bss_conf,
1538 struct ath_softc *sc = hw->priv;
1540 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1541 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1543 bss_conf->use_short_preamble);
1544 if (bss_conf->use_short_preamble)
1545 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1547 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1550 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1551 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1553 bss_conf->use_cts_prot);
1554 if (bss_conf->use_cts_prot &&
1555 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1556 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1558 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1561 if (changed & BSS_CHANGED_HT) {
1562 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT\n",
1564 ath9k_ht_conf(sc, bss_conf);
1567 if (changed & BSS_CHANGED_ASSOC) {
1568 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1571 ath9k_bss_assoc_info(sc, bss_conf);
1575 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1578 struct ath_softc *sc = hw->priv;
1579 struct ath_hal *ah = sc->sc_ah;
1581 tsf = ath9k_hw_gettsf64(ah);
1586 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1588 struct ath_softc *sc = hw->priv;
1589 struct ath_hal *ah = sc->sc_ah;
1591 ath9k_hw_reset_tsf(ah);
1594 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1595 enum ieee80211_ampdu_mlme_action action,
1596 struct ieee80211_sta *sta,
1599 struct ath_softc *sc = hw->priv;
1603 case IEEE80211_AMPDU_RX_START:
1604 ret = ath_rx_aggr_start(sc, sta->addr, tid, ssn);
1606 DPRINTF(sc, ATH_DBG_FATAL,
1607 "%s: Unable to start RX aggregation\n",
1610 case IEEE80211_AMPDU_RX_STOP:
1611 ret = ath_rx_aggr_stop(sc, sta->addr, tid);
1613 DPRINTF(sc, ATH_DBG_FATAL,
1614 "%s: Unable to stop RX aggregation\n",
1617 case IEEE80211_AMPDU_TX_START:
1618 ret = ath_tx_aggr_start(sc, sta->addr, tid, ssn);
1620 DPRINTF(sc, ATH_DBG_FATAL,
1621 "%s: Unable to start TX aggregation\n",
1624 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1626 case IEEE80211_AMPDU_TX_STOP:
1627 ret = ath_tx_aggr_stop(sc, sta->addr, tid);
1629 DPRINTF(sc, ATH_DBG_FATAL,
1630 "%s: Unable to stop TX aggregation\n",
1633 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid);
1636 DPRINTF(sc, ATH_DBG_FATAL,
1637 "%s: Unknown AMPDU action\n", __func__);
1643 static int ath9k_no_fragmentation(struct ieee80211_hw *hw, u32 value)
1648 static struct ieee80211_ops ath9k_ops = {
1650 .start = ath9k_start,
1652 .add_interface = ath9k_add_interface,
1653 .remove_interface = ath9k_remove_interface,
1654 .config = ath9k_config,
1655 .config_interface = ath9k_config_interface,
1656 .configure_filter = ath9k_configure_filter,
1658 .sta_notify = ath9k_sta_notify,
1659 .conf_tx = ath9k_conf_tx,
1660 .get_tx_stats = NULL,
1661 .bss_info_changed = ath9k_bss_info_changed,
1663 .set_key = ath9k_set_key,
1665 .get_tkip_seq = NULL,
1666 .set_rts_threshold = NULL,
1667 .set_frag_threshold = NULL,
1668 .get_tsf = ath9k_get_tsf,
1669 .reset_tsf = ath9k_reset_tsf,
1670 .tx_last_beacon = NULL,
1671 .ampdu_action = ath9k_ampdu_action,
1672 .set_frag_threshold = ath9k_no_fragmentation,
1675 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1678 struct ath_softc *sc;
1679 struct ieee80211_hw *hw;
1680 const char *athname;
1685 if (pci_enable_device(pdev))
1688 /* XXX 32-bit addressing only */
1689 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1690 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1696 * Cache line size is used to size and align various
1697 * structures used to communicate with the hardware.
1699 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1702 * Linux 2.4.18 (at least) writes the cache line size
1703 * register as a 16-bit wide register which is wrong.
1704 * We must have this setup properly for rx buffer
1705 * DMA to work so force a reasonable value here if it
1708 csz = L1_CACHE_BYTES / sizeof(u32);
1709 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1712 * The default setting of latency timer yields poor results,
1713 * set it to the value used by other systems. It may be worth
1714 * tweaking this setting more.
1716 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1718 pci_set_master(pdev);
1721 * Disable the RETRY_TIMEOUT register (0x41) to keep
1722 * PCI Tx retries from interfering with C3 CPU state.
1724 pci_read_config_dword(pdev, 0x40, &val);
1725 if ((val & 0x0000ff00) != 0)
1726 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1728 ret = pci_request_region(pdev, 0, "ath9k");
1730 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1735 mem = pci_iomap(pdev, 0, 0);
1737 printk(KERN_ERR "PCI memory map error\n") ;
1742 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1744 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1748 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1749 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1750 IEEE80211_HW_SIGNAL_DBM |
1751 IEEE80211_HW_NOISE_DBM;
1753 hw->wiphy->interface_modes =
1754 BIT(NL80211_IFTYPE_AP) |
1755 BIT(NL80211_IFTYPE_STATION) |
1756 BIT(NL80211_IFTYPE_ADHOC);
1758 SET_IEEE80211_DEV(hw, &pdev->dev);
1759 pci_set_drvdata(pdev, hw);
1766 if (ath_attach(id->device, sc) != 0) {
1771 /* setup interrupt service routine */
1773 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1774 printk(KERN_ERR "%s: request_irq failed\n",
1775 wiphy_name(hw->wiphy));
1780 athname = ath9k_hw_probe(id->vendor, id->device);
1782 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1783 wiphy_name(hw->wiphy),
1784 athname ? athname : "Atheros ???",
1785 (unsigned long)mem, pdev->irq);
1791 ieee80211_free_hw(hw);
1793 pci_iounmap(pdev, mem);
1795 pci_release_region(pdev, 0);
1797 pci_disable_device(pdev);
1801 static void ath_pci_remove(struct pci_dev *pdev)
1803 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1804 struct ath_softc *sc = hw->priv;
1805 enum ath9k_int status;
1808 ath9k_hw_set_interrupts(sc->sc_ah, 0);
1810 ath9k_hw_getisr(sc->sc_ah, &status);
1811 sc->sc_flags |= SC_OP_INVALID;
1812 free_irq(pdev->irq, sc);
1816 pci_iounmap(pdev, sc->mem);
1817 pci_release_region(pdev, 0);
1818 pci_disable_device(pdev);
1819 ieee80211_free_hw(hw);
1824 static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1826 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1827 struct ath_softc *sc = hw->priv;
1829 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1831 #ifdef CONFIG_RFKILL
1832 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1833 cancel_delayed_work_sync(&sc->rf_kill.rfkill_poll);
1836 pci_save_state(pdev);
1837 pci_disable_device(pdev);
1838 pci_set_power_state(pdev, 3);
1843 static int ath_pci_resume(struct pci_dev *pdev)
1845 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1846 struct ath_softc *sc = hw->priv;
1850 err = pci_enable_device(pdev);
1853 pci_restore_state(pdev);
1855 * Suspend/Resume resets the PCI configuration space, so we have to
1856 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1857 * PCI Tx retries from interfering with C3 CPU state
1859 pci_read_config_dword(pdev, 0x40, &val);
1860 if ((val & 0x0000ff00) != 0)
1861 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1864 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1865 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1866 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1868 #ifdef CONFIG_RFKILL
1870 * check the h/w rfkill state on resume
1871 * and start the rfkill poll timer
1873 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1874 queue_delayed_work(sc->hw->workqueue,
1875 &sc->rf_kill.rfkill_poll, 0);
1881 #endif /* CONFIG_PM */
1883 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1885 static struct pci_driver ath_pci_driver = {
1887 .id_table = ath_pci_id_table,
1888 .probe = ath_pci_probe,
1889 .remove = ath_pci_remove,
1891 .suspend = ath_pci_suspend,
1892 .resume = ath_pci_resume,
1893 #endif /* CONFIG_PM */
1896 static int __init init_ath_pci(void)
1898 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1900 if (pci_register_driver(&ath_pci_driver) < 0) {
1902 "ath_pci: No devices found, driver not installed.\n");
1903 pci_unregister_driver(&ath_pci_driver);
1909 module_init(init_ath_pci);
1911 static void __exit exit_ath_pci(void)
1913 pci_unregister_driver(&ath_pci_driver);
1914 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1916 module_exit(exit_ath_pci);