2 * Linux driver for VMware's vmxnet3 ethernet NIC.
4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
27 #include <net/ip6_checksum.h>
29 #include "vmxnet3_int.h"
31 char vmxnet3_driver_name[] = "vmxnet3";
32 #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
36 * Last entry must be all 0s
38 static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = {
39 {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)},
43 MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table);
45 static atomic_t devices_found;
47 #define VMXNET3_MAX_DEVICES 10
48 static int enable_mq = 1;
49 static int irq_share_mode;
52 * Enable/Disable the given intr
55 vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
57 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0);
62 vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
64 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1);
69 * Enable/Disable all intrs used by the device
72 vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter)
76 for (i = 0; i < adapter->intr.num_intrs; i++)
77 vmxnet3_enable_intr(adapter, i);
78 adapter->shared->devRead.intrConf.intrCtrl &=
79 cpu_to_le32(~VMXNET3_IC_DISABLE_ALL);
84 vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter)
88 adapter->shared->devRead.intrConf.intrCtrl |=
89 cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
90 for (i = 0; i < adapter->intr.num_intrs; i++)
91 vmxnet3_disable_intr(adapter, i);
96 vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events)
98 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events);
103 vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
110 vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
113 netif_start_subqueue(adapter->netdev, tq - adapter->tx_queue);
118 vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
121 netif_wake_subqueue(adapter->netdev, (tq - adapter->tx_queue));
126 vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
130 netif_stop_subqueue(adapter->netdev, (tq - adapter->tx_queue));
135 * Check the link state. This may start or stop the tx queue.
138 vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
143 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
144 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
145 adapter->link_speed = ret >> 16;
146 if (ret & 1) { /* Link is up. */
147 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n",
148 adapter->netdev->name, adapter->link_speed);
149 if (!netif_carrier_ok(adapter->netdev))
150 netif_carrier_on(adapter->netdev);
153 for (i = 0; i < adapter->num_tx_queues; i++)
154 vmxnet3_tq_start(&adapter->tx_queue[i],
158 printk(KERN_INFO "%s: NIC Link is Down\n",
159 adapter->netdev->name);
160 if (netif_carrier_ok(adapter->netdev))
161 netif_carrier_off(adapter->netdev);
164 for (i = 0; i < adapter->num_tx_queues; i++)
165 vmxnet3_tq_stop(&adapter->tx_queue[i], adapter);
171 vmxnet3_process_events(struct vmxnet3_adapter *adapter)
174 u32 events = le32_to_cpu(adapter->shared->ecr);
178 vmxnet3_ack_events(adapter, events);
180 /* Check if link state has changed */
181 if (events & VMXNET3_ECR_LINK)
182 vmxnet3_check_link(adapter, true);
184 /* Check if there is an error on xmit/recv queues */
185 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
186 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
187 VMXNET3_CMD_GET_QUEUE_STATUS);
189 for (i = 0; i < adapter->num_tx_queues; i++)
190 if (adapter->tqd_start[i].status.stopped)
191 dev_err(&adapter->netdev->dev,
192 "%s: tq[%d] error 0x%x\n",
193 adapter->netdev->name, i, le32_to_cpu(
194 adapter->tqd_start[i].status.error));
195 for (i = 0; i < adapter->num_rx_queues; i++)
196 if (adapter->rqd_start[i].status.stopped)
197 dev_err(&adapter->netdev->dev,
198 "%s: rq[%d] error 0x%x\n",
199 adapter->netdev->name, i,
200 adapter->rqd_start[i].status.error);
202 schedule_work(&adapter->work);
206 #ifdef __BIG_ENDIAN_BITFIELD
208 * The device expects the bitfields in shared structures to be written in
209 * little endian. When CPU is big endian, the following routines are used to
210 * correctly read and write into ABI.
211 * The general technique used here is : double word bitfields are defined in
212 * opposite order for big endian architecture. Then before reading them in
213 * driver the complete double word is translated using le32_to_cpu. Similarly
214 * After the driver writes into bitfields, cpu_to_le32 is used to translate the
215 * double words into required format.
216 * In order to avoid touching bits in shared structure more than once, temporary
217 * descriptors are used. These are passed as srcDesc to following functions.
219 static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc,
220 struct Vmxnet3_RxDesc *dstDesc)
222 u32 *src = (u32 *)srcDesc + 2;
223 u32 *dst = (u32 *)dstDesc + 2;
224 dstDesc->addr = le64_to_cpu(srcDesc->addr);
225 *dst = le32_to_cpu(*src);
226 dstDesc->ext1 = le32_to_cpu(srcDesc->ext1);
229 static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc,
230 struct Vmxnet3_TxDesc *dstDesc)
233 u32 *src = (u32 *)(srcDesc + 1);
234 u32 *dst = (u32 *)(dstDesc + 1);
236 /* Working backwards so that the gen bit is set at the end. */
237 for (i = 2; i > 0; i--) {
240 *dst = cpu_to_le32(*src);
245 static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc,
246 struct Vmxnet3_RxCompDesc *dstDesc)
249 u32 *src = (u32 *)srcDesc;
250 u32 *dst = (u32 *)dstDesc;
251 for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) {
252 *dst = le32_to_cpu(*src);
259 /* Used to read bitfield values from double words. */
260 static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size)
262 u32 temp = le32_to_cpu(*bitfield);
263 u32 mask = ((1 << size) - 1) << pos;
271 #endif /* __BIG_ENDIAN_BITFIELD */
273 #ifdef __BIG_ENDIAN_BITFIELD
275 # define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \
276 txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \
277 VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE)
278 # define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \
279 txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \
280 VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE)
281 # define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \
282 VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \
283 VMXNET3_TCD_GEN_SIZE)
284 # define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \
285 VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE)
286 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \
288 vmxnet3_RxCompToCPU((rcd), (tmp)); \
290 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \
292 vmxnet3_RxDescToCPU((rxd), (tmp)); \
297 # define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen)
298 # define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop)
299 # define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen)
300 # define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx)
301 # define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd)
302 # define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd)
304 #endif /* __BIG_ENDIAN_BITFIELD */
308 vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi,
309 struct pci_dev *pdev)
311 if (tbi->map_type == VMXNET3_MAP_SINGLE)
312 pci_unmap_single(pdev, tbi->dma_addr, tbi->len,
314 else if (tbi->map_type == VMXNET3_MAP_PAGE)
315 pci_unmap_page(pdev, tbi->dma_addr, tbi->len,
318 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE);
320 tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */
325 vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq,
326 struct pci_dev *pdev, struct vmxnet3_adapter *adapter)
331 /* no out of order completion */
332 BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp);
333 BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1);
335 skb = tq->buf_info[eop_idx].skb;
337 tq->buf_info[eop_idx].skb = NULL;
339 VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size);
341 while (tq->tx_ring.next2comp != eop_idx) {
342 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp,
345 /* update next2comp w/o tx_lock. Since we are marking more,
346 * instead of less, tx ring entries avail, the worst case is
347 * that the tx routine incorrectly re-queues a pkt due to
348 * insufficient tx ring entries.
350 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
354 dev_kfree_skb_any(skb);
360 vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq,
361 struct vmxnet3_adapter *adapter)
364 union Vmxnet3_GenericDesc *gdesc;
366 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
367 while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) {
368 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX(
369 &gdesc->tcd), tq, adapter->pdev,
372 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring);
373 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
377 spin_lock(&tq->tx_lock);
378 if (unlikely(vmxnet3_tq_stopped(tq, adapter) &&
379 vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) >
380 VMXNET3_WAKE_QUEUE_THRESHOLD(tq) &&
381 netif_carrier_ok(adapter->netdev))) {
382 vmxnet3_tq_wake(tq, adapter);
384 spin_unlock(&tq->tx_lock);
391 vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq,
392 struct vmxnet3_adapter *adapter)
396 while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) {
397 struct vmxnet3_tx_buf_info *tbi;
398 union Vmxnet3_GenericDesc *gdesc;
400 tbi = tq->buf_info + tq->tx_ring.next2comp;
401 gdesc = tq->tx_ring.base + tq->tx_ring.next2comp;
403 vmxnet3_unmap_tx_buf(tbi, adapter->pdev);
405 dev_kfree_skb_any(tbi->skb);
408 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
411 /* sanity check, verify all buffers are indeed unmapped and freed */
412 for (i = 0; i < tq->tx_ring.size; i++) {
413 BUG_ON(tq->buf_info[i].skb != NULL ||
414 tq->buf_info[i].map_type != VMXNET3_MAP_NONE);
417 tq->tx_ring.gen = VMXNET3_INIT_GEN;
418 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
420 tq->comp_ring.gen = VMXNET3_INIT_GEN;
421 tq->comp_ring.next2proc = 0;
426 vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
427 struct vmxnet3_adapter *adapter)
429 if (tq->tx_ring.base) {
430 pci_free_consistent(adapter->pdev, tq->tx_ring.size *
431 sizeof(struct Vmxnet3_TxDesc),
432 tq->tx_ring.base, tq->tx_ring.basePA);
433 tq->tx_ring.base = NULL;
435 if (tq->data_ring.base) {
436 pci_free_consistent(adapter->pdev, tq->data_ring.size *
437 sizeof(struct Vmxnet3_TxDataDesc),
438 tq->data_ring.base, tq->data_ring.basePA);
439 tq->data_ring.base = NULL;
441 if (tq->comp_ring.base) {
442 pci_free_consistent(adapter->pdev, tq->comp_ring.size *
443 sizeof(struct Vmxnet3_TxCompDesc),
444 tq->comp_ring.base, tq->comp_ring.basePA);
445 tq->comp_ring.base = NULL;
452 /* Destroy all tx queues */
454 vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter)
458 for (i = 0; i < adapter->num_tx_queues; i++)
459 vmxnet3_tq_destroy(&adapter->tx_queue[i], adapter);
464 vmxnet3_tq_init(struct vmxnet3_tx_queue *tq,
465 struct vmxnet3_adapter *adapter)
469 /* reset the tx ring contents to 0 and reset the tx ring states */
470 memset(tq->tx_ring.base, 0, tq->tx_ring.size *
471 sizeof(struct Vmxnet3_TxDesc));
472 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
473 tq->tx_ring.gen = VMXNET3_INIT_GEN;
475 memset(tq->data_ring.base, 0, tq->data_ring.size *
476 sizeof(struct Vmxnet3_TxDataDesc));
478 /* reset the tx comp ring contents to 0 and reset comp ring states */
479 memset(tq->comp_ring.base, 0, tq->comp_ring.size *
480 sizeof(struct Vmxnet3_TxCompDesc));
481 tq->comp_ring.next2proc = 0;
482 tq->comp_ring.gen = VMXNET3_INIT_GEN;
484 /* reset the bookkeeping data */
485 memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size);
486 for (i = 0; i < tq->tx_ring.size; i++)
487 tq->buf_info[i].map_type = VMXNET3_MAP_NONE;
489 /* stats are not reset */
494 vmxnet3_tq_create(struct vmxnet3_tx_queue *tq,
495 struct vmxnet3_adapter *adapter)
497 BUG_ON(tq->tx_ring.base || tq->data_ring.base ||
498 tq->comp_ring.base || tq->buf_info);
500 tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size
501 * sizeof(struct Vmxnet3_TxDesc),
502 &tq->tx_ring.basePA);
503 if (!tq->tx_ring.base) {
504 printk(KERN_ERR "%s: failed to allocate tx ring\n",
505 adapter->netdev->name);
509 tq->data_ring.base = pci_alloc_consistent(adapter->pdev,
511 sizeof(struct Vmxnet3_TxDataDesc),
512 &tq->data_ring.basePA);
513 if (!tq->data_ring.base) {
514 printk(KERN_ERR "%s: failed to allocate data ring\n",
515 adapter->netdev->name);
519 tq->comp_ring.base = pci_alloc_consistent(adapter->pdev,
521 sizeof(struct Vmxnet3_TxCompDesc),
522 &tq->comp_ring.basePA);
523 if (!tq->comp_ring.base) {
524 printk(KERN_ERR "%s: failed to allocate tx comp ring\n",
525 adapter->netdev->name);
529 tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]),
532 printk(KERN_ERR "%s: failed to allocate tx bufinfo\n",
533 adapter->netdev->name);
540 vmxnet3_tq_destroy(tq, adapter);
545 vmxnet3_tq_cleanup_all(struct vmxnet3_adapter *adapter)
549 for (i = 0; i < adapter->num_tx_queues; i++)
550 vmxnet3_tq_cleanup(&adapter->tx_queue[i], adapter);
554 * starting from ring->next2fill, allocate rx buffers for the given ring
555 * of the rx queue and update the rx desc. stop after @num_to_alloc buffers
556 * are allocated or allocation fails
560 vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
561 int num_to_alloc, struct vmxnet3_adapter *adapter)
563 int num_allocated = 0;
564 struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx];
565 struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
568 while (num_allocated < num_to_alloc) {
569 struct vmxnet3_rx_buf_info *rbi;
570 union Vmxnet3_GenericDesc *gd;
572 rbi = rbi_base + ring->next2fill;
573 gd = ring->base + ring->next2fill;
575 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) {
576 if (rbi->skb == NULL) {
577 rbi->skb = dev_alloc_skb(rbi->len +
579 if (unlikely(rbi->skb == NULL)) {
580 rq->stats.rx_buf_alloc_failure++;
583 rbi->skb->dev = adapter->netdev;
585 skb_reserve(rbi->skb, NET_IP_ALIGN);
586 rbi->dma_addr = pci_map_single(adapter->pdev,
587 rbi->skb->data, rbi->len,
590 /* rx buffer skipped by the device */
592 val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT;
594 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE ||
595 rbi->len != PAGE_SIZE);
597 if (rbi->page == NULL) {
598 rbi->page = alloc_page(GFP_ATOMIC);
599 if (unlikely(rbi->page == NULL)) {
600 rq->stats.rx_buf_alloc_failure++;
603 rbi->dma_addr = pci_map_page(adapter->pdev,
604 rbi->page, 0, PAGE_SIZE,
607 /* rx buffers skipped by the device */
609 val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT;
612 BUG_ON(rbi->dma_addr == 0);
613 gd->rxd.addr = cpu_to_le64(rbi->dma_addr);
614 gd->dword[2] = cpu_to_le32((ring->gen << VMXNET3_RXD_GEN_SHIFT)
618 vmxnet3_cmd_ring_adv_next2fill(ring);
620 rq->uncommitted[ring_idx] += num_allocated;
622 dev_dbg(&adapter->netdev->dev,
623 "alloc_rx_buf: %d allocated, next2fill %u, next2comp "
624 "%u, uncommited %u\n", num_allocated, ring->next2fill,
625 ring->next2comp, rq->uncommitted[ring_idx]);
627 /* so that the device can distinguish a full ring and an empty ring */
628 BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp);
630 return num_allocated;
635 vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd,
636 struct vmxnet3_rx_buf_info *rbi)
638 struct skb_frag_struct *frag = skb_shinfo(skb)->frags +
639 skb_shinfo(skb)->nr_frags;
641 BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
643 frag->page = rbi->page;
644 frag->page_offset = 0;
645 frag->size = rcd->len;
646 skb->data_len += frag->size;
647 skb_shinfo(skb)->nr_frags++;
652 vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx,
653 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev,
654 struct vmxnet3_adapter *adapter)
657 unsigned long buf_offset;
659 union Vmxnet3_GenericDesc *gdesc;
660 struct vmxnet3_tx_buf_info *tbi = NULL;
662 BUG_ON(ctx->copy_size > skb_headlen(skb));
664 /* use the previous gen bit for the SOP desc */
665 dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
667 ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill;
668 gdesc = ctx->sop_txd; /* both loops below can be skipped */
670 /* no need to map the buffer if headers are copied */
671 if (ctx->copy_size) {
672 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA +
673 tq->tx_ring.next2fill *
674 sizeof(struct Vmxnet3_TxDataDesc));
675 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size);
676 ctx->sop_txd->dword[3] = 0;
678 tbi = tq->buf_info + tq->tx_ring.next2fill;
679 tbi->map_type = VMXNET3_MAP_NONE;
681 dev_dbg(&adapter->netdev->dev,
682 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
683 tq->tx_ring.next2fill,
684 le64_to_cpu(ctx->sop_txd->txd.addr),
685 ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]);
686 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
688 /* use the right gen for non-SOP desc */
689 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
692 /* linear part can use multiple tx desc if it's big */
693 len = skb_headlen(skb) - ctx->copy_size;
694 buf_offset = ctx->copy_size;
698 if (len < VMXNET3_MAX_TX_BUF_SIZE) {
702 buf_size = VMXNET3_MAX_TX_BUF_SIZE;
703 /* spec says that for TxDesc.len, 0 == 2^14 */
706 tbi = tq->buf_info + tq->tx_ring.next2fill;
707 tbi->map_type = VMXNET3_MAP_SINGLE;
708 tbi->dma_addr = pci_map_single(adapter->pdev,
709 skb->data + buf_offset, buf_size,
714 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
715 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
717 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
718 gdesc->dword[2] = cpu_to_le32(dw2);
721 dev_dbg(&adapter->netdev->dev,
722 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
723 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
724 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
725 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
726 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
729 buf_offset += buf_size;
732 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
733 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
735 tbi = tq->buf_info + tq->tx_ring.next2fill;
736 tbi->map_type = VMXNET3_MAP_PAGE;
737 tbi->dma_addr = pci_map_page(adapter->pdev, frag->page,
738 frag->page_offset, frag->size,
741 tbi->len = frag->size;
743 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
744 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
746 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
747 gdesc->dword[2] = cpu_to_le32(dw2 | frag->size);
750 dev_dbg(&adapter->netdev->dev,
751 "txd[%u]: 0x%llu %u %u\n",
752 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
753 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
754 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
755 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
758 ctx->eop_txd = gdesc;
760 /* set the last buf_info for the pkt */
762 tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base;
766 /* Init all tx queues */
768 vmxnet3_tq_init_all(struct vmxnet3_adapter *adapter)
772 for (i = 0; i < adapter->num_tx_queues; i++)
773 vmxnet3_tq_init(&adapter->tx_queue[i], adapter);
778 * parse and copy relevant protocol headers:
779 * For a tso pkt, relevant headers are L2/3/4 including options
780 * For a pkt requesting csum offloading, they are L2/3 and may include L4
781 * if it's a TCP/UDP pkt
784 * -1: error happens during parsing
785 * 0: protocol headers parsed, but too big to be copied
786 * 1: protocol headers parsed and copied
789 * 1. related *ctx fields are updated.
790 * 2. ctx->copy_size is # of bytes copied
791 * 3. the portion copied is guaranteed to be in the linear part
795 vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
796 struct vmxnet3_tx_ctx *ctx,
797 struct vmxnet3_adapter *adapter)
799 struct Vmxnet3_TxDataDesc *tdd;
801 if (ctx->mss) { /* TSO */
802 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
803 ctx->l4_hdr_size = ((struct tcphdr *)
804 skb_transport_header(skb))->doff * 4;
805 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
807 unsigned int pull_size;
809 if (skb->ip_summed == CHECKSUM_PARTIAL) {
810 ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb);
813 struct iphdr *iph = (struct iphdr *)
814 skb_network_header(skb);
815 if (iph->protocol == IPPROTO_TCP) {
816 pull_size = ctx->eth_ip_hdr_size +
817 sizeof(struct tcphdr);
819 if (unlikely(!pskb_may_pull(skb,
823 ctx->l4_hdr_size = ((struct tcphdr *)
824 skb_transport_header(skb))->doff * 4;
825 } else if (iph->protocol == IPPROTO_UDP) {
827 sizeof(struct udphdr);
829 ctx->l4_hdr_size = 0;
832 /* for simplicity, don't copy L4 headers */
833 ctx->l4_hdr_size = 0;
835 ctx->copy_size = ctx->eth_ip_hdr_size +
838 ctx->eth_ip_hdr_size = 0;
839 ctx->l4_hdr_size = 0;
840 /* copy as much as allowed */
841 ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE
845 /* make sure headers are accessible directly */
846 if (unlikely(!pskb_may_pull(skb, ctx->copy_size)))
850 if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) {
851 tq->stats.oversized_hdr++;
856 tdd = tq->data_ring.base + tq->tx_ring.next2fill;
858 memcpy(tdd->data, skb->data, ctx->copy_size);
859 dev_dbg(&adapter->netdev->dev,
860 "copy %u bytes to dataRing[%u]\n",
861 ctx->copy_size, tq->tx_ring.next2fill);
870 vmxnet3_prepare_tso(struct sk_buff *skb,
871 struct vmxnet3_tx_ctx *ctx)
873 struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb);
875 struct iphdr *iph = (struct iphdr *)skb_network_header(skb);
877 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
880 struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb);
881 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0,
888 * Transmits a pkt thru a given tq
890 * NETDEV_TX_OK: descriptors are setup successfully
891 * NETDEV_TX_OK: error occured, the pkt is dropped
892 * NETDEV_TX_BUSY: tx ring is full, queue is stopped
895 * 1. tx ring may be changed
896 * 2. tq stats may be updated accordingly
897 * 3. shared->txNumDeferred may be updated
901 vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
902 struct vmxnet3_adapter *adapter, struct net_device *netdev)
907 struct vmxnet3_tx_ctx ctx;
908 union Vmxnet3_GenericDesc *gdesc;
909 #ifdef __BIG_ENDIAN_BITFIELD
910 /* Use temporary descriptor to avoid touching bits multiple times */
911 union Vmxnet3_GenericDesc tempTxDesc;
914 /* conservatively estimate # of descriptors to use */
915 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) +
916 skb_shinfo(skb)->nr_frags + 1;
918 ctx.ipv4 = (skb->protocol == cpu_to_be16(ETH_P_IP));
920 ctx.mss = skb_shinfo(skb)->gso_size;
922 if (skb_header_cloned(skb)) {
923 if (unlikely(pskb_expand_head(skb, 0, 0,
925 tq->stats.drop_tso++;
928 tq->stats.copy_skb_header++;
930 vmxnet3_prepare_tso(skb, &ctx);
932 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) {
934 /* non-tso pkts must not use more than
935 * VMXNET3_MAX_TXD_PER_PKT entries
937 if (skb_linearize(skb) != 0) {
938 tq->stats.drop_too_many_frags++;
941 tq->stats.linearized++;
943 /* recalculate the # of descriptors to use */
944 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
948 spin_lock_irqsave(&tq->tx_lock, flags);
950 if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) {
951 tq->stats.tx_ring_full++;
952 dev_dbg(&adapter->netdev->dev,
953 "tx queue stopped on %s, next2comp %u"
954 " next2fill %u\n", adapter->netdev->name,
955 tq->tx_ring.next2comp, tq->tx_ring.next2fill);
957 vmxnet3_tq_stop(tq, adapter);
958 spin_unlock_irqrestore(&tq->tx_lock, flags);
959 return NETDEV_TX_BUSY;
963 ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter);
965 BUG_ON(ret <= 0 && ctx.copy_size != 0);
966 /* hdrs parsed, check against other limits */
968 if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size >
969 VMXNET3_MAX_TX_BUF_SIZE)) {
973 if (skb->ip_summed == CHECKSUM_PARTIAL) {
974 if (unlikely(ctx.eth_ip_hdr_size +
976 VMXNET3_MAX_CSUM_OFFSET)) {
982 tq->stats.drop_hdr_inspect_err++;
983 goto unlock_drop_pkt;
986 /* fill tx descs related to addr & len */
987 vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter);
989 /* setup the EOP desc */
990 ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP);
992 /* setup the SOP desc */
993 #ifdef __BIG_ENDIAN_BITFIELD
995 gdesc->dword[2] = ctx.sop_txd->dword[2];
996 gdesc->dword[3] = ctx.sop_txd->dword[3];
1001 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size;
1002 gdesc->txd.om = VMXNET3_OM_TSO;
1003 gdesc->txd.msscof = ctx.mss;
1004 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len -
1005 gdesc->txd.hlen + ctx.mss - 1) / ctx.mss);
1007 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1008 gdesc->txd.hlen = ctx.eth_ip_hdr_size;
1009 gdesc->txd.om = VMXNET3_OM_CSUM;
1010 gdesc->txd.msscof = ctx.eth_ip_hdr_size +
1014 gdesc->txd.msscof = 0;
1016 le32_add_cpu(&tq->shared->txNumDeferred, 1);
1019 if (vlan_tx_tag_present(skb)) {
1021 gdesc->txd.tci = vlan_tx_tag_get(skb);
1024 /* finally flips the GEN bit of the SOP desc. */
1025 gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^
1027 #ifdef __BIG_ENDIAN_BITFIELD
1028 /* Finished updating in bitfields of Tx Desc, so write them in original
1031 vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc,
1032 (struct Vmxnet3_TxDesc *)ctx.sop_txd);
1033 gdesc = ctx.sop_txd;
1035 dev_dbg(&adapter->netdev->dev,
1036 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
1037 (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd -
1038 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr),
1039 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3]));
1041 spin_unlock_irqrestore(&tq->tx_lock, flags);
1043 if (le32_to_cpu(tq->shared->txNumDeferred) >=
1044 le32_to_cpu(tq->shared->txThreshold)) {
1045 tq->shared->txNumDeferred = 0;
1046 VMXNET3_WRITE_BAR0_REG(adapter,
1047 VMXNET3_REG_TXPROD + tq->qid * 8,
1048 tq->tx_ring.next2fill);
1051 return NETDEV_TX_OK;
1054 tq->stats.drop_oversized_hdr++;
1056 spin_unlock_irqrestore(&tq->tx_lock, flags);
1058 tq->stats.drop_total++;
1060 return NETDEV_TX_OK;
1065 vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1067 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1069 BUG_ON(skb->queue_mapping > adapter->num_tx_queues);
1070 return vmxnet3_tq_xmit(skb,
1071 &adapter->tx_queue[skb->queue_mapping],
1077 vmxnet3_rx_csum(struct vmxnet3_adapter *adapter,
1078 struct sk_buff *skb,
1079 union Vmxnet3_GenericDesc *gdesc)
1081 if (!gdesc->rcd.cnc && adapter->rxcsum) {
1082 /* typical case: TCP/UDP over IP and both csums are correct */
1083 if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) ==
1084 VMXNET3_RCD_CSUM_OK) {
1085 skb->ip_summed = CHECKSUM_UNNECESSARY;
1086 BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1087 BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6));
1088 BUG_ON(gdesc->rcd.frg);
1090 if (gdesc->rcd.csum) {
1091 skb->csum = htons(gdesc->rcd.csum);
1092 skb->ip_summed = CHECKSUM_PARTIAL;
1094 skb_checksum_none_assert(skb);
1098 skb_checksum_none_assert(skb);
1104 vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd,
1105 struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter)
1107 rq->stats.drop_err++;
1109 rq->stats.drop_fcs++;
1111 rq->stats.drop_total++;
1114 * We do not unmap and chain the rx buffer to the skb.
1115 * We basically pretend this buffer is not used and will be recycled
1116 * by vmxnet3_rq_alloc_rx_buf()
1120 * ctx->skb may be NULL if this is the first and the only one
1124 dev_kfree_skb_irq(ctx->skb);
1131 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1132 struct vmxnet3_adapter *adapter, int quota)
1134 static u32 rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2};
1136 struct Vmxnet3_RxCompDesc *rcd;
1137 struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
1138 #ifdef __BIG_ENDIAN_BITFIELD
1139 struct Vmxnet3_RxDesc rxCmdDesc;
1140 struct Vmxnet3_RxCompDesc rxComp;
1142 vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd,
1144 while (rcd->gen == rq->comp_ring.gen) {
1145 struct vmxnet3_rx_buf_info *rbi;
1146 struct sk_buff *skb;
1148 struct Vmxnet3_RxDesc *rxd;
1151 if (num_rxd >= quota) {
1152 /* we may stop even before we see the EOP desc of
1158 BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2);
1160 ring_idx = rcd->rqID < adapter->num_rx_queues ? 0 : 1;
1161 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd,
1163 rbi = rq->buf_info[ring_idx] + idx;
1165 BUG_ON(rxd->addr != rbi->dma_addr ||
1166 rxd->len != rbi->len);
1168 if (unlikely(rcd->eop && rcd->err)) {
1169 vmxnet3_rx_error(rq, rcd, ctx, adapter);
1173 if (rcd->sop) { /* first buf of the pkt */
1174 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD ||
1175 rcd->rqID != rq->qid);
1177 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB);
1178 BUG_ON(ctx->skb != NULL || rbi->skb == NULL);
1180 if (unlikely(rcd->len == 0)) {
1181 /* Pretend the rx buffer is skipped. */
1182 BUG_ON(!(rcd->sop && rcd->eop));
1183 dev_dbg(&adapter->netdev->dev,
1184 "rxRing[%u][%u] 0 length\n",
1189 ctx->skb = rbi->skb;
1192 pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len,
1193 PCI_DMA_FROMDEVICE);
1195 skb_put(ctx->skb, rcd->len);
1197 BUG_ON(ctx->skb == NULL);
1198 /* non SOP buffer must be type 1 in most cases */
1199 if (rbi->buf_type == VMXNET3_RX_BUF_PAGE) {
1200 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1203 pci_unmap_page(adapter->pdev,
1204 rbi->dma_addr, rbi->len,
1205 PCI_DMA_FROMDEVICE);
1207 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1212 * The only time a non-SOP buffer is type 0 is
1213 * when it's EOP and error flag is raised, which
1214 * has already been handled.
1222 skb->len += skb->data_len;
1223 skb->truesize += skb->data_len;
1225 vmxnet3_rx_csum(adapter, skb,
1226 (union Vmxnet3_GenericDesc *)rcd);
1227 skb->protocol = eth_type_trans(skb, adapter->netdev);
1229 if (unlikely(adapter->vlan_grp && rcd->ts)) {
1230 vlan_hwaccel_receive_skb(skb,
1231 adapter->vlan_grp, rcd->tci);
1233 netif_receive_skb(skb);
1240 /* device may skip some rx descs */
1241 rq->rx_ring[ring_idx].next2comp = idx;
1242 VMXNET3_INC_RING_IDX_ONLY(rq->rx_ring[ring_idx].next2comp,
1243 rq->rx_ring[ring_idx].size);
1245 /* refill rx buffers frequently to avoid starving the h/w */
1246 num_to_alloc = vmxnet3_cmd_ring_desc_avail(rq->rx_ring +
1248 if (unlikely(num_to_alloc > VMXNET3_RX_ALLOC_THRESHOLD(rq,
1249 ring_idx, adapter))) {
1250 vmxnet3_rq_alloc_rx_buf(rq, ring_idx, num_to_alloc,
1253 /* if needed, update the register */
1254 if (unlikely(rq->shared->updateRxProd)) {
1255 VMXNET3_WRITE_BAR0_REG(adapter,
1256 rxprod_reg[ring_idx] + rq->qid * 8,
1257 rq->rx_ring[ring_idx].next2fill);
1258 rq->uncommitted[ring_idx] = 0;
1262 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
1263 vmxnet3_getRxComp(rcd,
1264 &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp);
1272 vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,
1273 struct vmxnet3_adapter *adapter)
1276 struct Vmxnet3_RxDesc *rxd;
1278 for (ring_idx = 0; ring_idx < 2; ring_idx++) {
1279 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) {
1280 #ifdef __BIG_ENDIAN_BITFIELD
1281 struct Vmxnet3_RxDesc rxDesc;
1283 vmxnet3_getRxDesc(rxd,
1284 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc);
1286 if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD &&
1287 rq->buf_info[ring_idx][i].skb) {
1288 pci_unmap_single(adapter->pdev, rxd->addr,
1289 rxd->len, PCI_DMA_FROMDEVICE);
1290 dev_kfree_skb(rq->buf_info[ring_idx][i].skb);
1291 rq->buf_info[ring_idx][i].skb = NULL;
1292 } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY &&
1293 rq->buf_info[ring_idx][i].page) {
1294 pci_unmap_page(adapter->pdev, rxd->addr,
1295 rxd->len, PCI_DMA_FROMDEVICE);
1296 put_page(rq->buf_info[ring_idx][i].page);
1297 rq->buf_info[ring_idx][i].page = NULL;
1301 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN;
1302 rq->rx_ring[ring_idx].next2fill =
1303 rq->rx_ring[ring_idx].next2comp = 0;
1304 rq->uncommitted[ring_idx] = 0;
1307 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1308 rq->comp_ring.next2proc = 0;
1313 vmxnet3_rq_cleanup_all(struct vmxnet3_adapter *adapter)
1317 for (i = 0; i < adapter->num_rx_queues; i++)
1318 vmxnet3_rq_cleanup(&adapter->rx_queue[i], adapter);
1322 void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
1323 struct vmxnet3_adapter *adapter)
1328 /* all rx buffers must have already been freed */
1329 for (i = 0; i < 2; i++) {
1330 if (rq->buf_info[i]) {
1331 for (j = 0; j < rq->rx_ring[i].size; j++)
1332 BUG_ON(rq->buf_info[i][j].page != NULL);
1337 kfree(rq->buf_info[0]);
1339 for (i = 0; i < 2; i++) {
1340 if (rq->rx_ring[i].base) {
1341 pci_free_consistent(adapter->pdev, rq->rx_ring[i].size
1342 * sizeof(struct Vmxnet3_RxDesc),
1343 rq->rx_ring[i].base,
1344 rq->rx_ring[i].basePA);
1345 rq->rx_ring[i].base = NULL;
1347 rq->buf_info[i] = NULL;
1350 if (rq->comp_ring.base) {
1351 pci_free_consistent(adapter->pdev, rq->comp_ring.size *
1352 sizeof(struct Vmxnet3_RxCompDesc),
1353 rq->comp_ring.base, rq->comp_ring.basePA);
1354 rq->comp_ring.base = NULL;
1360 vmxnet3_rq_init(struct vmxnet3_rx_queue *rq,
1361 struct vmxnet3_adapter *adapter)
1365 /* initialize buf_info */
1366 for (i = 0; i < rq->rx_ring[0].size; i++) {
1368 /* 1st buf for a pkt is skbuff */
1369 if (i % adapter->rx_buf_per_pkt == 0) {
1370 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB;
1371 rq->buf_info[0][i].len = adapter->skb_buf_size;
1372 } else { /* subsequent bufs for a pkt is frag */
1373 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE;
1374 rq->buf_info[0][i].len = PAGE_SIZE;
1377 for (i = 0; i < rq->rx_ring[1].size; i++) {
1378 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE;
1379 rq->buf_info[1][i].len = PAGE_SIZE;
1382 /* reset internal state and allocate buffers for both rings */
1383 for (i = 0; i < 2; i++) {
1384 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0;
1385 rq->uncommitted[i] = 0;
1387 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size *
1388 sizeof(struct Vmxnet3_RxDesc));
1389 rq->rx_ring[i].gen = VMXNET3_INIT_GEN;
1391 if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1,
1393 /* at least has 1 rx buffer for the 1st ring */
1396 vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter);
1398 /* reset the comp ring */
1399 rq->comp_ring.next2proc = 0;
1400 memset(rq->comp_ring.base, 0, rq->comp_ring.size *
1401 sizeof(struct Vmxnet3_RxCompDesc));
1402 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1405 rq->rx_ctx.skb = NULL;
1407 /* stats are not reset */
1413 vmxnet3_rq_init_all(struct vmxnet3_adapter *adapter)
1417 for (i = 0; i < adapter->num_rx_queues; i++) {
1418 err = vmxnet3_rq_init(&adapter->rx_queue[i], adapter);
1419 if (unlikely(err)) {
1420 dev_err(&adapter->netdev->dev, "%s: failed to "
1421 "initialize rx queue%i\n",
1422 adapter->netdev->name, i);
1432 vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter)
1436 struct vmxnet3_rx_buf_info *bi;
1438 for (i = 0; i < 2; i++) {
1440 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc);
1441 rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz,
1442 &rq->rx_ring[i].basePA);
1443 if (!rq->rx_ring[i].base) {
1444 printk(KERN_ERR "%s: failed to allocate rx ring %d\n",
1445 adapter->netdev->name, i);
1450 sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc);
1451 rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz,
1452 &rq->comp_ring.basePA);
1453 if (!rq->comp_ring.base) {
1454 printk(KERN_ERR "%s: failed to allocate rx comp ring\n",
1455 adapter->netdev->name);
1459 sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size +
1460 rq->rx_ring[1].size);
1461 bi = kzalloc(sz, GFP_KERNEL);
1463 printk(KERN_ERR "%s: failed to allocate rx bufinfo\n",
1464 adapter->netdev->name);
1467 rq->buf_info[0] = bi;
1468 rq->buf_info[1] = bi + rq->rx_ring[0].size;
1473 vmxnet3_rq_destroy(rq, adapter);
1479 vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter)
1483 for (i = 0; i < adapter->num_rx_queues; i++) {
1484 err = vmxnet3_rq_create(&adapter->rx_queue[i], adapter);
1485 if (unlikely(err)) {
1486 dev_err(&adapter->netdev->dev,
1487 "%s: failed to create rx queue%i\n",
1488 adapter->netdev->name, i);
1494 vmxnet3_rq_destroy_all(adapter);
1499 /* Multiple queue aware polling function for tx and rx */
1502 vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget)
1504 int rcd_done = 0, i;
1505 if (unlikely(adapter->shared->ecr))
1506 vmxnet3_process_events(adapter);
1507 for (i = 0; i < adapter->num_tx_queues; i++)
1508 vmxnet3_tq_tx_complete(&adapter->tx_queue[i], adapter);
1510 for (i = 0; i < adapter->num_rx_queues; i++)
1511 rcd_done += vmxnet3_rq_rx_complete(&adapter->rx_queue[i],
1518 vmxnet3_poll(struct napi_struct *napi, int budget)
1520 struct vmxnet3_rx_queue *rx_queue = container_of(napi,
1521 struct vmxnet3_rx_queue, napi);
1524 rxd_done = vmxnet3_do_poll(rx_queue->adapter, budget);
1526 if (rxd_done < budget) {
1527 napi_complete(napi);
1528 vmxnet3_enable_all_intrs(rx_queue->adapter);
1534 * NAPI polling function for MSI-X mode with multiple Rx queues
1535 * Returns the # of the NAPI credit consumed (# of rx descriptors processed)
1539 vmxnet3_poll_rx_only(struct napi_struct *napi, int budget)
1541 struct vmxnet3_rx_queue *rq = container_of(napi,
1542 struct vmxnet3_rx_queue, napi);
1543 struct vmxnet3_adapter *adapter = rq->adapter;
1546 /* When sharing interrupt with corresponding tx queue, process
1547 * tx completions in that queue as well
1549 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) {
1550 struct vmxnet3_tx_queue *tq =
1551 &adapter->tx_queue[rq - adapter->rx_queue];
1552 vmxnet3_tq_tx_complete(tq, adapter);
1555 rxd_done = vmxnet3_rq_rx_complete(rq, adapter, budget);
1557 if (rxd_done < budget) {
1558 napi_complete(napi);
1559 vmxnet3_enable_intr(adapter, rq->comp_ring.intr_idx);
1565 #ifdef CONFIG_PCI_MSI
1568 * Handle completion interrupts on tx queues
1569 * Returns whether or not the intr is handled
1573 vmxnet3_msix_tx(int irq, void *data)
1575 struct vmxnet3_tx_queue *tq = data;
1576 struct vmxnet3_adapter *adapter = tq->adapter;
1578 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1579 vmxnet3_disable_intr(adapter, tq->comp_ring.intr_idx);
1581 /* Handle the case where only one irq is allocate for all tx queues */
1582 if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
1584 for (i = 0; i < adapter->num_tx_queues; i++) {
1585 struct vmxnet3_tx_queue *txq = &adapter->tx_queue[i];
1586 vmxnet3_tq_tx_complete(txq, adapter);
1589 vmxnet3_tq_tx_complete(tq, adapter);
1591 vmxnet3_enable_intr(adapter, tq->comp_ring.intr_idx);
1598 * Handle completion interrupts on rx queues. Returns whether or not the
1603 vmxnet3_msix_rx(int irq, void *data)
1605 struct vmxnet3_rx_queue *rq = data;
1606 struct vmxnet3_adapter *adapter = rq->adapter;
1608 /* disable intr if needed */
1609 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1610 vmxnet3_disable_intr(adapter, rq->comp_ring.intr_idx);
1611 napi_schedule(&rq->napi);
1617 *----------------------------------------------------------------------------
1619 * vmxnet3_msix_event --
1621 * vmxnet3 msix event intr handler
1624 * whether or not the intr is handled
1626 *----------------------------------------------------------------------------
1630 vmxnet3_msix_event(int irq, void *data)
1632 struct net_device *dev = data;
1633 struct vmxnet3_adapter *adapter = netdev_priv(dev);
1635 /* disable intr if needed */
1636 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1637 vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx);
1639 if (adapter->shared->ecr)
1640 vmxnet3_process_events(adapter);
1642 vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx);
1647 #endif /* CONFIG_PCI_MSI */
1650 /* Interrupt handler for vmxnet3 */
1652 vmxnet3_intr(int irq, void *dev_id)
1654 struct net_device *dev = dev_id;
1655 struct vmxnet3_adapter *adapter = netdev_priv(dev);
1657 if (adapter->intr.type == VMXNET3_IT_INTX) {
1658 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
1659 if (unlikely(icr == 0))
1665 /* disable intr if needed */
1666 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1667 vmxnet3_disable_all_intrs(adapter);
1669 napi_schedule(&adapter->rx_queue[0].napi);
1674 #ifdef CONFIG_NET_POLL_CONTROLLER
1676 /* netpoll callback. */
1678 vmxnet3_netpoll(struct net_device *netdev)
1680 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1682 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1683 vmxnet3_disable_all_intrs(adapter);
1685 vmxnet3_do_poll(adapter, adapter->rx_queue[0].rx_ring[0].size);
1686 vmxnet3_enable_all_intrs(adapter);
1689 #endif /* CONFIG_NET_POLL_CONTROLLER */
1692 vmxnet3_request_irqs(struct vmxnet3_adapter *adapter)
1694 struct vmxnet3_intr *intr = &adapter->intr;
1698 #ifdef CONFIG_PCI_MSI
1699 if (adapter->intr.type == VMXNET3_IT_MSIX) {
1700 for (i = 0; i < adapter->num_tx_queues; i++) {
1701 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
1702 sprintf(adapter->tx_queue[i].name, "%s-tx-%d",
1703 adapter->netdev->name, vector);
1705 intr->msix_entries[vector].vector,
1707 adapter->tx_queue[i].name,
1708 &adapter->tx_queue[i]);
1710 sprintf(adapter->tx_queue[i].name, "%s-rxtx-%d",
1711 adapter->netdev->name, vector);
1714 dev_err(&adapter->netdev->dev,
1715 "Failed to request irq for MSIX, %s, "
1717 adapter->tx_queue[i].name, err);
1721 /* Handle the case where only 1 MSIx was allocated for
1723 if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
1724 for (; i < adapter->num_tx_queues; i++)
1725 adapter->tx_queue[i].comp_ring.intr_idx
1730 adapter->tx_queue[i].comp_ring.intr_idx
1734 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE)
1737 for (i = 0; i < adapter->num_rx_queues; i++) {
1738 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE)
1739 sprintf(adapter->rx_queue[i].name, "%s-rx-%d",
1740 adapter->netdev->name, vector);
1742 sprintf(adapter->rx_queue[i].name, "%s-rxtx-%d",
1743 adapter->netdev->name, vector);
1744 err = request_irq(intr->msix_entries[vector].vector,
1746 adapter->rx_queue[i].name,
1747 &(adapter->rx_queue[i]));
1749 printk(KERN_ERR "Failed to request irq for MSIX"
1751 adapter->rx_queue[i].name, err);
1755 adapter->rx_queue[i].comp_ring.intr_idx = vector++;
1758 sprintf(intr->event_msi_vector_name, "%s-event-%d",
1759 adapter->netdev->name, vector);
1760 err = request_irq(intr->msix_entries[vector].vector,
1761 vmxnet3_msix_event, 0,
1762 intr->event_msi_vector_name, adapter->netdev);
1763 intr->event_intr_idx = vector;
1765 } else if (intr->type == VMXNET3_IT_MSI) {
1766 adapter->num_rx_queues = 1;
1767 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0,
1768 adapter->netdev->name, adapter->netdev);
1771 adapter->num_rx_queues = 1;
1772 err = request_irq(adapter->pdev->irq, vmxnet3_intr,
1773 IRQF_SHARED, adapter->netdev->name,
1775 #ifdef CONFIG_PCI_MSI
1778 intr->num_intrs = vector + 1;
1780 printk(KERN_ERR "Failed to request irq %s (intr type:%d), error"
1781 ":%d\n", adapter->netdev->name, intr->type, err);
1783 /* Number of rx queues will not change after this */
1784 for (i = 0; i < adapter->num_rx_queues; i++) {
1785 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
1787 rq->qid2 = i + adapter->num_rx_queues;
1792 /* init our intr settings */
1793 for (i = 0; i < intr->num_intrs; i++)
1794 intr->mod_levels[i] = UPT1_IML_ADAPTIVE;
1795 if (adapter->intr.type != VMXNET3_IT_MSIX) {
1796 adapter->intr.event_intr_idx = 0;
1797 for (i = 0; i < adapter->num_tx_queues; i++)
1798 adapter->tx_queue[i].comp_ring.intr_idx = 0;
1799 adapter->rx_queue[0].comp_ring.intr_idx = 0;
1802 printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors "
1803 "allocated\n", adapter->netdev->name, intr->type,
1804 intr->mask_mode, intr->num_intrs);
1812 vmxnet3_free_irqs(struct vmxnet3_adapter *adapter)
1814 struct vmxnet3_intr *intr = &adapter->intr;
1815 BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0);
1817 switch (intr->type) {
1818 #ifdef CONFIG_PCI_MSI
1819 case VMXNET3_IT_MSIX:
1823 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
1824 for (i = 0; i < adapter->num_tx_queues; i++) {
1825 free_irq(intr->msix_entries[vector++].vector,
1826 &(adapter->tx_queue[i]));
1827 if (adapter->share_intr == VMXNET3_INTR_TXSHARE)
1832 for (i = 0; i < adapter->num_rx_queues; i++) {
1833 free_irq(intr->msix_entries[vector++].vector,
1834 &(adapter->rx_queue[i]));
1837 free_irq(intr->msix_entries[vector].vector,
1839 BUG_ON(vector >= intr->num_intrs);
1843 case VMXNET3_IT_MSI:
1844 free_irq(adapter->pdev->irq, adapter->netdev);
1846 case VMXNET3_IT_INTX:
1847 free_irq(adapter->pdev->irq, adapter->netdev);
1855 vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
1857 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1858 struct Vmxnet3_DriverShared *shared = adapter->shared;
1859 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1862 /* add vlan rx stripping. */
1863 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) {
1865 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1866 adapter->vlan_grp = grp;
1868 /* update FEATURES to device */
1869 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1870 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1871 VMXNET3_CMD_UPDATE_FEATURE);
1873 * Clear entire vfTable; then enable untagged pkts.
1874 * Note: setting one entry in vfTable to non-zero turns
1875 * on VLAN rx filtering.
1877 for (i = 0; i < VMXNET3_VFT_SIZE; i++)
1880 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1881 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1882 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1884 printk(KERN_ERR "%s: vlan_rx_register when device has "
1885 "no NETIF_F_HW_VLAN_RX\n", netdev->name);
1888 /* remove vlan rx stripping. */
1889 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1890 adapter->vlan_grp = NULL;
1892 if (devRead->misc.uptFeatures & UPT1_F_RXVLAN) {
1895 for (i = 0; i < VMXNET3_VFT_SIZE; i++) {
1896 /* clear entire vfTable; this also disables
1901 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1902 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1904 /* update FEATURES to device */
1905 devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1906 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1907 VMXNET3_CMD_UPDATE_FEATURE);
1914 vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter)
1916 if (adapter->vlan_grp) {
1918 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1919 bool activeVlan = false;
1921 for (vid = 0; vid < VLAN_N_VID; vid++) {
1922 if (vlan_group_get_device(adapter->vlan_grp, vid)) {
1923 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1928 /* continue to allow untagged pkts */
1929 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1936 vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1938 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1939 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1941 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1942 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1943 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1948 vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1950 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1951 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1953 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
1954 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1955 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1960 vmxnet3_copy_mc(struct net_device *netdev)
1963 u32 sz = netdev_mc_count(netdev) * ETH_ALEN;
1965 /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
1967 /* We may be called with BH disabled */
1968 buf = kmalloc(sz, GFP_ATOMIC);
1970 struct netdev_hw_addr *ha;
1973 netdev_for_each_mc_addr(ha, netdev)
1974 memcpy(buf + i++ * ETH_ALEN, ha->addr,
1983 vmxnet3_set_mc(struct net_device *netdev)
1985 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1986 struct Vmxnet3_RxFilterConf *rxConf =
1987 &adapter->shared->devRead.rxFilterConf;
1988 u8 *new_table = NULL;
1989 u32 new_mode = VMXNET3_RXM_UCAST;
1991 if (netdev->flags & IFF_PROMISC)
1992 new_mode |= VMXNET3_RXM_PROMISC;
1994 if (netdev->flags & IFF_BROADCAST)
1995 new_mode |= VMXNET3_RXM_BCAST;
1997 if (netdev->flags & IFF_ALLMULTI)
1998 new_mode |= VMXNET3_RXM_ALL_MULTI;
2000 if (!netdev_mc_empty(netdev)) {
2001 new_table = vmxnet3_copy_mc(netdev);
2003 new_mode |= VMXNET3_RXM_MCAST;
2004 rxConf->mfTableLen = cpu_to_le16(
2005 netdev_mc_count(netdev) * ETH_ALEN);
2006 rxConf->mfTablePA = cpu_to_le64(virt_to_phys(
2009 printk(KERN_INFO "%s: failed to copy mcast list"
2010 ", setting ALL_MULTI\n", netdev->name);
2011 new_mode |= VMXNET3_RXM_ALL_MULTI;
2016 if (!(new_mode & VMXNET3_RXM_MCAST)) {
2017 rxConf->mfTableLen = 0;
2018 rxConf->mfTablePA = 0;
2021 if (new_mode != rxConf->rxMode) {
2022 rxConf->rxMode = cpu_to_le32(new_mode);
2023 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2024 VMXNET3_CMD_UPDATE_RX_MODE);
2027 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2028 VMXNET3_CMD_UPDATE_MAC_FILTERS);
2034 vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter)
2038 for (i = 0; i < adapter->num_rx_queues; i++)
2039 vmxnet3_rq_destroy(&adapter->rx_queue[i], adapter);
2044 * Set up driver_shared based on settings in adapter.
2048 vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
2050 struct Vmxnet3_DriverShared *shared = adapter->shared;
2051 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
2052 struct Vmxnet3_TxQueueConf *tqc;
2053 struct Vmxnet3_RxQueueConf *rqc;
2056 memset(shared, 0, sizeof(*shared));
2058 /* driver settings */
2059 shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC);
2060 devRead->misc.driverInfo.version = cpu_to_le32(
2061 VMXNET3_DRIVER_VERSION_NUM);
2062 devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ?
2063 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64);
2064 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
2065 *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32(
2066 *((u32 *)&devRead->misc.driverInfo.gos));
2067 devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1);
2068 devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1);
2070 devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter));
2071 devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter));
2073 /* set up feature flags */
2074 if (adapter->rxcsum)
2075 devRead->misc.uptFeatures |= UPT1_F_RXCSUM;
2078 devRead->misc.uptFeatures |= UPT1_F_LRO;
2079 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
2081 if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) &&
2082 adapter->vlan_grp) {
2083 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
2086 devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
2087 devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
2088 devRead->misc.queueDescLen = cpu_to_le32(
2089 adapter->num_tx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
2090 adapter->num_rx_queues * sizeof(struct Vmxnet3_RxQueueDesc));
2092 /* tx queue settings */
2093 devRead->misc.numTxQueues = adapter->num_tx_queues;
2094 for (i = 0; i < adapter->num_tx_queues; i++) {
2095 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2096 BUG_ON(adapter->tx_queue[i].tx_ring.base == NULL);
2097 tqc = &adapter->tqd_start[i].conf;
2098 tqc->txRingBasePA = cpu_to_le64(tq->tx_ring.basePA);
2099 tqc->dataRingBasePA = cpu_to_le64(tq->data_ring.basePA);
2100 tqc->compRingBasePA = cpu_to_le64(tq->comp_ring.basePA);
2101 tqc->ddPA = cpu_to_le64(virt_to_phys(tq->buf_info));
2102 tqc->txRingSize = cpu_to_le32(tq->tx_ring.size);
2103 tqc->dataRingSize = cpu_to_le32(tq->data_ring.size);
2104 tqc->compRingSize = cpu_to_le32(tq->comp_ring.size);
2105 tqc->ddLen = cpu_to_le32(
2106 sizeof(struct vmxnet3_tx_buf_info) *
2108 tqc->intrIdx = tq->comp_ring.intr_idx;
2111 /* rx queue settings */
2112 devRead->misc.numRxQueues = adapter->num_rx_queues;
2113 for (i = 0; i < adapter->num_rx_queues; i++) {
2114 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2115 rqc = &adapter->rqd_start[i].conf;
2116 rqc->rxRingBasePA[0] = cpu_to_le64(rq->rx_ring[0].basePA);
2117 rqc->rxRingBasePA[1] = cpu_to_le64(rq->rx_ring[1].basePA);
2118 rqc->compRingBasePA = cpu_to_le64(rq->comp_ring.basePA);
2119 rqc->ddPA = cpu_to_le64(virt_to_phys(
2121 rqc->rxRingSize[0] = cpu_to_le32(rq->rx_ring[0].size);
2122 rqc->rxRingSize[1] = cpu_to_le32(rq->rx_ring[1].size);
2123 rqc->compRingSize = cpu_to_le32(rq->comp_ring.size);
2124 rqc->ddLen = cpu_to_le32(
2125 sizeof(struct vmxnet3_rx_buf_info) *
2126 (rqc->rxRingSize[0] +
2127 rqc->rxRingSize[1]));
2128 rqc->intrIdx = rq->comp_ring.intr_idx;
2132 memset(adapter->rss_conf, 0, sizeof(*adapter->rss_conf));
2135 struct UPT1_RSSConf *rssConf = adapter->rss_conf;
2136 devRead->misc.uptFeatures |= UPT1_F_RSS;
2137 devRead->misc.numRxQueues = adapter->num_rx_queues;
2138 rssConf->hashType = UPT1_RSS_HASH_TYPE_TCP_IPV4 |
2139 UPT1_RSS_HASH_TYPE_IPV4 |
2140 UPT1_RSS_HASH_TYPE_TCP_IPV6 |
2141 UPT1_RSS_HASH_TYPE_IPV6;
2142 rssConf->hashFunc = UPT1_RSS_HASH_FUNC_TOEPLITZ;
2143 rssConf->hashKeySize = UPT1_RSS_MAX_KEY_SIZE;
2144 rssConf->indTableSize = VMXNET3_RSS_IND_TABLE_SIZE;
2145 get_random_bytes(&rssConf->hashKey[0], rssConf->hashKeySize);
2146 for (i = 0; i < rssConf->indTableSize; i++)
2147 rssConf->indTable[i] = i % adapter->num_rx_queues;
2149 devRead->rssConfDesc.confVer = 1;
2150 devRead->rssConfDesc.confLen = sizeof(*rssConf);
2151 devRead->rssConfDesc.confPA = virt_to_phys(rssConf);
2154 #endif /* VMXNET3_RSS */
2157 devRead->intrConf.autoMask = adapter->intr.mask_mode ==
2159 devRead->intrConf.numIntrs = adapter->intr.num_intrs;
2160 for (i = 0; i < adapter->intr.num_intrs; i++)
2161 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];
2163 devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;
2164 devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
2166 /* rx filter settings */
2167 devRead->rxFilterConf.rxMode = 0;
2168 vmxnet3_restore_vlan(adapter);
2169 /* the rest are already zeroed */
2174 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
2179 dev_dbg(&adapter->netdev->dev, "%s: skb_buf_size %d, rx_buf_per_pkt %d,"
2180 " ring sizes %u %u %u\n", adapter->netdev->name,
2181 adapter->skb_buf_size, adapter->rx_buf_per_pkt,
2182 adapter->tx_queue[0].tx_ring.size,
2183 adapter->rx_queue[0].rx_ring[0].size,
2184 adapter->rx_queue[0].rx_ring[1].size);
2186 vmxnet3_tq_init_all(adapter);
2187 err = vmxnet3_rq_init_all(adapter);
2189 printk(KERN_ERR "Failed to init rx queue for %s: error %d\n",
2190 adapter->netdev->name, err);
2194 err = vmxnet3_request_irqs(adapter);
2196 printk(KERN_ERR "Failed to setup irq for %s: error %d\n",
2197 adapter->netdev->name, err);
2201 vmxnet3_setup_driver_shared(adapter);
2203 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
2204 adapter->shared_pa));
2205 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
2206 adapter->shared_pa));
2207 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2208 VMXNET3_CMD_ACTIVATE_DEV);
2209 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2212 printk(KERN_ERR "Failed to activate dev %s: error %u\n",
2213 adapter->netdev->name, ret);
2218 for (i = 0; i < adapter->num_rx_queues; i++) {
2219 VMXNET3_WRITE_BAR0_REG(adapter,
2220 VMXNET3_REG_RXPROD + i * VMXNET3_REG_ALIGN,
2221 adapter->rx_queue[i].rx_ring[0].next2fill);
2222 VMXNET3_WRITE_BAR0_REG(adapter, (VMXNET3_REG_RXPROD2 +
2223 (i * VMXNET3_REG_ALIGN)),
2224 adapter->rx_queue[i].rx_ring[1].next2fill);
2227 /* Apply the rx filter settins last. */
2228 vmxnet3_set_mc(adapter->netdev);
2231 * Check link state when first activating device. It will start the
2232 * tx queue if the link is up.
2234 vmxnet3_check_link(adapter, true);
2235 for (i = 0; i < adapter->num_rx_queues; i++)
2236 napi_enable(&adapter->rx_queue[i].napi);
2237 vmxnet3_enable_all_intrs(adapter);
2238 clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2242 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0);
2243 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0);
2244 vmxnet3_free_irqs(adapter);
2247 /* free up buffers we allocated */
2248 vmxnet3_rq_cleanup_all(adapter);
2254 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
2256 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
2261 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
2264 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
2268 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2269 VMXNET3_CMD_QUIESCE_DEV);
2270 vmxnet3_disable_all_intrs(adapter);
2272 for (i = 0; i < adapter->num_rx_queues; i++)
2273 napi_disable(&adapter->rx_queue[i].napi);
2274 netif_tx_disable(adapter->netdev);
2275 adapter->link_speed = 0;
2276 netif_carrier_off(adapter->netdev);
2278 vmxnet3_tq_cleanup_all(adapter);
2279 vmxnet3_rq_cleanup_all(adapter);
2280 vmxnet3_free_irqs(adapter);
2286 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2291 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp);
2293 tmp = (mac[5] << 8) | mac[4];
2294 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp);
2299 vmxnet3_set_mac_addr(struct net_device *netdev, void *p)
2301 struct sockaddr *addr = p;
2302 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2304 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2305 vmxnet3_write_mac_addr(adapter, addr->sa_data);
2311 /* ==================== initialization and cleanup routines ============ */
2314 vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64)
2317 unsigned long mmio_start, mmio_len;
2318 struct pci_dev *pdev = adapter->pdev;
2320 err = pci_enable_device(pdev);
2322 printk(KERN_ERR "Failed to enable adapter %s: error %d\n",
2323 pci_name(pdev), err);
2327 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
2328 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
2329 printk(KERN_ERR "pci_set_consistent_dma_mask failed "
2330 "for adapter %s\n", pci_name(pdev));
2336 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
2337 printk(KERN_ERR "pci_set_dma_mask failed for adapter "
2338 "%s\n", pci_name(pdev));
2345 err = pci_request_selected_regions(pdev, (1 << 2) - 1,
2346 vmxnet3_driver_name);
2348 printk(KERN_ERR "Failed to request region for adapter %s: "
2349 "error %d\n", pci_name(pdev), err);
2353 pci_set_master(pdev);
2355 mmio_start = pci_resource_start(pdev, 0);
2356 mmio_len = pci_resource_len(pdev, 0);
2357 adapter->hw_addr0 = ioremap(mmio_start, mmio_len);
2358 if (!adapter->hw_addr0) {
2359 printk(KERN_ERR "Failed to map bar0 for adapter %s\n",
2365 mmio_start = pci_resource_start(pdev, 1);
2366 mmio_len = pci_resource_len(pdev, 1);
2367 adapter->hw_addr1 = ioremap(mmio_start, mmio_len);
2368 if (!adapter->hw_addr1) {
2369 printk(KERN_ERR "Failed to map bar1 for adapter %s\n",
2377 iounmap(adapter->hw_addr0);
2379 pci_release_selected_regions(pdev, (1 << 2) - 1);
2381 pci_disable_device(pdev);
2387 vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter)
2389 BUG_ON(!adapter->pdev);
2391 iounmap(adapter->hw_addr0);
2392 iounmap(adapter->hw_addr1);
2393 pci_release_selected_regions(adapter->pdev, (1 << 2) - 1);
2394 pci_disable_device(adapter->pdev);
2399 vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2401 size_t sz, i, ring0_size, ring1_size, comp_size;
2402 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[0];
2405 if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE -
2406 VMXNET3_MAX_ETH_HDR_SIZE) {
2407 adapter->skb_buf_size = adapter->netdev->mtu +
2408 VMXNET3_MAX_ETH_HDR_SIZE;
2409 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE)
2410 adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE;
2412 adapter->rx_buf_per_pkt = 1;
2414 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE;
2415 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE +
2416 VMXNET3_MAX_ETH_HDR_SIZE;
2417 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE;
2421 * for simplicity, force the ring0 size to be a multiple of
2422 * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
2424 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2425 ring0_size = adapter->rx_queue[0].rx_ring[0].size;
2426 ring0_size = (ring0_size + sz - 1) / sz * sz;
2427 ring0_size = min_t(u32, rq->rx_ring[0].size, VMXNET3_RX_RING_MAX_SIZE /
2429 ring1_size = adapter->rx_queue[0].rx_ring[1].size;
2430 comp_size = ring0_size + ring1_size;
2432 for (i = 0; i < adapter->num_rx_queues; i++) {
2433 rq = &adapter->rx_queue[i];
2434 rq->rx_ring[0].size = ring0_size;
2435 rq->rx_ring[1].size = ring1_size;
2436 rq->comp_ring.size = comp_size;
2442 vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size,
2443 u32 rx_ring_size, u32 rx_ring2_size)
2447 for (i = 0; i < adapter->num_tx_queues; i++) {
2448 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2449 tq->tx_ring.size = tx_ring_size;
2450 tq->data_ring.size = tx_ring_size;
2451 tq->comp_ring.size = tx_ring_size;
2452 tq->shared = &adapter->tqd_start[i].ctrl;
2454 tq->adapter = adapter;
2456 err = vmxnet3_tq_create(tq, adapter);
2458 * Too late to change num_tx_queues. We cannot do away with
2459 * lesser number of queues than what we asked for
2465 adapter->rx_queue[0].rx_ring[0].size = rx_ring_size;
2466 adapter->rx_queue[0].rx_ring[1].size = rx_ring2_size;
2467 vmxnet3_adjust_rx_ring_size(adapter);
2468 for (i = 0; i < adapter->num_rx_queues; i++) {
2469 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2470 /* qid and qid2 for rx queues will be assigned later when num
2471 * of rx queues is finalized after allocating intrs */
2472 rq->shared = &adapter->rqd_start[i].ctrl;
2473 rq->adapter = adapter;
2474 err = vmxnet3_rq_create(rq, adapter);
2477 printk(KERN_ERR "Could not allocate any rx"
2478 "queues. Aborting.\n");
2481 printk(KERN_INFO "Number of rx queues changed "
2483 adapter->num_rx_queues = i;
2491 vmxnet3_tq_destroy_all(adapter);
2496 vmxnet3_open(struct net_device *netdev)
2498 struct vmxnet3_adapter *adapter;
2501 adapter = netdev_priv(netdev);
2503 for (i = 0; i < adapter->num_tx_queues; i++)
2504 spin_lock_init(&adapter->tx_queue[i].tx_lock);
2506 err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE,
2507 VMXNET3_DEF_RX_RING_SIZE,
2508 VMXNET3_DEF_RX_RING_SIZE);
2512 err = vmxnet3_activate_dev(adapter);
2519 vmxnet3_rq_destroy_all(adapter);
2520 vmxnet3_tq_destroy_all(adapter);
2527 vmxnet3_close(struct net_device *netdev)
2529 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2532 * Reset_work may be in the middle of resetting the device, wait for its
2535 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2538 vmxnet3_quiesce_dev(adapter);
2540 vmxnet3_rq_destroy_all(adapter);
2541 vmxnet3_tq_destroy_all(adapter);
2543 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2551 vmxnet3_force_close(struct vmxnet3_adapter *adapter)
2556 * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2557 * vmxnet3_close() will deadlock.
2559 BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state));
2561 /* we need to enable NAPI, otherwise dev_close will deadlock */
2562 for (i = 0; i < adapter->num_rx_queues; i++)
2563 napi_enable(&adapter->rx_queue[i].napi);
2564 dev_close(adapter->netdev);
2569 vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)
2571 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2574 if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU)
2577 if (new_mtu > 1500 && !adapter->jumbo_frame)
2580 netdev->mtu = new_mtu;
2583 * Reset_work may be in the middle of resetting the device, wait for its
2586 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2589 if (netif_running(netdev)) {
2590 vmxnet3_quiesce_dev(adapter);
2591 vmxnet3_reset_dev(adapter);
2593 /* we need to re-create the rx queue based on the new mtu */
2594 vmxnet3_rq_destroy_all(adapter);
2595 vmxnet3_adjust_rx_ring_size(adapter);
2596 err = vmxnet3_rq_create_all(adapter);
2598 printk(KERN_ERR "%s: failed to re-create rx queues,"
2599 " error %d. Closing it.\n", netdev->name, err);
2603 err = vmxnet3_activate_dev(adapter);
2605 printk(KERN_ERR "%s: failed to re-activate, error %d. "
2606 "Closing it\n", netdev->name, err);
2612 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2614 vmxnet3_force_close(adapter);
2621 vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
2623 struct net_device *netdev = adapter->netdev;
2625 netdev->features = NETIF_F_SG |
2627 NETIF_F_HW_VLAN_TX |
2628 NETIF_F_HW_VLAN_RX |
2629 NETIF_F_HW_VLAN_FILTER |
2634 printk(KERN_INFO "features: sg csum vlan jf tso tsoIPv6 lro");
2636 adapter->rxcsum = true;
2637 adapter->jumbo_frame = true;
2638 adapter->lro = true;
2641 netdev->features |= NETIF_F_HIGHDMA;
2645 netdev->vlan_features = netdev->features;
2651 vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2655 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
2658 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
2659 mac[4] = tmp & 0xff;
2660 mac[5] = (tmp >> 8) & 0xff;
2663 #ifdef CONFIG_PCI_MSI
2666 * Enable MSIx vectors.
2668 * 0 on successful enabling of required vectors,
2669 * VMXNET3_LINUX_MIN_MSIX_VECT when only minumum number of vectors required
2671 * number of vectors which can be enabled otherwise (this number is smaller
2672 * than VMXNET3_LINUX_MIN_MSIX_VECT)
2676 vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter,
2679 int err = 0, vector_threshold;
2680 vector_threshold = VMXNET3_LINUX_MIN_MSIX_VECT;
2682 while (vectors >= vector_threshold) {
2683 err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries,
2686 adapter->intr.num_intrs = vectors;
2688 } else if (err < 0) {
2689 printk(KERN_ERR "Failed to enable MSI-X for %s, error"
2690 " %d\n", adapter->netdev->name, err);
2692 } else if (err < vector_threshold) {
2695 /* If fails to enable required number of MSI-x vectors
2696 * try enabling 3 of them. One each for rx, tx and event
2698 vectors = vector_threshold;
2699 printk(KERN_ERR "Failed to enable %d MSI-X for %s, try"
2700 " %d instead\n", vectors, adapter->netdev->name,
2705 printk(KERN_INFO "Number of MSI-X interrupts which can be allocatedi"
2706 " are lower than min threshold required.\n");
2711 #endif /* CONFIG_PCI_MSI */
2714 vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2719 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2720 VMXNET3_CMD_GET_CONF_INTR);
2721 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2722 adapter->intr.type = cfg & 0x3;
2723 adapter->intr.mask_mode = (cfg >> 2) & 0x3;
2725 if (adapter->intr.type == VMXNET3_IT_AUTO) {
2726 adapter->intr.type = VMXNET3_IT_MSIX;
2729 #ifdef CONFIG_PCI_MSI
2730 if (adapter->intr.type == VMXNET3_IT_MSIX) {
2731 int vector, err = 0;
2733 adapter->intr.num_intrs = (adapter->share_intr ==
2734 VMXNET3_INTR_TXSHARE) ? 1 :
2735 adapter->num_tx_queues;
2736 adapter->intr.num_intrs += (adapter->share_intr ==
2737 VMXNET3_INTR_BUDDYSHARE) ? 0 :
2738 adapter->num_rx_queues;
2739 adapter->intr.num_intrs += 1; /* for link event */
2741 adapter->intr.num_intrs = (adapter->intr.num_intrs >
2742 VMXNET3_LINUX_MIN_MSIX_VECT
2743 ? adapter->intr.num_intrs :
2744 VMXNET3_LINUX_MIN_MSIX_VECT);
2746 for (vector = 0; vector < adapter->intr.num_intrs; vector++)
2747 adapter->intr.msix_entries[vector].entry = vector;
2749 err = vmxnet3_acquire_msix_vectors(adapter,
2750 adapter->intr.num_intrs);
2751 /* If we cannot allocate one MSIx vector per queue
2752 * then limit the number of rx queues to 1
2754 if (err == VMXNET3_LINUX_MIN_MSIX_VECT) {
2755 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE
2756 || adapter->num_rx_queues != 2) {
2757 adapter->share_intr = VMXNET3_INTR_TXSHARE;
2758 printk(KERN_ERR "Number of rx queues : 1\n");
2759 adapter->num_rx_queues = 1;
2760 adapter->intr.num_intrs =
2761 VMXNET3_LINUX_MIN_MSIX_VECT;
2768 /* If we cannot allocate MSIx vectors use only one rx queue */
2769 printk(KERN_INFO "Failed to enable MSI-X for %s, error %d."
2770 "#rx queues : 1, try MSI\n", adapter->netdev->name, err);
2772 adapter->intr.type = VMXNET3_IT_MSI;
2775 if (adapter->intr.type == VMXNET3_IT_MSI) {
2777 err = pci_enable_msi(adapter->pdev);
2779 adapter->num_rx_queues = 1;
2780 adapter->intr.num_intrs = 1;
2784 #endif /* CONFIG_PCI_MSI */
2786 adapter->num_rx_queues = 1;
2787 printk(KERN_INFO "Using INTx interrupt, #Rx queues: 1.\n");
2788 adapter->intr.type = VMXNET3_IT_INTX;
2790 /* INT-X related setting */
2791 adapter->intr.num_intrs = 1;
2796 vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter)
2798 if (adapter->intr.type == VMXNET3_IT_MSIX)
2799 pci_disable_msix(adapter->pdev);
2800 else if (adapter->intr.type == VMXNET3_IT_MSI)
2801 pci_disable_msi(adapter->pdev);
2803 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);
2808 vmxnet3_tx_timeout(struct net_device *netdev)
2810 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2811 adapter->tx_timeout_count++;
2813 printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name);
2814 schedule_work(&adapter->work);
2815 netif_wake_queue(adapter->netdev);
2820 vmxnet3_reset_work(struct work_struct *data)
2822 struct vmxnet3_adapter *adapter;
2824 adapter = container_of(data, struct vmxnet3_adapter, work);
2826 /* if another thread is resetting the device, no need to proceed */
2827 if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2830 /* if the device is closed, we must leave it alone */
2832 if (netif_running(adapter->netdev)) {
2833 printk(KERN_INFO "%s: resetting\n", adapter->netdev->name);
2834 vmxnet3_quiesce_dev(adapter);
2835 vmxnet3_reset_dev(adapter);
2836 vmxnet3_activate_dev(adapter);
2838 printk(KERN_INFO "%s: already closed\n", adapter->netdev->name);
2842 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2846 static int __devinit
2847 vmxnet3_probe_device(struct pci_dev *pdev,
2848 const struct pci_device_id *id)
2850 static const struct net_device_ops vmxnet3_netdev_ops = {
2851 .ndo_open = vmxnet3_open,
2852 .ndo_stop = vmxnet3_close,
2853 .ndo_start_xmit = vmxnet3_xmit_frame,
2854 .ndo_set_mac_address = vmxnet3_set_mac_addr,
2855 .ndo_change_mtu = vmxnet3_change_mtu,
2856 .ndo_get_stats = vmxnet3_get_stats,
2857 .ndo_tx_timeout = vmxnet3_tx_timeout,
2858 .ndo_set_multicast_list = vmxnet3_set_mc,
2859 .ndo_vlan_rx_register = vmxnet3_vlan_rx_register,
2860 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid,
2861 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid,
2862 #ifdef CONFIG_NET_POLL_CONTROLLER
2863 .ndo_poll_controller = vmxnet3_netpoll,
2867 bool dma64 = false; /* stupid gcc */
2869 struct net_device *netdev;
2870 struct vmxnet3_adapter *adapter;
2878 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
2879 (int)num_online_cpus());
2885 num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES,
2886 (int)num_online_cpus());
2890 netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter),
2891 max(num_tx_queues, num_rx_queues));
2892 printk(KERN_INFO "# of Tx queues : %d, # of Rx queues : %d\n",
2893 num_tx_queues, num_rx_queues);
2896 printk(KERN_ERR "Failed to alloc ethernet device for adapter "
2897 "%s\n", pci_name(pdev));
2901 pci_set_drvdata(pdev, netdev);
2902 adapter = netdev_priv(netdev);
2903 adapter->netdev = netdev;
2904 adapter->pdev = pdev;
2906 adapter->shared = pci_alloc_consistent(adapter->pdev,
2907 sizeof(struct Vmxnet3_DriverShared),
2908 &adapter->shared_pa);
2909 if (!adapter->shared) {
2910 printk(KERN_ERR "Failed to allocate memory for %s\n",
2913 goto err_alloc_shared;
2916 adapter->num_rx_queues = num_rx_queues;
2917 adapter->num_tx_queues = num_tx_queues;
2919 size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
2920 size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues;
2921 adapter->tqd_start = pci_alloc_consistent(adapter->pdev, size,
2922 &adapter->queue_desc_pa);
2924 if (!adapter->tqd_start) {
2925 printk(KERN_ERR "Failed to allocate memory for %s\n",
2928 goto err_alloc_queue_desc;
2930 adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start +
2931 adapter->num_tx_queues);
2933 adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL);
2934 if (adapter->pm_conf == NULL) {
2935 printk(KERN_ERR "Failed to allocate memory for %s\n",
2943 adapter->rss_conf = kmalloc(sizeof(struct UPT1_RSSConf), GFP_KERNEL);
2944 if (adapter->rss_conf == NULL) {
2945 printk(KERN_ERR "Failed to allocate memory for %s\n",
2950 #endif /* VMXNET3_RSS */
2952 err = vmxnet3_alloc_pci_resources(adapter, &dma64);
2956 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
2958 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1);
2960 printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter"
2961 " %s\n", ver, pci_name(pdev));
2966 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
2968 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1);
2970 printk(KERN_ERR "Incompatible upt version (0x%x) for "
2971 "adapter %s\n", ver, pci_name(pdev));
2976 vmxnet3_declare_features(adapter, dma64);
2978 adapter->dev_number = atomic_read(&devices_found);
2980 adapter->share_intr = irq_share_mode;
2981 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE &&
2982 adapter->num_tx_queues != adapter->num_rx_queues)
2983 adapter->share_intr = VMXNET3_INTR_DONTSHARE;
2985 vmxnet3_alloc_intr_resources(adapter);
2988 if (adapter->num_rx_queues > 1 &&
2989 adapter->intr.type == VMXNET3_IT_MSIX) {
2990 adapter->rss = true;
2991 printk(KERN_INFO "RSS is enabled.\n");
2993 adapter->rss = false;
2997 vmxnet3_read_mac_addr(adapter, mac);
2998 memcpy(netdev->dev_addr, mac, netdev->addr_len);
3000 netdev->netdev_ops = &vmxnet3_netdev_ops;
3001 vmxnet3_set_ethtool_ops(netdev);
3002 netdev->watchdog_timeo = 5 * HZ;
3004 INIT_WORK(&adapter->work, vmxnet3_reset_work);
3006 if (adapter->intr.type == VMXNET3_IT_MSIX) {
3008 for (i = 0; i < adapter->num_rx_queues; i++) {
3009 netif_napi_add(adapter->netdev,
3010 &adapter->rx_queue[i].napi,
3011 vmxnet3_poll_rx_only, 64);
3014 netif_napi_add(adapter->netdev, &adapter->rx_queue[0].napi,
3018 netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
3019 netif_set_real_num_rx_queues(adapter->netdev, adapter->num_rx_queues);
3021 SET_NETDEV_DEV(netdev, &pdev->dev);
3022 err = register_netdev(netdev);
3025 printk(KERN_ERR "Failed to register adapter %s\n",
3030 set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
3031 vmxnet3_check_link(adapter, false);
3032 atomic_inc(&devices_found);
3036 vmxnet3_free_intr_resources(adapter);
3038 vmxnet3_free_pci_resources(adapter);
3041 kfree(adapter->rss_conf);
3044 kfree(adapter->pm_conf);
3046 pci_free_consistent(adapter->pdev, size, adapter->tqd_start,
3047 adapter->queue_desc_pa);
3048 err_alloc_queue_desc:
3049 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
3050 adapter->shared, adapter->shared_pa);
3052 pci_set_drvdata(pdev, NULL);
3053 free_netdev(netdev);
3058 static void __devexit
3059 vmxnet3_remove_device(struct pci_dev *pdev)
3061 struct net_device *netdev = pci_get_drvdata(pdev);
3062 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3068 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
3069 (int)num_online_cpus());
3074 cancel_work_sync(&adapter->work);
3076 unregister_netdev(netdev);
3078 vmxnet3_free_intr_resources(adapter);
3079 vmxnet3_free_pci_resources(adapter);
3081 kfree(adapter->rss_conf);
3083 kfree(adapter->pm_conf);
3085 size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
3086 size += sizeof(struct Vmxnet3_RxQueueDesc) * num_rx_queues;
3087 pci_free_consistent(adapter->pdev, size, adapter->tqd_start,
3088 adapter->queue_desc_pa);
3089 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
3090 adapter->shared, adapter->shared_pa);
3091 free_netdev(netdev);
3098 vmxnet3_suspend(struct device *device)
3100 struct pci_dev *pdev = to_pci_dev(device);
3101 struct net_device *netdev = pci_get_drvdata(pdev);
3102 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3103 struct Vmxnet3_PMConf *pmConf;
3104 struct ethhdr *ehdr;
3105 struct arphdr *ahdr;
3107 struct in_device *in_dev;
3108 struct in_ifaddr *ifa;
3111 if (!netif_running(netdev))
3114 vmxnet3_disable_all_intrs(adapter);
3115 vmxnet3_free_irqs(adapter);
3116 vmxnet3_free_intr_resources(adapter);
3118 netif_device_detach(netdev);
3119 netif_tx_stop_all_queues(netdev);
3121 /* Create wake-up filters. */
3122 pmConf = adapter->pm_conf;
3123 memset(pmConf, 0, sizeof(*pmConf));
3125 if (adapter->wol & WAKE_UCAST) {
3126 pmConf->filters[i].patternSize = ETH_ALEN;
3127 pmConf->filters[i].maskSize = 1;
3128 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN);
3129 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */
3131 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3135 if (adapter->wol & WAKE_ARP) {
3136 in_dev = in_dev_get(netdev);
3140 ifa = (struct in_ifaddr *)in_dev->ifa_list;
3144 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/
3145 sizeof(struct arphdr) + /* ARP header */
3146 2 * ETH_ALEN + /* 2 Ethernet addresses*/
3147 2 * sizeof(u32); /*2 IPv4 addresses */
3148 pmConf->filters[i].maskSize =
3149 (pmConf->filters[i].patternSize - 1) / 8 + 1;
3151 /* ETH_P_ARP in Ethernet header. */
3152 ehdr = (struct ethhdr *)pmConf->filters[i].pattern;
3153 ehdr->h_proto = htons(ETH_P_ARP);
3155 /* ARPOP_REQUEST in ARP header. */
3156 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN];
3157 ahdr->ar_op = htons(ARPOP_REQUEST);
3158 arpreq = (u8 *)(ahdr + 1);
3160 /* The Unicast IPv4 address in 'tip' field. */
3161 arpreq += 2 * ETH_ALEN + sizeof(u32);
3162 *(u32 *)arpreq = ifa->ifa_address;
3164 /* The mask for the relevant bits. */
3165 pmConf->filters[i].mask[0] = 0x00;
3166 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */
3167 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */
3168 pmConf->filters[i].mask[3] = 0x00;
3169 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */
3170 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */
3173 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3178 if (adapter->wol & WAKE_MAGIC)
3179 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC;
3181 pmConf->numFilters = i;
3183 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
3184 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
3186 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys(
3189 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3190 VMXNET3_CMD_UPDATE_PMCFG);
3192 pci_save_state(pdev);
3193 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
3195 pci_disable_device(pdev);
3196 pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
3203 vmxnet3_resume(struct device *device)
3206 struct pci_dev *pdev = to_pci_dev(device);
3207 struct net_device *netdev = pci_get_drvdata(pdev);
3208 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3209 struct Vmxnet3_PMConf *pmConf;
3211 if (!netif_running(netdev))
3214 /* Destroy wake-up filters. */
3215 pmConf = adapter->pm_conf;
3216 memset(pmConf, 0, sizeof(*pmConf));
3218 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
3219 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
3221 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys(
3224 netif_device_attach(netdev);
3225 pci_set_power_state(pdev, PCI_D0);
3226 pci_restore_state(pdev);
3227 err = pci_enable_device_mem(pdev);
3231 pci_enable_wake(pdev, PCI_D0, 0);
3233 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3234 VMXNET3_CMD_UPDATE_PMCFG);
3235 vmxnet3_alloc_intr_resources(adapter);
3236 vmxnet3_request_irqs(adapter);
3237 vmxnet3_enable_all_intrs(adapter);
3242 static const struct dev_pm_ops vmxnet3_pm_ops = {
3243 .suspend = vmxnet3_suspend,
3244 .resume = vmxnet3_resume,
3248 static struct pci_driver vmxnet3_driver = {
3249 .name = vmxnet3_driver_name,
3250 .id_table = vmxnet3_pciid_table,
3251 .probe = vmxnet3_probe_device,
3252 .remove = __devexit_p(vmxnet3_remove_device),
3254 .driver.pm = &vmxnet3_pm_ops,
3260 vmxnet3_init_module(void)
3262 printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC,
3263 VMXNET3_DRIVER_VERSION_REPORT);
3264 return pci_register_driver(&vmxnet3_driver);
3267 module_init(vmxnet3_init_module);
3271 vmxnet3_exit_module(void)
3273 pci_unregister_driver(&vmxnet3_driver);
3276 module_exit(vmxnet3_exit_module);
3278 MODULE_AUTHOR("VMware, Inc.");
3279 MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC);
3280 MODULE_LICENSE("GPL v2");
3281 MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING);