drivers/net/ixgbe/ixgbe_ethtool.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2011 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 /* ethtool support for ixgbe */
  29
  30 #include <linux/interrupt.h>
  31 #include <linux/types.h>
  32 #include <linux/module.h>
  33 #include <linux/slab.h>
  34 #include <linux/pci.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/ethtool.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/uaccess.h>
  39
  40 #include "ixgbe.h"
  41
  42
  43 #define IXGBE_ALL_RAR_ENTRIES 16
  44
  45 enum {NETDEV_STATS, IXGBE_STATS};
  46
  47 struct ixgbe_stats {
  48         char stat_string[ETH_GSTRING_LEN];
  49         int type;
  50         int sizeof_stat;
  51         int stat_offset;
  52 };
  53
  54 #define IXGBE_STAT(m)           IXGBE_STATS, \
  55                                 sizeof(((struct ixgbe_adapter *)0)->m), \
  56                                 offsetof(struct ixgbe_adapter, m)
  57 #define IXGBE_NETDEV_STAT(m)    NETDEV_STATS, \
  58                                 sizeof(((struct rtnl_link_stats64 *)0)->m), \
  59                                 offsetof(struct rtnl_link_stats64, m)
  60
  61 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
  62         {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)},
  63         {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)},
  64         {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)},
  65         {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)},
  66         {"rx_pkts_nic", IXGBE_STAT(stats.gprc)},
  67         {"tx_pkts_nic", IXGBE_STAT(stats.gptc)},
  68         {"rx_bytes_nic", IXGBE_STAT(stats.gorc)},
  69         {"tx_bytes_nic", IXGBE_STAT(stats.gotc)},
  70         {"lsc_int", IXGBE_STAT(lsc_int)},
  71         {"tx_busy", IXGBE_STAT(tx_busy)},
  72         {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
  73         {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)},
  74         {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)},
  75         {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)},
  76         {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)},
  77         {"multicast", IXGBE_NETDEV_STAT(multicast)},
  78         {"broadcast", IXGBE_STAT(stats.bprc)},
  79         {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
  80         {"collisions", IXGBE_NETDEV_STAT(collisions)},
  81         {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)},
  82         {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)},
  83         {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)},
  84         {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)},
  85         {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)},
  86         {"fdir_match", IXGBE_STAT(stats.fdirmatch)},
  87         {"fdir_miss", IXGBE_STAT(stats.fdirmiss)},
  88         {"fdir_overflow", IXGBE_STAT(fdir_overflow)},
  89         {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)},
  90         {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)},
  91         {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)},
  92         {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)},
  93         {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)},
  94         {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)},
  95         {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
  96         {"tx_restart_queue", IXGBE_STAT(restart_queue)},
  97         {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
  98         {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
  99         {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
 100         {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
 101         {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
 102         {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
 103         {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
 104         {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
 105         {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
 106         {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
 107         {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)},
 108         {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)},
 109         {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)},
 110         {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)},
 111 #ifdef IXGBE_FCOE
 112         {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)},
 113         {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)},
 114         {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)},
 115         {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)},
 116         {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)},
 117         {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)},
 118 #endif /* IXGBE_FCOE */
 119 };
 120
 121 #define IXGBE_QUEUE_STATS_LEN \
 122         ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
 123         ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
 124         (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
 125 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
 126 #define IXGBE_PB_STATS_LEN ( \
 127                  (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
 128                  IXGBE_FLAG_DCB_ENABLED) ? \
 129                  (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
 130                   sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
 131                   sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
 132                   sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
 133                   / sizeof(u64) : 0)
 134 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
 135                          IXGBE_PB_STATS_LEN + \
 136                          IXGBE_QUEUE_STATS_LEN)
 137
 138 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
 139         "Register test  (offline)", "Eeprom test    (offline)",
 140         "Interrupt test (offline)", "Loopback test  (offline)",
 141         "Link test   (on/offline)"
 142 };
 143 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN
 144
 145 static int ixgbe_get_settings(struct net_device *netdev,
 146                               struct ethtool_cmd *ecmd)
 147 {
 148         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 149         struct ixgbe_hw *hw = &adapter->hw;
 150         u32 link_speed = 0;
 151         bool link_up;
 152
 153         ecmd->supported = SUPPORTED_10000baseT_Full;
 154         ecmd->autoneg = AUTONEG_ENABLE;
 155         ecmd->transceiver = XCVR_EXTERNAL;
 156         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 157             (hw->phy.multispeed_fiber)) {
 158                 ecmd->supported |= (SUPPORTED_1000baseT_Full |
 159                                     SUPPORTED_Autoneg);
 160
 161                 switch (hw->mac.type) {
 162                 case ixgbe_mac_X540:
 163                         ecmd->supported |= SUPPORTED_100baseT_Full;
 164                         break;
 165                 default:
 166                         break;
 167                 }
 168
 169                 ecmd->advertising = ADVERTISED_Autoneg;
 170                 if (hw->phy.autoneg_advertised) {
 171                         if (hw->phy.autoneg_advertised &
 172                             IXGBE_LINK_SPEED_100_FULL)
 173                                 ecmd->advertising |= ADVERTISED_100baseT_Full;
 174                         if (hw->phy.autoneg_advertised &
 175                             IXGBE_LINK_SPEED_10GB_FULL)
 176                                 ecmd->advertising |= ADVERTISED_10000baseT_Full;
 177                         if (hw->phy.autoneg_advertised &
 178                             IXGBE_LINK_SPEED_1GB_FULL)
 179                                 ecmd->advertising |= ADVERTISED_1000baseT_Full;
 180                 } else {
 181                         /*
 182                          * Default advertised modes in case
 183                          * phy.autoneg_advertised isn't set.
 184                          */
 185                         ecmd->advertising |= (ADVERTISED_10000baseT_Full |
 186                                               ADVERTISED_1000baseT_Full);
 187                         if (hw->mac.type == ixgbe_mac_X540)
 188                                 ecmd->advertising |= ADVERTISED_100baseT_Full;
 189                 }
 190
 191                 if (hw->phy.media_type == ixgbe_media_type_copper) {
 192                         ecmd->supported |= SUPPORTED_TP;
 193                         ecmd->advertising |= ADVERTISED_TP;
 194                         ecmd->port = PORT_TP;
 195                 } else {
 196                         ecmd->supported |= SUPPORTED_FIBRE;
 197                         ecmd->advertising |= ADVERTISED_FIBRE;
 198                         ecmd->port = PORT_FIBRE;
 199                 }
 200         } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
 201                 /* Set as FIBRE until SERDES defined in kernel */
 202                 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
 203                         ecmd->supported = (SUPPORTED_1000baseT_Full |
 204                                            SUPPORTED_FIBRE);
 205                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 206                                              ADVERTISED_FIBRE);
 207                         ecmd->port = PORT_FIBRE;
 208                         ecmd->autoneg = AUTONEG_DISABLE;
 209                 } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE) ||
 210                            (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) {
 211                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 212                                             SUPPORTED_Autoneg |
 213                                             SUPPORTED_FIBRE);
 214                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 215                                              ADVERTISED_1000baseT_Full |
 216                                              ADVERTISED_Autoneg |
 217                                              ADVERTISED_FIBRE);
 218                         ecmd->port = PORT_FIBRE;
 219                 } else {
 220                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
 221                                             SUPPORTED_FIBRE);
 222                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
 223                                              ADVERTISED_1000baseT_Full |
 224                                              ADVERTISED_FIBRE);
 225                         ecmd->port = PORT_FIBRE;
 226                 }
 227         } else {
 228                 ecmd->supported |= SUPPORTED_FIBRE;
 229                 ecmd->advertising = (ADVERTISED_10000baseT_Full |
 230                                      ADVERTISED_FIBRE);
 231                 ecmd->port = PORT_FIBRE;
 232                 ecmd->autoneg = AUTONEG_DISABLE;
 233         }
 234
 235         /* Get PHY type */
 236         switch (adapter->hw.phy.type) {
 237         case ixgbe_phy_tn:
 238         case ixgbe_phy_aq:
 239         case ixgbe_phy_cu_unknown:
 240                 /* Copper 10G-BASET */
 241                 ecmd->port = PORT_TP;
 242                 break;
 243         case ixgbe_phy_qt:
 244                 ecmd->port = PORT_FIBRE;
 245                 break;
 246         case ixgbe_phy_nl:
 247         case ixgbe_phy_sfp_passive_tyco:
 248         case ixgbe_phy_sfp_passive_unknown:
 249         case ixgbe_phy_sfp_ftl:
 250         case ixgbe_phy_sfp_avago:
 251         case ixgbe_phy_sfp_intel:
 252         case ixgbe_phy_sfp_unknown:
 253                 switch (adapter->hw.phy.sfp_type) {
 254                 /* SFP+ devices, further checking needed */
 255                 case ixgbe_sfp_type_da_cu:
 256                 case ixgbe_sfp_type_da_cu_core0:
 257                 case ixgbe_sfp_type_da_cu_core1:
 258                         ecmd->port = PORT_DA;
 259                         break;
 260                 case ixgbe_sfp_type_sr:
 261                 case ixgbe_sfp_type_lr:
 262                 case ixgbe_sfp_type_srlr_core0:
 263                 case ixgbe_sfp_type_srlr_core1:
 264                         ecmd->port = PORT_FIBRE;
 265                         break;
 266                 case ixgbe_sfp_type_not_present:
 267                         ecmd->port = PORT_NONE;
 268                         break;
 269                 case ixgbe_sfp_type_1g_cu_core0:
 270                 case ixgbe_sfp_type_1g_cu_core1:
 271                         ecmd->port = PORT_TP;
 272                         ecmd->supported = SUPPORTED_TP;
 273                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
 274                                              ADVERTISED_TP);
 275                         break;
 276                 case ixgbe_sfp_type_unknown:
 277                 default:
 278                         ecmd->port = PORT_OTHER;
 279                         break;
 280                 }
 281                 break;
 282         case ixgbe_phy_xaui:
 283                 ecmd->port = PORT_NONE;
 284                 break;
 285         case ixgbe_phy_unknown:
 286         case ixgbe_phy_generic:
 287         case ixgbe_phy_sfp_unsupported:
 288         default:
 289                 ecmd->port = PORT_OTHER;
 290                 break;
 291         }
 292
 293         hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
 294         if (link_up) {
 295                 switch (link_speed) {
 296                 case IXGBE_LINK_SPEED_10GB_FULL:
 297                         ethtool_cmd_speed_set(ecmd, SPEED_10000);
 298                         break;
 299                 case IXGBE_LINK_SPEED_1GB_FULL:
 300                         ethtool_cmd_speed_set(ecmd, SPEED_1000);
 301                         break;
 302                 case IXGBE_LINK_SPEED_100_FULL:
 303                         ethtool_cmd_speed_set(ecmd, SPEED_100);
 304                         break;
 305                 default:
 306                         break;
 307                 }
 308                 ecmd->duplex = DUPLEX_FULL;
 309         } else {
 310                 ethtool_cmd_speed_set(ecmd, -1);
 311                 ecmd->duplex = -1;
 312         }
 313
 314         return 0;
 315 }
 316
 317 static int ixgbe_set_settings(struct net_device *netdev,
 318                               struct ethtool_cmd *ecmd)
 319 {
 320         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 321         struct ixgbe_hw *hw = &adapter->hw;
 322         u32 advertised, old;
 323         s32 err = 0;
 324
 325         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
 326             (hw->phy.multispeed_fiber)) {
 327                 /* 10000/copper and 1000/copper must autoneg
 328                  * this function does not support any duplex forcing, but can
 329                  * limit the advertising of the adapter to only 10000 or 1000 */
 330                 if (ecmd->autoneg == AUTONEG_DISABLE)
 331                         return -EINVAL;
 332
 333                 old = hw->phy.autoneg_advertised;
 334                 advertised = 0;
 335                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
 336                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
 337
 338                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
 339                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
 340
 341                 if (ecmd->advertising & ADVERTISED_100baseT_Full)
 342                         advertised |= IXGBE_LINK_SPEED_100_FULL;
 343
 344                 if (old == advertised)
 345                         return err;
 346                 /* this sets the link speed and restarts auto-neg */
 347                 hw->mac.autotry_restart = true;
 348                 err = hw->mac.ops.setup_link(hw, advertised, true, true);
 349                 if (err) {
 350                         e_info(probe, "setup link failed with code %d\n", err);
 351                         hw->mac.ops.setup_link(hw, old, true, true);
 352                 }
 353         } else {
 354                 /* in this case we currently only support 10Gb/FULL */
 355                 u32 speed = ethtool_cmd_speed(ecmd);
 356                 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
 357                     (ecmd->advertising != ADVERTISED_10000baseT_Full) ||
 358                     (speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
 359                         return -EINVAL;
 360         }
 361
 362         return err;
 363 }
 364
 365 static void ixgbe_get_pauseparam(struct net_device *netdev,
 366                                  struct ethtool_pauseparam *pause)
 367 {
 368         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 369         struct ixgbe_hw *hw = &adapter->hw;
 370
 371         /*
 372          * Flow Control Autoneg isn't on if
 373          *  - we didn't ask for it OR
 374          *  - it failed, we know this by tx & rx being off
 375          */
 376         if (hw->fc.disable_fc_autoneg ||
 377             (hw->fc.current_mode == ixgbe_fc_none))
 378                 pause->autoneg = 0;
 379         else
 380                 pause->autoneg = 1;
 381
 382         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
 383                 pause->rx_pause = 1;
 384         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
 385                 pause->tx_pause = 1;
 386         } else if (hw->fc.current_mode == ixgbe_fc_full) {
 387                 pause->rx_pause = 1;
 388                 pause->tx_pause = 1;
 389 #ifdef CONFIG_DCB
 390         } else if (hw->fc.current_mode == ixgbe_fc_pfc) {
 391                 pause->rx_pause = 0;
 392                 pause->tx_pause = 0;
 393 #endif
 394         }
 395 }
 396
 397 static int ixgbe_set_pauseparam(struct net_device *netdev,
 398                                 struct ethtool_pauseparam *pause)
 399 {
 400         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 401         struct ixgbe_hw *hw = &adapter->hw;
 402         struct ixgbe_fc_info fc;
 403
 404 #ifdef CONFIG_DCB
 405         if (adapter->dcb_cfg.pfc_mode_enable ||
 406                 ((hw->mac.type == ixgbe_mac_82598EB) &&
 407                 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)))
 408                 return -EINVAL;
 409
 410 #endif
 411         fc = hw->fc;
 412
 413         if (pause->autoneg != AUTONEG_ENABLE)
 414                 fc.disable_fc_autoneg = true;
 415         else
 416                 fc.disable_fc_autoneg = false;
 417
 418         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
 419                 fc.requested_mode = ixgbe_fc_full;
 420         else if (pause->rx_pause && !pause->tx_pause)
 421                 fc.requested_mode = ixgbe_fc_rx_pause;
 422         else if (!pause->rx_pause && pause->tx_pause)
 423                 fc.requested_mode = ixgbe_fc_tx_pause;
 424         else if (!pause->rx_pause && !pause->tx_pause)
 425                 fc.requested_mode = ixgbe_fc_none;
 426         else
 427                 return -EINVAL;
 428
 429 #ifdef CONFIG_DCB
 430         adapter->last_lfc_mode = fc.requested_mode;
 431 #endif
 432
 433         /* if the thing changed then we'll update and use new autoneg */
 434         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
 435                 hw->fc = fc;
 436                 if (netif_running(netdev))
 437                         ixgbe_reinit_locked(adapter);
 438                 else
 439                         ixgbe_reset(adapter);
 440         }
 441
 442         return 0;
 443 }
 444
 445 static void ixgbe_do_reset(struct net_device *netdev)
 446 {
 447         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 448
 449         if (netif_running(netdev))
 450                 ixgbe_reinit_locked(adapter);
 451         else
 452                 ixgbe_reset(adapter);
 453 }
 454
 455 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
 456 {
 457         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 458         return adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED;
 459 }
 460
 461 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
 462 {
 463         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 464         if (data)
 465                 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
 466         else
 467                 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
 468
 469         return 0;
 470 }
 471
 472 static void ixgbe_set_rsc(struct ixgbe_adapter *adapter)
 473 {
 474         int i;
 475
 476         for (i = 0; i < adapter->num_rx_queues; i++) {
 477                 struct ixgbe_ring *ring = adapter->rx_ring[i];
 478                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
 479                         set_ring_rsc_enabled(ring);
 480                         ixgbe_configure_rscctl(adapter, ring);
 481                 } else {
 482                         ixgbe_clear_rscctl(adapter, ring);
 483                 }
 484         }
 485 }
 486
 487 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
 488 {
 489         return (netdev->features & NETIF_F_IP_CSUM) != 0;
 490 }
 491
 492 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
 493 {
 494         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 495         u32 feature_list;
 496
 497         feature_list = (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
 498         switch (adapter->hw.mac.type) {
 499         case ixgbe_mac_82599EB:
 500         case ixgbe_mac_X540:
 501                 feature_list |= NETIF_F_SCTP_CSUM;
 502                 break;
 503         default:
 504                 break;
 505         }
 506         if (data)
 507                 netdev->features |= feature_list;
 508         else
 509                 netdev->features &= ~feature_list;
 510
 511         return 0;
 512 }
 513
 514 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
 515 {
 516         if (data) {
 517                 netdev->features |= NETIF_F_TSO;
 518                 netdev->features |= NETIF_F_TSO6;
 519         } else {
 520                 netdev->features &= ~NETIF_F_TSO;
 521                 netdev->features &= ~NETIF_F_TSO6;
 522         }
 523         return 0;
 524 }
 525
 526 static u32 ixgbe_get_msglevel(struct net_device *netdev)
 527 {
 528         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 529         return adapter->msg_enable;
 530 }
 531
 532 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
 533 {
 534         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 535         adapter->msg_enable = data;
 536 }
 537
 538 static int ixgbe_get_regs_len(struct net_device *netdev)
 539 {
 540 #define IXGBE_REGS_LEN  1128
 541         return IXGBE_REGS_LEN * sizeof(u32);
 542 }
 543
 544 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
 545
 546 static void ixgbe_get_regs(struct net_device *netdev,
 547                            struct ethtool_regs *regs, void *p)
 548 {
 549         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 550         struct ixgbe_hw *hw = &adapter->hw;
 551         u32 *regs_buff = p;
 552         u8 i;
 553
 554         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
 555
 556         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
 557
 558         /* General Registers */
 559         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
 560         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
 561         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
 562         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
 563         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
 564         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
 565         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
 566         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
 567
 568         /* NVM Register */
 569         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
 570         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
 571         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
 572         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
 573         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
 574         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
 575         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
 576         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
 577         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
 578         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
 579
 580         /* Interrupt */
 581         /* don't read EICR because it can clear interrupt causes, instead
 582          * read EICS which is a shadow but doesn't clear EICR */
 583         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
 584         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
 585         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
 586         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
 587         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
 588         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
 589         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
 590         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
 591         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
 592         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
 593         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
 594         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
 595
 596         /* Flow Control */
 597         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
 598         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
 599         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
 600         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
 601         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
 602         for (i = 0; i < 8; i++) {
 603                 switch (hw->mac.type) {
 604                 case ixgbe_mac_82598EB:
 605                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
 606                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
 607                         break;
 608                 case ixgbe_mac_82599EB:
 609                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i));
 610                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i));
 611                         break;
 612                 default:
 613                         break;
 614                 }
 615         }
 616         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
 617         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
 618
 619         /* Receive DMA */
 620         for (i = 0; i < 64; i++)
 621                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
 622         for (i = 0; i < 64; i++)
 623                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
 624         for (i = 0; i < 64; i++)
 625                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
 626         for (i = 0; i < 64; i++)
 627                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
 628         for (i = 0; i < 64; i++)
 629                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
 630         for (i = 0; i < 64; i++)
 631                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
 632         for (i = 0; i < 16; i++)
 633                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
 634         for (i = 0; i < 16; i++)
 635                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
 636         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
 637         for (i = 0; i < 8; i++)
 638                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
 639         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 640         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
 641
 642         /* Receive */
 643         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
 644         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
 645         for (i = 0; i < 16; i++)
 646                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
 647         for (i = 0; i < 16; i++)
 648                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
 649         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
 650         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 651         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 652         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
 653         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
 654         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
 655         for (i = 0; i < 8; i++)
 656                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
 657         for (i = 0; i < 8; i++)
 658                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
 659         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
 660
 661         /* Transmit */
 662         for (i = 0; i < 32; i++)
 663                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
 664         for (i = 0; i < 32; i++)
 665                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
 666         for (i = 0; i < 32; i++)
 667                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
 668         for (i = 0; i < 32; i++)
 669                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
 670         for (i = 0; i < 32; i++)
 671                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
 672         for (i = 0; i < 32; i++)
 673                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
 674         for (i = 0; i < 32; i++)
 675                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
 676         for (i = 0; i < 32; i++)
 677                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
 678         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
 679         for (i = 0; i < 16; i++)
 680                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
 681         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
 682         for (i = 0; i < 8; i++)
 683                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
 684         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
 685
 686         /* Wake Up */
 687         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
 688         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
 689         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
 690         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
 691         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
 692         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
 693         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
 694         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
 695         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
 696
 697         /* DCB */
 698         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
 699         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
 700         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
 701         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
 702         for (i = 0; i < 8; i++)
 703                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
 704         for (i = 0; i < 8; i++)
 705                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
 706         for (i = 0; i < 8; i++)
 707                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
 708         for (i = 0; i < 8; i++)
 709                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
 710         for (i = 0; i < 8; i++)
 711                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
 712         for (i = 0; i < 8; i++)
 713                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
 714
 715         /* Statistics */
 716         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
 717         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
 718         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
 719         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
 720         for (i = 0; i < 8; i++)
 721                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
 722         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
 723         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
 724         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
 725         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
 726         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
 727         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
 728         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
 729         for (i = 0; i < 8; i++)
 730                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
 731         for (i = 0; i < 8; i++)
 732                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
 733         for (i = 0; i < 8; i++)
 734                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
 735         for (i = 0; i < 8; i++)
 736                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
 737         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
 738         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
 739         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
 740         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
 741         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
 742         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
 743         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
 744         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
 745         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
 746         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
 747         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
 748         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
 749         for (i = 0; i < 8; i++)
 750                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
 751         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
 752         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
 753         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
 754         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
 755         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
 756         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
 757         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
 758         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
 759         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
 760         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
 761         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
 762         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
 763         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
 764         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
 765         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
 766         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
 767         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
 768         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
 769         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
 770         for (i = 0; i < 16; i++)
 771                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
 772         for (i = 0; i < 16; i++)
 773                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
 774         for (i = 0; i < 16; i++)
 775                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
 776         for (i = 0; i < 16; i++)
 777                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
 778
 779         /* MAC */
 780         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
 781         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
 782         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
 783         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
 784         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
 785         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
 786         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
 787         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
 788         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
 789         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
 790         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
 791         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
 792         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
 793         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
 794         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
 795         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
 796         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
 797         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
 798         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
 799         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
 800         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
 801         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
 802         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
 803         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
 804         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
 805         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
 806         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
 807         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
 808         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
 809         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
 810         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
 811         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
 812         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
 813
 814         /* Diagnostic */
 815         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
 816         for (i = 0; i < 8; i++)
 817                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
 818         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
 819         for (i = 0; i < 4; i++)
 820                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
 821         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
 822         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
 823         for (i = 0; i < 8; i++)
 824                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
 825         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
 826         for (i = 0; i < 4; i++)
 827                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
 828         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
 829         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
 830         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
 831         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
 832         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
 833         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
 834         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
 835         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
 836         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
 837         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
 838         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
 839         for (i = 0; i < 8; i++)
 840                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
 841         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
 842         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
 843         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
 844         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
 845         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
 846         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
 847         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
 848         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
 849         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
 850 }
 851
 852 static int ixgbe_get_eeprom_len(struct net_device *netdev)
 853 {
 854         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 855         return adapter->hw.eeprom.word_size * 2;
 856 }
 857
 858 static int ixgbe_get_eeprom(struct net_device *netdev,
 859                             struct ethtool_eeprom *eeprom, u8 *bytes)
 860 {
 861         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 862         struct ixgbe_hw *hw = &adapter->hw;
 863         u16 *eeprom_buff;
 864         int first_word, last_word, eeprom_len;
 865         int ret_val = 0;
 866         u16 i;
 867
 868         if (eeprom->len == 0)
 869                 return -EINVAL;
 870
 871         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
 872
 873         first_word = eeprom->offset >> 1;
 874         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
 875         eeprom_len = last_word - first_word + 1;
 876
 877         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
 878         if (!eeprom_buff)
 879                 return -ENOMEM;
 880
 881         ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len,
 882                                              eeprom_buff);
 883
 884         /* Device's eeprom is always little-endian, word addressable */
 885         for (i = 0; i < eeprom_len; i++)
 886                 le16_to_cpus(&eeprom_buff[i]);
 887
 888         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
 889         kfree(eeprom_buff);
 890
 891         return ret_val;
 892 }
 893
 894 static void ixgbe_get_drvinfo(struct net_device *netdev,
 895                               struct ethtool_drvinfo *drvinfo)
 896 {
 897         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 898         char firmware_version[32];
 899
 900         strncpy(drvinfo->driver, ixgbe_driver_name,
 901                 sizeof(drvinfo->driver) - 1);
 902         strncpy(drvinfo->version, ixgbe_driver_version,
 903                 sizeof(drvinfo->version) - 1);
 904
 905         snprintf(firmware_version, sizeof(firmware_version), "%d.%d-%d",
 906                  (adapter->eeprom_version & 0xF000) >> 12,
 907                  (adapter->eeprom_version & 0x0FF0) >> 4,
 908                  adapter->eeprom_version & 0x000F);
 909
 910         strncpy(drvinfo->fw_version, firmware_version,
 911                 sizeof(drvinfo->fw_version));
 912         strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
 913                 sizeof(drvinfo->bus_info));
 914         drvinfo->n_stats = IXGBE_STATS_LEN;
 915         drvinfo->testinfo_len = IXGBE_TEST_LEN;
 916         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
 917 }
 918
 919 static void ixgbe_get_ringparam(struct net_device *netdev,
 920                                 struct ethtool_ringparam *ring)
 921 {
 922         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 923         struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
 924         struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
 925
 926         ring->rx_max_pending = IXGBE_MAX_RXD;
 927         ring->tx_max_pending = IXGBE_MAX_TXD;
 928         ring->rx_mini_max_pending = 0;
 929         ring->rx_jumbo_max_pending = 0;
 930         ring->rx_pending = rx_ring->count;
 931         ring->tx_pending = tx_ring->count;
 932         ring->rx_mini_pending = 0;
 933         ring->rx_jumbo_pending = 0;
 934 }
 935
 936 static int ixgbe_set_ringparam(struct net_device *netdev,
 937                                struct ethtool_ringparam *ring)
 938 {
 939         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 940         struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
 941         int i, err = 0;
 942         u32 new_rx_count, new_tx_count;
 943         bool need_update = false;
 944
 945         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 946                 return -EINVAL;
 947
 948         new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
 949         new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
 950         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
 951
 952         new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
 953         new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
 954         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
 955
 956         if ((new_tx_count == adapter->tx_ring[0]->count) &&
 957             (new_rx_count == adapter->rx_ring[0]->count)) {
 958                 /* nothing to do */
 959                 return 0;
 960         }
 961
 962         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 963                 usleep_range(1000, 2000);
 964
 965         if (!netif_running(adapter->netdev)) {
 966                 for (i = 0; i < adapter->num_tx_queues; i++)
 967                         adapter->tx_ring[i]->count = new_tx_count;
 968                 for (i = 0; i < adapter->num_rx_queues; i++)
 969                         adapter->rx_ring[i]->count = new_rx_count;
 970                 adapter->tx_ring_count = new_tx_count;
 971                 adapter->rx_ring_count = new_rx_count;
 972                 goto clear_reset;
 973         }
 974
 975         temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));
 976         if (!temp_tx_ring) {
 977                 err = -ENOMEM;
 978                 goto clear_reset;
 979         }
 980
 981         if (new_tx_count != adapter->tx_ring_count) {
 982                 for (i = 0; i < adapter->num_tx_queues; i++) {
 983                         memcpy(&temp_tx_ring[i], adapter->tx_ring[i],
 984                                sizeof(struct ixgbe_ring));
 985                         temp_tx_ring[i].count = new_tx_count;
 986                         err = ixgbe_setup_tx_resources(&temp_tx_ring[i]);
 987                         if (err) {
 988                                 while (i) {
 989                                         i--;
 990                                         ixgbe_free_tx_resources(&temp_tx_ring[i]);
 991                                 }
 992                                 goto clear_reset;
 993                         }
 994                 }
 995                 need_update = true;
 996         }
 997
 998         temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));
 999         if (!temp_rx_ring) {
1000                 err = -ENOMEM;
1001                 goto err_setup;
1002         }
1003
1004         if (new_rx_count != adapter->rx_ring_count) {
1005                 for (i = 0; i < adapter->num_rx_queues; i++) {
1006                         memcpy(&temp_rx_ring[i], adapter->rx_ring[i],
1007                                sizeof(struct ixgbe_ring));
1008                         temp_rx_ring[i].count = new_rx_count;
1009                         err = ixgbe_setup_rx_resources(&temp_rx_ring[i]);
1010                         if (err) {
1011                                 while (i) {
1012                                         i--;
1013                                         ixgbe_free_rx_resources(&temp_rx_ring[i]);
1014                                 }
1015                                 goto err_setup;
1016                         }
1017                 }
1018                 need_update = true;
1019         }
1020
1021         /* if rings need to be updated, here's the place to do it in one shot */
1022         if (need_update) {
1023                 ixgbe_down(adapter);
1024
1025                 /* tx */
1026                 if (new_tx_count != adapter->tx_ring_count) {
1027                         for (i = 0; i < adapter->num_tx_queues; i++) {
1028                                 ixgbe_free_tx_resources(adapter->tx_ring[i]);
1029                                 memcpy(adapter->tx_ring[i], &temp_tx_ring[i],
1030                                        sizeof(struct ixgbe_ring));
1031                         }
1032                         adapter->tx_ring_count = new_tx_count;
1033                 }
1034
1035                 /* rx */
1036                 if (new_rx_count != adapter->rx_ring_count) {
1037                         for (i = 0; i < adapter->num_rx_queues; i++) {
1038                                 ixgbe_free_rx_resources(adapter->rx_ring[i]);
1039                                 memcpy(adapter->rx_ring[i], &temp_rx_ring[i],
1040                                        sizeof(struct ixgbe_ring));
1041                         }
1042                         adapter->rx_ring_count = new_rx_count;
1043                 }
1044                 ixgbe_up(adapter);
1045         }
1046
1047         vfree(temp_rx_ring);
1048 err_setup:
1049         vfree(temp_tx_ring);
1050 clear_reset:
1051         clear_bit(__IXGBE_RESETTING, &adapter->state);
1052         return err;
1053 }
1054
1055 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1056 {
1057         switch (sset) {
1058         case ETH_SS_TEST:
1059                 return IXGBE_TEST_LEN;
1060         case ETH_SS_STATS:
1061                 return IXGBE_STATS_LEN;
1062         default:
1063                 return -EOPNOTSUPP;
1064         }
1065 }
1066
1067 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1068                                     struct ethtool_stats *stats, u64 *data)
1069 {
1070         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1071         struct rtnl_link_stats64 temp;
1072         const struct rtnl_link_stats64 *net_stats;
1073         unsigned int start;
1074         struct ixgbe_ring *ring;
1075         int i, j;
1076         char *p = NULL;
1077
1078         ixgbe_update_stats(adapter);
1079         net_stats = dev_get_stats(netdev, &temp);
1080         for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1081                 switch (ixgbe_gstrings_stats[i].type) {
1082                 case NETDEV_STATS:
1083                         p = (char *) net_stats +
1084                                         ixgbe_gstrings_stats[i].stat_offset;
1085                         break;
1086                 case IXGBE_STATS:
1087                         p = (char *) adapter +
1088                                         ixgbe_gstrings_stats[i].stat_offset;
1089                         break;
1090                 }
1091
1092                 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
1093                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1094         }
1095         for (j = 0; j < adapter->num_tx_queues; j++) {
1096                 ring = adapter->tx_ring[j];
1097                 do {
1098                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1099                         data[i]   = ring->stats.packets;
1100                         data[i+1] = ring->stats.bytes;
1101                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1102                 i += 2;
1103         }
1104         for (j = 0; j < adapter->num_rx_queues; j++) {
1105                 ring = adapter->rx_ring[j];
1106                 do {
1107                         start = u64_stats_fetch_begin_bh(&ring->syncp);
1108                         data[i]   = ring->stats.packets;
1109                         data[i+1] = ring->stats.bytes;
1110                 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
1111                 i += 2;
1112         }
1113         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1114                 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1115                         data[i++] = adapter->stats.pxontxc[j];
1116                         data[i++] = adapter->stats.pxofftxc[j];
1117                 }
1118                 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1119                         data[i++] = adapter->stats.pxonrxc[j];
1120                         data[i++] = adapter->stats.pxoffrxc[j];
1121                 }
1122         }
1123 }
1124
1125 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1126                               u8 *data)
1127 {
1128         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1129         char *p = (char *)data;
1130         int i;
1131
1132         switch (stringset) {
1133         case ETH_SS_TEST:
1134                 memcpy(data, *ixgbe_gstrings_test,
1135                        IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1136                 break;
1137         case ETH_SS_STATS:
1138                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1139                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1140                                ETH_GSTRING_LEN);
1141                         p += ETH_GSTRING_LEN;
1142                 }
1143                 for (i = 0; i < adapter->num_tx_queues; i++) {
1144                         sprintf(p, "tx_queue_%u_packets", i);
1145                         p += ETH_GSTRING_LEN;
1146                         sprintf(p, "tx_queue_%u_bytes", i);
1147                         p += ETH_GSTRING_LEN;
1148                 }
1149                 for (i = 0; i < adapter->num_rx_queues; i++) {
1150                         sprintf(p, "rx_queue_%u_packets", i);
1151                         p += ETH_GSTRING_LEN;
1152                         sprintf(p, "rx_queue_%u_bytes", i);
1153                         p += ETH_GSTRING_LEN;
1154                 }
1155                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1156                         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1157                                 sprintf(p, "tx_pb_%u_pxon", i);
1158                                 p += ETH_GSTRING_LEN;
1159                                 sprintf(p, "tx_pb_%u_pxoff", i);
1160                                 p += ETH_GSTRING_LEN;
1161                         }
1162                         for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1163                                 sprintf(p, "rx_pb_%u_pxon", i);
1164                                 p += ETH_GSTRING_LEN;
1165                                 sprintf(p, "rx_pb_%u_pxoff", i);
1166                                 p += ETH_GSTRING_LEN;
1167                         }
1168                 }
1169                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1170                 break;
1171         }
1172 }
1173
1174 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1175 {
1176         struct ixgbe_hw *hw = &adapter->hw;
1177         bool link_up;
1178         u32 link_speed = 0;
1179         *data = 0;
1180
1181         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1182         if (link_up)
1183                 return *data;
1184         else
1185                 *data = 1;
1186         return *data;
1187 }
1188
1189 /* ethtool register test data */
1190 struct ixgbe_reg_test {
1191         u16 reg;
1192         u8  array_len;
1193         u8  test_type;
1194         u32 mask;
1195         u32 write;
1196 };
1197
1198 /* In the hardware, registers are laid out either singly, in arrays
1199  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1200  * most tests take place on arrays or single registers (handled
1201  * as a single-element array) and special-case the tables.
1202  * Table tests are always pattern tests.
1203  *
1204  * We also make provision for some required setup steps by specifying
1205  * registers to be written without any read-back testing.
1206  */
1207
1208 #define PATTERN_TEST    1
1209 #define SET_READ_TEST   2
1210 #define WRITE_NO_TEST   3
1211 #define TABLE32_TEST    4
1212 #define TABLE64_TEST_LO 5
1213 #define TABLE64_TEST_HI 6
1214
1215 /* default 82599 register test */
1216 static const struct ixgbe_reg_test reg_test_82599[] = {
1217         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1218         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1219         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1220         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1221         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1222         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1223         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1224         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1225         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1226         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1227         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1228         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1229         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1230         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1231         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1232         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1233         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1234         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1235         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1236         { 0, 0, 0, 0 }
1237 };
1238
1239 /* default 82598 register test */
1240 static const struct ixgbe_reg_test reg_test_82598[] = {
1241         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1242         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1243         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1244         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1245         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1246         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1247         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1248         /* Enable all four RX queues before testing. */
1249         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1250         /* RDH is read-only for 82598, only test RDT. */
1251         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1252         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1253         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1254         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1255         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1256         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1257         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1258         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1259         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1260         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1261         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1262         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1263         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1264         { 0, 0, 0, 0 }
1265 };
1266
1267 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg,
1268                              u32 mask, u32 write)
1269 {
1270         u32 pat, val, before;
1271         static const u32 test_pattern[] = {
1272                 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1273
1274         for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) {
1275                 before = readl(adapter->hw.hw_addr + reg);
1276                 writel((test_pattern[pat] & write),
1277                        (adapter->hw.hw_addr + reg));
1278                 val = readl(adapter->hw.hw_addr + reg);
1279                 if (val != (test_pattern[pat] & write & mask)) {
1280                         e_err(drv, "pattern test reg %04X failed: got "
1281                               "0x%08X expected 0x%08X\n",
1282                               reg, val, (test_pattern[pat] & write & mask));
1283                         *data = reg;
1284                         writel(before, adapter->hw.hw_addr + reg);
1285                         return 1;
1286                 }
1287                 writel(before, adapter->hw.hw_addr + reg);
1288         }
1289         return 0;
1290 }
1291
1292 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg,
1293                               u32 mask, u32 write)
1294 {
1295         u32 val, before;
1296         before = readl(adapter->hw.hw_addr + reg);
1297         writel((write & mask), (adapter->hw.hw_addr + reg));
1298         val = readl(adapter->hw.hw_addr + reg);
1299         if ((write & mask) != (val & mask)) {
1300                 e_err(drv, "set/check reg %04X test failed: got 0x%08X "
1301                       "expected 0x%08X\n", reg, (val & mask), (write & mask));
1302                 *data = reg;
1303                 writel(before, (adapter->hw.hw_addr + reg));
1304                 return 1;
1305         }
1306         writel(before, (adapter->hw.hw_addr + reg));
1307         return 0;
1308 }
1309
1310 #define REG_PATTERN_TEST(reg, mask, write)                                    \
1311         do {                                                                  \
1312                 if (reg_pattern_test(adapter, data, reg, mask, write))        \
1313                         return 1;                                             \
1314         } while (0)                                                           \
1315
1316
1317 #define REG_SET_AND_CHECK(reg, mask, write)                                   \
1318         do {                                                                  \
1319                 if (reg_set_and_check(adapter, data, reg, mask, write))       \
1320                         return 1;                                             \
1321         } while (0)                                                           \
1322
1323 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1324 {
1325         const struct ixgbe_reg_test *test;
1326         u32 value, before, after;
1327         u32 i, toggle;
1328
1329         switch (adapter->hw.mac.type) {
1330         case ixgbe_mac_82598EB:
1331                 toggle = 0x7FFFF3FF;
1332                 test = reg_test_82598;
1333                 break;
1334         case ixgbe_mac_82599EB:
1335         case ixgbe_mac_X540:
1336                 toggle = 0x7FFFF30F;
1337                 test = reg_test_82599;
1338                 break;
1339         default:
1340                 *data = 1;
1341                 return 1;
1342                 break;
1343         }
1344
1345         /*
1346          * Because the status register is such a special case,
1347          * we handle it separately from the rest of the register
1348          * tests.  Some bits are read-only, some toggle, and some
1349          * are writeable on newer MACs.
1350          */
1351         before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1352         value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1353         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1354         after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1355         if (value != after) {
1356                 e_err(drv, "failed STATUS register test got: 0x%08X "
1357                       "expected: 0x%08X\n", after, value);
1358                 *data = 1;
1359                 return 1;
1360         }
1361         /* restore previous status */
1362         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, before);
1363
1364         /*
1365          * Perform the remainder of the register test, looping through
1366          * the test table until we either fail or reach the null entry.
1367          */
1368         while (test->reg) {
1369                 for (i = 0; i < test->array_len; i++) {
1370                         switch (test->test_type) {
1371                         case PATTERN_TEST:
1372                                 REG_PATTERN_TEST(test->reg + (i * 0x40),
1373                                                  test->mask,
1374                                                  test->write);
1375                                 break;
1376                         case SET_READ_TEST:
1377                                 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1378                                                   test->mask,
1379                                                   test->write);
1380                                 break;
1381                         case WRITE_NO_TEST:
1382                                 writel(test->write,
1383                                        (adapter->hw.hw_addr + test->reg)
1384                                        + (i * 0x40));
1385                                 break;
1386                         case TABLE32_TEST:
1387                                 REG_PATTERN_TEST(test->reg + (i * 4),
1388                                                  test->mask,
1389                                                  test->write);
1390                                 break;
1391                         case TABLE64_TEST_LO:
1392                                 REG_PATTERN_TEST(test->reg + (i * 8),
1393                                                  test->mask,
1394                                                  test->write);
1395                                 break;
1396                         case TABLE64_TEST_HI:
1397                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1398                                                  test->mask,
1399                                                  test->write);
1400                                 break;
1401                         }
1402                 }
1403                 test++;
1404         }
1405
1406         *data = 0;
1407         return 0;
1408 }
1409
1410 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1411 {
1412         struct ixgbe_hw *hw = &adapter->hw;
1413         if (hw->eeprom.ops.validate_checksum(hw, NULL))
1414                 *data = 1;
1415         else
1416                 *data = 0;
1417         return *data;
1418 }
1419
1420 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1421 {
1422         struct net_device *netdev = (struct net_device *) data;
1423         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1424
1425         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1426
1427         return IRQ_HANDLED;
1428 }
1429
1430 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1431 {
1432         struct net_device *netdev = adapter->netdev;
1433         u32 mask, i = 0, shared_int = true;
1434         u32 irq = adapter->pdev->irq;
1435
1436         *data = 0;
1437
1438         /* Hook up test interrupt handler just for this test */
1439         if (adapter->msix_entries) {
1440                 /* NOTE: we don't test MSI-X interrupts here, yet */
1441                 return 0;
1442         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1443                 shared_int = false;
1444                 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name,
1445                                 netdev)) {
1446                         *data = 1;
1447                         return -1;
1448                 }
1449         } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED,
1450                                 netdev->name, netdev)) {
1451                 shared_int = false;
1452         } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED,
1453                                netdev->name, netdev)) {
1454                 *data = 1;
1455                 return -1;
1456         }
1457         e_info(hw, "testing %s interrupt\n", shared_int ?
1458                "shared" : "unshared");
1459
1460         /* Disable all the interrupts */
1461         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1462         usleep_range(10000, 20000);
1463
1464         /* Test each interrupt */
1465         for (; i < 10; i++) {
1466                 /* Interrupt to test */
1467                 mask = 1 << i;
1468
1469                 if (!shared_int) {
1470                         /*
1471                          * Disable the interrupts to be reported in
1472                          * the cause register and then force the same
1473                          * interrupt and see if one gets posted.  If
1474                          * an interrupt was posted to the bus, the
1475                          * test failed.
1476                          */
1477                         adapter->test_icr = 0;
1478                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1479                                         ~mask & 0x00007FFF);
1480                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1481                                         ~mask & 0x00007FFF);
1482                         usleep_range(10000, 20000);
1483
1484                         if (adapter->test_icr & mask) {
1485                                 *data = 3;
1486                                 break;
1487                         }
1488                 }
1489
1490                 /*
1491                  * Enable the interrupt to be reported in the cause
1492                  * register and then force the same interrupt and see
1493                  * if one gets posted.  If an interrupt was not posted
1494                  * to the bus, the test failed.
1495                  */
1496                 adapter->test_icr = 0;
1497                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1498                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1499                 usleep_range(10000, 20000);
1500
1501                 if (!(adapter->test_icr &mask)) {
1502                         *data = 4;
1503                         break;
1504                 }
1505
1506                 if (!shared_int) {
1507                         /*
1508                          * Disable the other interrupts to be reported in
1509                          * the cause register and then force the other
1510                          * interrupts and see if any get posted.  If
1511                          * an interrupt was posted to the bus, the
1512                          * test failed.
1513                          */
1514                         adapter->test_icr = 0;
1515                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1516                                         ~mask & 0x00007FFF);
1517                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1518                                         ~mask & 0x00007FFF);
1519                         usleep_range(10000, 20000);
1520
1521                         if (adapter->test_icr) {
1522                                 *data = 5;
1523                                 break;
1524                         }
1525                 }
1526         }
1527
1528         /* Disable all the interrupts */
1529         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1530         usleep_range(10000, 20000);
1531
1532         /* Unhook test interrupt handler */
1533         free_irq(irq, netdev);
1534
1535         return *data;
1536 }
1537
1538 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter)
1539 {
1540         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1541         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1542         struct ixgbe_hw *hw = &adapter->hw;
1543         u32 reg_ctl;
1544
1545         /* shut down the DMA engines now so they can be reinitialized later */
1546
1547         /* first Rx */
1548         reg_ctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1549         reg_ctl &= ~IXGBE_RXCTRL_RXEN;
1550         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg_ctl);
1551         ixgbe_disable_rx_queue(adapter, rx_ring);
1552
1553         /* now Tx */
1554         reg_ctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx));
1555         reg_ctl &= ~IXGBE_TXDCTL_ENABLE;
1556         IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(tx_ring->reg_idx), reg_ctl);
1557
1558         switch (hw->mac.type) {
1559         case ixgbe_mac_82599EB:
1560         case ixgbe_mac_X540:
1561                 reg_ctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
1562                 reg_ctl &= ~IXGBE_DMATXCTL_TE;
1563                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg_ctl);
1564                 break;
1565         default:
1566                 break;
1567         }
1568
1569         ixgbe_reset(adapter);
1570
1571         ixgbe_free_tx_resources(&adapter->test_tx_ring);
1572         ixgbe_free_rx_resources(&adapter->test_rx_ring);
1573 }
1574
1575 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter)
1576 {
1577         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1578         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1579         u32 rctl, reg_data;
1580         int ret_val;
1581         int err;
1582
1583         /* Setup Tx descriptor ring and Tx buffers */
1584         tx_ring->count = IXGBE_DEFAULT_TXD;
1585         tx_ring->queue_index = 0;
1586         tx_ring->dev = &adapter->pdev->dev;
1587         tx_ring->netdev = adapter->netdev;
1588         tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx;
1589         tx_ring->numa_node = adapter->node;
1590
1591         err = ixgbe_setup_tx_resources(tx_ring);
1592         if (err)
1593                 return 1;
1594
1595         switch (adapter->hw.mac.type) {
1596         case ixgbe_mac_82599EB:
1597         case ixgbe_mac_X540:
1598                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL);
1599                 reg_data |= IXGBE_DMATXCTL_TE;
1600                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data);
1601                 break;
1602         default:
1603                 break;
1604         }
1605
1606         ixgbe_configure_tx_ring(adapter, tx_ring);
1607
1608         /* Setup Rx Descriptor ring and Rx buffers */
1609         rx_ring->count = IXGBE_DEFAULT_RXD;
1610         rx_ring->queue_index = 0;
1611         rx_ring->dev = &adapter->pdev->dev;
1612         rx_ring->netdev = adapter->netdev;
1613         rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx;
1614         rx_ring->rx_buf_len = IXGBE_RXBUFFER_2048;
1615         rx_ring->numa_node = adapter->node;
1616
1617         err = ixgbe_setup_rx_resources(rx_ring);
1618         if (err) {
1619                 ret_val = 4;
1620                 goto err_nomem;
1621         }
1622
1623         rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1624         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl & ~IXGBE_RXCTRL_RXEN);
1625
1626         ixgbe_configure_rx_ring(adapter, rx_ring);
1627
1628         rctl |= IXGBE_RXCTRL_RXEN | IXGBE_RXCTRL_DMBYPS;
1629         IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl);
1630
1631         return 0;
1632
1633 err_nomem:
1634         ixgbe_free_desc_rings(adapter);
1635         return ret_val;
1636 }
1637
1638 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1639 {
1640         struct ixgbe_hw *hw = &adapter->hw;
1641         u32 reg_data;
1642
1643         /* X540 needs to set the MACC.FLU bit to force link up */
1644         if (adapter->hw.mac.type == ixgbe_mac_X540) {
1645                 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_MACC);
1646                 reg_data |= IXGBE_MACC_FLU;
1647                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_MACC, reg_data);
1648         }
1649
1650         /* right now we only support MAC loopback in the driver */
1651         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1652         /* Setup MAC loopback */
1653         reg_data |= IXGBE_HLREG0_LPBK;
1654         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1655
1656         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
1657         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1658         IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, reg_data);
1659
1660         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_AUTOC);
1661         reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1662         reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1663         IXGBE_WRITE_REG(&adapter->hw, IXGBE_AUTOC, reg_data);
1664         IXGBE_WRITE_FLUSH(&adapter->hw);
1665         usleep_range(10000, 20000);
1666
1667         /* Disable Atlas Tx lanes; re-enabled in reset path */
1668         if (hw->mac.type == ixgbe_mac_82598EB) {
1669                 u8 atlas;
1670
1671                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1672                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1673                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1674
1675                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1676                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1677                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1678
1679                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1680                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1681                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1682
1683                 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1684                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1685                 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1686         }
1687
1688         return 0;
1689 }
1690
1691 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1692 {
1693         u32 reg_data;
1694
1695         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1696         reg_data &= ~IXGBE_HLREG0_LPBK;
1697         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1698 }
1699
1700 static void ixgbe_create_lbtest_frame(struct sk_buff *skb,
1701                                       unsigned int frame_size)
1702 {
1703         memset(skb->data, 0xFF, frame_size);
1704         frame_size &= ~1;
1705         memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1706         memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1707         memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1708 }
1709
1710 static int ixgbe_check_lbtest_frame(struct sk_buff *skb,
1711                                     unsigned int frame_size)
1712 {
1713         frame_size &= ~1;
1714         if (*(skb->data + 3) == 0xFF) {
1715                 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1716                     (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1717                         return 0;
1718                 }
1719         }
1720         return 13;
1721 }
1722
1723 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring,
1724                                   struct ixgbe_ring *tx_ring,
1725                                   unsigned int size)
1726 {
1727         union ixgbe_adv_rx_desc *rx_desc;
1728         struct ixgbe_rx_buffer *rx_buffer_info;
1729         struct ixgbe_tx_buffer *tx_buffer_info;
1730         const int bufsz = rx_ring->rx_buf_len;
1731         u32 staterr;
1732         u16 rx_ntc, tx_ntc, count = 0;
1733
1734         /* initialize next to clean and descriptor values */
1735         rx_ntc = rx_ring->next_to_clean;
1736         tx_ntc = tx_ring->next_to_clean;
1737         rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1738         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1739
1740         while (staterr & IXGBE_RXD_STAT_DD) {
1741                 /* check Rx buffer */
1742                 rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
1743
1744                 /* unmap Rx buffer, will be remapped by alloc_rx_buffers */
1745                 dma_unmap_single(rx_ring->dev,
1746                                  rx_buffer_info->dma,
1747                                  bufsz,
1748                                  DMA_FROM_DEVICE);
1749                 rx_buffer_info->dma = 0;
1750
1751                 /* verify contents of skb */
1752                 if (!ixgbe_check_lbtest_frame(rx_buffer_info->skb, size))
1753                         count++;
1754
1755                 /* unmap buffer on Tx side */
1756                 tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
1757                 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
1758
1759                 /* increment Rx/Tx next to clean counters */
1760                 rx_ntc++;
1761                 if (rx_ntc == rx_ring->count)
1762                         rx_ntc = 0;
1763                 tx_ntc++;
1764                 if (tx_ntc == tx_ring->count)
1765                         tx_ntc = 0;
1766
1767                 /* fetch next descriptor */
1768                 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, rx_ntc);
1769                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1770         }
1771
1772         /* re-map buffers to ring, store next to clean values */
1773         ixgbe_alloc_rx_buffers(rx_ring, count);
1774         rx_ring->next_to_clean = rx_ntc;
1775         tx_ring->next_to_clean = tx_ntc;
1776
1777         return count;
1778 }
1779
1780 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter)
1781 {
1782         struct ixgbe_ring *tx_ring = &adapter->test_tx_ring;
1783         struct ixgbe_ring *rx_ring = &adapter->test_rx_ring;
1784         int i, j, lc, good_cnt, ret_val = 0;
1785         unsigned int size = 1024;
1786         netdev_tx_t tx_ret_val;
1787         struct sk_buff *skb;
1788
1789         /* allocate test skb */
1790         skb = alloc_skb(size, GFP_KERNEL);
1791         if (!skb)
1792                 return 11;
1793
1794         /* place data into test skb */
1795         ixgbe_create_lbtest_frame(skb, size);
1796         skb_put(skb, size);
1797
1798         /*
1799          * Calculate the loop count based on the largest descriptor ring
1800          * The idea is to wrap the largest ring a number of times using 64
1801          * send/receive pairs during each loop
1802          */
1803
1804         if (rx_ring->count <= tx_ring->count)
1805                 lc = ((tx_ring->count / 64) * 2) + 1;
1806         else
1807                 lc = ((rx_ring->count / 64) * 2) + 1;
1808
1809         for (j = 0; j <= lc; j++) {
1810                 /* reset count of good packets */
1811                 good_cnt = 0;
1812
1813                 /* place 64 packets on the transmit queue*/
1814                 for (i = 0; i < 64; i++) {
1815                         skb_get(skb);
1816                         tx_ret_val = ixgbe_xmit_frame_ring(skb,
1817                                                            adapter,
1818                                                            tx_ring);
1819                         if (tx_ret_val == NETDEV_TX_OK)
1820                                 good_cnt++;
1821                 }
1822
1823                 if (good_cnt != 64) {
1824                         ret_val = 12;
1825                         break;
1826                 }
1827
1828                 /* allow 200 milliseconds for packets to go from Tx to Rx */
1829                 msleep(200);
1830
1831                 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size);
1832                 if (good_cnt != 64) {
1833                         ret_val = 13;
1834                         break;
1835                 }
1836         }
1837
1838         /* free the original skb */
1839         kfree_skb(skb);
1840
1841         return ret_val;
1842 }
1843
1844 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1845 {
1846         *data = ixgbe_setup_desc_rings(adapter);
1847         if (*data)
1848                 goto out;
1849         *data = ixgbe_setup_loopback_test(adapter);
1850         if (*data)
1851                 goto err_loopback;
1852         *data = ixgbe_run_loopback_test(adapter);
1853         ixgbe_loopback_cleanup(adapter);
1854
1855 err_loopback:
1856         ixgbe_free_desc_rings(adapter);
1857 out:
1858         return *data;
1859 }
1860
1861 static void ixgbe_diag_test(struct net_device *netdev,
1862                             struct ethtool_test *eth_test, u64 *data)
1863 {
1864         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1865         bool if_running = netif_running(netdev);
1866
1867         set_bit(__IXGBE_TESTING, &adapter->state);
1868         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1869                 /* Offline tests */
1870
1871                 e_info(hw, "offline testing starting\n");
1872
1873                 /* Link test performed before hardware reset so autoneg doesn't
1874                  * interfere with test result */
1875                 if (ixgbe_link_test(adapter, &data[4]))
1876                         eth_test->flags |= ETH_TEST_FL_FAILED;
1877
1878                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1879                         int i;
1880                         for (i = 0; i < adapter->num_vfs; i++) {
1881                                 if (adapter->vfinfo[i].clear_to_send) {
1882                                         netdev_warn(netdev, "%s",
1883                                                     "offline diagnostic is not "
1884                                                     "supported when VFs are "
1885                                                     "present\n");
1886                                         data[0] = 1;
1887                                         data[1] = 1;
1888                                         data[2] = 1;
1889                                         data[3] = 1;
1890                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1891                                         clear_bit(__IXGBE_TESTING,
1892                                                   &adapter->state);
1893                                         goto skip_ol_tests;
1894                                 }
1895                         }
1896                 }
1897
1898                 if (if_running)
1899                         /* indicate we're in test mode */
1900                         dev_close(netdev);
1901                 else
1902                         ixgbe_reset(adapter);
1903
1904                 e_info(hw, "register testing starting\n");
1905                 if (ixgbe_reg_test(adapter, &data[0]))
1906                         eth_test->flags |= ETH_TEST_FL_FAILED;
1907
1908                 ixgbe_reset(adapter);
1909                 e_info(hw, "eeprom testing starting\n");
1910                 if (ixgbe_eeprom_test(adapter, &data[1]))
1911                         eth_test->flags |= ETH_TEST_FL_FAILED;
1912
1913                 ixgbe_reset(adapter);
1914                 e_info(hw, "interrupt testing starting\n");
1915                 if (ixgbe_intr_test(adapter, &data[2]))
1916                         eth_test->flags |= ETH_TEST_FL_FAILED;
1917
1918                 /* If SRIOV or VMDq is enabled then skip MAC
1919                  * loopback diagnostic. */
1920                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1921                                       IXGBE_FLAG_VMDQ_ENABLED)) {
1922                         e_info(hw, "Skip MAC loopback diagnostic in VT "
1923                                "mode\n");
1924                         data[3] = 0;
1925                         goto skip_loopback;
1926                 }
1927
1928                 ixgbe_reset(adapter);
1929                 e_info(hw, "loopback testing starting\n");
1930                 if (ixgbe_loopback_test(adapter, &data[3]))
1931                         eth_test->flags |= ETH_TEST_FL_FAILED;
1932
1933 skip_loopback:
1934                 ixgbe_reset(adapter);
1935
1936                 clear_bit(__IXGBE_TESTING, &adapter->state);
1937                 if (if_running)
1938                         dev_open(netdev);
1939         } else {
1940                 e_info(hw, "online testing starting\n");
1941                 /* Online tests */
1942                 if (ixgbe_link_test(adapter, &data[4]))
1943                         eth_test->flags |= ETH_TEST_FL_FAILED;
1944
1945                 /* Online tests aren't run; pass by default */
1946                 data[0] = 0;
1947                 data[1] = 0;
1948                 data[2] = 0;
1949                 data[3] = 0;
1950
1951                 clear_bit(__IXGBE_TESTING, &adapter->state);
1952         }
1953 skip_ol_tests:
1954         msleep_interruptible(4 * 1000);
1955 }
1956
1957 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1958                                struct ethtool_wolinfo *wol)
1959 {
1960         struct ixgbe_hw *hw = &adapter->hw;
1961         int retval = 1;
1962
1963         /* WOL not supported except for the following */
1964         switch(hw->device_id) {
1965         case IXGBE_DEV_ID_82599_SFP:
1966                 /* Only this subdevice supports WOL */
1967                 if (hw->subsystem_device_id != IXGBE_SUBDEV_ID_82599_SFP) {
1968                         wol->supported = 0;
1969                         break;
1970                 }
1971                 retval = 0;
1972                 break;
1973         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
1974                 /* All except this subdevice support WOL */
1975                 if (hw->subsystem_device_id ==
1976                     IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {
1977                         wol->supported = 0;
1978                         break;
1979                 }
1980                 retval = 0;
1981                 break;
1982         case IXGBE_DEV_ID_82599_KX4:
1983                 retval = 0;
1984                 break;
1985         default:
1986                 wol->supported = 0;
1987         }
1988
1989         return retval;
1990 }
1991
1992 static void ixgbe_get_wol(struct net_device *netdev,
1993                           struct ethtool_wolinfo *wol)
1994 {
1995         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1996
1997         wol->supported = WAKE_UCAST | WAKE_MCAST |
1998                          WAKE_BCAST | WAKE_MAGIC;
1999         wol->wolopts = 0;
2000
2001         if (ixgbe_wol_exclusion(adapter, wol) ||
2002             !device_can_wakeup(&adapter->pdev->dev))
2003                 return;
2004
2005         if (adapter->wol & IXGBE_WUFC_EX)
2006                 wol->wolopts |= WAKE_UCAST;
2007         if (adapter->wol & IXGBE_WUFC_MC)
2008                 wol->wolopts |= WAKE_MCAST;
2009         if (adapter->wol & IXGBE_WUFC_BC)
2010                 wol->wolopts |= WAKE_BCAST;
2011         if (adapter->wol & IXGBE_WUFC_MAG)
2012                 wol->wolopts |= WAKE_MAGIC;
2013 }
2014
2015 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2016 {
2017         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2018
2019         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
2020                 return -EOPNOTSUPP;
2021
2022         if (ixgbe_wol_exclusion(adapter, wol))
2023                 return wol->wolopts ? -EOPNOTSUPP : 0;
2024
2025         adapter->wol = 0;
2026
2027         if (wol->wolopts & WAKE_UCAST)
2028                 adapter->wol |= IXGBE_WUFC_EX;
2029         if (wol->wolopts & WAKE_MCAST)
2030                 adapter->wol |= IXGBE_WUFC_MC;
2031         if (wol->wolopts & WAKE_BCAST)
2032                 adapter->wol |= IXGBE_WUFC_BC;
2033         if (wol->wolopts & WAKE_MAGIC)
2034                 adapter->wol |= IXGBE_WUFC_MAG;
2035
2036         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2037
2038         return 0;
2039 }
2040
2041 static int ixgbe_nway_reset(struct net_device *netdev)
2042 {
2043         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2044
2045         if (netif_running(netdev))
2046                 ixgbe_reinit_locked(adapter);
2047
2048         return 0;
2049 }
2050
2051 static int ixgbe_set_phys_id(struct net_device *netdev,
2052                              enum ethtool_phys_id_state state)
2053 {
2054         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2055         struct ixgbe_hw *hw = &adapter->hw;
2056
2057         switch (state) {
2058         case ETHTOOL_ID_ACTIVE:
2059                 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
2060                 return 2;
2061
2062         case ETHTOOL_ID_ON:
2063                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
2064                 break;
2065
2066         case ETHTOOL_ID_OFF:
2067                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
2068                 break;
2069
2070         case ETHTOOL_ID_INACTIVE:
2071                 /* Restore LED settings */
2072                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
2073                 break;
2074         }
2075
2076         return 0;
2077 }
2078
2079 static int ixgbe_get_coalesce(struct net_device *netdev,
2080                               struct ethtool_coalesce *ec)
2081 {
2082         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2083
2084         ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0]->work_limit;
2085
2086         /* only valid if in constant ITR mode */
2087         switch (adapter->rx_itr_setting) {
2088         case 0:
2089                 /* throttling disabled */
2090                 ec->rx_coalesce_usecs = 0;
2091                 break;
2092         case 1:
2093                 /* dynamic ITR mode */
2094                 ec->rx_coalesce_usecs = 1;
2095                 break;
2096         default:
2097                 /* fixed interrupt rate mode */
2098                 ec->rx_coalesce_usecs = 1000000/adapter->rx_eitr_param;
2099                 break;
2100         }
2101
2102         /* if in mixed tx/rx queues per vector mode, report only rx settings */
2103         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count)
2104                 return 0;
2105
2106         /* only valid if in constant ITR mode */
2107         switch (adapter->tx_itr_setting) {
2108         case 0:
2109                 /* throttling disabled */
2110                 ec->tx_coalesce_usecs = 0;
2111                 break;
2112         case 1:
2113                 /* dynamic ITR mode */
2114                 ec->tx_coalesce_usecs = 1;
2115                 break;
2116         default:
2117                 ec->tx_coalesce_usecs = 1000000/adapter->tx_eitr_param;
2118                 break;
2119         }
2120
2121         return 0;
2122 }
2123
2124 /*
2125  * this function must be called before setting the new value of
2126  * rx_itr_setting
2127  */
2128 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter,
2129                              struct ethtool_coalesce *ec)
2130 {
2131         struct net_device *netdev = adapter->netdev;
2132
2133         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
2134                 return false;
2135
2136         /* if interrupt rate is too high then disable RSC */
2137         if (ec->rx_coalesce_usecs != 1 &&
2138             ec->rx_coalesce_usecs <= 1000000/IXGBE_MAX_RSC_INT_RATE) {
2139                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2140                         e_info(probe, "rx-usecs set too low, "
2141                                       "disabling RSC\n");
2142                         adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2143                         return true;
2144                 }
2145         } else {
2146                 /* check the feature flag value and enable RSC if necessary */
2147                 if ((netdev->features & NETIF_F_LRO) &&
2148                     !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2149                         e_info(probe, "rx-usecs set to %d, "
2150                                       "re-enabling RSC\n",
2151                                ec->rx_coalesce_usecs);
2152                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2153                         return true;
2154                 }
2155         }
2156         return false;
2157 }
2158
2159 static int ixgbe_set_coalesce(struct net_device *netdev,
2160                               struct ethtool_coalesce *ec)
2161 {
2162         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2163         struct ixgbe_q_vector *q_vector;
2164         int i;
2165         bool need_reset = false;
2166
2167         /* don't accept tx specific changes if we've got mixed RxTx vectors */
2168         if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count
2169            && ec->tx_coalesce_usecs)
2170                 return -EINVAL;
2171
2172         if (ec->tx_max_coalesced_frames_irq)
2173                 adapter->tx_ring[0]->work_limit = ec->tx_max_coalesced_frames_irq;
2174
2175         if (ec->rx_coalesce_usecs > 1) {
2176                 /* check the limits */
2177                 if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2178                     (1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2179                         return -EINVAL;
2180
2181                 /* check the old value and enable RSC if necessary */
2182                 need_reset = ixgbe_update_rsc(adapter, ec);
2183
2184                 /* store the value in ints/second */
2185                 adapter->rx_eitr_param = 1000000/ec->rx_coalesce_usecs;
2186
2187                 /* static value of interrupt rate */
2188                 adapter->rx_itr_setting = adapter->rx_eitr_param;
2189                 /* clear the lower bit as its used for dynamic state */
2190                 adapter->rx_itr_setting &= ~1;
2191         } else if (ec->rx_coalesce_usecs == 1) {
2192                 /* check the old value and enable RSC if necessary */
2193                 need_reset = ixgbe_update_rsc(adapter, ec);
2194
2195                 /* 1 means dynamic mode */
2196                 adapter->rx_eitr_param = 20000;
2197                 adapter->rx_itr_setting = 1;
2198         } else {
2199                 /* check the old value and enable RSC if necessary */
2200                 need_reset = ixgbe_update_rsc(adapter, ec);
2201                 /*
2202                  * any other value means disable eitr, which is best
2203                  * served by setting the interrupt rate very high
2204                  */
2205                 adapter->rx_eitr_param = IXGBE_MAX_INT_RATE;
2206                 adapter->rx_itr_setting = 0;
2207         }
2208
2209         if (ec->tx_coalesce_usecs > 1) {
2210                 /*
2211                  * don't have to worry about max_int as above because
2212                  * tx vectors don't do hardware RSC (an rx function)
2213                  */
2214                 /* check the limits */
2215                 if ((1000000/ec->tx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
2216                     (1000000/ec->tx_coalesce_usecs < IXGBE_MIN_INT_RATE))
2217                         return -EINVAL;
2218
2219                 /* store the value in ints/second */
2220                 adapter->tx_eitr_param = 1000000/ec->tx_coalesce_usecs;
2221
2222                 /* static value of interrupt rate */
2223                 adapter->tx_itr_setting = adapter->tx_eitr_param;
2224
2225                 /* clear the lower bit as its used for dynamic state */
2226                 adapter->tx_itr_setting &= ~1;
2227         } else if (ec->tx_coalesce_usecs == 1) {
2228                 /* 1 means dynamic mode */
2229                 adapter->tx_eitr_param = 10000;
2230                 adapter->tx_itr_setting = 1;
2231         } else {
2232                 adapter->tx_eitr_param = IXGBE_MAX_INT_RATE;
2233                 adapter->tx_itr_setting = 0;
2234         }
2235
2236         /* MSI/MSIx Interrupt Mode */
2237         if (adapter->flags &
2238             (IXGBE_FLAG_MSIX_ENABLED | IXGBE_FLAG_MSI_ENABLED)) {
2239                 int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2240                 for (i = 0; i < num_vectors; i++) {
2241                         q_vector = adapter->q_vector[i];
2242                         if (q_vector->txr_count && !q_vector->rxr_count)
2243                                 /* tx only */
2244                                 q_vector->eitr = adapter->tx_eitr_param;
2245                         else
2246                                 /* rx only or mixed */
2247                                 q_vector->eitr = adapter->rx_eitr_param;
2248                         ixgbe_write_eitr(q_vector);
2249                 }
2250         /* Legacy Interrupt Mode */
2251         } else {
2252                 q_vector = adapter->q_vector[0];
2253                 q_vector->eitr = adapter->rx_eitr_param;
2254                 ixgbe_write_eitr(q_vector);
2255         }
2256
2257         /*
2258          * do reset here at the end to make sure EITR==0 case is handled
2259          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2260          * also locks in RSC enable/disable which requires reset
2261          */
2262         if (need_reset)
2263                 ixgbe_do_reset(netdev);
2264
2265         return 0;
2266 }
2267
2268 static int ixgbe_set_flags(struct net_device *netdev, u32 data)
2269 {
2270         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2271         bool need_reset = false;
2272         int rc;
2273
2274 #ifdef CONFIG_IXGBE_DCB
2275         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
2276             !(data & ETH_FLAG_RXVLAN))
2277                 return -EINVAL;
2278 #endif
2279
2280         need_reset = (data & ETH_FLAG_RXVLAN) !=
2281                      (netdev->features & NETIF_F_HW_VLAN_RX);
2282
2283         if ((data & ETH_FLAG_RXHASH) &&
2284             !(adapter->flags & IXGBE_FLAG_RSS_ENABLED))
2285                 return -EOPNOTSUPP;
2286
2287         rc = ethtool_op_set_flags(netdev, data, ETH_FLAG_LRO | ETH_FLAG_NTUPLE |
2288                                   ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN |
2289                                   ETH_FLAG_RXHASH);
2290         if (rc)
2291                 return rc;
2292
2293         /* if state changes we need to update adapter->flags and reset */
2294         if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
2295             (!!(data & ETH_FLAG_LRO) !=
2296              !!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) {
2297                 if ((data & ETH_FLAG_LRO) &&
2298                     (!adapter->rx_itr_setting ||
2299                      (adapter->rx_itr_setting > IXGBE_MAX_RSC_INT_RATE))) {
2300                         e_info(probe, "rx-usecs set too low, "
2301                                       "not enabling RSC.\n");
2302                 } else {
2303                         adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
2304                         switch (adapter->hw.mac.type) {
2305                         case ixgbe_mac_X540:
2306                                 ixgbe_set_rsc(adapter);
2307                                 break;
2308                         case ixgbe_mac_82599EB:
2309                                 need_reset = true;
2310                                 break;
2311                         default:
2312                                 break;
2313                         }
2314                 }
2315         }
2316
2317         /*
2318          * Check if Flow Director n-tuple support was enabled or disabled.  If
2319          * the state changed, we need to reset.
2320          */
2321         if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) {
2322                 /* turn off ATR, enable perfect filters and reset */
2323                 if (data & ETH_FLAG_NTUPLE) {
2324                         adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2325                         adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2326                         need_reset = true;
2327                 }
2328         } else if (!(data & ETH_FLAG_NTUPLE)) {
2329                 /* turn off Flow Director, set ATR and reset */
2330                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2331                 if ((adapter->flags & IXGBE_FLAG_RSS_ENABLED) &&
2332                     !(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
2333                         adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
2334                 need_reset = true;
2335         }
2336
2337         if (need_reset)
2338                 ixgbe_do_reset(netdev);
2339
2340         return 0;
2341 }
2342
2343 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2344                                         struct ethtool_rxnfc *cmd)
2345 {
2346         union ixgbe_atr_input *mask = &adapter->fdir_mask;
2347         struct ethtool_rx_flow_spec *fsp =
2348                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2349         struct hlist_node *node, *node2;
2350         struct ixgbe_fdir_filter *rule = NULL;
2351
2352         /* report total rule count */
2353         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2354
2355         hlist_for_each_entry_safe(rule, node, node2,
2356                                   &adapter->fdir_filter_list, fdir_node) {
2357                 if (fsp->location <= rule->sw_idx)
2358                         break;
2359         }
2360
2361         if (!rule || fsp->location != rule->sw_idx)
2362                 return -EINVAL;
2363
2364         /* fill out the flow spec entry */
2365
2366         /* set flow type field */
2367         switch (rule->filter.formatted.flow_type) {
2368         case IXGBE_ATR_FLOW_TYPE_TCPV4:
2369                 fsp->flow_type = TCP_V4_FLOW;
2370                 break;
2371         case IXGBE_ATR_FLOW_TYPE_UDPV4:
2372                 fsp->flow_type = UDP_V4_FLOW;
2373                 break;
2374         case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2375                 fsp->flow_type = SCTP_V4_FLOW;
2376                 break;
2377         case IXGBE_ATR_FLOW_TYPE_IPV4:
2378                 fsp->flow_type = IP_USER_FLOW;
2379                 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2380                 fsp->h_u.usr_ip4_spec.proto = 0;
2381                 fsp->m_u.usr_ip4_spec.proto = 0;
2382                 break;
2383         default:
2384                 return -EINVAL;
2385         }
2386
2387         fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2388         fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2389         fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2390         fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2391         fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2392         fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2393         fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2394         fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2395         fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2396         fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2397         fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2398         fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2399         fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2400         fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2401         fsp->flow_type |= FLOW_EXT;
2402
2403         /* record action */
2404         if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2405                 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2406         else
2407                 fsp->ring_cookie = rule->action;
2408
2409         return 0;
2410 }
2411
2412 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2413                                       struct ethtool_rxnfc *cmd,
2414                                       u32 *rule_locs)
2415 {
2416         struct hlist_node *node, *node2;
2417         struct ixgbe_fdir_filter *rule;
2418         int cnt = 0;
2419
2420         /* report total rule count */
2421         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2422
2423         hlist_for_each_entry_safe(rule, node, node2,
2424                                   &adapter->fdir_filter_list, fdir_node) {
2425                 if (cnt == cmd->rule_cnt)
2426                         return -EMSGSIZE;
2427                 rule_locs[cnt] = rule->sw_idx;
2428                 cnt++;
2429         }
2430
2431         return 0;
2432 }
2433
2434 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2435                            void *rule_locs)
2436 {
2437         struct ixgbe_adapter *adapter = netdev_priv(dev);
2438         int ret = -EOPNOTSUPP;
2439
2440         switch (cmd->cmd) {
2441         case ETHTOOL_GRXRINGS:
2442                 cmd->data = adapter->num_rx_queues;
2443                 ret = 0;
2444                 break;
2445         case ETHTOOL_GRXCLSRLCNT:
2446                 cmd->rule_cnt = adapter->fdir_filter_count;
2447                 ret = 0;
2448                 break;
2449         case ETHTOOL_GRXCLSRULE:
2450                 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2451                 break;
2452         case ETHTOOL_GRXCLSRLALL:
2453                 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd,
2454                                                  (u32 *)rule_locs);
2455                 break;
2456         default:
2457                 break;
2458         }
2459
2460         return ret;
2461 }
2462
2463 static int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2464                                            struct ixgbe_fdir_filter *input,
2465                                            u16 sw_idx)
2466 {
2467         struct ixgbe_hw *hw = &adapter->hw;
2468         struct hlist_node *node, *node2, *parent;
2469         struct ixgbe_fdir_filter *rule;
2470         int err = -EINVAL;
2471
2472         parent = NULL;
2473         rule = NULL;
2474
2475         hlist_for_each_entry_safe(rule, node, node2,
2476                                   &adapter->fdir_filter_list, fdir_node) {
2477                 /* hash found, or no matching entry */
2478                 if (rule->sw_idx >= sw_idx)
2479                         break;
2480                 parent = node;
2481         }
2482
2483         /* if there is an old rule occupying our place remove it */
2484         if (rule && (rule->sw_idx == sw_idx)) {
2485                 if (!input || (rule->filter.formatted.bkt_hash !=
2486                                input->filter.formatted.bkt_hash)) {
2487                         err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2488                                                                 &rule->filter,
2489                                                                 sw_idx);
2490                 }
2491
2492                 hlist_del(&rule->fdir_node);
2493                 kfree(rule);
2494                 adapter->fdir_filter_count--;
2495         }
2496
2497         /*
2498          * If no input this was a delete, err should be 0 if a rule was
2499          * successfully found and removed from the list else -EINVAL
2500          */
2501         if (!input)
2502                 return err;
2503
2504         /* initialize node and set software index */
2505         INIT_HLIST_NODE(&input->fdir_node);
2506
2507         /* add filter to the list */
2508         if (parent)
2509                 hlist_add_after(parent, &input->fdir_node);
2510         else
2511                 hlist_add_head(&input->fdir_node,
2512                                &adapter->fdir_filter_list);
2513
2514         /* update counts */
2515         adapter->fdir_filter_count++;
2516
2517         return 0;
2518 }
2519
2520 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2521                                        u8 *flow_type)
2522 {
2523         switch (fsp->flow_type & ~FLOW_EXT) {
2524         case TCP_V4_FLOW:
2525                 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2526                 break;
2527         case UDP_V4_FLOW:
2528                 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2529                 break;
2530         case SCTP_V4_FLOW:
2531                 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2532                 break;
2533         case IP_USER_FLOW:
2534                 switch (fsp->h_u.usr_ip4_spec.proto) {
2535                 case IPPROTO_TCP:
2536                         *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2537                         break;
2538                 case IPPROTO_UDP:
2539                         *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2540                         break;
2541                 case IPPROTO_SCTP:
2542                         *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2543                         break;
2544                 case 0:
2545                         if (!fsp->m_u.usr_ip4_spec.proto) {
2546                                 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2547                                 break;
2548                         }
2549                 default:
2550                         return 0;
2551                 }
2552                 break;
2553         default:
2554                 return 0;
2555         }
2556
2557         return 1;
2558 }
2559
2560 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2561                                         struct ethtool_rxnfc *cmd)
2562 {
2563         struct ethtool_rx_flow_spec *fsp =
2564                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2565         struct ixgbe_hw *hw = &adapter->hw;
2566         struct ixgbe_fdir_filter *input;
2567         union ixgbe_atr_input mask;
2568         int err;
2569
2570         if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2571                 return -EOPNOTSUPP;
2572
2573         /*
2574          * Don't allow programming if the action is a queue greater than
2575          * the number of online Rx queues.
2576          */
2577         if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) &&
2578             (fsp->ring_cookie >= adapter->num_rx_queues))
2579                 return -EINVAL;
2580
2581         /* Don't allow indexes to exist outside of available space */
2582         if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2583                 e_err(drv, "Location out of range\n");
2584                 return -EINVAL;
2585         }
2586
2587         input = kzalloc(sizeof(*input), GFP_ATOMIC);
2588         if (!input)
2589                 return -ENOMEM;
2590
2591         memset(&mask, 0, sizeof(union ixgbe_atr_input));
2592
2593         /* set SW index */
2594         input->sw_idx = fsp->location;
2595
2596         /* record flow type */
2597         if (!ixgbe_flowspec_to_flow_type(fsp,
2598                                          &input->filter.formatted.flow_type)) {
2599                 e_err(drv, "Unrecognized flow type\n");
2600                 goto err_out;
2601         }
2602
2603         mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2604                                    IXGBE_ATR_L4TYPE_MASK;
2605
2606         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2607                 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
2608
2609         /* Copy input into formatted structures */
2610         input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2611         mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
2612         input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2613         mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
2614         input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
2615         mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
2616         input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
2617         mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
2618
2619         if (fsp->flow_type & FLOW_EXT) {
2620                 input->filter.formatted.vm_pool =
2621                                 (unsigned char)ntohl(fsp->h_ext.data[1]);
2622                 mask.formatted.vm_pool =
2623                                 (unsigned char)ntohl(fsp->m_ext.data[1]);
2624                 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
2625                 mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
2626                 input->filter.formatted.flex_bytes =
2627                                                 fsp->h_ext.vlan_etype;
2628                 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
2629         }
2630
2631         /* determine if we need to drop or route the packet */
2632         if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2633                 input->action = IXGBE_FDIR_DROP_QUEUE;
2634         else
2635                 input->action = fsp->ring_cookie;
2636
2637         spin_lock(&adapter->fdir_perfect_lock);
2638
2639         if (hlist_empty(&adapter->fdir_filter_list)) {
2640                 /* save mask and program input mask into HW */
2641                 memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
2642                 err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
2643                 if (err) {
2644                         e_err(drv, "Error writing mask\n");
2645                         goto err_out_w_lock;
2646                 }
2647         } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
2648                 e_err(drv, "Only one mask supported per port\n");
2649                 goto err_out_w_lock;
2650         }
2651
2652         /* apply mask and compute/store hash */
2653         ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
2654
2655         /* program filters to filter memory */
2656         err = ixgbe_fdir_write_perfect_filter_82599(hw,
2657                                 &input->filter, input->sw_idx,
2658                                 adapter->rx_ring[input->action]->reg_idx);
2659         if (err)
2660                 goto err_out_w_lock;
2661
2662         ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
2663
2664         spin_unlock(&adapter->fdir_perfect_lock);
2665
2666         return err;
2667 err_out_w_lock:
2668         spin_unlock(&adapter->fdir_perfect_lock);
2669 err_out:
2670         kfree(input);
2671         return -EINVAL;
2672 }
2673
2674 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2675                                         struct ethtool_rxnfc *cmd)
2676 {
2677         struct ethtool_rx_flow_spec *fsp =
2678                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2679         int err;
2680
2681         spin_lock(&adapter->fdir_perfect_lock);
2682         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location);
2683         spin_unlock(&adapter->fdir_perfect_lock);
2684
2685         return err;
2686 }
2687
2688 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2689 {
2690         struct ixgbe_adapter *adapter = netdev_priv(dev);
2691         int ret = -EOPNOTSUPP;
2692
2693         switch (cmd->cmd) {
2694         case ETHTOOL_SRXCLSRLINS:
2695                 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
2696                 break;
2697         case ETHTOOL_SRXCLSRLDEL:
2698                 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
2699                 break;
2700         default:
2701                 break;
2702         }
2703
2704         return ret;
2705 }
2706
2707 static const struct ethtool_ops ixgbe_ethtool_ops = {
2708         .get_settings           = ixgbe_get_settings,
2709         .set_settings           = ixgbe_set_settings,
2710         .get_drvinfo            = ixgbe_get_drvinfo,
2711         .get_regs_len           = ixgbe_get_regs_len,
2712         .get_regs               = ixgbe_get_regs,
2713         .get_wol                = ixgbe_get_wol,
2714         .set_wol                = ixgbe_set_wol,
2715         .nway_reset             = ixgbe_nway_reset,
2716         .get_link               = ethtool_op_get_link,
2717         .get_eeprom_len         = ixgbe_get_eeprom_len,
2718         .get_eeprom             = ixgbe_get_eeprom,
2719         .get_ringparam          = ixgbe_get_ringparam,
2720         .set_ringparam          = ixgbe_set_ringparam,
2721         .get_pauseparam         = ixgbe_get_pauseparam,
2722         .set_pauseparam         = ixgbe_set_pauseparam,
2723         .get_rx_csum            = ixgbe_get_rx_csum,
2724         .set_rx_csum            = ixgbe_set_rx_csum,
2725         .get_tx_csum            = ixgbe_get_tx_csum,
2726         .set_tx_csum            = ixgbe_set_tx_csum,
2727         .get_sg                 = ethtool_op_get_sg,
2728         .set_sg                 = ethtool_op_set_sg,
2729         .get_msglevel           = ixgbe_get_msglevel,
2730         .set_msglevel           = ixgbe_set_msglevel,
2731         .get_tso                = ethtool_op_get_tso,
2732         .set_tso                = ixgbe_set_tso,
2733         .self_test              = ixgbe_diag_test,
2734         .get_strings            = ixgbe_get_strings,
2735         .set_phys_id            = ixgbe_set_phys_id,
2736         .get_sset_count         = ixgbe_get_sset_count,
2737         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
2738         .get_coalesce           = ixgbe_get_coalesce,
2739         .set_coalesce           = ixgbe_set_coalesce,
2740         .get_flags              = ethtool_op_get_flags,
2741         .set_flags              = ixgbe_set_flags,
2742         .get_rxnfc              = ixgbe_get_rxnfc,
2743         .set_rxnfc              = ixgbe_set_rxnfc,
2744 };
2745
2746 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2747 {
2748         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2749 }