e1d3af60c53bd75d8dea061dfe378669567cf586
[pandora-kernel.git] / drivers / net / ieee802154 / at86rf230.c
1 /*
2  * AT86RF230/RF231 driver
3  *
4  * Copyright (C) 2009-2012 Siemens AG
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2
8  * as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18  *
19  * Written by:
20  * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
21  * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
22  */
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/interrupt.h>
26 #include <linux/irq.h>
27 #include <linux/gpio.h>
28 #include <linux/delay.h>
29 #include <linux/mutex.h>
30 #include <linux/workqueue.h>
31 #include <linux/spinlock.h>
32 #include <linux/spi/spi.h>
33 #include <linux/spi/at86rf230.h>
34 #include <linux/skbuff.h>
35 #include <linux/of_gpio.h>
36
37 #include <net/mac802154.h>
38 #include <net/wpan-phy.h>
39
40 struct at86rf230_local {
41         struct spi_device *spi;
42
43         u8 part;
44         u8 vers;
45
46         u8 buf[2];
47         struct mutex bmux;
48
49         struct work_struct irqwork;
50         struct completion tx_complete;
51
52         struct ieee802154_dev *dev;
53
54         spinlock_t lock;
55         bool irq_busy;
56         bool is_tx;
57         bool tx_aret;
58
59         int rssi_base_val;
60 };
61
62 static bool is_rf212(struct at86rf230_local *local)
63 {
64         return local->part == 7;
65 }
66
67 #define RG_TRX_STATUS   (0x01)
68 #define SR_TRX_STATUS           0x01, 0x1f, 0
69 #define SR_RESERVED_01_3        0x01, 0x20, 5
70 #define SR_CCA_STATUS           0x01, 0x40, 6
71 #define SR_CCA_DONE             0x01, 0x80, 7
72 #define RG_TRX_STATE    (0x02)
73 #define SR_TRX_CMD              0x02, 0x1f, 0
74 #define SR_TRAC_STATUS          0x02, 0xe0, 5
75 #define RG_TRX_CTRL_0   (0x03)
76 #define SR_CLKM_CTRL            0x03, 0x07, 0
77 #define SR_CLKM_SHA_SEL         0x03, 0x08, 3
78 #define SR_PAD_IO_CLKM          0x03, 0x30, 4
79 #define SR_PAD_IO               0x03, 0xc0, 6
80 #define RG_TRX_CTRL_1   (0x04)
81 #define SR_IRQ_POLARITY         0x04, 0x01, 0
82 #define SR_IRQ_MASK_MODE        0x04, 0x02, 1
83 #define SR_SPI_CMD_MODE         0x04, 0x0c, 2
84 #define SR_RX_BL_CTRL           0x04, 0x10, 4
85 #define SR_TX_AUTO_CRC_ON       0x04, 0x20, 5
86 #define SR_IRQ_2_EXT_EN         0x04, 0x40, 6
87 #define SR_PA_EXT_EN            0x04, 0x80, 7
88 #define RG_PHY_TX_PWR   (0x05)
89 #define SR_TX_PWR               0x05, 0x0f, 0
90 #define SR_PA_LT                0x05, 0x30, 4
91 #define SR_PA_BUF_LT            0x05, 0xc0, 6
92 #define RG_PHY_RSSI     (0x06)
93 #define SR_RSSI                 0x06, 0x1f, 0
94 #define SR_RND_VALUE            0x06, 0x60, 5
95 #define SR_RX_CRC_VALID         0x06, 0x80, 7
96 #define RG_PHY_ED_LEVEL (0x07)
97 #define SR_ED_LEVEL             0x07, 0xff, 0
98 #define RG_PHY_CC_CCA   (0x08)
99 #define SR_CHANNEL              0x08, 0x1f, 0
100 #define SR_CCA_MODE             0x08, 0x60, 5
101 #define SR_CCA_REQUEST          0x08, 0x80, 7
102 #define RG_CCA_THRES    (0x09)
103 #define SR_CCA_ED_THRES         0x09, 0x0f, 0
104 #define SR_RESERVED_09_1        0x09, 0xf0, 4
105 #define RG_RX_CTRL      (0x0a)
106 #define SR_PDT_THRES            0x0a, 0x0f, 0
107 #define SR_RESERVED_0a_1        0x0a, 0xf0, 4
108 #define RG_SFD_VALUE    (0x0b)
109 #define SR_SFD_VALUE            0x0b, 0xff, 0
110 #define RG_TRX_CTRL_2   (0x0c)
111 #define SR_OQPSK_DATA_RATE      0x0c, 0x03, 0
112 #define SR_SUB_MODE             0x0c, 0x04, 2
113 #define SR_BPSK_QPSK            0x0c, 0x08, 3
114 #define SR_OQPSK_SUB1_RC_EN     0x0c, 0x10, 4
115 #define SR_RESERVED_0c_5        0x0c, 0x60, 5
116 #define SR_RX_SAFE_MODE         0x0c, 0x80, 7
117 #define RG_ANT_DIV      (0x0d)
118 #define SR_ANT_CTRL             0x0d, 0x03, 0
119 #define SR_ANT_EXT_SW_EN        0x0d, 0x04, 2
120 #define SR_ANT_DIV_EN           0x0d, 0x08, 3
121 #define SR_RESERVED_0d_2        0x0d, 0x70, 4
122 #define SR_ANT_SEL              0x0d, 0x80, 7
123 #define RG_IRQ_MASK     (0x0e)
124 #define SR_IRQ_MASK             0x0e, 0xff, 0
125 #define RG_IRQ_STATUS   (0x0f)
126 #define SR_IRQ_0_PLL_LOCK       0x0f, 0x01, 0
127 #define SR_IRQ_1_PLL_UNLOCK     0x0f, 0x02, 1
128 #define SR_IRQ_2_RX_START       0x0f, 0x04, 2
129 #define SR_IRQ_3_TRX_END        0x0f, 0x08, 3
130 #define SR_IRQ_4_CCA_ED_DONE    0x0f, 0x10, 4
131 #define SR_IRQ_5_AMI            0x0f, 0x20, 5
132 #define SR_IRQ_6_TRX_UR         0x0f, 0x40, 6
133 #define SR_IRQ_7_BAT_LOW        0x0f, 0x80, 7
134 #define RG_VREG_CTRL    (0x10)
135 #define SR_RESERVED_10_6        0x10, 0x03, 0
136 #define SR_DVDD_OK              0x10, 0x04, 2
137 #define SR_DVREG_EXT            0x10, 0x08, 3
138 #define SR_RESERVED_10_3        0x10, 0x30, 4
139 #define SR_AVDD_OK              0x10, 0x40, 6
140 #define SR_AVREG_EXT            0x10, 0x80, 7
141 #define RG_BATMON       (0x11)
142 #define SR_BATMON_VTH           0x11, 0x0f, 0
143 #define SR_BATMON_HR            0x11, 0x10, 4
144 #define SR_BATMON_OK            0x11, 0x20, 5
145 #define SR_RESERVED_11_1        0x11, 0xc0, 6
146 #define RG_XOSC_CTRL    (0x12)
147 #define SR_XTAL_TRIM            0x12, 0x0f, 0
148 #define SR_XTAL_MODE            0x12, 0xf0, 4
149 #define RG_RX_SYN       (0x15)
150 #define SR_RX_PDT_LEVEL         0x15, 0x0f, 0
151 #define SR_RESERVED_15_2        0x15, 0x70, 4
152 #define SR_RX_PDT_DIS           0x15, 0x80, 7
153 #define RG_XAH_CTRL_1   (0x17)
154 #define SR_RESERVED_17_8        0x17, 0x01, 0
155 #define SR_AACK_PROM_MODE       0x17, 0x02, 1
156 #define SR_AACK_ACK_TIME        0x17, 0x04, 2
157 #define SR_RESERVED_17_5        0x17, 0x08, 3
158 #define SR_AACK_UPLD_RES_FT     0x17, 0x10, 4
159 #define SR_AACK_FLTR_RES_FT     0x17, 0x20, 5
160 #define SR_CSMA_LBT_MODE        0x17, 0x40, 6
161 #define SR_RESERVED_17_1        0x17, 0x80, 7
162 #define RG_FTN_CTRL     (0x18)
163 #define SR_RESERVED_18_2        0x18, 0x7f, 0
164 #define SR_FTN_START            0x18, 0x80, 7
165 #define RG_PLL_CF       (0x1a)
166 #define SR_RESERVED_1a_2        0x1a, 0x7f, 0
167 #define SR_PLL_CF_START         0x1a, 0x80, 7
168 #define RG_PLL_DCU      (0x1b)
169 #define SR_RESERVED_1b_3        0x1b, 0x3f, 0
170 #define SR_RESERVED_1b_2        0x1b, 0x40, 6
171 #define SR_PLL_DCU_START        0x1b, 0x80, 7
172 #define RG_PART_NUM     (0x1c)
173 #define SR_PART_NUM             0x1c, 0xff, 0
174 #define RG_VERSION_NUM  (0x1d)
175 #define SR_VERSION_NUM          0x1d, 0xff, 0
176 #define RG_MAN_ID_0     (0x1e)
177 #define SR_MAN_ID_0             0x1e, 0xff, 0
178 #define RG_MAN_ID_1     (0x1f)
179 #define SR_MAN_ID_1             0x1f, 0xff, 0
180 #define RG_SHORT_ADDR_0 (0x20)
181 #define SR_SHORT_ADDR_0         0x20, 0xff, 0
182 #define RG_SHORT_ADDR_1 (0x21)
183 #define SR_SHORT_ADDR_1         0x21, 0xff, 0
184 #define RG_PAN_ID_0     (0x22)
185 #define SR_PAN_ID_0             0x22, 0xff, 0
186 #define RG_PAN_ID_1     (0x23)
187 #define SR_PAN_ID_1             0x23, 0xff, 0
188 #define RG_IEEE_ADDR_0  (0x24)
189 #define SR_IEEE_ADDR_0          0x24, 0xff, 0
190 #define RG_IEEE_ADDR_1  (0x25)
191 #define SR_IEEE_ADDR_1          0x25, 0xff, 0
192 #define RG_IEEE_ADDR_2  (0x26)
193 #define SR_IEEE_ADDR_2          0x26, 0xff, 0
194 #define RG_IEEE_ADDR_3  (0x27)
195 #define SR_IEEE_ADDR_3          0x27, 0xff, 0
196 #define RG_IEEE_ADDR_4  (0x28)
197 #define SR_IEEE_ADDR_4          0x28, 0xff, 0
198 #define RG_IEEE_ADDR_5  (0x29)
199 #define SR_IEEE_ADDR_5          0x29, 0xff, 0
200 #define RG_IEEE_ADDR_6  (0x2a)
201 #define SR_IEEE_ADDR_6          0x2a, 0xff, 0
202 #define RG_IEEE_ADDR_7  (0x2b)
203 #define SR_IEEE_ADDR_7          0x2b, 0xff, 0
204 #define RG_XAH_CTRL_0   (0x2c)
205 #define SR_SLOTTED_OPERATION    0x2c, 0x01, 0
206 #define SR_MAX_CSMA_RETRIES     0x2c, 0x0e, 1
207 #define SR_MAX_FRAME_RETRIES    0x2c, 0xf0, 4
208 #define RG_CSMA_SEED_0  (0x2d)
209 #define SR_CSMA_SEED_0          0x2d, 0xff, 0
210 #define RG_CSMA_SEED_1  (0x2e)
211 #define SR_CSMA_SEED_1          0x2e, 0x07, 0
212 #define SR_AACK_I_AM_COORD      0x2e, 0x08, 3
213 #define SR_AACK_DIS_ACK         0x2e, 0x10, 4
214 #define SR_AACK_SET_PD          0x2e, 0x20, 5
215 #define SR_AACK_FVN_MODE        0x2e, 0xc0, 6
216 #define RG_CSMA_BE      (0x2f)
217 #define SR_MIN_BE               0x2f, 0x0f, 0
218 #define SR_MAX_BE               0x2f, 0xf0, 4
219
220 #define CMD_REG         0x80
221 #define CMD_REG_MASK    0x3f
222 #define CMD_WRITE       0x40
223 #define CMD_FB          0x20
224
225 #define IRQ_BAT_LOW     (1 << 7)
226 #define IRQ_TRX_UR      (1 << 6)
227 #define IRQ_AMI         (1 << 5)
228 #define IRQ_CCA_ED      (1 << 4)
229 #define IRQ_TRX_END     (1 << 3)
230 #define IRQ_RX_START    (1 << 2)
231 #define IRQ_PLL_UNL     (1 << 1)
232 #define IRQ_PLL_LOCK    (1 << 0)
233
234 #define IRQ_ACTIVE_HIGH 0
235 #define IRQ_ACTIVE_LOW  1
236
237 #define STATE_P_ON              0x00    /* BUSY */
238 #define STATE_BUSY_RX           0x01
239 #define STATE_BUSY_TX           0x02
240 #define STATE_FORCE_TRX_OFF     0x03
241 #define STATE_FORCE_TX_ON       0x04    /* IDLE */
242 /* 0x05 */                              /* INVALID_PARAMETER */
243 #define STATE_RX_ON             0x06
244 /* 0x07 */                              /* SUCCESS */
245 #define STATE_TRX_OFF           0x08
246 #define STATE_TX_ON             0x09
247 /* 0x0a - 0x0e */                       /* 0x0a - UNSUPPORTED_ATTRIBUTE */
248 #define STATE_SLEEP             0x0F
249 #define STATE_PREP_DEEP_SLEEP   0x10
250 #define STATE_BUSY_RX_AACK      0x11
251 #define STATE_BUSY_TX_ARET      0x12
252 #define STATE_RX_AACK_ON        0x16
253 #define STATE_TX_ARET_ON        0x19
254 #define STATE_RX_ON_NOCLK       0x1C
255 #define STATE_RX_AACK_ON_NOCLK  0x1D
256 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
257 #define STATE_TRANSITION_IN_PROGRESS 0x1F
258
259 static int
260 __at86rf230_detect_device(struct spi_device *spi, u16 *man_id, u8 *part,
261                 u8 *version)
262 {
263         u8 data[4];
264         u8 *buf = kmalloc(2, GFP_KERNEL);
265         int status;
266         struct spi_message msg;
267         struct spi_transfer xfer = {
268                 .len    = 2,
269                 .tx_buf = buf,
270                 .rx_buf = buf,
271         };
272         u8 reg;
273
274         if (!buf)
275                 return -ENOMEM;
276
277         for (reg = RG_PART_NUM; reg <= RG_MAN_ID_1; reg++) {
278                 buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
279                 buf[1] = 0xff;
280                 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
281                 spi_message_init(&msg);
282                 spi_message_add_tail(&xfer, &msg);
283
284                 status = spi_sync(spi, &msg);
285                 dev_vdbg(&spi->dev, "status = %d\n", status);
286                 if (msg.status)
287                         status = msg.status;
288
289                 dev_vdbg(&spi->dev, "status = %d\n", status);
290                 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
291                 dev_vdbg(&spi->dev, "buf[1] = %02x\n", buf[1]);
292
293                 if (status == 0)
294                         data[reg - RG_PART_NUM] = buf[1];
295                 else
296                         break;
297         }
298
299         if (status == 0) {
300                 *part = data[0];
301                 *version = data[1];
302                 *man_id = (data[3] << 8) | data[2];
303         }
304
305         kfree(buf);
306
307         return status;
308 }
309
310 static int
311 __at86rf230_write(struct at86rf230_local *lp, u8 addr, u8 data)
312 {
313         u8 *buf = lp->buf;
314         int status;
315         struct spi_message msg;
316         struct spi_transfer xfer = {
317                 .len    = 2,
318                 .tx_buf = buf,
319         };
320
321         buf[0] = (addr & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
322         buf[1] = data;
323         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
324         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
325         spi_message_init(&msg);
326         spi_message_add_tail(&xfer, &msg);
327
328         status = spi_sync(lp->spi, &msg);
329         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
330         if (msg.status)
331                 status = msg.status;
332
333         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
334         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
335         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
336
337         return status;
338 }
339
340 static int
341 __at86rf230_read_subreg(struct at86rf230_local *lp,
342                         u8 addr, u8 mask, int shift, u8 *data)
343 {
344         u8 *buf = lp->buf;
345         int status;
346         struct spi_message msg;
347         struct spi_transfer xfer = {
348                 .len    = 2,
349                 .tx_buf = buf,
350                 .rx_buf = buf,
351         };
352
353         buf[0] = (addr & CMD_REG_MASK) | CMD_REG;
354         buf[1] = 0xff;
355         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
356         spi_message_init(&msg);
357         spi_message_add_tail(&xfer, &msg);
358
359         status = spi_sync(lp->spi, &msg);
360         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
361         if (msg.status)
362                 status = msg.status;
363
364         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
365         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
366         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
367
368         if (status == 0)
369                 *data = (buf[1] & mask) >> shift;
370
371         return status;
372 }
373
374 static int
375 at86rf230_read_subreg(struct at86rf230_local *lp,
376                       u8 addr, u8 mask, int shift, u8 *data)
377 {
378         int status;
379
380         mutex_lock(&lp->bmux);
381         status = __at86rf230_read_subreg(lp, addr, mask, shift, data);
382         mutex_unlock(&lp->bmux);
383
384         return status;
385 }
386
387 static int
388 at86rf230_write_subreg(struct at86rf230_local *lp,
389                        u8 addr, u8 mask, int shift, u8 data)
390 {
391         int status;
392         u8 val;
393
394         mutex_lock(&lp->bmux);
395         status = __at86rf230_read_subreg(lp, addr, 0xff, 0, &val);
396         if (status)
397                 goto out;
398
399         val &= ~mask;
400         val |= (data << shift) & mask;
401
402         status = __at86rf230_write(lp, addr, val);
403 out:
404         mutex_unlock(&lp->bmux);
405
406         return status;
407 }
408
409 static int
410 at86rf230_write_fbuf(struct at86rf230_local *lp, u8 *data, u8 len)
411 {
412         u8 *buf = lp->buf;
413         int status;
414         struct spi_message msg;
415         struct spi_transfer xfer_head = {
416                 .len            = 2,
417                 .tx_buf         = buf,
418
419         };
420         struct spi_transfer xfer_buf = {
421                 .len            = len,
422                 .tx_buf         = data,
423         };
424
425         mutex_lock(&lp->bmux);
426         buf[0] = CMD_WRITE | CMD_FB;
427         buf[1] = len + 2; /* 2 bytes for CRC that isn't written */
428
429         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
430         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
431
432         spi_message_init(&msg);
433         spi_message_add_tail(&xfer_head, &msg);
434         spi_message_add_tail(&xfer_buf, &msg);
435
436         status = spi_sync(lp->spi, &msg);
437         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
438         if (msg.status)
439                 status = msg.status;
440
441         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
442         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
443         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
444
445         mutex_unlock(&lp->bmux);
446         return status;
447 }
448
449 static int
450 at86rf230_read_fbuf(struct at86rf230_local *lp, u8 *data, u8 *len, u8 *lqi)
451 {
452         u8 *buf = lp->buf;
453         int status;
454         struct spi_message msg;
455         struct spi_transfer xfer_head = {
456                 .len            = 2,
457                 .tx_buf         = buf,
458                 .rx_buf         = buf,
459         };
460         struct spi_transfer xfer_head1 = {
461                 .len            = 2,
462                 .tx_buf         = buf,
463                 .rx_buf         = buf,
464         };
465         struct spi_transfer xfer_buf = {
466                 .len            = 0,
467                 .rx_buf         = data,
468         };
469
470         mutex_lock(&lp->bmux);
471
472         buf[0] = CMD_FB;
473         buf[1] = 0x00;
474
475         spi_message_init(&msg);
476         spi_message_add_tail(&xfer_head, &msg);
477
478         status = spi_sync(lp->spi, &msg);
479         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
480
481         xfer_buf.len = *(buf + 1) + 1;
482         *len = buf[1];
483
484         buf[0] = CMD_FB;
485         buf[1] = 0x00;
486
487         spi_message_init(&msg);
488         spi_message_add_tail(&xfer_head1, &msg);
489         spi_message_add_tail(&xfer_buf, &msg);
490
491         status = spi_sync(lp->spi, &msg);
492
493         if (msg.status)
494                 status = msg.status;
495
496         dev_vdbg(&lp->spi->dev, "status = %d\n", status);
497         dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
498         dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
499
500         if (status) {
501                 if (lqi && (*len > lp->buf[1]))
502                         *lqi = data[lp->buf[1]];
503         }
504         mutex_unlock(&lp->bmux);
505
506         return status;
507 }
508
509 static int
510 at86rf230_ed(struct ieee802154_dev *dev, u8 *level)
511 {
512         might_sleep();
513         BUG_ON(!level);
514         *level = 0xbe;
515         return 0;
516 }
517
518 static int
519 at86rf230_state(struct ieee802154_dev *dev, int state)
520 {
521         struct at86rf230_local *lp = dev->priv;
522         int rc;
523         u8 val;
524         u8 desired_status;
525
526         might_sleep();
527
528         if (state == STATE_FORCE_TX_ON)
529                 desired_status = STATE_TX_ON;
530         else if (state == STATE_FORCE_TRX_OFF)
531                 desired_status = STATE_TRX_OFF;
532         else
533                 desired_status = state;
534
535         do {
536                 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
537                 if (rc)
538                         goto err;
539         } while (val == STATE_TRANSITION_IN_PROGRESS);
540
541         if (val == desired_status)
542                 return 0;
543
544         /* state is equal to phy states */
545         rc = at86rf230_write_subreg(lp, SR_TRX_CMD, state);
546         if (rc)
547                 goto err;
548
549         do {
550                 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
551                 if (rc)
552                         goto err;
553         } while (val == STATE_TRANSITION_IN_PROGRESS);
554
555
556         if (val == desired_status ||
557             (desired_status == STATE_RX_ON && val == STATE_BUSY_RX) ||
558             (desired_status == STATE_RX_AACK_ON && val == STATE_BUSY_RX_AACK))
559                 return 0;
560
561         pr_err("unexpected state change: %d, asked for %d\n", val, state);
562         return -EBUSY;
563
564 err:
565         pr_err("error: %d\n", rc);
566         return rc;
567 }
568
569 static int
570 at86rf230_start(struct ieee802154_dev *dev)
571 {
572         struct at86rf230_local *lp = dev->priv;
573         u8 rc;
574
575         rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
576         if (rc)
577                 return rc;
578
579         rc = at86rf230_state(dev, STATE_TX_ON);
580         if (rc)
581                 return rc;
582
583         return at86rf230_state(dev, STATE_RX_AACK_ON);
584 }
585
586 static void
587 at86rf230_stop(struct ieee802154_dev *dev)
588 {
589         at86rf230_state(dev, STATE_FORCE_TRX_OFF);
590 }
591
592 static int
593 at86rf230_set_channel(struct at86rf230_local *lp, int page, int channel)
594 {
595         lp->rssi_base_val = -91;
596
597         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
598 }
599
600 static int
601 at86rf212_set_channel(struct at86rf230_local *lp, int page, int channel)
602 {
603         int rc;
604
605         if (channel == 0)
606                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
607         else
608                 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
609         if (rc < 0)
610                 return rc;
611
612         if (page == 0) {
613                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
614                 lp->rssi_base_val = -100;
615         } else {
616                 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
617                 lp->rssi_base_val = -98;
618         }
619         if (rc < 0)
620                 return rc;
621
622         return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
623 }
624
625 static int
626 at86rf230_channel(struct ieee802154_dev *dev, int page, int channel)
627 {
628         struct at86rf230_local *lp = dev->priv;
629         int rc;
630
631         might_sleep();
632
633         if (page < 0 || page > 31 ||
634             !(lp->dev->phy->channels_supported[page] & BIT(channel))) {
635                 WARN_ON(1);
636                 return -EINVAL;
637         }
638
639         if (is_rf212(lp))
640                 rc = at86rf212_set_channel(lp, page, channel);
641         else
642                 rc = at86rf230_set_channel(lp, page, channel);
643         if (rc < 0)
644                 return rc;
645
646         msleep(1); /* Wait for PLL */
647         dev->phy->current_channel = channel;
648         dev->phy->current_page = page;
649
650         return 0;
651 }
652
653 static int
654 at86rf230_xmit(struct ieee802154_dev *dev, struct sk_buff *skb)
655 {
656         struct at86rf230_local *lp = dev->priv;
657         int rc;
658         unsigned long flags;
659
660         spin_lock_irqsave(&lp->lock, flags);
661         if  (lp->irq_busy) {
662                 spin_unlock_irqrestore(&lp->lock, flags);
663                 return -EBUSY;
664         }
665         spin_unlock_irqrestore(&lp->lock, flags);
666
667         might_sleep();
668
669         rc = at86rf230_state(dev, STATE_FORCE_TX_ON);
670         if (rc)
671                 goto err;
672
673         spin_lock_irqsave(&lp->lock, flags);
674         lp->is_tx = 1;
675         reinit_completion(&lp->tx_complete);
676         spin_unlock_irqrestore(&lp->lock, flags);
677
678         rc = at86rf230_write_fbuf(lp, skb->data, skb->len);
679         if (rc)
680                 goto err_rx;
681
682         if (lp->tx_aret) {
683                 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_TX_ARET_ON);
684                 if (rc)
685                         goto err_rx;
686         }
687
688         rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_BUSY_TX);
689         if (rc)
690                 goto err_rx;
691
692         rc = wait_for_completion_interruptible(&lp->tx_complete);
693         if (rc < 0)
694                 goto err_rx;
695
696         rc = at86rf230_start(dev);
697
698         return rc;
699
700 err_rx:
701         at86rf230_start(dev);
702 err:
703         pr_err("error: %d\n", rc);
704
705         spin_lock_irqsave(&lp->lock, flags);
706         lp->is_tx = 0;
707         spin_unlock_irqrestore(&lp->lock, flags);
708
709         return rc;
710 }
711
712 static int at86rf230_rx(struct at86rf230_local *lp)
713 {
714         u8 len = 128, lqi = 0;
715         struct sk_buff *skb;
716
717         skb = alloc_skb(len, GFP_KERNEL);
718
719         if (!skb)
720                 return -ENOMEM;
721
722         if (at86rf230_read_fbuf(lp, skb_put(skb, len), &len, &lqi))
723                 goto err;
724
725         if (len < 2)
726                 goto err;
727
728         skb_trim(skb, len - 2); /* We do not put CRC into the frame */
729
730         ieee802154_rx_irqsafe(lp->dev, skb, lqi);
731
732         dev_dbg(&lp->spi->dev, "READ_FBUF: %d %x\n", len, lqi);
733
734         return 0;
735 err:
736         pr_debug("received frame is too small\n");
737
738         kfree_skb(skb);
739         return -EINVAL;
740 }
741
742 static int
743 at86rf230_set_hw_addr_filt(struct ieee802154_dev *dev,
744                            struct ieee802154_hw_addr_filt *filt,
745                            unsigned long changed)
746 {
747         struct at86rf230_local *lp = dev->priv;
748
749         if (changed & IEEE802515_AFILT_SADDR_CHANGED) {
750                 u16 addr = le16_to_cpu(filt->short_addr);
751
752                 dev_vdbg(&lp->spi->dev,
753                         "at86rf230_set_hw_addr_filt called for saddr\n");
754                 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
755                 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
756         }
757
758         if (changed & IEEE802515_AFILT_PANID_CHANGED) {
759                 u16 pan = le16_to_cpu(filt->pan_id);
760
761                 dev_vdbg(&lp->spi->dev,
762                         "at86rf230_set_hw_addr_filt called for pan id\n");
763                 __at86rf230_write(lp, RG_PAN_ID_0, pan);
764                 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
765         }
766
767         if (changed & IEEE802515_AFILT_IEEEADDR_CHANGED) {
768                 u8 i, addr[8];
769
770                 memcpy(addr, &filt->ieee_addr, 8);
771                 dev_vdbg(&lp->spi->dev,
772                         "at86rf230_set_hw_addr_filt called for IEEE addr\n");
773                 for (i = 0; i < 8; i++)
774                         __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
775         }
776
777         if (changed & IEEE802515_AFILT_PANC_CHANGED) {
778                 dev_vdbg(&lp->spi->dev,
779                         "at86rf230_set_hw_addr_filt called for panc change\n");
780                 if (filt->pan_coord)
781                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
782                 else
783                         at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
784         }
785
786         return 0;
787 }
788
789 static int
790 at86rf212_set_txpower(struct ieee802154_dev *dev, int db)
791 {
792         struct at86rf230_local *lp = dev->priv;
793
794         /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
795          * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
796          * 0dB.
797          * thus, supported values for db range from -26 to 5, for 31dB of
798          * reduction to 0dB of reduction.
799          */
800         if (db > 5 || db < -26)
801                 return -EINVAL;
802
803         db = -(db - 5);
804
805         return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
806 }
807
808 static int
809 at86rf212_set_lbt(struct ieee802154_dev *dev, bool on)
810 {
811         struct at86rf230_local *lp = dev->priv;
812
813         return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
814 }
815
816 static int
817 at86rf212_set_cca_mode(struct ieee802154_dev *dev, u8 mode)
818 {
819         struct at86rf230_local *lp = dev->priv;
820
821         return at86rf230_write_subreg(lp, SR_CCA_MODE, mode);
822 }
823
824 static int
825 at86rf212_set_cca_ed_level(struct ieee802154_dev *dev, s32 level)
826 {
827         struct at86rf230_local *lp = dev->priv;
828         int desens_steps;
829
830         if (level < lp->rssi_base_val || level > 30)
831                 return -EINVAL;
832
833         desens_steps = (level - lp->rssi_base_val) * 100 / 207;
834
835         return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, desens_steps);
836 }
837
838 static int
839 at86rf212_set_csma_params(struct ieee802154_dev *dev, u8 min_be, u8 max_be,
840                           u8 retries)
841 {
842         struct at86rf230_local *lp = dev->priv;
843         int rc;
844
845         if (min_be > max_be || max_be > 8 || retries > 5)
846                 return -EINVAL;
847
848         rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
849         if (rc)
850                 return rc;
851
852         rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
853         if (rc)
854                 return rc;
855
856         return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
857 }
858
859 static int
860 at86rf212_set_frame_retries(struct ieee802154_dev *dev, s8 retries)
861 {
862         struct at86rf230_local *lp = dev->priv;
863         int rc = 0;
864
865         if (retries < -1 || retries > 15)
866                 return -EINVAL;
867
868         lp->tx_aret = retries >= 0;
869
870         if (retries >= 0)
871                 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
872
873         return rc;
874 }
875
876 static struct ieee802154_ops at86rf230_ops = {
877         .owner = THIS_MODULE,
878         .xmit = at86rf230_xmit,
879         .ed = at86rf230_ed,
880         .set_channel = at86rf230_channel,
881         .start = at86rf230_start,
882         .stop = at86rf230_stop,
883         .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
884 };
885
886 static struct ieee802154_ops at86rf212_ops = {
887         .owner = THIS_MODULE,
888         .xmit = at86rf230_xmit,
889         .ed = at86rf230_ed,
890         .set_channel = at86rf230_channel,
891         .start = at86rf230_start,
892         .stop = at86rf230_stop,
893         .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
894         .set_txpower = at86rf212_set_txpower,
895         .set_lbt = at86rf212_set_lbt,
896         .set_cca_mode = at86rf212_set_cca_mode,
897         .set_cca_ed_level = at86rf212_set_cca_ed_level,
898         .set_csma_params = at86rf212_set_csma_params,
899         .set_frame_retries = at86rf212_set_frame_retries,
900 };
901
902 static void at86rf230_irqwork(struct work_struct *work)
903 {
904         struct at86rf230_local *lp =
905                 container_of(work, struct at86rf230_local, irqwork);
906         u8 status = 0, val;
907         int rc;
908         unsigned long flags;
909
910         rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &val);
911         status |= val;
912
913         status &= ~IRQ_PLL_LOCK; /* ignore */
914         status &= ~IRQ_RX_START; /* ignore */
915         status &= ~IRQ_AMI; /* ignore */
916         status &= ~IRQ_TRX_UR; /* FIXME: possibly handle ???*/
917
918         if (status & IRQ_TRX_END) {
919                 status &= ~IRQ_TRX_END;
920                 spin_lock_irqsave(&lp->lock, flags);
921                 if (lp->is_tx) {
922                         lp->is_tx = 0;
923                         spin_unlock_irqrestore(&lp->lock, flags);
924                         complete(&lp->tx_complete);
925                 } else {
926                         spin_unlock_irqrestore(&lp->lock, flags);
927                         at86rf230_rx(lp);
928                 }
929         }
930
931         spin_lock_irqsave(&lp->lock, flags);
932         lp->irq_busy = 0;
933         spin_unlock_irqrestore(&lp->lock, flags);
934 }
935
936 static void at86rf230_irqwork_level(struct work_struct *work)
937 {
938         struct at86rf230_local *lp =
939                 container_of(work, struct at86rf230_local, irqwork);
940
941         at86rf230_irqwork(work);
942
943         enable_irq(lp->spi->irq);
944 }
945
946 static irqreturn_t at86rf230_isr(int irq, void *data)
947 {
948         struct at86rf230_local *lp = data;
949         unsigned long flags;
950
951         spin_lock_irqsave(&lp->lock, flags);
952         lp->irq_busy = 1;
953         spin_unlock_irqrestore(&lp->lock, flags);
954
955         schedule_work(&lp->irqwork);
956
957         return IRQ_HANDLED;
958 }
959
960 static irqreturn_t at86rf230_isr_level(int irq, void *data)
961 {
962         disable_irq_nosync(irq);
963
964         return at86rf230_isr(irq, data);
965 }
966
967 static int at86rf230_irq_polarity(struct at86rf230_local *lp, int pol)
968 {
969         return at86rf230_write_subreg(lp, SR_IRQ_POLARITY, pol);
970 }
971
972 static int at86rf230_hw_init(struct at86rf230_local *lp)
973 {
974         int rc, irq_pol, irq_type;
975         u8 status;
976         u8 csma_seed[2];
977
978         rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &status);
979         if (rc)
980                 return rc;
981
982         rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_FORCE_TRX_OFF);
983         if (rc)
984                 return rc;
985
986         irq_type = irq_get_trigger_type(lp->spi->irq);
987         /* configure irq polarity, defaults to high active */
988         if (irq_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
989                 irq_pol = IRQ_ACTIVE_LOW;
990         else
991                 irq_pol = IRQ_ACTIVE_HIGH;
992
993         rc = at86rf230_irq_polarity(lp, irq_pol);
994         if (rc)
995                 return rc;
996
997         rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
998         if (rc)
999                 return rc;
1000
1001         get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1002         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1003         if (rc)
1004                 return rc;
1005         rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1006         if (rc)
1007                 return rc;
1008
1009         /* CLKM changes are applied immediately */
1010         rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1011         if (rc)
1012                 return rc;
1013
1014         /* Turn CLKM Off */
1015         rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1016         if (rc)
1017                 return rc;
1018         /* Wait the next SLEEP cycle */
1019         msleep(100);
1020
1021         rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &status);
1022         if (rc)
1023                 return rc;
1024         if (!status) {
1025                 dev_err(&lp->spi->dev, "DVDD error\n");
1026                 return -EINVAL;
1027         }
1028
1029         return 0;
1030 }
1031
1032 static struct at86rf230_platform_data *
1033 at86rf230_get_pdata(struct spi_device *spi)
1034 {
1035         struct at86rf230_platform_data *pdata;
1036
1037         if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node)
1038                 return spi->dev.platform_data;
1039
1040         pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
1041         if (!pdata)
1042                 goto done;
1043
1044         pdata->rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1045         pdata->slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1046
1047         spi->dev.platform_data = pdata;
1048 done:
1049         return pdata;
1050 }
1051
1052 static int at86rf230_probe(struct spi_device *spi)
1053 {
1054         struct at86rf230_platform_data *pdata;
1055         struct ieee802154_dev *dev;
1056         struct at86rf230_local *lp;
1057         u16 man_id = 0;
1058         u8 part = 0, version = 0, status;
1059         irq_handler_t irq_handler;
1060         work_func_t irq_worker;
1061         int rc, irq_type;
1062         const char *chip;
1063         struct ieee802154_ops *ops = NULL;
1064
1065         if (!spi->irq) {
1066                 dev_err(&spi->dev, "no IRQ specified\n");
1067                 return -EINVAL;
1068         }
1069
1070         pdata = at86rf230_get_pdata(spi);
1071         if (!pdata) {
1072                 dev_err(&spi->dev, "no platform_data\n");
1073                 return -EINVAL;
1074         }
1075
1076         if (gpio_is_valid(pdata->rstn)) {
1077                 rc = gpio_request(pdata->rstn, "rstn");
1078                 if (rc)
1079                         return rc;
1080         }
1081
1082         if (gpio_is_valid(pdata->slp_tr)) {
1083                 rc = gpio_request(pdata->slp_tr, "slp_tr");
1084                 if (rc)
1085                         goto err_slp_tr;
1086         }
1087
1088         if (gpio_is_valid(pdata->rstn)) {
1089                 rc = gpio_direction_output(pdata->rstn, 1);
1090                 if (rc)
1091                         goto err_gpio_dir;
1092         }
1093
1094         if (gpio_is_valid(pdata->slp_tr)) {
1095                 rc = gpio_direction_output(pdata->slp_tr, 0);
1096                 if (rc)
1097                         goto err_gpio_dir;
1098         }
1099
1100         /* Reset */
1101         if (gpio_is_valid(pdata->rstn)) {
1102                 udelay(1);
1103                 gpio_set_value(pdata->rstn, 0);
1104                 udelay(1);
1105                 gpio_set_value(pdata->rstn, 1);
1106                 usleep_range(120, 240);
1107         }
1108
1109         rc = __at86rf230_detect_device(spi, &man_id, &part, &version);
1110         if (rc < 0)
1111                 goto err_gpio_dir;
1112
1113         if (man_id != 0x001f) {
1114                 dev_err(&spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1115                         man_id >> 8, man_id & 0xFF);
1116                 rc = -EINVAL;
1117                 goto err_gpio_dir;
1118         }
1119
1120         switch (part) {
1121         case 2:
1122                 chip = "at86rf230";
1123                 /* FIXME: should be easy to support; */
1124                 break;
1125         case 3:
1126                 chip = "at86rf231";
1127                 ops = &at86rf230_ops;
1128                 break;
1129         case 7:
1130                 chip = "at86rf212";
1131                 if (version == 1)
1132                         ops = &at86rf212_ops;
1133                 break;
1134         case 11:
1135                 chip = "at86rf233";
1136                 ops = &at86rf230_ops;
1137                 break;
1138         default:
1139                 chip = "UNKNOWN";
1140                 break;
1141         }
1142
1143         dev_info(&spi->dev, "Detected %s chip version %d\n", chip, version);
1144         if (!ops) {
1145                 rc = -ENOTSUPP;
1146                 goto err_gpio_dir;
1147         }
1148
1149         dev = ieee802154_alloc_device(sizeof(*lp), ops);
1150         if (!dev) {
1151                 rc = -ENOMEM;
1152                 goto err_gpio_dir;
1153         }
1154
1155         lp = dev->priv;
1156         lp->dev = dev;
1157         lp->part = part;
1158         lp->vers = version;
1159
1160         lp->spi = spi;
1161
1162         dev->parent = &spi->dev;
1163         dev->extra_tx_headroom = 0;
1164         dev->flags = IEEE802154_HW_OMIT_CKSUM | IEEE802154_HW_AACK;
1165
1166         irq_type = irq_get_trigger_type(spi->irq);
1167         if (irq_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
1168                 irq_worker = at86rf230_irqwork;
1169                 irq_handler = at86rf230_isr;
1170         } else {
1171                 irq_worker = at86rf230_irqwork_level;
1172                 irq_handler = at86rf230_isr_level;
1173         }
1174
1175         mutex_init(&lp->bmux);
1176         INIT_WORK(&lp->irqwork, irq_worker);
1177         spin_lock_init(&lp->lock);
1178         init_completion(&lp->tx_complete);
1179
1180         spi_set_drvdata(spi, lp);
1181
1182         if (is_rf212(lp)) {
1183                 dev->phy->channels_supported[0] = 0x00007FF;
1184                 dev->phy->channels_supported[2] = 0x00007FF;
1185         } else {
1186                 dev->phy->channels_supported[0] = 0x7FFF800;
1187         }
1188
1189         rc = at86rf230_hw_init(lp);
1190         if (rc)
1191                 goto err_hw_init;
1192
1193         rc = request_irq(spi->irq, irq_handler, IRQF_SHARED,
1194                          dev_name(&spi->dev), lp);
1195         if (rc)
1196                 goto err_hw_init;
1197
1198         /* Read irq status register to reset irq line */
1199         rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1200         if (rc)
1201                 goto err_irq;
1202
1203         rc = ieee802154_register_device(lp->dev);
1204         if (rc)
1205                 goto err_irq;
1206
1207         return rc;
1208
1209 err_irq:
1210         free_irq(spi->irq, lp);
1211 err_hw_init:
1212         flush_work(&lp->irqwork);
1213         spi_set_drvdata(spi, NULL);
1214         mutex_destroy(&lp->bmux);
1215         ieee802154_free_device(lp->dev);
1216
1217 err_gpio_dir:
1218         if (gpio_is_valid(pdata->slp_tr))
1219                 gpio_free(pdata->slp_tr);
1220 err_slp_tr:
1221         if (gpio_is_valid(pdata->rstn))
1222                 gpio_free(pdata->rstn);
1223         return rc;
1224 }
1225
1226 static int at86rf230_remove(struct spi_device *spi)
1227 {
1228         struct at86rf230_local *lp = spi_get_drvdata(spi);
1229         struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1230
1231         /* mask all at86rf230 irq's */
1232         at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1233         ieee802154_unregister_device(lp->dev);
1234
1235         free_irq(spi->irq, lp);
1236         flush_work(&lp->irqwork);
1237
1238         if (gpio_is_valid(pdata->slp_tr))
1239                 gpio_free(pdata->slp_tr);
1240         if (gpio_is_valid(pdata->rstn))
1241                 gpio_free(pdata->rstn);
1242
1243         mutex_destroy(&lp->bmux);
1244         ieee802154_free_device(lp->dev);
1245
1246         dev_dbg(&spi->dev, "unregistered at86rf230\n");
1247         return 0;
1248 }
1249
1250 #if IS_ENABLED(CONFIG_OF)
1251 static struct of_device_id at86rf230_of_match[] = {
1252         { .compatible = "atmel,at86rf230", },
1253         { .compatible = "atmel,at86rf231", },
1254         { .compatible = "atmel,at86rf233", },
1255         { .compatible = "atmel,at86rf212", },
1256         { },
1257 };
1258 #endif
1259
1260 static struct spi_driver at86rf230_driver = {
1261         .driver = {
1262                 .of_match_table = of_match_ptr(at86rf230_of_match),
1263                 .name   = "at86rf230",
1264                 .owner  = THIS_MODULE,
1265         },
1266         .probe      = at86rf230_probe,
1267         .remove     = at86rf230_remove,
1268 };
1269
1270 module_spi_driver(at86rf230_driver);
1271
1272 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1273 MODULE_LICENSE("GPL v2");