2 * AT86RF230/RF231 driver
4 * Copyright (C) 2009-2012 Siemens AG
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
21 * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/interrupt.h>
26 #include <linux/irq.h>
27 #include <linux/gpio.h>
28 #include <linux/delay.h>
29 #include <linux/mutex.h>
30 #include <linux/workqueue.h>
31 #include <linux/spinlock.h>
32 #include <linux/spi/spi.h>
33 #include <linux/spi/at86rf230.h>
34 #include <linux/skbuff.h>
35 #include <linux/of_gpio.h>
37 #include <net/mac802154.h>
38 #include <net/wpan-phy.h>
40 struct at86rf230_local {
41 struct spi_device *spi;
49 struct work_struct irqwork;
50 struct completion tx_complete;
52 struct ieee802154_dev *dev;
62 static bool is_rf212(struct at86rf230_local *local)
64 return local->part == 7;
67 #define RG_TRX_STATUS (0x01)
68 #define SR_TRX_STATUS 0x01, 0x1f, 0
69 #define SR_RESERVED_01_3 0x01, 0x20, 5
70 #define SR_CCA_STATUS 0x01, 0x40, 6
71 #define SR_CCA_DONE 0x01, 0x80, 7
72 #define RG_TRX_STATE (0x02)
73 #define SR_TRX_CMD 0x02, 0x1f, 0
74 #define SR_TRAC_STATUS 0x02, 0xe0, 5
75 #define RG_TRX_CTRL_0 (0x03)
76 #define SR_CLKM_CTRL 0x03, 0x07, 0
77 #define SR_CLKM_SHA_SEL 0x03, 0x08, 3
78 #define SR_PAD_IO_CLKM 0x03, 0x30, 4
79 #define SR_PAD_IO 0x03, 0xc0, 6
80 #define RG_TRX_CTRL_1 (0x04)
81 #define SR_IRQ_POLARITY 0x04, 0x01, 0
82 #define SR_IRQ_MASK_MODE 0x04, 0x02, 1
83 #define SR_SPI_CMD_MODE 0x04, 0x0c, 2
84 #define SR_RX_BL_CTRL 0x04, 0x10, 4
85 #define SR_TX_AUTO_CRC_ON 0x04, 0x20, 5
86 #define SR_IRQ_2_EXT_EN 0x04, 0x40, 6
87 #define SR_PA_EXT_EN 0x04, 0x80, 7
88 #define RG_PHY_TX_PWR (0x05)
89 #define SR_TX_PWR 0x05, 0x0f, 0
90 #define SR_PA_LT 0x05, 0x30, 4
91 #define SR_PA_BUF_LT 0x05, 0xc0, 6
92 #define RG_PHY_RSSI (0x06)
93 #define SR_RSSI 0x06, 0x1f, 0
94 #define SR_RND_VALUE 0x06, 0x60, 5
95 #define SR_RX_CRC_VALID 0x06, 0x80, 7
96 #define RG_PHY_ED_LEVEL (0x07)
97 #define SR_ED_LEVEL 0x07, 0xff, 0
98 #define RG_PHY_CC_CCA (0x08)
99 #define SR_CHANNEL 0x08, 0x1f, 0
100 #define SR_CCA_MODE 0x08, 0x60, 5
101 #define SR_CCA_REQUEST 0x08, 0x80, 7
102 #define RG_CCA_THRES (0x09)
103 #define SR_CCA_ED_THRES 0x09, 0x0f, 0
104 #define SR_RESERVED_09_1 0x09, 0xf0, 4
105 #define RG_RX_CTRL (0x0a)
106 #define SR_PDT_THRES 0x0a, 0x0f, 0
107 #define SR_RESERVED_0a_1 0x0a, 0xf0, 4
108 #define RG_SFD_VALUE (0x0b)
109 #define SR_SFD_VALUE 0x0b, 0xff, 0
110 #define RG_TRX_CTRL_2 (0x0c)
111 #define SR_OQPSK_DATA_RATE 0x0c, 0x03, 0
112 #define SR_SUB_MODE 0x0c, 0x04, 2
113 #define SR_BPSK_QPSK 0x0c, 0x08, 3
114 #define SR_OQPSK_SUB1_RC_EN 0x0c, 0x10, 4
115 #define SR_RESERVED_0c_5 0x0c, 0x60, 5
116 #define SR_RX_SAFE_MODE 0x0c, 0x80, 7
117 #define RG_ANT_DIV (0x0d)
118 #define SR_ANT_CTRL 0x0d, 0x03, 0
119 #define SR_ANT_EXT_SW_EN 0x0d, 0x04, 2
120 #define SR_ANT_DIV_EN 0x0d, 0x08, 3
121 #define SR_RESERVED_0d_2 0x0d, 0x70, 4
122 #define SR_ANT_SEL 0x0d, 0x80, 7
123 #define RG_IRQ_MASK (0x0e)
124 #define SR_IRQ_MASK 0x0e, 0xff, 0
125 #define RG_IRQ_STATUS (0x0f)
126 #define SR_IRQ_0_PLL_LOCK 0x0f, 0x01, 0
127 #define SR_IRQ_1_PLL_UNLOCK 0x0f, 0x02, 1
128 #define SR_IRQ_2_RX_START 0x0f, 0x04, 2
129 #define SR_IRQ_3_TRX_END 0x0f, 0x08, 3
130 #define SR_IRQ_4_CCA_ED_DONE 0x0f, 0x10, 4
131 #define SR_IRQ_5_AMI 0x0f, 0x20, 5
132 #define SR_IRQ_6_TRX_UR 0x0f, 0x40, 6
133 #define SR_IRQ_7_BAT_LOW 0x0f, 0x80, 7
134 #define RG_VREG_CTRL (0x10)
135 #define SR_RESERVED_10_6 0x10, 0x03, 0
136 #define SR_DVDD_OK 0x10, 0x04, 2
137 #define SR_DVREG_EXT 0x10, 0x08, 3
138 #define SR_RESERVED_10_3 0x10, 0x30, 4
139 #define SR_AVDD_OK 0x10, 0x40, 6
140 #define SR_AVREG_EXT 0x10, 0x80, 7
141 #define RG_BATMON (0x11)
142 #define SR_BATMON_VTH 0x11, 0x0f, 0
143 #define SR_BATMON_HR 0x11, 0x10, 4
144 #define SR_BATMON_OK 0x11, 0x20, 5
145 #define SR_RESERVED_11_1 0x11, 0xc0, 6
146 #define RG_XOSC_CTRL (0x12)
147 #define SR_XTAL_TRIM 0x12, 0x0f, 0
148 #define SR_XTAL_MODE 0x12, 0xf0, 4
149 #define RG_RX_SYN (0x15)
150 #define SR_RX_PDT_LEVEL 0x15, 0x0f, 0
151 #define SR_RESERVED_15_2 0x15, 0x70, 4
152 #define SR_RX_PDT_DIS 0x15, 0x80, 7
153 #define RG_XAH_CTRL_1 (0x17)
154 #define SR_RESERVED_17_8 0x17, 0x01, 0
155 #define SR_AACK_PROM_MODE 0x17, 0x02, 1
156 #define SR_AACK_ACK_TIME 0x17, 0x04, 2
157 #define SR_RESERVED_17_5 0x17, 0x08, 3
158 #define SR_AACK_UPLD_RES_FT 0x17, 0x10, 4
159 #define SR_AACK_FLTR_RES_FT 0x17, 0x20, 5
160 #define SR_CSMA_LBT_MODE 0x17, 0x40, 6
161 #define SR_RESERVED_17_1 0x17, 0x80, 7
162 #define RG_FTN_CTRL (0x18)
163 #define SR_RESERVED_18_2 0x18, 0x7f, 0
164 #define SR_FTN_START 0x18, 0x80, 7
165 #define RG_PLL_CF (0x1a)
166 #define SR_RESERVED_1a_2 0x1a, 0x7f, 0
167 #define SR_PLL_CF_START 0x1a, 0x80, 7
168 #define RG_PLL_DCU (0x1b)
169 #define SR_RESERVED_1b_3 0x1b, 0x3f, 0
170 #define SR_RESERVED_1b_2 0x1b, 0x40, 6
171 #define SR_PLL_DCU_START 0x1b, 0x80, 7
172 #define RG_PART_NUM (0x1c)
173 #define SR_PART_NUM 0x1c, 0xff, 0
174 #define RG_VERSION_NUM (0x1d)
175 #define SR_VERSION_NUM 0x1d, 0xff, 0
176 #define RG_MAN_ID_0 (0x1e)
177 #define SR_MAN_ID_0 0x1e, 0xff, 0
178 #define RG_MAN_ID_1 (0x1f)
179 #define SR_MAN_ID_1 0x1f, 0xff, 0
180 #define RG_SHORT_ADDR_0 (0x20)
181 #define SR_SHORT_ADDR_0 0x20, 0xff, 0
182 #define RG_SHORT_ADDR_1 (0x21)
183 #define SR_SHORT_ADDR_1 0x21, 0xff, 0
184 #define RG_PAN_ID_0 (0x22)
185 #define SR_PAN_ID_0 0x22, 0xff, 0
186 #define RG_PAN_ID_1 (0x23)
187 #define SR_PAN_ID_1 0x23, 0xff, 0
188 #define RG_IEEE_ADDR_0 (0x24)
189 #define SR_IEEE_ADDR_0 0x24, 0xff, 0
190 #define RG_IEEE_ADDR_1 (0x25)
191 #define SR_IEEE_ADDR_1 0x25, 0xff, 0
192 #define RG_IEEE_ADDR_2 (0x26)
193 #define SR_IEEE_ADDR_2 0x26, 0xff, 0
194 #define RG_IEEE_ADDR_3 (0x27)
195 #define SR_IEEE_ADDR_3 0x27, 0xff, 0
196 #define RG_IEEE_ADDR_4 (0x28)
197 #define SR_IEEE_ADDR_4 0x28, 0xff, 0
198 #define RG_IEEE_ADDR_5 (0x29)
199 #define SR_IEEE_ADDR_5 0x29, 0xff, 0
200 #define RG_IEEE_ADDR_6 (0x2a)
201 #define SR_IEEE_ADDR_6 0x2a, 0xff, 0
202 #define RG_IEEE_ADDR_7 (0x2b)
203 #define SR_IEEE_ADDR_7 0x2b, 0xff, 0
204 #define RG_XAH_CTRL_0 (0x2c)
205 #define SR_SLOTTED_OPERATION 0x2c, 0x01, 0
206 #define SR_MAX_CSMA_RETRIES 0x2c, 0x0e, 1
207 #define SR_MAX_FRAME_RETRIES 0x2c, 0xf0, 4
208 #define RG_CSMA_SEED_0 (0x2d)
209 #define SR_CSMA_SEED_0 0x2d, 0xff, 0
210 #define RG_CSMA_SEED_1 (0x2e)
211 #define SR_CSMA_SEED_1 0x2e, 0x07, 0
212 #define SR_AACK_I_AM_COORD 0x2e, 0x08, 3
213 #define SR_AACK_DIS_ACK 0x2e, 0x10, 4
214 #define SR_AACK_SET_PD 0x2e, 0x20, 5
215 #define SR_AACK_FVN_MODE 0x2e, 0xc0, 6
216 #define RG_CSMA_BE (0x2f)
217 #define SR_MIN_BE 0x2f, 0x0f, 0
218 #define SR_MAX_BE 0x2f, 0xf0, 4
221 #define CMD_REG_MASK 0x3f
222 #define CMD_WRITE 0x40
225 #define IRQ_BAT_LOW (1 << 7)
226 #define IRQ_TRX_UR (1 << 6)
227 #define IRQ_AMI (1 << 5)
228 #define IRQ_CCA_ED (1 << 4)
229 #define IRQ_TRX_END (1 << 3)
230 #define IRQ_RX_START (1 << 2)
231 #define IRQ_PLL_UNL (1 << 1)
232 #define IRQ_PLL_LOCK (1 << 0)
234 #define IRQ_ACTIVE_HIGH 0
235 #define IRQ_ACTIVE_LOW 1
237 #define STATE_P_ON 0x00 /* BUSY */
238 #define STATE_BUSY_RX 0x01
239 #define STATE_BUSY_TX 0x02
240 #define STATE_FORCE_TRX_OFF 0x03
241 #define STATE_FORCE_TX_ON 0x04 /* IDLE */
242 /* 0x05 */ /* INVALID_PARAMETER */
243 #define STATE_RX_ON 0x06
244 /* 0x07 */ /* SUCCESS */
245 #define STATE_TRX_OFF 0x08
246 #define STATE_TX_ON 0x09
247 /* 0x0a - 0x0e */ /* 0x0a - UNSUPPORTED_ATTRIBUTE */
248 #define STATE_SLEEP 0x0F
249 #define STATE_PREP_DEEP_SLEEP 0x10
250 #define STATE_BUSY_RX_AACK 0x11
251 #define STATE_BUSY_TX_ARET 0x12
252 #define STATE_RX_AACK_ON 0x16
253 #define STATE_TX_ARET_ON 0x19
254 #define STATE_RX_ON_NOCLK 0x1C
255 #define STATE_RX_AACK_ON_NOCLK 0x1D
256 #define STATE_BUSY_RX_AACK_NOCLK 0x1E
257 #define STATE_TRANSITION_IN_PROGRESS 0x1F
260 __at86rf230_detect_device(struct spi_device *spi, u16 *man_id, u8 *part,
264 u8 *buf = kmalloc(2, GFP_KERNEL);
266 struct spi_message msg;
267 struct spi_transfer xfer = {
277 for (reg = RG_PART_NUM; reg <= RG_MAN_ID_1; reg++) {
278 buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
280 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
281 spi_message_init(&msg);
282 spi_message_add_tail(&xfer, &msg);
284 status = spi_sync(spi, &msg);
285 dev_vdbg(&spi->dev, "status = %d\n", status);
289 dev_vdbg(&spi->dev, "status = %d\n", status);
290 dev_vdbg(&spi->dev, "buf[0] = %02x\n", buf[0]);
291 dev_vdbg(&spi->dev, "buf[1] = %02x\n", buf[1]);
294 data[reg - RG_PART_NUM] = buf[1];
302 *man_id = (data[3] << 8) | data[2];
311 __at86rf230_write(struct at86rf230_local *lp, u8 addr, u8 data)
315 struct spi_message msg;
316 struct spi_transfer xfer = {
321 buf[0] = (addr & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
323 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
324 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
325 spi_message_init(&msg);
326 spi_message_add_tail(&xfer, &msg);
328 status = spi_sync(lp->spi, &msg);
329 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
333 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
334 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
335 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
341 __at86rf230_read_subreg(struct at86rf230_local *lp,
342 u8 addr, u8 mask, int shift, u8 *data)
346 struct spi_message msg;
347 struct spi_transfer xfer = {
353 buf[0] = (addr & CMD_REG_MASK) | CMD_REG;
355 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
356 spi_message_init(&msg);
357 spi_message_add_tail(&xfer, &msg);
359 status = spi_sync(lp->spi, &msg);
360 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
364 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
365 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
366 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
369 *data = (buf[1] & mask) >> shift;
375 at86rf230_read_subreg(struct at86rf230_local *lp,
376 u8 addr, u8 mask, int shift, u8 *data)
380 mutex_lock(&lp->bmux);
381 status = __at86rf230_read_subreg(lp, addr, mask, shift, data);
382 mutex_unlock(&lp->bmux);
388 at86rf230_write_subreg(struct at86rf230_local *lp,
389 u8 addr, u8 mask, int shift, u8 data)
394 mutex_lock(&lp->bmux);
395 status = __at86rf230_read_subreg(lp, addr, 0xff, 0, &val);
400 val |= (data << shift) & mask;
402 status = __at86rf230_write(lp, addr, val);
404 mutex_unlock(&lp->bmux);
410 at86rf230_write_fbuf(struct at86rf230_local *lp, u8 *data, u8 len)
414 struct spi_message msg;
415 struct spi_transfer xfer_head = {
420 struct spi_transfer xfer_buf = {
425 mutex_lock(&lp->bmux);
426 buf[0] = CMD_WRITE | CMD_FB;
427 buf[1] = len + 2; /* 2 bytes for CRC that isn't written */
429 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
430 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
432 spi_message_init(&msg);
433 spi_message_add_tail(&xfer_head, &msg);
434 spi_message_add_tail(&xfer_buf, &msg);
436 status = spi_sync(lp->spi, &msg);
437 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
441 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
442 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
443 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
445 mutex_unlock(&lp->bmux);
450 at86rf230_read_fbuf(struct at86rf230_local *lp, u8 *data, u8 *len, u8 *lqi)
454 struct spi_message msg;
455 struct spi_transfer xfer_head = {
460 struct spi_transfer xfer_head1 = {
465 struct spi_transfer xfer_buf = {
470 mutex_lock(&lp->bmux);
475 spi_message_init(&msg);
476 spi_message_add_tail(&xfer_head, &msg);
478 status = spi_sync(lp->spi, &msg);
479 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
481 xfer_buf.len = *(buf + 1) + 1;
487 spi_message_init(&msg);
488 spi_message_add_tail(&xfer_head1, &msg);
489 spi_message_add_tail(&xfer_buf, &msg);
491 status = spi_sync(lp->spi, &msg);
496 dev_vdbg(&lp->spi->dev, "status = %d\n", status);
497 dev_vdbg(&lp->spi->dev, "buf[0] = %02x\n", buf[0]);
498 dev_vdbg(&lp->spi->dev, "buf[1] = %02x\n", buf[1]);
501 if (lqi && (*len > lp->buf[1]))
502 *lqi = data[lp->buf[1]];
504 mutex_unlock(&lp->bmux);
510 at86rf230_ed(struct ieee802154_dev *dev, u8 *level)
519 at86rf230_state(struct ieee802154_dev *dev, int state)
521 struct at86rf230_local *lp = dev->priv;
528 if (state == STATE_FORCE_TX_ON)
529 desired_status = STATE_TX_ON;
530 else if (state == STATE_FORCE_TRX_OFF)
531 desired_status = STATE_TRX_OFF;
533 desired_status = state;
536 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
539 } while (val == STATE_TRANSITION_IN_PROGRESS);
541 if (val == desired_status)
544 /* state is equal to phy states */
545 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, state);
550 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &val);
553 } while (val == STATE_TRANSITION_IN_PROGRESS);
556 if (val == desired_status ||
557 (desired_status == STATE_RX_ON && val == STATE_BUSY_RX) ||
558 (desired_status == STATE_RX_AACK_ON && val == STATE_BUSY_RX_AACK))
561 pr_err("unexpected state change: %d, asked for %d\n", val, state);
565 pr_err("error: %d\n", rc);
570 at86rf230_start(struct ieee802154_dev *dev)
572 struct at86rf230_local *lp = dev->priv;
575 rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
579 rc = at86rf230_state(dev, STATE_TX_ON);
583 return at86rf230_state(dev, STATE_RX_AACK_ON);
587 at86rf230_stop(struct ieee802154_dev *dev)
589 at86rf230_state(dev, STATE_FORCE_TRX_OFF);
593 at86rf230_set_channel(struct at86rf230_local *lp, int page, int channel)
595 lp->rssi_base_val = -91;
597 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
601 at86rf212_set_channel(struct at86rf230_local *lp, int page, int channel)
606 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
608 rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
613 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
614 lp->rssi_base_val = -100;
616 rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
617 lp->rssi_base_val = -98;
622 return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
626 at86rf230_channel(struct ieee802154_dev *dev, int page, int channel)
628 struct at86rf230_local *lp = dev->priv;
633 if (page < 0 || page > 31 ||
634 !(lp->dev->phy->channels_supported[page] & BIT(channel))) {
640 rc = at86rf212_set_channel(lp, page, channel);
642 rc = at86rf230_set_channel(lp, page, channel);
646 msleep(1); /* Wait for PLL */
647 dev->phy->current_channel = channel;
648 dev->phy->current_page = page;
654 at86rf230_xmit(struct ieee802154_dev *dev, struct sk_buff *skb)
656 struct at86rf230_local *lp = dev->priv;
660 spin_lock_irqsave(&lp->lock, flags);
662 spin_unlock_irqrestore(&lp->lock, flags);
665 spin_unlock_irqrestore(&lp->lock, flags);
669 rc = at86rf230_state(dev, STATE_FORCE_TX_ON);
673 spin_lock_irqsave(&lp->lock, flags);
675 reinit_completion(&lp->tx_complete);
676 spin_unlock_irqrestore(&lp->lock, flags);
678 rc = at86rf230_write_fbuf(lp, skb->data, skb->len);
683 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_TX_ARET_ON);
688 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_BUSY_TX);
692 rc = wait_for_completion_interruptible(&lp->tx_complete);
696 rc = at86rf230_start(dev);
701 at86rf230_start(dev);
703 pr_err("error: %d\n", rc);
705 spin_lock_irqsave(&lp->lock, flags);
707 spin_unlock_irqrestore(&lp->lock, flags);
712 static int at86rf230_rx(struct at86rf230_local *lp)
714 u8 len = 128, lqi = 0;
717 skb = alloc_skb(len, GFP_KERNEL);
722 if (at86rf230_read_fbuf(lp, skb_put(skb, len), &len, &lqi))
728 skb_trim(skb, len - 2); /* We do not put CRC into the frame */
730 ieee802154_rx_irqsafe(lp->dev, skb, lqi);
732 dev_dbg(&lp->spi->dev, "READ_FBUF: %d %x\n", len, lqi);
736 pr_debug("received frame is too small\n");
743 at86rf230_set_hw_addr_filt(struct ieee802154_dev *dev,
744 struct ieee802154_hw_addr_filt *filt,
745 unsigned long changed)
747 struct at86rf230_local *lp = dev->priv;
749 if (changed & IEEE802515_AFILT_SADDR_CHANGED) {
750 u16 addr = le16_to_cpu(filt->short_addr);
752 dev_vdbg(&lp->spi->dev,
753 "at86rf230_set_hw_addr_filt called for saddr\n");
754 __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
755 __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
758 if (changed & IEEE802515_AFILT_PANID_CHANGED) {
759 u16 pan = le16_to_cpu(filt->pan_id);
761 dev_vdbg(&lp->spi->dev,
762 "at86rf230_set_hw_addr_filt called for pan id\n");
763 __at86rf230_write(lp, RG_PAN_ID_0, pan);
764 __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
767 if (changed & IEEE802515_AFILT_IEEEADDR_CHANGED) {
770 memcpy(addr, &filt->ieee_addr, 8);
771 dev_vdbg(&lp->spi->dev,
772 "at86rf230_set_hw_addr_filt called for IEEE addr\n");
773 for (i = 0; i < 8; i++)
774 __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
777 if (changed & IEEE802515_AFILT_PANC_CHANGED) {
778 dev_vdbg(&lp->spi->dev,
779 "at86rf230_set_hw_addr_filt called for panc change\n");
781 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
783 at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
790 at86rf212_set_txpower(struct ieee802154_dev *dev, int db)
792 struct at86rf230_local *lp = dev->priv;
794 /* typical maximum output is 5dBm with RG_PHY_TX_PWR 0x60, lower five
795 * bits decrease power in 1dB steps. 0x60 represents extra PA gain of
797 * thus, supported values for db range from -26 to 5, for 31dB of
798 * reduction to 0dB of reduction.
800 if (db > 5 || db < -26)
805 return __at86rf230_write(lp, RG_PHY_TX_PWR, 0x60 | db);
809 at86rf212_set_lbt(struct ieee802154_dev *dev, bool on)
811 struct at86rf230_local *lp = dev->priv;
813 return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
817 at86rf212_set_cca_mode(struct ieee802154_dev *dev, u8 mode)
819 struct at86rf230_local *lp = dev->priv;
821 return at86rf230_write_subreg(lp, SR_CCA_MODE, mode);
825 at86rf212_set_cca_ed_level(struct ieee802154_dev *dev, s32 level)
827 struct at86rf230_local *lp = dev->priv;
830 if (level < lp->rssi_base_val || level > 30)
833 desens_steps = (level - lp->rssi_base_val) * 100 / 207;
835 return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, desens_steps);
839 at86rf212_set_csma_params(struct ieee802154_dev *dev, u8 min_be, u8 max_be,
842 struct at86rf230_local *lp = dev->priv;
845 if (min_be > max_be || max_be > 8 || retries > 5)
848 rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
852 rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
856 return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
860 at86rf212_set_frame_retries(struct ieee802154_dev *dev, s8 retries)
862 struct at86rf230_local *lp = dev->priv;
865 if (retries < -1 || retries > 15)
868 lp->tx_aret = retries >= 0;
871 rc = at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
876 static struct ieee802154_ops at86rf230_ops = {
877 .owner = THIS_MODULE,
878 .xmit = at86rf230_xmit,
880 .set_channel = at86rf230_channel,
881 .start = at86rf230_start,
882 .stop = at86rf230_stop,
883 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
886 static struct ieee802154_ops at86rf212_ops = {
887 .owner = THIS_MODULE,
888 .xmit = at86rf230_xmit,
890 .set_channel = at86rf230_channel,
891 .start = at86rf230_start,
892 .stop = at86rf230_stop,
893 .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
894 .set_txpower = at86rf212_set_txpower,
895 .set_lbt = at86rf212_set_lbt,
896 .set_cca_mode = at86rf212_set_cca_mode,
897 .set_cca_ed_level = at86rf212_set_cca_ed_level,
898 .set_csma_params = at86rf212_set_csma_params,
899 .set_frame_retries = at86rf212_set_frame_retries,
902 static void at86rf230_irqwork(struct work_struct *work)
904 struct at86rf230_local *lp =
905 container_of(work, struct at86rf230_local, irqwork);
910 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &val);
913 status &= ~IRQ_PLL_LOCK; /* ignore */
914 status &= ~IRQ_RX_START; /* ignore */
915 status &= ~IRQ_AMI; /* ignore */
916 status &= ~IRQ_TRX_UR; /* FIXME: possibly handle ???*/
918 if (status & IRQ_TRX_END) {
919 status &= ~IRQ_TRX_END;
920 spin_lock_irqsave(&lp->lock, flags);
923 spin_unlock_irqrestore(&lp->lock, flags);
924 complete(&lp->tx_complete);
926 spin_unlock_irqrestore(&lp->lock, flags);
931 spin_lock_irqsave(&lp->lock, flags);
933 spin_unlock_irqrestore(&lp->lock, flags);
936 static void at86rf230_irqwork_level(struct work_struct *work)
938 struct at86rf230_local *lp =
939 container_of(work, struct at86rf230_local, irqwork);
941 at86rf230_irqwork(work);
943 enable_irq(lp->spi->irq);
946 static irqreturn_t at86rf230_isr(int irq, void *data)
948 struct at86rf230_local *lp = data;
951 spin_lock_irqsave(&lp->lock, flags);
953 spin_unlock_irqrestore(&lp->lock, flags);
955 schedule_work(&lp->irqwork);
960 static irqreturn_t at86rf230_isr_level(int irq, void *data)
962 disable_irq_nosync(irq);
964 return at86rf230_isr(irq, data);
967 static int at86rf230_irq_polarity(struct at86rf230_local *lp, int pol)
969 return at86rf230_write_subreg(lp, SR_IRQ_POLARITY, pol);
972 static int at86rf230_hw_init(struct at86rf230_local *lp)
974 int rc, irq_pol, irq_type;
978 rc = at86rf230_read_subreg(lp, SR_TRX_STATUS, &status);
982 rc = at86rf230_write_subreg(lp, SR_TRX_CMD, STATE_FORCE_TRX_OFF);
986 irq_type = irq_get_trigger_type(lp->spi->irq);
987 /* configure irq polarity, defaults to high active */
988 if (irq_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW))
989 irq_pol = IRQ_ACTIVE_LOW;
991 irq_pol = IRQ_ACTIVE_HIGH;
993 rc = at86rf230_irq_polarity(lp, irq_pol);
997 rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
1001 get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
1002 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
1005 rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
1009 /* CLKM changes are applied immediately */
1010 rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
1015 rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
1018 /* Wait the next SLEEP cycle */
1021 rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &status);
1025 dev_err(&lp->spi->dev, "DVDD error\n");
1032 static struct at86rf230_platform_data *
1033 at86rf230_get_pdata(struct spi_device *spi)
1035 struct at86rf230_platform_data *pdata;
1037 if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node)
1038 return spi->dev.platform_data;
1040 pdata = devm_kzalloc(&spi->dev, sizeof(*pdata), GFP_KERNEL);
1044 pdata->rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
1045 pdata->slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
1047 spi->dev.platform_data = pdata;
1052 static int at86rf230_probe(struct spi_device *spi)
1054 struct at86rf230_platform_data *pdata;
1055 struct ieee802154_dev *dev;
1056 struct at86rf230_local *lp;
1058 u8 part = 0, version = 0, status;
1059 irq_handler_t irq_handler;
1060 work_func_t irq_worker;
1063 struct ieee802154_ops *ops = NULL;
1066 dev_err(&spi->dev, "no IRQ specified\n");
1070 pdata = at86rf230_get_pdata(spi);
1072 dev_err(&spi->dev, "no platform_data\n");
1076 if (gpio_is_valid(pdata->rstn)) {
1077 rc = gpio_request(pdata->rstn, "rstn");
1082 if (gpio_is_valid(pdata->slp_tr)) {
1083 rc = gpio_request(pdata->slp_tr, "slp_tr");
1088 if (gpio_is_valid(pdata->rstn)) {
1089 rc = gpio_direction_output(pdata->rstn, 1);
1094 if (gpio_is_valid(pdata->slp_tr)) {
1095 rc = gpio_direction_output(pdata->slp_tr, 0);
1101 if (gpio_is_valid(pdata->rstn)) {
1103 gpio_set_value(pdata->rstn, 0);
1105 gpio_set_value(pdata->rstn, 1);
1106 usleep_range(120, 240);
1109 rc = __at86rf230_detect_device(spi, &man_id, &part, &version);
1113 if (man_id != 0x001f) {
1114 dev_err(&spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
1115 man_id >> 8, man_id & 0xFF);
1123 /* FIXME: should be easy to support; */
1127 ops = &at86rf230_ops;
1132 ops = &at86rf212_ops;
1136 ops = &at86rf230_ops;
1143 dev_info(&spi->dev, "Detected %s chip version %d\n", chip, version);
1149 dev = ieee802154_alloc_device(sizeof(*lp), ops);
1162 dev->parent = &spi->dev;
1163 dev->extra_tx_headroom = 0;
1164 dev->flags = IEEE802154_HW_OMIT_CKSUM | IEEE802154_HW_AACK;
1166 irq_type = irq_get_trigger_type(spi->irq);
1167 if (irq_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
1168 irq_worker = at86rf230_irqwork;
1169 irq_handler = at86rf230_isr;
1171 irq_worker = at86rf230_irqwork_level;
1172 irq_handler = at86rf230_isr_level;
1175 mutex_init(&lp->bmux);
1176 INIT_WORK(&lp->irqwork, irq_worker);
1177 spin_lock_init(&lp->lock);
1178 init_completion(&lp->tx_complete);
1180 spi_set_drvdata(spi, lp);
1183 dev->phy->channels_supported[0] = 0x00007FF;
1184 dev->phy->channels_supported[2] = 0x00007FF;
1186 dev->phy->channels_supported[0] = 0x7FFF800;
1189 rc = at86rf230_hw_init(lp);
1193 rc = request_irq(spi->irq, irq_handler, IRQF_SHARED,
1194 dev_name(&spi->dev), lp);
1198 /* Read irq status register to reset irq line */
1199 rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
1203 rc = ieee802154_register_device(lp->dev);
1210 free_irq(spi->irq, lp);
1212 flush_work(&lp->irqwork);
1213 spi_set_drvdata(spi, NULL);
1214 mutex_destroy(&lp->bmux);
1215 ieee802154_free_device(lp->dev);
1218 if (gpio_is_valid(pdata->slp_tr))
1219 gpio_free(pdata->slp_tr);
1221 if (gpio_is_valid(pdata->rstn))
1222 gpio_free(pdata->rstn);
1226 static int at86rf230_remove(struct spi_device *spi)
1228 struct at86rf230_local *lp = spi_get_drvdata(spi);
1229 struct at86rf230_platform_data *pdata = spi->dev.platform_data;
1231 /* mask all at86rf230 irq's */
1232 at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
1233 ieee802154_unregister_device(lp->dev);
1235 free_irq(spi->irq, lp);
1236 flush_work(&lp->irqwork);
1238 if (gpio_is_valid(pdata->slp_tr))
1239 gpio_free(pdata->slp_tr);
1240 if (gpio_is_valid(pdata->rstn))
1241 gpio_free(pdata->rstn);
1243 mutex_destroy(&lp->bmux);
1244 ieee802154_free_device(lp->dev);
1246 dev_dbg(&spi->dev, "unregistered at86rf230\n");
1250 #if IS_ENABLED(CONFIG_OF)
1251 static struct of_device_id at86rf230_of_match[] = {
1252 { .compatible = "atmel,at86rf230", },
1253 { .compatible = "atmel,at86rf231", },
1254 { .compatible = "atmel,at86rf233", },
1255 { .compatible = "atmel,at86rf212", },
1260 static struct spi_driver at86rf230_driver = {
1262 .of_match_table = of_match_ptr(at86rf230_of_match),
1263 .name = "at86rf230",
1264 .owner = THIS_MODULE,
1266 .probe = at86rf230_probe,
1267 .remove = at86rf230_remove,
1270 module_spi_driver(at86rf230_driver);
1272 MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
1273 MODULE_LICENSE("GPL v2");