2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <linux/module.h>
34 #include <linux/mlx5/driver.h>
35 #include <linux/mlx5/cmd.h>
36 #include "mlx5_core.h"
38 int mlx5_core_access_reg(struct mlx5_core_dev *dev, void *data_in,
39 int size_in, void *data_out, int size_out,
40 u16 reg_num, int arg, int write)
42 struct mlx5_access_reg_mbox_in *in = NULL;
43 struct mlx5_access_reg_mbox_out *out = NULL;
46 in = mlx5_vzalloc(sizeof(*in) + size_in);
50 out = mlx5_vzalloc(sizeof(*out) + size_out);
54 memcpy(in->data, data_in, size_in);
55 in->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_ACCESS_REG);
56 in->hdr.opmod = cpu_to_be16(!write);
57 in->arg = cpu_to_be32(arg);
58 in->register_id = cpu_to_be16(reg_num);
59 err = mlx5_cmd_exec(dev, in, sizeof(*in) + size_in, out,
60 sizeof(*out) + size_out);
65 err = mlx5_cmd_status_to_err(&out->hdr);
68 memcpy(data_out, out->data, size_out);
76 EXPORT_SYMBOL_GPL(mlx5_core_access_reg);
79 struct mlx5_reg_pcap {
89 int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps)
91 struct mlx5_reg_pcap in;
92 struct mlx5_reg_pcap out;
95 memset(&in, 0, sizeof(in));
96 in.caps_127_96 = cpu_to_be32(caps);
97 in.port_num = port_num;
99 err = mlx5_core_access_reg(dev, &in, sizeof(in), &out,
100 sizeof(out), MLX5_REG_PCAP, 0, 1);
104 EXPORT_SYMBOL_GPL(mlx5_set_port_caps);
106 int mlx5_query_port_ptys(struct mlx5_core_dev *dev, u32 *ptys,
107 int ptys_size, int proto_mask, u8 local_port)
109 u32 in[MLX5_ST_SZ_DW(ptys_reg)];
112 memset(in, 0, sizeof(in));
113 MLX5_SET(ptys_reg, in, local_port, local_port);
114 MLX5_SET(ptys_reg, in, proto_mask, proto_mask);
116 err = mlx5_core_access_reg(dev, in, sizeof(in), ptys,
117 ptys_size, MLX5_REG_PTYS, 0, 0);
121 EXPORT_SYMBOL_GPL(mlx5_query_port_ptys);
123 int mlx5_query_port_proto_cap(struct mlx5_core_dev *dev,
124 u32 *proto_cap, int proto_mask)
126 u32 out[MLX5_ST_SZ_DW(ptys_reg)];
129 err = mlx5_query_port_ptys(dev, out, sizeof(out), proto_mask, 1);
133 if (proto_mask == MLX5_PTYS_EN)
134 *proto_cap = MLX5_GET(ptys_reg, out, eth_proto_capability);
136 *proto_cap = MLX5_GET(ptys_reg, out, ib_proto_capability);
140 EXPORT_SYMBOL_GPL(mlx5_query_port_proto_cap);
142 int mlx5_query_port_proto_admin(struct mlx5_core_dev *dev,
143 u32 *proto_admin, int proto_mask)
145 u32 out[MLX5_ST_SZ_DW(ptys_reg)];
148 err = mlx5_query_port_ptys(dev, out, sizeof(out), proto_mask, 1);
152 if (proto_mask == MLX5_PTYS_EN)
153 *proto_admin = MLX5_GET(ptys_reg, out, eth_proto_admin);
155 *proto_admin = MLX5_GET(ptys_reg, out, ib_proto_admin);
159 EXPORT_SYMBOL_GPL(mlx5_query_port_proto_admin);
161 int mlx5_set_port_proto(struct mlx5_core_dev *dev, u32 proto_admin,
164 u32 in[MLX5_ST_SZ_DW(ptys_reg)];
165 u32 out[MLX5_ST_SZ_DW(ptys_reg)];
168 memset(in, 0, sizeof(in));
170 MLX5_SET(ptys_reg, in, local_port, 1);
171 MLX5_SET(ptys_reg, in, proto_mask, proto_mask);
172 if (proto_mask == MLX5_PTYS_EN)
173 MLX5_SET(ptys_reg, in, eth_proto_admin, proto_admin);
175 MLX5_SET(ptys_reg, in, ib_proto_admin, proto_admin);
177 err = mlx5_core_access_reg(dev, in, sizeof(in), out,
178 sizeof(out), MLX5_REG_PTYS, 0, 1);
181 EXPORT_SYMBOL_GPL(mlx5_set_port_proto);
183 int mlx5_set_port_status(struct mlx5_core_dev *dev,
184 enum mlx5_port_status status)
186 u32 in[MLX5_ST_SZ_DW(paos_reg)];
187 u32 out[MLX5_ST_SZ_DW(paos_reg)];
189 memset(in, 0, sizeof(in));
191 MLX5_SET(paos_reg, in, admin_status, status);
192 MLX5_SET(paos_reg, in, ase, 1);
194 return mlx5_core_access_reg(dev, in, sizeof(in), out,
195 sizeof(out), MLX5_REG_PAOS, 0, 1);
198 int mlx5_query_port_status(struct mlx5_core_dev *dev, u8 *status)
200 u32 in[MLX5_ST_SZ_DW(paos_reg)];
201 u32 out[MLX5_ST_SZ_DW(paos_reg)];
204 memset(in, 0, sizeof(in));
206 err = mlx5_core_access_reg(dev, in, sizeof(in), out,
207 sizeof(out), MLX5_REG_PAOS, 0, 0);
211 *status = MLX5_GET(paos_reg, out, oper_status);
215 static int mlx5_query_port_mtu(struct mlx5_core_dev *dev,
216 int *admin_mtu, int *max_mtu, int *oper_mtu,
219 u32 in[MLX5_ST_SZ_DW(pmtu_reg)];
220 u32 out[MLX5_ST_SZ_DW(pmtu_reg)];
223 memset(in, 0, sizeof(in));
225 MLX5_SET(pmtu_reg, in, local_port, local_port);
227 err = mlx5_core_access_reg(dev, in, sizeof(in), out,
228 sizeof(out), MLX5_REG_PMTU, 0, 0);
233 *max_mtu = MLX5_GET(pmtu_reg, out, max_mtu);
235 *oper_mtu = MLX5_GET(pmtu_reg, out, oper_mtu);
237 *admin_mtu = MLX5_GET(pmtu_reg, out, admin_mtu);
242 int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu)
244 u32 in[MLX5_ST_SZ_DW(pmtu_reg)];
245 u32 out[MLX5_ST_SZ_DW(pmtu_reg)];
247 memset(in, 0, sizeof(in));
249 MLX5_SET(pmtu_reg, in, admin_mtu, mtu);
250 MLX5_SET(pmtu_reg, in, local_port, 1);
252 return mlx5_core_access_reg(dev, in, sizeof(in), out, sizeof(out),
253 MLX5_REG_PMTU, 0, 1);
255 EXPORT_SYMBOL_GPL(mlx5_set_port_mtu);
257 int mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, int *max_mtu,
260 return mlx5_query_port_mtu(dev, NULL, max_mtu, NULL, local_port);
262 EXPORT_SYMBOL_GPL(mlx5_query_port_max_mtu);
264 int mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, int *oper_mtu,
267 return mlx5_query_port_mtu(dev, NULL, NULL, oper_mtu, local_port);
269 EXPORT_SYMBOL_GPL(mlx5_query_port_oper_mtu);