drivers/net/ethernet/mellanox/mlx4/en_tx.c

   1 /*
   2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  */
  33
  34 #include <asm/page.h>
  35 #include <linux/mlx4/cq.h>
  36 #include <linux/slab.h>
  37 #include <linux/mlx4/qp.h>
  38 #include <linux/skbuff.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/vmalloc.h>
  41 #include <linux/tcp.h>
  42 #include <linux/moduleparam.h>
  43
  44 #include "mlx4_en.h"
  45
  46 enum {
  47         MAX_INLINE = 104, /* 128 - 16 - 4 - 4 */
  48         MAX_BF = 256,
  49 };
  50
  51 static int inline_thold __read_mostly = MAX_INLINE;
  52
  53 module_param_named(inline_thold, inline_thold, int, 0444);
  54 MODULE_PARM_DESC(inline_thold, "threshold for using inline data");
  55
  56 int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
  57                            struct mlx4_en_tx_ring **pring, int qpn, u32 size,
  58                            u16 stride, int node, int queue_index)
  59 {
  60         struct mlx4_en_dev *mdev = priv->mdev;
  61         struct mlx4_en_tx_ring *ring;
  62         int tmp;
  63         int err;
  64
  65         ring = kzalloc_node(sizeof(*ring), GFP_KERNEL, node);
  66         if (!ring) {
  67                 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  68                 if (!ring) {
  69                         en_err(priv, "Failed allocating TX ring\n");
  70                         return -ENOMEM;
  71                 }
  72         }
  73
  74         ring->size = size;
  75         ring->size_mask = size - 1;
  76         ring->stride = stride;
  77
  78         inline_thold = min(inline_thold, MAX_INLINE);
  79
  80         tmp = size * sizeof(struct mlx4_en_tx_info);
  81         ring->tx_info = vmalloc_node(tmp, node);
  82         if (!ring->tx_info) {
  83                 ring->tx_info = vmalloc(tmp);
  84                 if (!ring->tx_info) {
  85                         err = -ENOMEM;
  86                         goto err_ring;
  87                 }
  88         }
  89
  90         en_dbg(DRV, priv, "Allocated tx_info ring at addr:%p size:%d\n",
  91                  ring->tx_info, tmp);
  92
  93         ring->bounce_buf = kmalloc_node(MAX_DESC_SIZE, GFP_KERNEL, node);
  94         if (!ring->bounce_buf) {
  95                 ring->bounce_buf = kmalloc(MAX_DESC_SIZE, GFP_KERNEL);
  96                 if (!ring->bounce_buf) {
  97                         err = -ENOMEM;
  98                         goto err_info;
  99                 }
 100         }
 101         ring->buf_size = ALIGN(size * ring->stride, MLX4_EN_PAGE_SIZE);
 102
 103         /* Allocate HW buffers on provided NUMA node */
 104         set_dev_node(&mdev->dev->pdev->dev, node);
 105         err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, ring->buf_size,
 106                                  2 * PAGE_SIZE);
 107         set_dev_node(&mdev->dev->pdev->dev, mdev->dev->numa_node);
 108         if (err) {
 109                 en_err(priv, "Failed allocating hwq resources\n");
 110                 goto err_bounce;
 111         }
 112
 113         err = mlx4_en_map_buffer(&ring->wqres.buf);
 114         if (err) {
 115                 en_err(priv, "Failed to map TX buffer\n");
 116                 goto err_hwq_res;
 117         }
 118
 119         ring->buf = ring->wqres.buf.direct.buf;
 120
 121         en_dbg(DRV, priv, "Allocated TX ring (addr:%p) - buf:%p size:%d "
 122                "buf_size:%d dma:%llx\n", ring, ring->buf, ring->size,
 123                ring->buf_size, (unsigned long long) ring->wqres.buf.direct.map);
 124
 125         ring->qpn = qpn;
 126         err = mlx4_qp_alloc(mdev->dev, ring->qpn, &ring->qp);
 127         if (err) {
 128                 en_err(priv, "Failed allocating qp %d\n", ring->qpn);
 129                 goto err_map;
 130         }
 131         ring->qp.event = mlx4_en_sqp_event;
 132
 133         err = mlx4_bf_alloc(mdev->dev, &ring->bf, node);
 134         if (err) {
 135                 en_dbg(DRV, priv, "working without blueflame (%d)", err);
 136                 ring->bf.uar = &mdev->priv_uar;
 137                 ring->bf.uar->map = mdev->uar_map;
 138                 ring->bf_enabled = false;
 139         } else
 140                 ring->bf_enabled = true;
 141
 142         ring->hwtstamp_tx_type = priv->hwtstamp_config.tx_type;
 143         ring->queue_index = queue_index;
 144
 145         if (queue_index < priv->num_tx_rings_p_up && cpu_online(queue_index))
 146                 cpumask_set_cpu(queue_index, &ring->affinity_mask);
 147
 148         *pring = ring;
 149         return 0;
 150
 151 err_map:
 152         mlx4_en_unmap_buffer(&ring->wqres.buf);
 153 err_hwq_res:
 154         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
 155 err_bounce:
 156         kfree(ring->bounce_buf);
 157         ring->bounce_buf = NULL;
 158 err_info:
 159         vfree(ring->tx_info);
 160         ring->tx_info = NULL;
 161 err_ring:
 162         kfree(ring);
 163         *pring = NULL;
 164         return err;
 165 }
 166
 167 void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv,
 168                              struct mlx4_en_tx_ring **pring)
 169 {
 170         struct mlx4_en_dev *mdev = priv->mdev;
 171         struct mlx4_en_tx_ring *ring = *pring;
 172         en_dbg(DRV, priv, "Destroying tx ring, qpn: %d\n", ring->qpn);
 173
 174         if (ring->bf_enabled)
 175                 mlx4_bf_free(mdev->dev, &ring->bf);
 176         mlx4_qp_remove(mdev->dev, &ring->qp);
 177         mlx4_qp_free(mdev->dev, &ring->qp);
 178         mlx4_en_unmap_buffer(&ring->wqres.buf);
 179         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
 180         kfree(ring->bounce_buf);
 181         ring->bounce_buf = NULL;
 182         vfree(ring->tx_info);
 183         ring->tx_info = NULL;
 184         kfree(ring);
 185         *pring = NULL;
 186 }
 187
 188 int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
 189                              struct mlx4_en_tx_ring *ring,
 190                              int cq, int user_prio)
 191 {
 192         struct mlx4_en_dev *mdev = priv->mdev;
 193         int err;
 194
 195         ring->cqn = cq;
 196         ring->prod = 0;
 197         ring->cons = 0xffffffff;
 198         ring->last_nr_txbb = 1;
 199         ring->poll_cnt = 0;
 200         memset(ring->tx_info, 0, ring->size * sizeof(struct mlx4_en_tx_info));
 201         memset(ring->buf, 0, ring->buf_size);
 202
 203         ring->qp_state = MLX4_QP_STATE_RST;
 204         ring->doorbell_qpn = ring->qp.qpn << 8;
 205
 206         mlx4_en_fill_qp_context(priv, ring->size, ring->stride, 1, 0, ring->qpn,
 207                                 ring->cqn, user_prio, &ring->context);
 208         if (ring->bf_enabled)
 209                 ring->context.usr_page = cpu_to_be32(ring->bf.uar->index);
 210
 211         err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, &ring->context,
 212                                &ring->qp, &ring->qp_state);
 213         if (!user_prio && cpu_online(ring->queue_index))
 214                 netif_set_xps_queue(priv->dev, &ring->affinity_mask,
 215                                     ring->queue_index);
 216
 217         return err;
 218 }
 219
 220 void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv,
 221                                 struct mlx4_en_tx_ring *ring)
 222 {
 223         struct mlx4_en_dev *mdev = priv->mdev;
 224
 225         mlx4_qp_modify(mdev->dev, NULL, ring->qp_state,
 226                        MLX4_QP_STATE_RST, NULL, 0, 0, &ring->qp);
 227 }
 228
 229 static void mlx4_en_stamp_wqe(struct mlx4_en_priv *priv,
 230                               struct mlx4_en_tx_ring *ring, int index,
 231                               u8 owner)
 232 {
 233         __be32 stamp = cpu_to_be32(STAMP_VAL | (!!owner << STAMP_SHIFT));
 234         struct mlx4_en_tx_desc *tx_desc = ring->buf + index * TXBB_SIZE;
 235         struct mlx4_en_tx_info *tx_info = &ring->tx_info[index];
 236         void *end = ring->buf + ring->buf_size;
 237         __be32 *ptr = (__be32 *)tx_desc;
 238         int i;
 239
 240         /* Optimize the common case when there are no wraparounds */
 241         if (likely((void *)tx_desc + tx_info->nr_txbb * TXBB_SIZE <= end)) {
 242                 /* Stamp the freed descriptor */
 243                 for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE;
 244                      i += STAMP_STRIDE) {
 245                         *ptr = stamp;
 246                         ptr += STAMP_DWORDS;
 247                 }
 248         } else {
 249                 /* Stamp the freed descriptor */
 250                 for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE;
 251                      i += STAMP_STRIDE) {
 252                         *ptr = stamp;
 253                         ptr += STAMP_DWORDS;
 254                         if ((void *)ptr >= end) {
 255                                 ptr = ring->buf;
 256                                 stamp ^= cpu_to_be32(0x80000000);
 257                         }
 258                 }
 259         }
 260 }
 261
 262
 263 static u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
 264                                 struct mlx4_en_tx_ring *ring,
 265                                 int index, u8 owner, u64 timestamp)
 266 {
 267         struct mlx4_en_dev *mdev = priv->mdev;
 268         struct mlx4_en_tx_info *tx_info = &ring->tx_info[index];
 269         struct mlx4_en_tx_desc *tx_desc = ring->buf + index * TXBB_SIZE;
 270         struct mlx4_wqe_data_seg *data = (void *) tx_desc + tx_info->data_offset;
 271         struct sk_buff *skb = tx_info->skb;
 272         struct skb_frag_struct *frag;
 273         void *end = ring->buf + ring->buf_size;
 274         int frags = skb_shinfo(skb)->nr_frags;
 275         int i;
 276         struct skb_shared_hwtstamps hwts;
 277
 278         if (timestamp) {
 279                 mlx4_en_fill_hwtstamps(mdev, &hwts, timestamp);
 280                 skb_tstamp_tx(skb, &hwts);
 281         }
 282
 283         /* Optimize the common case when there are no wraparounds */
 284         if (likely((void *) tx_desc + tx_info->nr_txbb * TXBB_SIZE <= end)) {
 285                 if (!tx_info->inl) {
 286                         if (tx_info->linear) {
 287                                 dma_unmap_single(priv->ddev,
 288                                         (dma_addr_t) be64_to_cpu(data->addr),
 289                                          be32_to_cpu(data->byte_count),
 290                                          PCI_DMA_TODEVICE);
 291                                 ++data;
 292                         }
 293
 294                         for (i = 0; i < frags; i++) {
 295                                 frag = &skb_shinfo(skb)->frags[i];
 296                                 dma_unmap_page(priv->ddev,
 297                                         (dma_addr_t) be64_to_cpu(data[i].addr),
 298                                         skb_frag_size(frag), PCI_DMA_TODEVICE);
 299                         }
 300                 }
 301         } else {
 302                 if (!tx_info->inl) {
 303                         if ((void *) data >= end) {
 304                                 data = ring->buf + ((void *)data - end);
 305                         }
 306
 307                         if (tx_info->linear) {
 308                                 dma_unmap_single(priv->ddev,
 309                                         (dma_addr_t) be64_to_cpu(data->addr),
 310                                          be32_to_cpu(data->byte_count),
 311                                          PCI_DMA_TODEVICE);
 312                                 ++data;
 313                         }
 314
 315                         for (i = 0; i < frags; i++) {
 316                                 /* Check for wraparound before unmapping */
 317                                 if ((void *) data >= end)
 318                                         data = ring->buf;
 319                                 frag = &skb_shinfo(skb)->frags[i];
 320                                 dma_unmap_page(priv->ddev,
 321                                         (dma_addr_t) be64_to_cpu(data->addr),
 322                                          skb_frag_size(frag), PCI_DMA_TODEVICE);
 323                                 ++data;
 324                         }
 325                 }
 326         }
 327         dev_kfree_skb(skb);
 328         return tx_info->nr_txbb;
 329 }
 330
 331
 332 int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring)
 333 {
 334         struct mlx4_en_priv *priv = netdev_priv(dev);
 335         int cnt = 0;
 336
 337         /* Skip last polled descriptor */
 338         ring->cons += ring->last_nr_txbb;
 339         en_dbg(DRV, priv, "Freeing Tx buf - cons:0x%x prod:0x%x\n",
 340                  ring->cons, ring->prod);
 341
 342         if ((u32) (ring->prod - ring->cons) > ring->size) {
 343                 if (netif_msg_tx_err(priv))
 344                         en_warn(priv, "Tx consumer passed producer!\n");
 345                 return 0;
 346         }
 347
 348         while (ring->cons != ring->prod) {
 349                 ring->last_nr_txbb = mlx4_en_free_tx_desc(priv, ring,
 350                                                 ring->cons & ring->size_mask,
 351                                                 !!(ring->cons & ring->size), 0);
 352                 ring->cons += ring->last_nr_txbb;
 353                 cnt++;
 354         }
 355
 356         netdev_tx_reset_queue(ring->tx_queue);
 357
 358         if (cnt)
 359                 en_dbg(DRV, priv, "Freed %d uncompleted tx descriptors\n", cnt);
 360
 361         return cnt;
 362 }
 363
 364 static int mlx4_en_process_tx_cq(struct net_device *dev,
 365                                  struct mlx4_en_cq *cq,
 366                                  int budget)
 367 {
 368         struct mlx4_en_priv *priv = netdev_priv(dev);
 369         struct mlx4_cq *mcq = &cq->mcq;
 370         struct mlx4_en_tx_ring *ring = priv->tx_ring[cq->ring];
 371         struct mlx4_cqe *cqe;
 372         u16 index;
 373         u16 new_index, ring_index, stamp_index;
 374         u32 txbbs_skipped = 0;
 375         u32 txbbs_stamp = 0;
 376         u32 cons_index = mcq->cons_index;
 377         int size = cq->size;
 378         u32 size_mask = ring->size_mask;
 379         struct mlx4_cqe *buf = cq->buf;
 380         u32 packets = 0;
 381         u32 bytes = 0;
 382         int factor = priv->cqe_factor;
 383         u64 timestamp = 0;
 384         int done = 0;
 385
 386         if (!priv->port_up)
 387                 return 0;
 388
 389         index = cons_index & size_mask;
 390         cqe = &buf[(index << factor) + factor];
 391         ring_index = ring->cons & size_mask;
 392         stamp_index = ring_index;
 393
 394         /* Process all completed CQEs */
 395         while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
 396                         cons_index & size) && (done < budget)) {
 397                 /*
 398                  * make sure we read the CQE after we read the
 399                  * ownership bit
 400                  */
 401                 rmb();
 402
 403                 if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
 404                              MLX4_CQE_OPCODE_ERROR)) {
 405                         struct mlx4_err_cqe *cqe_err = (struct mlx4_err_cqe *)cqe;
 406
 407                         en_err(priv, "CQE error - vendor syndrome: 0x%x syndrome: 0x%x\n",
 408                                cqe_err->vendor_err_syndrome,
 409                                cqe_err->syndrome);
 410                 }
 411
 412                 /* Skip over last polled CQE */
 413                 new_index = be16_to_cpu(cqe->wqe_index) & size_mask;
 414
 415                 do {
 416                         txbbs_skipped += ring->last_nr_txbb;
 417                         ring_index = (ring_index + ring->last_nr_txbb) & size_mask;
 418                         if (ring->tx_info[ring_index].ts_requested)
 419                                 timestamp = mlx4_en_get_cqe_ts(cqe);
 420
 421                         /* free next descriptor */
 422                         ring->last_nr_txbb = mlx4_en_free_tx_desc(
 423                                         priv, ring, ring_index,
 424                                         !!((ring->cons + txbbs_skipped) &
 425                                         ring->size), timestamp);
 426
 427                         mlx4_en_stamp_wqe(priv, ring, stamp_index,
 428                                           !!((ring->cons + txbbs_stamp) &
 429                                                 ring->size));
 430                         stamp_index = ring_index;
 431                         txbbs_stamp = txbbs_skipped;
 432                         packets++;
 433                         bytes += ring->tx_info[ring_index].nr_bytes;
 434                 } while ((++done < budget) && (ring_index != new_index));
 435
 436                 ++cons_index;
 437                 index = cons_index & size_mask;
 438                 cqe = &buf[(index << factor) + factor];
 439         }
 440
 441
 442         /*
 443          * To prevent CQ overflow we first update CQ consumer and only then
 444          * the ring consumer.
 445          */
 446         mcq->cons_index = cons_index;
 447         mlx4_cq_set_ci(mcq);
 448         wmb();
 449         ring->cons += txbbs_skipped;
 450         netdev_tx_completed_queue(ring->tx_queue, packets, bytes);
 451
 452         /*
 453          * Wakeup Tx queue if this stopped, and at least 1 packet
 454          * was completed
 455          */
 456         if (netif_tx_queue_stopped(ring->tx_queue) && txbbs_skipped > 0) {
 457                 netif_tx_wake_queue(ring->tx_queue);
 458                 priv->port_stats.wake_queue++;
 459         }
 460         return done;
 461 }
 462
 463 void mlx4_en_tx_irq(struct mlx4_cq *mcq)
 464 {
 465         struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq);
 466         struct mlx4_en_priv *priv = netdev_priv(cq->dev);
 467
 468         if (priv->port_up)
 469                 napi_schedule(&cq->napi);
 470         else
 471                 mlx4_en_arm_cq(priv, cq);
 472 }
 473
 474 /* TX CQ polling - called by NAPI */
 475 int mlx4_en_poll_tx_cq(struct napi_struct *napi, int budget)
 476 {
 477         struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
 478         struct net_device *dev = cq->dev;
 479         struct mlx4_en_priv *priv = netdev_priv(dev);
 480         int done;
 481
 482         done = mlx4_en_process_tx_cq(dev, cq, budget);
 483
 484         /* If we used up all the quota - we're probably not done yet... */
 485         if (done < budget) {
 486                 /* Done for now */
 487                 napi_complete(napi);
 488                 mlx4_en_arm_cq(priv, cq);
 489                 return done;
 490         }
 491         return budget;
 492 }
 493
 494 static struct mlx4_en_tx_desc *mlx4_en_bounce_to_desc(struct mlx4_en_priv *priv,
 495                                                       struct mlx4_en_tx_ring *ring,
 496                                                       u32 index,
 497                                                       unsigned int desc_size)
 498 {
 499         u32 copy = (ring->size - index) * TXBB_SIZE;
 500         int i;
 501
 502         for (i = desc_size - copy - 4; i >= 0; i -= 4) {
 503                 if ((i & (TXBB_SIZE - 1)) == 0)
 504                         wmb();
 505
 506                 *((u32 *) (ring->buf + i)) =
 507                         *((u32 *) (ring->bounce_buf + copy + i));
 508         }
 509
 510         for (i = copy - 4; i >= 4 ; i -= 4) {
 511                 if ((i & (TXBB_SIZE - 1)) == 0)
 512                         wmb();
 513
 514                 *((u32 *) (ring->buf + index * TXBB_SIZE + i)) =
 515                         *((u32 *) (ring->bounce_buf + i));
 516         }
 517
 518         /* Return real descriptor location */
 519         return ring->buf + index * TXBB_SIZE;
 520 }
 521
 522 static int is_inline(struct sk_buff *skb, void **pfrag)
 523 {
 524         void *ptr;
 525
 526         if (inline_thold && !skb_is_gso(skb) && skb->len <= inline_thold) {
 527                 if (skb_shinfo(skb)->nr_frags == 1) {
 528                         ptr = skb_frag_address_safe(&skb_shinfo(skb)->frags[0]);
 529                         if (unlikely(!ptr))
 530                                 return 0;
 531
 532                         if (pfrag)
 533                                 *pfrag = ptr;
 534
 535                         return 1;
 536                 } else if (unlikely(skb_shinfo(skb)->nr_frags))
 537                         return 0;
 538                 else
 539                         return 1;
 540         }
 541
 542         return 0;
 543 }
 544
 545 static int inline_size(struct sk_buff *skb)
 546 {
 547         if (skb->len + CTRL_SIZE + sizeof(struct mlx4_wqe_inline_seg)
 548             <= MLX4_INLINE_ALIGN)
 549                 return ALIGN(skb->len + CTRL_SIZE +
 550                              sizeof(struct mlx4_wqe_inline_seg), 16);
 551         else
 552                 return ALIGN(skb->len + CTRL_SIZE + 2 *
 553                              sizeof(struct mlx4_wqe_inline_seg), 16);
 554 }
 555
 556 static int get_real_size(struct sk_buff *skb, struct net_device *dev,
 557                          int *lso_header_size)
 558 {
 559         struct mlx4_en_priv *priv = netdev_priv(dev);
 560         int real_size;
 561
 562         if (skb_is_gso(skb)) {
 563                 *lso_header_size = skb_transport_offset(skb) + tcp_hdrlen(skb);
 564                 real_size = CTRL_SIZE + skb_shinfo(skb)->nr_frags * DS_SIZE +
 565                         ALIGN(*lso_header_size + 4, DS_SIZE);
 566                 if (unlikely(*lso_header_size != skb_headlen(skb))) {
 567                         /* We add a segment for the skb linear buffer only if
 568                          * it contains data */
 569                         if (*lso_header_size < skb_headlen(skb))
 570                                 real_size += DS_SIZE;
 571                         else {
 572                                 if (netif_msg_tx_err(priv))
 573                                         en_warn(priv, "Non-linear headers\n");
 574                                 return 0;
 575                         }
 576                 }
 577         } else {
 578                 *lso_header_size = 0;
 579                 if (!is_inline(skb, NULL))
 580                         real_size = CTRL_SIZE + (skb_shinfo(skb)->nr_frags + 1) * DS_SIZE;
 581                 else
 582                         real_size = inline_size(skb);
 583         }
 584
 585         return real_size;
 586 }
 587
 588 static void build_inline_wqe(struct mlx4_en_tx_desc *tx_desc, struct sk_buff *skb,
 589                              int real_size, u16 *vlan_tag, int tx_ind, void *fragptr)
 590 {
 591         struct mlx4_wqe_inline_seg *inl = &tx_desc->inl;
 592         int spc = MLX4_INLINE_ALIGN - CTRL_SIZE - sizeof *inl;
 593
 594         if (skb->len <= spc) {
 595                 inl->byte_count = cpu_to_be32(1 << 31 | skb->len);
 596                 skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb));
 597                 if (skb_shinfo(skb)->nr_frags)
 598                         memcpy(((void *)(inl + 1)) + skb_headlen(skb), fragptr,
 599                                skb_frag_size(&skb_shinfo(skb)->frags[0]));
 600
 601         } else {
 602                 inl->byte_count = cpu_to_be32(1 << 31 | spc);
 603                 if (skb_headlen(skb) <= spc) {
 604                         skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb));
 605                         if (skb_headlen(skb) < spc) {
 606                                 memcpy(((void *)(inl + 1)) + skb_headlen(skb),
 607                                         fragptr, spc - skb_headlen(skb));
 608                                 fragptr +=  spc - skb_headlen(skb);
 609                         }
 610                         inl = (void *) (inl + 1) + spc;
 611                         memcpy(((void *)(inl + 1)), fragptr, skb->len - spc);
 612                 } else {
 613                         skb_copy_from_linear_data(skb, inl + 1, spc);
 614                         inl = (void *) (inl + 1) + spc;
 615                         skb_copy_from_linear_data_offset(skb, spc, inl + 1,
 616                                         skb_headlen(skb) - spc);
 617                         if (skb_shinfo(skb)->nr_frags)
 618                                 memcpy(((void *)(inl + 1)) + skb_headlen(skb) - spc,
 619                                         fragptr, skb_frag_size(&skb_shinfo(skb)->frags[0]));
 620                 }
 621
 622                 wmb();
 623                 inl->byte_count = cpu_to_be32(1 << 31 | (skb->len - spc));
 624         }
 625 }
 626
 627 u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb)
 628 {
 629         struct mlx4_en_priv *priv = netdev_priv(dev);
 630         u16 rings_p_up = priv->num_tx_rings_p_up;
 631         u8 up = 0;
 632
 633         if (dev->num_tc)
 634                 return skb_tx_hash(dev, skb);
 635
 636         if (vlan_tx_tag_present(skb))
 637                 up = vlan_tx_tag_get(skb) >> VLAN_PRIO_SHIFT;
 638
 639         return __netdev_pick_tx(dev, skb) % rings_p_up + up * rings_p_up;
 640 }
 641
 642 static void mlx4_bf_copy(void __iomem *dst, unsigned long *src, unsigned bytecnt)
 643 {
 644         __iowrite64_copy(dst, src, bytecnt / 8);
 645 }
 646
 647 netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
 648 {
 649         struct mlx4_en_priv *priv = netdev_priv(dev);
 650         struct mlx4_en_dev *mdev = priv->mdev;
 651         struct device *ddev = priv->ddev;
 652         struct mlx4_en_tx_ring *ring;
 653         struct mlx4_en_tx_desc *tx_desc;
 654         struct mlx4_wqe_data_seg *data;
 655         struct mlx4_en_tx_info *tx_info;
 656         int tx_ind = 0;
 657         int nr_txbb;
 658         int desc_size;
 659         int real_size;
 660         u32 index, bf_index;
 661         __be32 op_own;
 662         u16 vlan_tag = 0;
 663         int i;
 664         int lso_header_size;
 665         void *fragptr;
 666         bool bounce = false;
 667
 668         if (!priv->port_up)
 669                 goto tx_drop;
 670
 671         real_size = get_real_size(skb, dev, &lso_header_size);
 672         if (unlikely(!real_size))
 673                 goto tx_drop;
 674
 675         /* Align descriptor to TXBB size */
 676         desc_size = ALIGN(real_size, TXBB_SIZE);
 677         nr_txbb = desc_size / TXBB_SIZE;
 678         if (unlikely(nr_txbb > MAX_DESC_TXBBS)) {
 679                 if (netif_msg_tx_err(priv))
 680                         en_warn(priv, "Oversized header or SG list\n");
 681                 goto tx_drop;
 682         }
 683
 684         tx_ind = skb->queue_mapping;
 685         ring = priv->tx_ring[tx_ind];
 686         if (vlan_tx_tag_present(skb))
 687                 vlan_tag = vlan_tx_tag_get(skb);
 688
 689         /* Check available TXBBs And 2K spare for prefetch */
 690         if (unlikely(((int)(ring->prod - ring->cons)) >
 691                      ring->size - HEADROOM - MAX_DESC_TXBBS)) {
 692                 /* every full Tx ring stops queue */
 693                 netif_tx_stop_queue(ring->tx_queue);
 694                 priv->port_stats.queue_stopped++;
 695
 696                 /* If queue was emptied after the if, and before the
 697                  * stop_queue - need to wake the queue, or else it will remain
 698                  * stopped forever.
 699                  * Need a memory barrier to make sure ring->cons was not
 700                  * updated before queue was stopped.
 701                  */
 702                 wmb();
 703
 704                 if (unlikely(((int)(ring->prod - ring->cons)) <=
 705                              ring->size - HEADROOM - MAX_DESC_TXBBS)) {
 706                         netif_tx_wake_queue(ring->tx_queue);
 707                         priv->port_stats.wake_queue++;
 708                 } else {
 709                         return NETDEV_TX_BUSY;
 710                 }
 711         }
 712
 713         /* Track current inflight packets for performance analysis */
 714         AVG_PERF_COUNTER(priv->pstats.inflight_avg,
 715                          (u32) (ring->prod - ring->cons - 1));
 716
 717         /* Packet is good - grab an index and transmit it */
 718         index = ring->prod & ring->size_mask;
 719         bf_index = ring->prod;
 720
 721         /* See if we have enough space for whole descriptor TXBB for setting
 722          * SW ownership on next descriptor; if not, use a bounce buffer. */
 723         if (likely(index + nr_txbb <= ring->size))
 724                 tx_desc = ring->buf + index * TXBB_SIZE;
 725         else {
 726                 tx_desc = (struct mlx4_en_tx_desc *) ring->bounce_buf;
 727                 bounce = true;
 728         }
 729
 730         /* Save skb in tx_info ring */
 731         tx_info = &ring->tx_info[index];
 732         tx_info->skb = skb;
 733         tx_info->nr_txbb = nr_txbb;
 734
 735         if (lso_header_size)
 736                 data = ((void *)&tx_desc->lso + ALIGN(lso_header_size + 4,
 737                                                       DS_SIZE));
 738         else
 739                 data = &tx_desc->data;
 740
 741         /* valid only for none inline segments */
 742         tx_info->data_offset = (void *)data - (void *)tx_desc;
 743
 744         tx_info->linear = (lso_header_size < skb_headlen(skb) &&
 745                            !is_inline(skb, NULL)) ? 1 : 0;
 746
 747         data += skb_shinfo(skb)->nr_frags + tx_info->linear - 1;
 748
 749         if (is_inline(skb, &fragptr)) {
 750                 tx_info->inl = 1;
 751         } else {
 752                 /* Map fragments */
 753                 for (i = skb_shinfo(skb)->nr_frags - 1; i >= 0; i--) {
 754                         struct skb_frag_struct *frag;
 755                         dma_addr_t dma;
 756
 757                         frag = &skb_shinfo(skb)->frags[i];
 758                         dma = skb_frag_dma_map(ddev, frag,
 759                                                0, skb_frag_size(frag),
 760                                                DMA_TO_DEVICE);
 761                         if (dma_mapping_error(ddev, dma))
 762                                 goto tx_drop_unmap;
 763
 764                         data->addr = cpu_to_be64(dma);
 765                         data->lkey = cpu_to_be32(mdev->mr.key);
 766                         wmb();
 767                         data->byte_count = cpu_to_be32(skb_frag_size(frag));
 768                         --data;
 769                 }
 770
 771                 /* Map linear part */
 772                 if (tx_info->linear) {
 773                         u32 byte_count = skb_headlen(skb) - lso_header_size;
 774                         dma_addr_t dma;
 775
 776                         dma = dma_map_single(ddev, skb->data +
 777                                              lso_header_size, byte_count,
 778                                              PCI_DMA_TODEVICE);
 779                         if (dma_mapping_error(ddev, dma))
 780                                 goto tx_drop_unmap;
 781
 782                         data->addr = cpu_to_be64(dma);
 783                         data->lkey = cpu_to_be32(mdev->mr.key);
 784                         wmb();
 785                         data->byte_count = cpu_to_be32(byte_count);
 786                 }
 787                 tx_info->inl = 0;
 788         }
 789
 790         /*
 791          * For timestamping add flag to skb_shinfo and
 792          * set flag for further reference
 793          */
 794         if (ring->hwtstamp_tx_type == HWTSTAMP_TX_ON &&
 795             skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
 796                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
 797                 tx_info->ts_requested = 1;
 798         }
 799
 800         /* Prepare ctrl segement apart opcode+ownership, which depends on
 801          * whether LSO is used */
 802         tx_desc->ctrl.vlan_tag = cpu_to_be16(vlan_tag);
 803         tx_desc->ctrl.ins_vlan = MLX4_WQE_CTRL_INS_VLAN *
 804                 !!vlan_tx_tag_present(skb);
 805         tx_desc->ctrl.fence_size = (real_size / 16) & 0x3f;
 806         tx_desc->ctrl.srcrb_flags = priv->ctrl_flags;
 807         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
 808                 tx_desc->ctrl.srcrb_flags |= cpu_to_be32(MLX4_WQE_CTRL_IP_CSUM |
 809                                                          MLX4_WQE_CTRL_TCP_UDP_CSUM);
 810                 ring->tx_csum++;
 811         }
 812
 813         if (priv->flags & MLX4_EN_FLAG_ENABLE_HW_LOOPBACK) {
 814                 struct ethhdr *ethh;
 815
 816                 /* Copy dst mac address to wqe. This allows loopback in eSwitch,
 817                  * so that VFs and PF can communicate with each other
 818                  */
 819                 ethh = (struct ethhdr *)skb->data;
 820                 tx_desc->ctrl.srcrb_flags16[0] = get_unaligned((__be16 *)ethh->h_dest);
 821                 tx_desc->ctrl.imm = get_unaligned((__be32 *)(ethh->h_dest + 2));
 822         }
 823
 824         /* Handle LSO (TSO) packets */
 825         if (lso_header_size) {
 826                 /* Mark opcode as LSO */
 827                 op_own = cpu_to_be32(MLX4_OPCODE_LSO | (1 << 6)) |
 828                         ((ring->prod & ring->size) ?
 829                                 cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0);
 830
 831                 /* Fill in the LSO prefix */
 832                 tx_desc->lso.mss_hdr_size = cpu_to_be32(
 833                         skb_shinfo(skb)->gso_size << 16 | lso_header_size);
 834
 835                 /* Copy headers;
 836                  * note that we already verified that it is linear */
 837                 memcpy(tx_desc->lso.header, skb->data, lso_header_size);
 838
 839                 priv->port_stats.tso_packets++;
 840                 i = ((skb->len - lso_header_size) / skb_shinfo(skb)->gso_size) +
 841                         !!((skb->len - lso_header_size) % skb_shinfo(skb)->gso_size);
 842                 tx_info->nr_bytes = skb->len + (i - 1) * lso_header_size;
 843                 ring->packets += i;
 844         } else {
 845                 /* Normal (Non LSO) packet */
 846                 op_own = cpu_to_be32(MLX4_OPCODE_SEND) |
 847                         ((ring->prod & ring->size) ?
 848                          cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0);
 849                 tx_info->nr_bytes = max_t(unsigned int, skb->len, ETH_ZLEN);
 850                 ring->packets++;
 851
 852         }
 853         ring->bytes += tx_info->nr_bytes;
 854         netdev_tx_sent_queue(ring->tx_queue, tx_info->nr_bytes);
 855         AVG_PERF_COUNTER(priv->pstats.tx_pktsz_avg, skb->len);
 856
 857         if (tx_info->inl) {
 858                 build_inline_wqe(tx_desc, skb, real_size, &vlan_tag, tx_ind, fragptr);
 859                 tx_info->inl = 1;
 860         }
 861
 862         ring->prod += nr_txbb;
 863
 864         /* If we used a bounce buffer then copy descriptor back into place */
 865         if (bounce)
 866                 tx_desc = mlx4_en_bounce_to_desc(priv, ring, index, desc_size);
 867
 868         skb_tx_timestamp(skb);
 869
 870         if (ring->bf_enabled && desc_size <= MAX_BF && !bounce && !vlan_tx_tag_present(skb)) {
 871                 *(__be32 *) (&tx_desc->ctrl.vlan_tag) |= cpu_to_be32(ring->doorbell_qpn);
 872                 op_own |= htonl((bf_index & 0xffff) << 8);
 873                 /* Ensure new descirptor hits memory
 874                 * before setting ownership of this descriptor to HW */
 875                 wmb();
 876                 tx_desc->ctrl.owner_opcode = op_own;
 877
 878                 wmb();
 879
 880                 mlx4_bf_copy(ring->bf.reg + ring->bf.offset, (unsigned long *) &tx_desc->ctrl,
 881                      desc_size);
 882
 883                 wmb();
 884
 885                 ring->bf.offset ^= ring->bf.buf_size;
 886         } else {
 887                 /* Ensure new descirptor hits memory
 888                 * before setting ownership of this descriptor to HW */
 889                 wmb();
 890                 tx_desc->ctrl.owner_opcode = op_own;
 891                 wmb();
 892                 iowrite32be(ring->doorbell_qpn, ring->bf.uar->map + MLX4_SEND_DOORBELL);
 893         }
 894
 895         return NETDEV_TX_OK;
 896
 897 tx_drop_unmap:
 898         en_err(priv, "DMA mapping error\n");
 899
 900         for (i++; i < skb_shinfo(skb)->nr_frags; i++) {
 901                 data++;
 902                 dma_unmap_page(ddev, (dma_addr_t) be64_to_cpu(data->addr),
 903                                be32_to_cpu(data->byte_count),
 904                                PCI_DMA_TODEVICE);
 905         }
 906
 907 tx_drop:
 908         dev_kfree_skb_any(skb);
 909         priv->stats.tx_dropped++;
 910         return NETDEV_TX_OK;
 911 }
 912