1 /* cnic.c: Broadcom CNIC core network driver.
3 * Copyright (c) 2006-2010 Broadcom Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
9 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10 * Modified and maintained by: Michael Chan <mchan@broadcom.com>
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/list.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <linux/init.h>
23 #include <linux/netdevice.h>
24 #include <linux/uio_driver.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/delay.h>
28 #include <linux/ethtool.h>
29 #include <linux/if_vlan.h>
30 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
35 #include <net/route.h>
37 #include <net/ip6_route.h>
38 #include <net/ip6_checksum.h>
39 #include <scsi/iscsi_if.h>
43 #include "bnx2x/bnx2x_reg.h"
44 #include "bnx2x/bnx2x_fw_defs.h"
45 #include "bnx2x/bnx2x_hsi.h"
46 #include "../scsi/bnx2i/57xx_iscsi_constants.h"
47 #include "../scsi/bnx2i/57xx_iscsi_hsi.h"
49 #include "cnic_defs.h"
51 #define DRV_MODULE_NAME "cnic"
53 static char version[] __devinitdata =
54 "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
56 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
57 "Chen (zongxi@broadcom.com");
58 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(CNIC_MODULE_VERSION);
62 /* cnic_dev_list modifications are protected by both rtnl and cnic_dev_lock */
63 static LIST_HEAD(cnic_dev_list);
64 static LIST_HEAD(cnic_udev_list);
65 static DEFINE_RWLOCK(cnic_dev_lock);
66 static DEFINE_MUTEX(cnic_lock);
68 static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
70 static int cnic_service_bnx2(void *, void *);
71 static int cnic_service_bnx2x(void *, void *);
72 static int cnic_ctl(void *, struct cnic_ctl_info *);
74 static struct cnic_ops cnic_bnx2_ops = {
75 .cnic_owner = THIS_MODULE,
76 .cnic_handler = cnic_service_bnx2,
80 static struct cnic_ops cnic_bnx2x_ops = {
81 .cnic_owner = THIS_MODULE,
82 .cnic_handler = cnic_service_bnx2x,
86 static struct workqueue_struct *cnic_wq;
88 static void cnic_shutdown_rings(struct cnic_dev *);
89 static void cnic_init_rings(struct cnic_dev *);
90 static int cnic_cm_set_pg(struct cnic_sock *);
92 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
94 struct cnic_uio_dev *udev = uinfo->priv;
97 if (!capable(CAP_NET_ADMIN))
100 if (udev->uio_dev != -1)
106 if (!dev || !test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
111 udev->uio_dev = iminor(inode);
113 cnic_shutdown_rings(dev);
114 cnic_init_rings(dev);
120 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
122 struct cnic_uio_dev *udev = uinfo->priv;
128 static inline void cnic_hold(struct cnic_dev *dev)
130 atomic_inc(&dev->ref_count);
133 static inline void cnic_put(struct cnic_dev *dev)
135 atomic_dec(&dev->ref_count);
138 static inline void csk_hold(struct cnic_sock *csk)
140 atomic_inc(&csk->ref_count);
143 static inline void csk_put(struct cnic_sock *csk)
145 atomic_dec(&csk->ref_count);
148 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
150 struct cnic_dev *cdev;
152 read_lock(&cnic_dev_lock);
153 list_for_each_entry(cdev, &cnic_dev_list, list) {
154 if (netdev == cdev->netdev) {
156 read_unlock(&cnic_dev_lock);
160 read_unlock(&cnic_dev_lock);
164 static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
166 atomic_inc(&ulp_ops->ref_count);
169 static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
171 atomic_dec(&ulp_ops->ref_count);
174 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
176 struct cnic_local *cp = dev->cnic_priv;
177 struct cnic_eth_dev *ethdev = cp->ethdev;
178 struct drv_ctl_info info;
179 struct drv_ctl_io *io = &info.data.io;
181 info.cmd = DRV_CTL_CTX_WR_CMD;
182 io->cid_addr = cid_addr;
185 ethdev->drv_ctl(dev->netdev, &info);
188 static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
190 struct cnic_local *cp = dev->cnic_priv;
191 struct cnic_eth_dev *ethdev = cp->ethdev;
192 struct drv_ctl_info info;
193 struct drv_ctl_io *io = &info.data.io;
195 info.cmd = DRV_CTL_CTXTBL_WR_CMD;
198 ethdev->drv_ctl(dev->netdev, &info);
201 static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
203 struct cnic_local *cp = dev->cnic_priv;
204 struct cnic_eth_dev *ethdev = cp->ethdev;
205 struct drv_ctl_info info;
206 struct drv_ctl_l2_ring *ring = &info.data.ring;
209 info.cmd = DRV_CTL_START_L2_CMD;
211 info.cmd = DRV_CTL_STOP_L2_CMD;
214 ring->client_id = cl_id;
215 ethdev->drv_ctl(dev->netdev, &info);
218 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
220 struct cnic_local *cp = dev->cnic_priv;
221 struct cnic_eth_dev *ethdev = cp->ethdev;
222 struct drv_ctl_info info;
223 struct drv_ctl_io *io = &info.data.io;
225 info.cmd = DRV_CTL_IO_WR_CMD;
228 ethdev->drv_ctl(dev->netdev, &info);
231 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
233 struct cnic_local *cp = dev->cnic_priv;
234 struct cnic_eth_dev *ethdev = cp->ethdev;
235 struct drv_ctl_info info;
236 struct drv_ctl_io *io = &info.data.io;
238 info.cmd = DRV_CTL_IO_RD_CMD;
240 ethdev->drv_ctl(dev->netdev, &info);
244 static int cnic_in_use(struct cnic_sock *csk)
246 return test_bit(SK_F_INUSE, &csk->flags);
249 static void cnic_spq_completion(struct cnic_dev *dev, int cmd, u32 count)
251 struct cnic_local *cp = dev->cnic_priv;
252 struct cnic_eth_dev *ethdev = cp->ethdev;
253 struct drv_ctl_info info;
256 info.data.credit.credit_count = count;
257 ethdev->drv_ctl(dev->netdev, &info);
260 static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
264 for (i = 0; i < cp->max_cid_space; i++) {
265 if (cp->ctx_tbl[i].cid == cid) {
273 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
274 struct cnic_sock *csk)
276 struct iscsi_path path_req;
279 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
280 struct cnic_ulp_ops *ulp_ops;
281 struct cnic_uio_dev *udev = cp->udev;
282 int rc = 0, retry = 0;
284 if (!udev || udev->uio_dev == -1)
288 len = sizeof(path_req);
289 buf = (char *) &path_req;
290 memset(&path_req, 0, len);
292 msg_type = ISCSI_KEVENT_PATH_REQ;
293 path_req.handle = (u64) csk->l5_cid;
294 if (test_bit(SK_F_IPV6, &csk->flags)) {
295 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
296 sizeof(struct in6_addr));
297 path_req.ip_addr_len = 16;
299 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
300 sizeof(struct in_addr));
301 path_req.ip_addr_len = 4;
303 path_req.vlan_id = csk->vlan_id;
304 path_req.pmtu = csk->mtu;
310 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
312 rc = ulp_ops->iscsi_nl_send_msg(
313 cp->ulp_handle[CNIC_ULP_ISCSI],
316 if (rc == 0 || msg_type != ISCSI_KEVENT_PATH_REQ)
325 static void cnic_cm_upcall(struct cnic_local *, struct cnic_sock *, u8);
327 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
333 case ISCSI_UEVENT_PATH_UPDATE: {
334 struct cnic_local *cp;
336 struct cnic_sock *csk;
337 struct iscsi_path *path_resp;
339 if (len < sizeof(*path_resp))
342 path_resp = (struct iscsi_path *) buf;
344 l5_cid = (u32) path_resp->handle;
345 if (l5_cid >= MAX_CM_SK_TBL_SZ)
349 if (!rcu_dereference(cp->ulp_ops[CNIC_ULP_L4])) {
354 csk = &cp->csk_tbl[l5_cid];
356 if (cnic_in_use(csk) &&
357 test_bit(SK_F_CONNECT_START, &csk->flags)) {
359 memcpy(csk->ha, path_resp->mac_addr, 6);
360 if (test_bit(SK_F_IPV6, &csk->flags))
361 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
362 sizeof(struct in6_addr));
364 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
365 sizeof(struct in_addr));
367 if (is_valid_ether_addr(csk->ha)) {
369 } else if (!test_bit(SK_F_OFFLD_SCHED, &csk->flags) &&
370 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
372 cnic_cm_upcall(cp, csk,
373 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
374 clear_bit(SK_F_CONNECT_START, &csk->flags);
386 static int cnic_offld_prep(struct cnic_sock *csk)
388 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
391 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
392 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
399 static int cnic_close_prep(struct cnic_sock *csk)
401 clear_bit(SK_F_CONNECT_START, &csk->flags);
402 smp_mb__after_clear_bit();
404 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
405 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
413 static int cnic_abort_prep(struct cnic_sock *csk)
415 clear_bit(SK_F_CONNECT_START, &csk->flags);
416 smp_mb__after_clear_bit();
418 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
421 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
422 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
429 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
431 struct cnic_dev *dev;
433 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
434 pr_err("%s: Bad type %d\n", __func__, ulp_type);
437 mutex_lock(&cnic_lock);
438 if (cnic_ulp_tbl[ulp_type]) {
439 pr_err("%s: Type %d has already been registered\n",
441 mutex_unlock(&cnic_lock);
445 read_lock(&cnic_dev_lock);
446 list_for_each_entry(dev, &cnic_dev_list, list) {
447 struct cnic_local *cp = dev->cnic_priv;
449 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
451 read_unlock(&cnic_dev_lock);
453 atomic_set(&ulp_ops->ref_count, 0);
454 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
455 mutex_unlock(&cnic_lock);
457 /* Prevent race conditions with netdev_event */
459 list_for_each_entry(dev, &cnic_dev_list, list) {
460 struct cnic_local *cp = dev->cnic_priv;
462 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
463 ulp_ops->cnic_init(dev);
470 int cnic_unregister_driver(int ulp_type)
472 struct cnic_dev *dev;
473 struct cnic_ulp_ops *ulp_ops;
476 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
477 pr_err("%s: Bad type %d\n", __func__, ulp_type);
480 mutex_lock(&cnic_lock);
481 ulp_ops = cnic_ulp_tbl[ulp_type];
483 pr_err("%s: Type %d has not been registered\n",
487 read_lock(&cnic_dev_lock);
488 list_for_each_entry(dev, &cnic_dev_list, list) {
489 struct cnic_local *cp = dev->cnic_priv;
491 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
492 pr_err("%s: Type %d still has devices registered\n",
494 read_unlock(&cnic_dev_lock);
498 read_unlock(&cnic_dev_lock);
500 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
502 mutex_unlock(&cnic_lock);
504 while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
509 if (atomic_read(&ulp_ops->ref_count) != 0)
510 netdev_warn(dev->netdev, "Failed waiting for ref count to go to zero\n");
514 mutex_unlock(&cnic_lock);
518 static int cnic_start_hw(struct cnic_dev *);
519 static void cnic_stop_hw(struct cnic_dev *);
521 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
524 struct cnic_local *cp = dev->cnic_priv;
525 struct cnic_ulp_ops *ulp_ops;
527 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
528 pr_err("%s: Bad type %d\n", __func__, ulp_type);
531 mutex_lock(&cnic_lock);
532 if (cnic_ulp_tbl[ulp_type] == NULL) {
533 pr_err("%s: Driver with type %d has not been registered\n",
535 mutex_unlock(&cnic_lock);
538 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
539 pr_err("%s: Type %d has already been registered to this device\n",
541 mutex_unlock(&cnic_lock);
545 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
546 cp->ulp_handle[ulp_type] = ulp_ctx;
547 ulp_ops = cnic_ulp_tbl[ulp_type];
548 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
551 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
552 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
553 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
555 mutex_unlock(&cnic_lock);
560 EXPORT_SYMBOL(cnic_register_driver);
562 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
564 struct cnic_local *cp = dev->cnic_priv;
567 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
568 pr_err("%s: Bad type %d\n", __func__, ulp_type);
571 mutex_lock(&cnic_lock);
572 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
573 rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
576 pr_err("%s: device not registered to this ulp type %d\n",
578 mutex_unlock(&cnic_lock);
581 mutex_unlock(&cnic_lock);
583 if (ulp_type == CNIC_ULP_ISCSI)
584 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
588 while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
593 if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
594 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
598 EXPORT_SYMBOL(cnic_unregister_driver);
600 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
602 id_tbl->start = start_id;
605 spin_lock_init(&id_tbl->lock);
606 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
613 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
615 kfree(id_tbl->table);
616 id_tbl->table = NULL;
619 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
624 if (id >= id_tbl->max)
627 spin_lock(&id_tbl->lock);
628 if (!test_bit(id, id_tbl->table)) {
629 set_bit(id, id_tbl->table);
632 spin_unlock(&id_tbl->lock);
636 /* Returns -1 if not successful */
637 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
641 spin_lock(&id_tbl->lock);
642 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
643 if (id >= id_tbl->max) {
645 if (id_tbl->next != 0) {
646 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
647 if (id >= id_tbl->next)
652 if (id < id_tbl->max) {
653 set_bit(id, id_tbl->table);
654 id_tbl->next = (id + 1) & (id_tbl->max - 1);
658 spin_unlock(&id_tbl->lock);
663 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
669 if (id >= id_tbl->max)
672 clear_bit(id, id_tbl->table);
675 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
682 for (i = 0; i < dma->num_pages; i++) {
683 if (dma->pg_arr[i]) {
684 dma_free_coherent(&dev->pcidev->dev, BCM_PAGE_SIZE,
685 dma->pg_arr[i], dma->pg_map_arr[i]);
686 dma->pg_arr[i] = NULL;
690 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
691 dma->pgtbl, dma->pgtbl_map);
699 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
702 __le32 *page_table = (__le32 *) dma->pgtbl;
704 for (i = 0; i < dma->num_pages; i++) {
705 /* Each entry needs to be in big endian format. */
706 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
708 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
713 static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
716 __le32 *page_table = (__le32 *) dma->pgtbl;
718 for (i = 0; i < dma->num_pages; i++) {
719 /* Each entry needs to be in little endian format. */
720 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
722 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
727 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
728 int pages, int use_pg_tbl)
731 struct cnic_local *cp = dev->cnic_priv;
733 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
734 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
735 if (dma->pg_arr == NULL)
738 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
739 dma->num_pages = pages;
741 for (i = 0; i < pages; i++) {
742 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
746 if (dma->pg_arr[i] == NULL)
752 dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
753 ~(BCM_PAGE_SIZE - 1);
754 dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
755 &dma->pgtbl_map, GFP_ATOMIC);
756 if (dma->pgtbl == NULL)
759 cp->setup_pgtbl(dev, dma);
764 cnic_free_dma(dev, dma);
768 static void cnic_free_context(struct cnic_dev *dev)
770 struct cnic_local *cp = dev->cnic_priv;
773 for (i = 0; i < cp->ctx_blks; i++) {
774 if (cp->ctx_arr[i].ctx) {
775 dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
777 cp->ctx_arr[i].mapping);
778 cp->ctx_arr[i].ctx = NULL;
783 static void __cnic_free_uio(struct cnic_uio_dev *udev)
785 uio_unregister_device(&udev->cnic_uinfo);
788 dma_free_coherent(&udev->pdev->dev, udev->l2_buf_size,
789 udev->l2_buf, udev->l2_buf_map);
794 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
795 udev->l2_ring, udev->l2_ring_map);
796 udev->l2_ring = NULL;
799 pci_dev_put(udev->pdev);
803 static void cnic_free_uio(struct cnic_uio_dev *udev)
808 write_lock(&cnic_dev_lock);
809 list_del_init(&udev->list);
810 write_unlock(&cnic_dev_lock);
811 __cnic_free_uio(udev);
814 static void cnic_free_resc(struct cnic_dev *dev)
816 struct cnic_local *cp = dev->cnic_priv;
817 struct cnic_uio_dev *udev = cp->udev;
824 cnic_free_context(dev);
829 cnic_free_dma(dev, &cp->gbl_buf_info);
830 cnic_free_dma(dev, &cp->conn_buf_info);
831 cnic_free_dma(dev, &cp->kwq_info);
832 cnic_free_dma(dev, &cp->kwq_16_data_info);
833 cnic_free_dma(dev, &cp->kcq2.dma);
834 cnic_free_dma(dev, &cp->kcq1.dma);
835 kfree(cp->iscsi_tbl);
836 cp->iscsi_tbl = NULL;
840 cnic_free_id_tbl(&cp->fcoe_cid_tbl);
841 cnic_free_id_tbl(&cp->cid_tbl);
844 static int cnic_alloc_context(struct cnic_dev *dev)
846 struct cnic_local *cp = dev->cnic_priv;
848 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
851 cp->ctx_blk_size = BCM_PAGE_SIZE;
852 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
853 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
854 sizeof(struct cnic_ctx);
855 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
856 if (cp->ctx_arr == NULL)
860 for (i = 0; i < 2; i++) {
861 u32 j, reg, off, lo, hi;
864 off = BNX2_PG_CTX_MAP;
866 off = BNX2_ISCSI_CTX_MAP;
868 reg = cnic_reg_rd_ind(dev, off);
871 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
872 cp->ctx_arr[k].cid = j;
876 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
881 for (i = 0; i < cp->ctx_blks; i++) {
883 dma_alloc_coherent(&dev->pcidev->dev,
885 &cp->ctx_arr[i].mapping,
887 if (cp->ctx_arr[i].ctx == NULL)
894 static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info)
896 int err, i, is_bnx2 = 0;
899 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags))
902 err = cnic_alloc_dma(dev, &info->dma, KCQ_PAGE_CNT, is_bnx2);
906 kcq = (struct kcqe **) info->dma.pg_arr;
912 for (i = 0; i < KCQ_PAGE_CNT; i++) {
913 struct bnx2x_bd_chain_next *next =
914 (struct bnx2x_bd_chain_next *) &kcq[i][MAX_KCQE_CNT];
917 if (j >= KCQ_PAGE_CNT)
919 next->addr_hi = (u64) info->dma.pg_map_arr[j] >> 32;
920 next->addr_lo = info->dma.pg_map_arr[j] & 0xffffffff;
925 static int cnic_alloc_uio_rings(struct cnic_dev *dev, int pages)
927 struct cnic_local *cp = dev->cnic_priv;
928 struct cnic_uio_dev *udev;
930 read_lock(&cnic_dev_lock);
931 list_for_each_entry(udev, &cnic_udev_list, list) {
932 if (udev->pdev == dev->pcidev) {
935 read_unlock(&cnic_dev_lock);
939 read_unlock(&cnic_dev_lock);
941 udev = kzalloc(sizeof(struct cnic_uio_dev), GFP_ATOMIC);
948 udev->pdev = dev->pcidev;
949 udev->l2_ring_size = pages * BCM_PAGE_SIZE;
950 udev->l2_ring = dma_alloc_coherent(&udev->pdev->dev, udev->l2_ring_size,
952 GFP_KERNEL | __GFP_COMP);
956 udev->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
957 udev->l2_buf_size = PAGE_ALIGN(udev->l2_buf_size);
958 udev->l2_buf = dma_alloc_coherent(&udev->pdev->dev, udev->l2_buf_size,
960 GFP_KERNEL | __GFP_COMP);
964 write_lock(&cnic_dev_lock);
965 list_add(&udev->list, &cnic_udev_list);
966 write_unlock(&cnic_dev_lock);
968 pci_dev_get(udev->pdev);
974 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
975 udev->l2_ring, udev->l2_ring_map);
981 static int cnic_init_uio(struct cnic_dev *dev)
983 struct cnic_local *cp = dev->cnic_priv;
984 struct cnic_uio_dev *udev = cp->udev;
985 struct uio_info *uinfo;
991 uinfo = &udev->cnic_uinfo;
993 uinfo->mem[0].addr = dev->netdev->base_addr;
994 uinfo->mem[0].internal_addr = dev->regview;
995 uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
996 uinfo->mem[0].memtype = UIO_MEM_PHYS;
998 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
999 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
1001 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
1002 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
1004 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
1006 uinfo->name = "bnx2_cnic";
1007 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
1008 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
1010 uinfo->mem[1].size = sizeof(*cp->bnx2x_def_status_blk);
1012 uinfo->name = "bnx2x_cnic";
1015 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
1017 uinfo->mem[2].addr = (unsigned long) udev->l2_ring;
1018 uinfo->mem[2].size = udev->l2_ring_size;
1019 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
1021 uinfo->mem[3].addr = (unsigned long) udev->l2_buf;
1022 uinfo->mem[3].size = udev->l2_buf_size;
1023 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
1025 uinfo->version = CNIC_MODULE_VERSION;
1026 uinfo->irq = UIO_IRQ_CUSTOM;
1028 uinfo->open = cnic_uio_open;
1029 uinfo->release = cnic_uio_close;
1031 if (udev->uio_dev == -1) {
1035 ret = uio_register_device(&udev->pdev->dev, uinfo);
1038 cnic_init_rings(dev);
1044 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
1046 struct cnic_local *cp = dev->cnic_priv;
1049 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
1052 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
1054 ret = cnic_alloc_kcq(dev, &cp->kcq1);
1058 ret = cnic_alloc_context(dev);
1062 ret = cnic_alloc_uio_rings(dev, 2);
1066 ret = cnic_init_uio(dev);
1073 cnic_free_resc(dev);
1077 static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
1079 struct cnic_local *cp = dev->cnic_priv;
1080 int ctx_blk_size = cp->ethdev->ctx_blk_size;
1081 int total_mem, blks, i;
1083 total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
1084 blks = total_mem / ctx_blk_size;
1085 if (total_mem % ctx_blk_size)
1088 if (blks > cp->ethdev->ctx_tbl_len)
1091 cp->ctx_arr = kcalloc(blks, sizeof(struct cnic_ctx), GFP_KERNEL);
1092 if (cp->ctx_arr == NULL)
1095 cp->ctx_blks = blks;
1096 cp->ctx_blk_size = ctx_blk_size;
1097 if (!BNX2X_CHIP_IS_57710(cp->chip_id))
1100 cp->ctx_align = ctx_blk_size;
1102 cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1104 for (i = 0; i < blks; i++) {
1105 cp->ctx_arr[i].ctx =
1106 dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1107 &cp->ctx_arr[i].mapping,
1109 if (cp->ctx_arr[i].ctx == NULL)
1112 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1113 if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1114 cnic_free_context(dev);
1115 cp->ctx_blk_size += cp->ctx_align;
1124 static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1126 struct cnic_local *cp = dev->cnic_priv;
1127 struct cnic_eth_dev *ethdev = cp->ethdev;
1128 u32 start_cid = ethdev->starting_cid;
1129 int i, j, n, ret, pages;
1130 struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1132 cp->iro_arr = ethdev->iro_arr;
1134 cp->max_cid_space = MAX_ISCSI_TBL_SZ + BNX2X_FCOE_NUM_CONNECTIONS;
1135 cp->iscsi_start_cid = start_cid;
1136 cp->fcoe_start_cid = start_cid + MAX_ISCSI_TBL_SZ;
1138 if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
1139 cp->max_cid_space += BNX2X_FCOE_NUM_CONNECTIONS;
1140 cp->fcoe_init_cid = ethdev->fcoe_init_cid;
1141 if (!cp->fcoe_init_cid)
1142 cp->fcoe_init_cid = 0x10;
1145 if (start_cid < BNX2X_ISCSI_START_CID) {
1146 u32 delta = BNX2X_ISCSI_START_CID - start_cid;
1148 cp->iscsi_start_cid = BNX2X_ISCSI_START_CID;
1149 cp->fcoe_start_cid += delta;
1150 cp->max_cid_space += delta;
1153 cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1158 cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1159 cp->max_cid_space, GFP_KERNEL);
1163 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1164 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1165 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1168 for (i = MAX_ISCSI_TBL_SZ; i < cp->max_cid_space; i++)
1169 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_FCOE;
1171 pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
1174 ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1178 n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1179 for (i = 0, j = 0; i < cp->max_cid_space; i++) {
1180 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1182 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1183 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1186 if ((i % n) == (n - 1))
1190 ret = cnic_alloc_kcq(dev, &cp->kcq1);
1194 if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
1195 ret = cnic_alloc_kcq(dev, &cp->kcq2);
1200 pages = PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS *
1201 BNX2X_ISCSI_CONN_BUF_SIZE) / PAGE_SIZE;
1202 ret = cnic_alloc_dma(dev, &cp->conn_buf_info, pages, 1);
1206 pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1207 ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1211 ret = cnic_alloc_bnx2x_context(dev);
1215 cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1217 cp->l2_rx_ring_size = 15;
1219 ret = cnic_alloc_uio_rings(dev, 4);
1223 ret = cnic_init_uio(dev);
1230 cnic_free_resc(dev);
1234 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1236 return cp->max_kwq_idx -
1237 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1240 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1243 struct cnic_local *cp = dev->cnic_priv;
1244 struct kwqe *prod_qe;
1245 u16 prod, sw_prod, i;
1247 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1248 return -EAGAIN; /* bnx2 is down */
1250 spin_lock_bh(&cp->cnic_ulp_lock);
1251 if (num_wqes > cnic_kwq_avail(cp) &&
1252 !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
1253 spin_unlock_bh(&cp->cnic_ulp_lock);
1257 clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
1259 prod = cp->kwq_prod_idx;
1260 sw_prod = prod & MAX_KWQ_IDX;
1261 for (i = 0; i < num_wqes; i++) {
1262 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1263 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1265 sw_prod = prod & MAX_KWQ_IDX;
1267 cp->kwq_prod_idx = prod;
1269 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1271 spin_unlock_bh(&cp->cnic_ulp_lock);
1275 static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1276 union l5cm_specific_data *l5_data)
1278 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1281 map = ctx->kwqe_data_mapping;
1282 l5_data->phy_address.lo = (u64) map & 0xffffffff;
1283 l5_data->phy_address.hi = (u64) map >> 32;
1284 return ctx->kwqe_data;
1287 static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1288 u32 type, union l5cm_specific_data *l5_data)
1290 struct cnic_local *cp = dev->cnic_priv;
1291 struct l5cm_spe kwqe;
1292 struct kwqe_16 *kwq[1];
1296 kwqe.hdr.conn_and_cmd_data =
1297 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1298 BNX2X_HW_CID(cp, cid)));
1300 type_16 = (type << SPE_HDR_CONN_TYPE_SHIFT) & SPE_HDR_CONN_TYPE;
1301 type_16 |= (cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
1302 SPE_HDR_FUNCTION_ID;
1304 kwqe.hdr.type = cpu_to_le16(type_16);
1305 kwqe.hdr.reserved1 = 0;
1306 kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1307 kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1309 kwq[0] = (struct kwqe_16 *) &kwqe;
1311 spin_lock_bh(&cp->cnic_ulp_lock);
1312 ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1313 spin_unlock_bh(&cp->cnic_ulp_lock);
1321 static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1322 struct kcqe *cqes[], u32 num_cqes)
1324 struct cnic_local *cp = dev->cnic_priv;
1325 struct cnic_ulp_ops *ulp_ops;
1328 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1329 if (likely(ulp_ops)) {
1330 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1336 static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1338 struct cnic_local *cp = dev->cnic_priv;
1339 struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1341 u32 pfid = cp->pfid;
1343 cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1344 cp->num_ccells = req1->num_ccells_per_conn;
1345 cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1346 cp->num_iscsi_tasks;
1347 cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1348 BNX2X_ISCSI_R2TQE_SIZE;
1349 cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1350 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1351 hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1352 cp->num_cqs = req1->num_cqs;
1354 if (!dev->max_iscsi_conn)
1357 /* init Tstorm RAM */
1358 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1360 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1362 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1363 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1364 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1365 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1366 req1->num_tasks_per_conn);
1368 /* init Ustorm RAM */
1369 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1370 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfid),
1371 req1->rq_buffer_size);
1372 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1374 CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1375 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1376 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1377 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1378 req1->num_tasks_per_conn);
1379 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1381 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1383 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1384 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1386 /* init Xstorm RAM */
1387 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1389 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1390 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1391 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1392 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1393 req1->num_tasks_per_conn);
1394 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1396 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(pfid),
1397 req1->num_tasks_per_conn);
1398 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1399 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1401 /* init Cstorm RAM */
1402 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1404 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1405 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1406 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1407 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1408 req1->num_tasks_per_conn);
1409 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1411 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1417 static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1419 struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1420 struct cnic_local *cp = dev->cnic_priv;
1421 u32 pfid = cp->pfid;
1422 struct iscsi_kcqe kcqe;
1423 struct kcqe *cqes[1];
1425 memset(&kcqe, 0, sizeof(kcqe));
1426 if (!dev->max_iscsi_conn) {
1427 kcqe.completion_status =
1428 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1432 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1433 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1434 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1435 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1436 req2->error_bit_map[1]);
1438 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1439 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1440 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1441 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1442 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1443 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1444 req2->error_bit_map[1]);
1446 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1447 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1449 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1452 kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1453 cqes[0] = (struct kcqe *) &kcqe;
1454 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1459 static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1461 struct cnic_local *cp = dev->cnic_priv;
1462 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1464 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1465 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1467 cnic_free_dma(dev, &iscsi->hq_info);
1468 cnic_free_dma(dev, &iscsi->r2tq_info);
1469 cnic_free_dma(dev, &iscsi->task_array_info);
1470 cnic_free_id(&cp->cid_tbl, ctx->cid);
1472 cnic_free_id(&cp->fcoe_cid_tbl, ctx->cid);
1478 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1482 struct cnic_local *cp = dev->cnic_priv;
1483 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1484 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1486 if (ctx->ulp_proto_id == CNIC_ULP_FCOE) {
1487 cid = cnic_alloc_new_id(&cp->fcoe_cid_tbl);
1496 cid = cnic_alloc_new_id(&cp->cid_tbl);
1503 pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1505 ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1509 pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1510 ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1514 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1515 ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1522 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1526 static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1527 struct regpair *ctx_addr)
1529 struct cnic_local *cp = dev->cnic_priv;
1530 struct cnic_eth_dev *ethdev = cp->ethdev;
1531 int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1532 int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1533 unsigned long align_off = 0;
1537 if (cp->ctx_align) {
1538 unsigned long mask = cp->ctx_align - 1;
1540 if (cp->ctx_arr[blk].mapping & mask)
1541 align_off = cp->ctx_align -
1542 (cp->ctx_arr[blk].mapping & mask);
1544 ctx_map = cp->ctx_arr[blk].mapping + align_off +
1545 (off * BNX2X_CONTEXT_MEM_SIZE);
1546 ctx = cp->ctx_arr[blk].ctx + align_off +
1547 (off * BNX2X_CONTEXT_MEM_SIZE);
1549 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1551 ctx_addr->lo = ctx_map & 0xffffffff;
1552 ctx_addr->hi = (u64) ctx_map >> 32;
1556 static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1559 struct cnic_local *cp = dev->cnic_priv;
1560 struct iscsi_kwqe_conn_offload1 *req1 =
1561 (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1562 struct iscsi_kwqe_conn_offload2 *req2 =
1563 (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1564 struct iscsi_kwqe_conn_offload3 *req3;
1565 struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1566 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1568 u32 hw_cid = BNX2X_HW_CID(cp, cid);
1569 struct iscsi_context *ictx;
1570 struct regpair context_addr;
1571 int i, j, n = 2, n_max;
1574 if (!req2->num_additional_wqes)
1577 n_max = req2->num_additional_wqes + 2;
1579 ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1583 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1585 ictx->xstorm_ag_context.hq_prod = 1;
1587 ictx->xstorm_st_context.iscsi.first_burst_length =
1588 ISCSI_DEF_FIRST_BURST_LEN;
1589 ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1590 ISCSI_DEF_MAX_RECV_SEG_LEN;
1591 ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1592 req1->sq_page_table_addr_lo;
1593 ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1594 req1->sq_page_table_addr_hi;
1595 ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1596 ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1597 ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1598 iscsi->hq_info.pgtbl_map & 0xffffffff;
1599 ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1600 (u64) iscsi->hq_info.pgtbl_map >> 32;
1601 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1602 iscsi->hq_info.pgtbl[0];
1603 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1604 iscsi->hq_info.pgtbl[1];
1605 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1606 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1607 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1608 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1609 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1610 iscsi->r2tq_info.pgtbl[0];
1611 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1612 iscsi->r2tq_info.pgtbl[1];
1613 ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1614 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1615 ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1616 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1617 ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1618 BNX2X_ISCSI_PBL_NOT_CACHED;
1619 ictx->xstorm_st_context.iscsi.flags.flags |=
1620 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1621 ictx->xstorm_st_context.iscsi.flags.flags |=
1622 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1624 ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1625 /* TSTORM requires the base address of RQ DB & not PTE */
1626 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1627 req2->rq_page_table_addr_lo & PAGE_MASK;
1628 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1629 req2->rq_page_table_addr_hi;
1630 ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1631 ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1632 ictx->tstorm_st_context.tcp.flags2 |=
1633 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1634 ictx->tstorm_st_context.tcp.ooo_support_mode =
1635 TCP_TSTORM_OOO_DROP_AND_PROC_ACK;
1637 ictx->timers_context.flags |= TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1639 ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1640 req2->rq_page_table_addr_lo;
1641 ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1642 req2->rq_page_table_addr_hi;
1643 ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1644 ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1645 ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1646 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1647 ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1648 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1649 ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1650 iscsi->r2tq_info.pgtbl[0];
1651 ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1652 iscsi->r2tq_info.pgtbl[1];
1653 ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1654 req1->cq_page_table_addr_lo;
1655 ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1656 req1->cq_page_table_addr_hi;
1657 ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1658 ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1659 ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1660 ictx->ustorm_st_context.task_pbe_cache_index =
1661 BNX2X_ISCSI_PBL_NOT_CACHED;
1662 ictx->ustorm_st_context.task_pdu_cache_index =
1663 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1665 for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1669 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1672 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1673 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1674 req3->qp_first_pte[j].hi;
1675 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1676 req3->qp_first_pte[j].lo;
1679 ictx->ustorm_st_context.task_pbl_base.lo =
1680 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1681 ictx->ustorm_st_context.task_pbl_base.hi =
1682 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1683 ictx->ustorm_st_context.tce_phy_addr.lo =
1684 iscsi->task_array_info.pgtbl[0];
1685 ictx->ustorm_st_context.tce_phy_addr.hi =
1686 iscsi->task_array_info.pgtbl[1];
1687 ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1688 ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1689 ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1690 ictx->ustorm_st_context.negotiated_rx_and_flags |=
1691 ISCSI_DEF_MAX_BURST_LEN;
1692 ictx->ustorm_st_context.negotiated_rx |=
1693 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1694 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1696 ictx->cstorm_st_context.hq_pbl_base.lo =
1697 iscsi->hq_info.pgtbl_map & 0xffffffff;
1698 ictx->cstorm_st_context.hq_pbl_base.hi =
1699 (u64) iscsi->hq_info.pgtbl_map >> 32;
1700 ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1701 ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1702 ictx->cstorm_st_context.task_pbl_base.lo =
1703 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1704 ictx->cstorm_st_context.task_pbl_base.hi =
1705 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1706 /* CSTORM and USTORM initialization is different, CSTORM requires
1707 * CQ DB base & not PTE addr */
1708 ictx->cstorm_st_context.cq_db_base.lo =
1709 req1->cq_page_table_addr_lo & PAGE_MASK;
1710 ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1711 ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1712 ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1713 for (i = 0; i < cp->num_cqs; i++) {
1714 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1716 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1720 ictx->xstorm_ag_context.cdu_reserved =
1721 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1722 ISCSI_CONNECTION_TYPE);
1723 ictx->ustorm_ag_context.cdu_usage =
1724 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1725 ISCSI_CONNECTION_TYPE);
1730 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1733 struct iscsi_kwqe_conn_offload1 *req1;
1734 struct iscsi_kwqe_conn_offload2 *req2;
1735 struct cnic_local *cp = dev->cnic_priv;
1736 struct cnic_context *ctx;
1737 struct iscsi_kcqe kcqe;
1738 struct kcqe *cqes[1];
1747 req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1748 req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1749 if ((num - 2) < req2->num_additional_wqes) {
1753 *work = 2 + req2->num_additional_wqes;
1755 l5_cid = req1->iscsi_conn_id;
1756 if (l5_cid >= MAX_ISCSI_TBL_SZ)
1759 memset(&kcqe, 0, sizeof(kcqe));
1760 kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1761 kcqe.iscsi_conn_id = l5_cid;
1762 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1764 ctx = &cp->ctx_tbl[l5_cid];
1765 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags)) {
1766 kcqe.completion_status =
1767 ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY;
1771 if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1772 atomic_dec(&cp->iscsi_conn);
1775 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1777 atomic_dec(&cp->iscsi_conn);
1781 ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1783 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1784 atomic_dec(&cp->iscsi_conn);
1788 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1789 kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp, cp->ctx_tbl[l5_cid].cid);
1792 cqes[0] = (struct kcqe *) &kcqe;
1793 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1798 static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1800 struct cnic_local *cp = dev->cnic_priv;
1801 struct iscsi_kwqe_conn_update *req =
1802 (struct iscsi_kwqe_conn_update *) kwqe;
1804 union l5cm_specific_data l5_data;
1805 u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1808 if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1811 data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1815 memcpy(data, kwqe, sizeof(struct kwqe));
1817 ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1818 req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1822 static int cnic_bnx2x_destroy_ramrod(struct cnic_dev *dev, u32 l5_cid)
1824 struct cnic_local *cp = dev->cnic_priv;
1825 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1826 union l5cm_specific_data l5_data;
1830 init_waitqueue_head(&ctx->waitq);
1832 memset(&l5_data, 0, sizeof(l5_data));
1833 hw_cid = BNX2X_HW_CID(cp, ctx->cid);
1835 ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
1836 hw_cid, NONE_CONNECTION_TYPE, &l5_data);
1839 wait_event(ctx->waitq, ctx->wait_cond);
1844 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1846 struct cnic_local *cp = dev->cnic_priv;
1847 struct iscsi_kwqe_conn_destroy *req =
1848 (struct iscsi_kwqe_conn_destroy *) kwqe;
1849 u32 l5_cid = req->reserved0;
1850 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1852 struct iscsi_kcqe kcqe;
1853 struct kcqe *cqes[1];
1855 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
1856 goto skip_cfc_delete;
1858 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
1859 unsigned long delta = ctx->timestamp + (2 * HZ) - jiffies;
1861 if (delta > (2 * HZ))
1864 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
1865 queue_delayed_work(cnic_wq, &cp->delete_task, delta);
1869 ret = cnic_bnx2x_destroy_ramrod(dev, l5_cid);
1872 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1874 atomic_dec(&cp->iscsi_conn);
1875 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
1878 memset(&kcqe, 0, sizeof(kcqe));
1879 kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
1880 kcqe.iscsi_conn_id = l5_cid;
1881 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1882 kcqe.iscsi_conn_context_id = req->context_id;
1884 cqes[0] = (struct kcqe *) &kcqe;
1885 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1890 static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
1891 struct l4_kwq_connect_req1 *kwqe1,
1892 struct l4_kwq_connect_req3 *kwqe3,
1893 struct l5cm_active_conn_buffer *conn_buf)
1895 struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
1896 struct l5cm_xstorm_conn_buffer *xstorm_buf =
1897 &conn_buf->xstorm_conn_buffer;
1898 struct l5cm_tstorm_conn_buffer *tstorm_buf =
1899 &conn_buf->tstorm_conn_buffer;
1900 struct regpair context_addr;
1901 u32 cid = BNX2X_SW_CID(kwqe1->cid);
1902 struct in6_addr src_ip, dst_ip;
1906 addrp = (u32 *) &conn_addr->local_ip_addr;
1907 for (i = 0; i < 4; i++, addrp++)
1908 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1910 addrp = (u32 *) &conn_addr->remote_ip_addr;
1911 for (i = 0; i < 4; i++, addrp++)
1912 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1914 cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
1916 xstorm_buf->context_addr.hi = context_addr.hi;
1917 xstorm_buf->context_addr.lo = context_addr.lo;
1918 xstorm_buf->mss = 0xffff;
1919 xstorm_buf->rcv_buf = kwqe3->rcv_buf;
1920 if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
1921 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
1922 xstorm_buf->pseudo_header_checksum =
1923 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
1925 if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK))
1926 tstorm_buf->params |=
1927 L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE;
1928 if (kwqe3->ka_timeout) {
1929 tstorm_buf->ka_enable = 1;
1930 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
1931 tstorm_buf->ka_interval = kwqe3->ka_interval;
1932 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
1934 tstorm_buf->rcv_buf = kwqe3->rcv_buf;
1935 tstorm_buf->snd_buf = kwqe3->snd_buf;
1936 tstorm_buf->max_rt_time = 0xffffffff;
1939 static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
1941 struct cnic_local *cp = dev->cnic_priv;
1942 u32 pfid = cp->pfid;
1943 u8 *mac = dev->mac_addr;
1945 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1946 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfid), mac[0]);
1947 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1948 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfid), mac[1]);
1949 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1950 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfid), mac[2]);
1951 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1952 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfid), mac[3]);
1953 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1954 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfid), mac[4]);
1955 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1956 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfid), mac[5]);
1958 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1959 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[5]);
1960 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1961 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
1963 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1964 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[3]);
1965 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1966 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
1968 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1969 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 2,
1971 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1972 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 3,
1976 static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts)
1978 struct cnic_local *cp = dev->cnic_priv;
1979 u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1980 u16 tstorm_flags = 0;
1983 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1984 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1987 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1988 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), xstorm_flags);
1990 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1991 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), tstorm_flags);
1994 static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
1997 struct cnic_local *cp = dev->cnic_priv;
1998 struct l4_kwq_connect_req1 *kwqe1 =
1999 (struct l4_kwq_connect_req1 *) wqes[0];
2000 struct l4_kwq_connect_req3 *kwqe3;
2001 struct l5cm_active_conn_buffer *conn_buf;
2002 struct l5cm_conn_addr_params *conn_addr;
2003 union l5cm_specific_data l5_data;
2004 u32 l5_cid = kwqe1->pg_cid;
2005 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
2006 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2014 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
2024 if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
2025 netdev_err(dev->netdev, "conn_buf size too big\n");
2028 conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2032 memset(conn_buf, 0, sizeof(*conn_buf));
2034 conn_addr = &conn_buf->conn_addr_buf;
2035 conn_addr->remote_addr_0 = csk->ha[0];
2036 conn_addr->remote_addr_1 = csk->ha[1];
2037 conn_addr->remote_addr_2 = csk->ha[2];
2038 conn_addr->remote_addr_3 = csk->ha[3];
2039 conn_addr->remote_addr_4 = csk->ha[4];
2040 conn_addr->remote_addr_5 = csk->ha[5];
2042 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
2043 struct l4_kwq_connect_req2 *kwqe2 =
2044 (struct l4_kwq_connect_req2 *) wqes[1];
2046 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
2047 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
2048 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
2050 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
2051 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
2052 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
2053 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
2055 kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
2057 conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
2058 conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
2059 conn_addr->local_tcp_port = kwqe1->src_port;
2060 conn_addr->remote_tcp_port = kwqe1->dst_port;
2062 conn_addr->pmtu = kwqe3->pmtu;
2063 cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
2065 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
2066 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->pfid), csk->vlan_id);
2068 cnic_bnx2x_set_tcp_timestamp(dev,
2069 kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP);
2071 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
2072 kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2074 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2079 static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
2081 struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
2082 union l5cm_specific_data l5_data;
2085 memset(&l5_data, 0, sizeof(l5_data));
2086 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
2087 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2091 static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
2093 struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
2094 union l5cm_specific_data l5_data;
2097 memset(&l5_data, 0, sizeof(l5_data));
2098 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
2099 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2102 static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2104 struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
2106 struct kcqe *cqes[1];
2108 memset(&kcqe, 0, sizeof(kcqe));
2109 kcqe.pg_host_opaque = req->host_opaque;
2110 kcqe.pg_cid = req->host_opaque;
2111 kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
2112 cqes[0] = (struct kcqe *) &kcqe;
2113 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2117 static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2119 struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
2121 struct kcqe *cqes[1];
2123 memset(&kcqe, 0, sizeof(kcqe));
2124 kcqe.pg_host_opaque = req->pg_host_opaque;
2125 kcqe.pg_cid = req->pg_cid;
2126 kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
2127 cqes[0] = (struct kcqe *) &kcqe;
2128 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2132 static int cnic_bnx2x_fcoe_stat(struct cnic_dev *dev, struct kwqe *kwqe)
2134 struct fcoe_kwqe_stat *req;
2135 struct fcoe_stat_ramrod_params *fcoe_stat;
2136 union l5cm_specific_data l5_data;
2137 struct cnic_local *cp = dev->cnic_priv;
2141 req = (struct fcoe_kwqe_stat *) kwqe;
2142 cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2144 fcoe_stat = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2148 memset(fcoe_stat, 0, sizeof(*fcoe_stat));
2149 memcpy(&fcoe_stat->stat_kwqe, req, sizeof(*req));
2151 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_STAT, cid,
2152 FCOE_CONNECTION_TYPE, &l5_data);
2156 static int cnic_bnx2x_fcoe_init1(struct cnic_dev *dev, struct kwqe *wqes[],
2160 struct cnic_local *cp = dev->cnic_priv;
2162 struct fcoe_init_ramrod_params *fcoe_init;
2163 struct fcoe_kwqe_init1 *req1;
2164 struct fcoe_kwqe_init2 *req2;
2165 struct fcoe_kwqe_init3 *req3;
2166 union l5cm_specific_data l5_data;
2172 req1 = (struct fcoe_kwqe_init1 *) wqes[0];
2173 req2 = (struct fcoe_kwqe_init2 *) wqes[1];
2174 req3 = (struct fcoe_kwqe_init3 *) wqes[2];
2175 if (req2->hdr.op_code != FCOE_KWQE_OPCODE_INIT2) {
2179 if (req3->hdr.op_code != FCOE_KWQE_OPCODE_INIT3) {
2184 if (sizeof(*fcoe_init) > CNIC_KWQ16_DATA_SIZE) {
2185 netdev_err(dev->netdev, "fcoe_init size too big\n");
2188 fcoe_init = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2192 memset(fcoe_init, 0, sizeof(*fcoe_init));
2193 memcpy(&fcoe_init->init_kwqe1, req1, sizeof(*req1));
2194 memcpy(&fcoe_init->init_kwqe2, req2, sizeof(*req2));
2195 memcpy(&fcoe_init->init_kwqe3, req3, sizeof(*req3));
2196 fcoe_init->eq_addr.lo = cp->kcq2.dma.pg_map_arr[0] & 0xffffffff;
2197 fcoe_init->eq_addr.hi = (u64) cp->kcq2.dma.pg_map_arr[0] >> 32;
2198 fcoe_init->eq_next_page_addr.lo =
2199 cp->kcq2.dma.pg_map_arr[1] & 0xffffffff;
2200 fcoe_init->eq_next_page_addr.hi =
2201 (u64) cp->kcq2.dma.pg_map_arr[1] >> 32;
2203 fcoe_init->sb_num = cp->status_blk_num;
2204 fcoe_init->eq_prod = MAX_KCQ_IDX;
2205 fcoe_init->sb_id = HC_INDEX_FCOE_EQ_CONS;
2206 cp->kcq2.sw_prod_idx = 0;
2208 cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2209 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_INIT, cid,
2210 FCOE_CONNECTION_TYPE, &l5_data);
2215 static int cnic_bnx2x_fcoe_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
2219 u32 cid = -1, l5_cid;
2220 struct cnic_local *cp = dev->cnic_priv;
2221 struct fcoe_kwqe_conn_offload1 *req1;
2222 struct fcoe_kwqe_conn_offload2 *req2;
2223 struct fcoe_kwqe_conn_offload3 *req3;
2224 struct fcoe_kwqe_conn_offload4 *req4;
2225 struct fcoe_conn_offload_ramrod_params *fcoe_offload;
2226 struct cnic_context *ctx;
2227 struct fcoe_context *fctx;
2228 struct regpair ctx_addr;
2229 union l5cm_specific_data l5_data;
2230 struct fcoe_kcqe kcqe;
2231 struct kcqe *cqes[1];
2237 req1 = (struct fcoe_kwqe_conn_offload1 *) wqes[0];
2238 req2 = (struct fcoe_kwqe_conn_offload2 *) wqes[1];
2239 req3 = (struct fcoe_kwqe_conn_offload3 *) wqes[2];
2240 req4 = (struct fcoe_kwqe_conn_offload4 *) wqes[3];
2244 l5_cid = req1->fcoe_conn_id;
2245 if (l5_cid >= BNX2X_FCOE_NUM_CONNECTIONS)
2248 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2250 ctx = &cp->ctx_tbl[l5_cid];
2251 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2254 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
2261 fctx = cnic_get_bnx2x_ctx(dev, cid, 1, &ctx_addr);
2263 u32 hw_cid = BNX2X_HW_CID(cp, cid);
2266 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
2267 FCOE_CONNECTION_TYPE);
2268 fctx->xstorm_ag_context.cdu_reserved = val;
2269 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
2270 FCOE_CONNECTION_TYPE);
2271 fctx->ustorm_ag_context.cdu_usage = val;
2273 if (sizeof(*fcoe_offload) > CNIC_KWQ16_DATA_SIZE) {
2274 netdev_err(dev->netdev, "fcoe_offload size too big\n");
2277 fcoe_offload = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2281 memset(fcoe_offload, 0, sizeof(*fcoe_offload));
2282 memcpy(&fcoe_offload->offload_kwqe1, req1, sizeof(*req1));
2283 memcpy(&fcoe_offload->offload_kwqe2, req2, sizeof(*req2));
2284 memcpy(&fcoe_offload->offload_kwqe3, req3, sizeof(*req3));
2285 memcpy(&fcoe_offload->offload_kwqe4, req4, sizeof(*req4));
2287 cid = BNX2X_HW_CID(cp, cid);
2288 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_OFFLOAD_CONN, cid,
2289 FCOE_CONNECTION_TYPE, &l5_data);
2291 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2297 cnic_free_bnx2x_conn_resc(dev, l5_cid);
2299 memset(&kcqe, 0, sizeof(kcqe));
2300 kcqe.op_code = FCOE_KCQE_OPCODE_OFFLOAD_CONN;
2301 kcqe.fcoe_conn_id = req1->fcoe_conn_id;
2302 kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
2304 cqes[0] = (struct kcqe *) &kcqe;
2305 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2309 static int cnic_bnx2x_fcoe_enable(struct cnic_dev *dev, struct kwqe *kwqe)
2311 struct fcoe_kwqe_conn_enable_disable *req;
2312 struct fcoe_conn_enable_disable_ramrod_params *fcoe_enable;
2313 union l5cm_specific_data l5_data;
2316 struct cnic_local *cp = dev->cnic_priv;
2318 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2319 cid = req->context_id;
2320 l5_cid = req->conn_id + BNX2X_FCOE_L5_CID_BASE;
2322 if (sizeof(*fcoe_enable) > CNIC_KWQ16_DATA_SIZE) {
2323 netdev_err(dev->netdev, "fcoe_enable size too big\n");
2326 fcoe_enable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2330 memset(fcoe_enable, 0, sizeof(*fcoe_enable));
2331 memcpy(&fcoe_enable->enable_disable_kwqe, req, sizeof(*req));
2332 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_ENABLE_CONN, cid,
2333 FCOE_CONNECTION_TYPE, &l5_data);
2337 static int cnic_bnx2x_fcoe_disable(struct cnic_dev *dev, struct kwqe *kwqe)
2339 struct fcoe_kwqe_conn_enable_disable *req;
2340 struct fcoe_conn_enable_disable_ramrod_params *fcoe_disable;
2341 union l5cm_specific_data l5_data;
2344 struct cnic_local *cp = dev->cnic_priv;
2346 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2347 cid = req->context_id;
2348 l5_cid = req->conn_id;
2349 if (l5_cid >= BNX2X_FCOE_NUM_CONNECTIONS)
2352 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2354 if (sizeof(*fcoe_disable) > CNIC_KWQ16_DATA_SIZE) {
2355 netdev_err(dev->netdev, "fcoe_disable size too big\n");
2358 fcoe_disable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2362 memset(fcoe_disable, 0, sizeof(*fcoe_disable));
2363 memcpy(&fcoe_disable->enable_disable_kwqe, req, sizeof(*req));
2364 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DISABLE_CONN, cid,
2365 FCOE_CONNECTION_TYPE, &l5_data);
2369 static int cnic_bnx2x_fcoe_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2371 struct fcoe_kwqe_conn_destroy *req;
2372 union l5cm_specific_data l5_data;
2375 struct cnic_local *cp = dev->cnic_priv;
2376 struct cnic_context *ctx;
2377 struct fcoe_kcqe kcqe;
2378 struct kcqe *cqes[1];
2380 req = (struct fcoe_kwqe_conn_destroy *) kwqe;
2381 cid = req->context_id;
2382 l5_cid = req->conn_id;
2383 if (l5_cid >= BNX2X_FCOE_NUM_CONNECTIONS)
2386 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2388 ctx = &cp->ctx_tbl[l5_cid];
2390 init_waitqueue_head(&ctx->waitq);
2393 memset(&l5_data, 0, sizeof(l5_data));
2394 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_TERMINATE_CONN, cid,
2395 FCOE_CONNECTION_TYPE, &l5_data);
2397 wait_event(ctx->waitq, ctx->wait_cond);
2398 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
2399 queue_delayed_work(cnic_wq, &cp->delete_task,
2400 msecs_to_jiffies(2000));
2403 memset(&kcqe, 0, sizeof(kcqe));
2404 kcqe.op_code = FCOE_KCQE_OPCODE_DESTROY_CONN;
2405 kcqe.fcoe_conn_id = req->conn_id;
2406 kcqe.fcoe_conn_context_id = cid;
2408 cqes[0] = (struct kcqe *) &kcqe;
2409 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2413 static int cnic_bnx2x_fcoe_fw_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2415 struct fcoe_kwqe_destroy *req;
2416 union l5cm_specific_data l5_data;
2417 struct cnic_local *cp = dev->cnic_priv;
2421 req = (struct fcoe_kwqe_destroy *) kwqe;
2422 cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2424 memset(&l5_data, 0, sizeof(l5_data));
2425 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DESTROY, cid,
2426 FCOE_CONNECTION_TYPE, &l5_data);
2430 static int cnic_submit_bnx2x_iscsi_kwqes(struct cnic_dev *dev,
2431 struct kwqe *wqes[], u32 num_wqes)
2437 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2438 return -EAGAIN; /* bnx2 is down */
2440 for (i = 0; i < num_wqes; ) {
2442 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2446 case ISCSI_KWQE_OPCODE_INIT1:
2447 ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
2449 case ISCSI_KWQE_OPCODE_INIT2:
2450 ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2452 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2453 ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2454 num_wqes - i, &work);
2456 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2457 ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2459 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2460 ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2462 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2463 ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2466 case L4_KWQE_OPCODE_VALUE_CLOSE:
2467 ret = cnic_bnx2x_close(dev, kwqe);
2469 case L4_KWQE_OPCODE_VALUE_RESET:
2470 ret = cnic_bnx2x_reset(dev, kwqe);
2472 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2473 ret = cnic_bnx2x_offload_pg(dev, kwqe);
2475 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2476 ret = cnic_bnx2x_update_pg(dev, kwqe);
2478 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2483 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2488 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2495 static int cnic_submit_bnx2x_fcoe_kwqes(struct cnic_dev *dev,
2496 struct kwqe *wqes[], u32 num_wqes)
2498 struct cnic_local *cp = dev->cnic_priv;
2503 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2504 return -EAGAIN; /* bnx2 is down */
2506 if (BNX2X_CHIP_NUM(cp->chip_id) == BNX2X_CHIP_NUM_57710)
2509 for (i = 0; i < num_wqes; ) {
2511 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2515 case FCOE_KWQE_OPCODE_INIT1:
2516 ret = cnic_bnx2x_fcoe_init1(dev, &wqes[i],
2517 num_wqes - i, &work);
2519 case FCOE_KWQE_OPCODE_OFFLOAD_CONN1:
2520 ret = cnic_bnx2x_fcoe_ofld1(dev, &wqes[i],
2521 num_wqes - i, &work);
2523 case FCOE_KWQE_OPCODE_ENABLE_CONN:
2524 ret = cnic_bnx2x_fcoe_enable(dev, kwqe);
2526 case FCOE_KWQE_OPCODE_DISABLE_CONN:
2527 ret = cnic_bnx2x_fcoe_disable(dev, kwqe);
2529 case FCOE_KWQE_OPCODE_DESTROY_CONN:
2530 ret = cnic_bnx2x_fcoe_destroy(dev, kwqe);
2532 case FCOE_KWQE_OPCODE_DESTROY:
2533 ret = cnic_bnx2x_fcoe_fw_destroy(dev, kwqe);
2535 case FCOE_KWQE_OPCODE_STAT:
2536 ret = cnic_bnx2x_fcoe_stat(dev, kwqe);
2540 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2545 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2552 static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
2558 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2559 return -EAGAIN; /* bnx2x is down */
2564 layer_code = wqes[0]->kwqe_op_flag & KWQE_LAYER_MASK;
2565 switch (layer_code) {
2566 case KWQE_FLAGS_LAYER_MASK_L5_ISCSI:
2567 case KWQE_FLAGS_LAYER_MASK_L4:
2568 case KWQE_FLAGS_LAYER_MASK_L2:
2569 ret = cnic_submit_bnx2x_iscsi_kwqes(dev, wqes, num_wqes);
2572 case KWQE_FLAGS_LAYER_MASK_L5_FCOE:
2573 ret = cnic_submit_bnx2x_fcoe_kwqes(dev, wqes, num_wqes);
2579 static inline u32 cnic_get_kcqe_layer_mask(u32 opflag)
2581 if (unlikely(KCQE_OPCODE(opflag) == FCOE_RAMROD_CMD_ID_TERMINATE_CONN))
2582 return KCQE_FLAGS_LAYER_MASK_L4;
2584 return opflag & KCQE_FLAGS_LAYER_MASK;
2587 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2589 struct cnic_local *cp = dev->cnic_priv;
2595 struct cnic_ulp_ops *ulp_ops;
2597 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2598 u32 kcqe_layer = cnic_get_kcqe_layer_mask(kcqe_op_flag);
2600 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2603 while (j < num_cqes) {
2604 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2606 if (cnic_get_kcqe_layer_mask(next_op) != kcqe_layer)
2609 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2614 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2615 ulp_type = CNIC_ULP_RDMA;
2616 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2617 ulp_type = CNIC_ULP_ISCSI;
2618 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_FCOE)
2619 ulp_type = CNIC_ULP_FCOE;
2620 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2621 ulp_type = CNIC_ULP_L4;
2622 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2625 netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2631 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2632 if (likely(ulp_ops)) {
2633 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2634 cp->completed_kcq + i, j);
2643 cnic_spq_completion(dev, DRV_CTL_RET_L5_SPQ_CREDIT_CMD, comp);
2646 static u16 cnic_bnx2_next_idx(u16 idx)
2651 static u16 cnic_bnx2_hw_idx(u16 idx)
2656 static u16 cnic_bnx2x_next_idx(u16 idx)
2659 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2665 static u16 cnic_bnx2x_hw_idx(u16 idx)
2667 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2672 static int cnic_get_kcqes(struct cnic_dev *dev, struct kcq_info *info)
2674 struct cnic_local *cp = dev->cnic_priv;
2675 u16 i, ri, hw_prod, last;
2677 int kcqe_cnt = 0, last_cnt = 0;
2679 i = ri = last = info->sw_prod_idx;
2681 hw_prod = *info->hw_prod_idx_ptr;
2682 hw_prod = cp->hw_idx(hw_prod);
2684 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2685 kcqe = &info->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2686 cp->completed_kcq[kcqe_cnt++] = kcqe;
2687 i = cp->next_idx(i);
2688 ri = i & MAX_KCQ_IDX;
2689 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2690 last_cnt = kcqe_cnt;
2695 info->sw_prod_idx = last;
2699 static int cnic_l2_completion(struct cnic_local *cp)
2701 u16 hw_cons, sw_cons;
2702 struct cnic_uio_dev *udev = cp->udev;
2703 union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2704 (udev->l2_ring + (2 * BCM_PAGE_SIZE));
2708 if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2711 hw_cons = *cp->rx_cons_ptr;
2712 if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2715 sw_cons = cp->rx_cons;
2716 while (sw_cons != hw_cons) {
2719 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2720 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2721 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2722 cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2723 cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2724 if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2725 cmd == RAMROD_CMD_ID_ETH_HALT)
2728 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2733 static void cnic_chk_pkt_rings(struct cnic_local *cp)
2735 u16 rx_cons, tx_cons;
2738 if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
2741 rx_cons = *cp->rx_cons_ptr;
2742 tx_cons = *cp->tx_cons_ptr;
2743 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2744 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2745 comp = cnic_l2_completion(cp);
2747 cp->tx_cons = tx_cons;
2748 cp->rx_cons = rx_cons;
2751 uio_event_notify(&cp->udev->cnic_uinfo);
2754 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
2757 static u32 cnic_service_bnx2_queues(struct cnic_dev *dev)
2759 struct cnic_local *cp = dev->cnic_priv;
2760 u32 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2763 /* status block index must be read before reading other fields */
2765 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2767 while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) {
2769 service_kcqes(dev, kcqe_cnt);
2771 /* Tell compiler that status_blk fields can change. */
2773 if (status_idx != *cp->kcq1.status_idx_ptr) {
2774 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2775 /* status block index must be read first */
2777 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2782 CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx);
2784 cnic_chk_pkt_rings(cp);
2789 static int cnic_service_bnx2(void *data, void *status_blk)
2791 struct cnic_dev *dev = data;
2793 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2794 struct status_block *sblk = status_blk;
2796 return sblk->status_idx;
2799 return cnic_service_bnx2_queues(dev);
2802 static void cnic_service_bnx2_msix(unsigned long data)
2804 struct cnic_dev *dev = (struct cnic_dev *) data;
2805 struct cnic_local *cp = dev->cnic_priv;
2807 cp->last_status_idx = cnic_service_bnx2_queues(dev);
2809 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2810 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2813 static void cnic_doirq(struct cnic_dev *dev)
2815 struct cnic_local *cp = dev->cnic_priv;
2817 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2818 u16 prod = cp->kcq1.sw_prod_idx & MAX_KCQ_IDX;
2820 prefetch(cp->status_blk.gen);
2821 prefetch(&cp->kcq1.kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2823 tasklet_schedule(&cp->cnic_irq_task);
2827 static irqreturn_t cnic_irq(int irq, void *dev_instance)
2829 struct cnic_dev *dev = dev_instance;
2830 struct cnic_local *cp = dev->cnic_priv;
2840 static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
2841 u16 index, u8 op, u8 update)
2843 struct cnic_local *cp = dev->cnic_priv;
2844 u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
2845 COMMAND_REG_INT_ACK);
2846 struct igu_ack_register igu_ack;
2848 igu_ack.status_block_index = index;
2849 igu_ack.sb_id_and_flags =
2850 ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
2851 (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
2852 (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
2853 (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
2855 CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
2858 static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment,
2859 u16 index, u8 op, u8 update)
2861 struct igu_regular cmd_data;
2862 u32 igu_addr = BAR_IGU_INTMEM + (IGU_CMD_INT_ACK_BASE + igu_sb_id) * 8;
2864 cmd_data.sb_id_and_flags =
2865 (index << IGU_REGULAR_SB_INDEX_SHIFT) |
2866 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
2867 (update << IGU_REGULAR_BUPDATE_SHIFT) |
2868 (op << IGU_REGULAR_ENABLE_INT_SHIFT);
2871 CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);
2874 static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
2876 struct cnic_local *cp = dev->cnic_priv;
2878 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, 0,
2879 IGU_INT_DISABLE, 0);
2882 static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev)
2884 struct cnic_local *cp = dev->cnic_priv;
2886 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, 0,
2887 IGU_INT_DISABLE, 0);
2890 static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
2892 u32 last_status = *info->status_idx_ptr;
2895 /* status block index must be read before reading the KCQ */
2897 while ((kcqe_cnt = cnic_get_kcqes(dev, info))) {
2899 service_kcqes(dev, kcqe_cnt);
2901 /* Tell compiler that sblk fields can change. */
2903 if (last_status == *info->status_idx_ptr)
2906 last_status = *info->status_idx_ptr;
2907 /* status block index must be read before reading the KCQ */
2913 static void cnic_service_bnx2x_bh(unsigned long data)
2915 struct cnic_dev *dev = (struct cnic_dev *) data;
2916 struct cnic_local *cp = dev->cnic_priv;
2919 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2922 status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
2924 CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
2926 if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
2927 status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2);
2929 CNIC_WR16(dev, cp->kcq2.io_addr, cp->kcq2.sw_prod_idx +
2932 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF,
2933 status_idx, IGU_INT_ENABLE, 1);
2935 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID,
2936 status_idx, IGU_INT_ENABLE, 1);
2940 static int cnic_service_bnx2x(void *data, void *status_blk)
2942 struct cnic_dev *dev = data;
2943 struct cnic_local *cp = dev->cnic_priv;
2945 if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
2948 cnic_chk_pkt_rings(cp);
2953 static void cnic_ulp_stop(struct cnic_dev *dev)
2955 struct cnic_local *cp = dev->cnic_priv;
2958 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
2960 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2961 struct cnic_ulp_ops *ulp_ops;
2963 mutex_lock(&cnic_lock);
2964 ulp_ops = cp->ulp_ops[if_type];
2966 mutex_unlock(&cnic_lock);
2969 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2970 mutex_unlock(&cnic_lock);
2972 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2973 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
2975 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2979 static void cnic_ulp_start(struct cnic_dev *dev)
2981 struct cnic_local *cp = dev->cnic_priv;
2984 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2985 struct cnic_ulp_ops *ulp_ops;
2987 mutex_lock(&cnic_lock);
2988 ulp_ops = cp->ulp_ops[if_type];
2989 if (!ulp_ops || !ulp_ops->cnic_start) {
2990 mutex_unlock(&cnic_lock);
2993 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2994 mutex_unlock(&cnic_lock);
2996 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2997 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
2999 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3003 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
3005 struct cnic_dev *dev = data;
3007 switch (info->cmd) {
3008 case CNIC_CTL_STOP_CMD:
3016 case CNIC_CTL_START_CMD:
3019 if (!cnic_start_hw(dev))
3020 cnic_ulp_start(dev);
3024 case CNIC_CTL_COMPLETION_CMD: {
3025 u32 cid = BNX2X_SW_CID(info->data.comp.cid);
3027 struct cnic_local *cp = dev->cnic_priv;
3029 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
3030 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3033 wake_up(&ctx->waitq);
3043 static void cnic_ulp_init(struct cnic_dev *dev)
3046 struct cnic_local *cp = dev->cnic_priv;
3048 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3049 struct cnic_ulp_ops *ulp_ops;
3051 mutex_lock(&cnic_lock);
3052 ulp_ops = cnic_ulp_tbl[i];
3053 if (!ulp_ops || !ulp_ops->cnic_init) {
3054 mutex_unlock(&cnic_lock);
3058 mutex_unlock(&cnic_lock);
3060 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3061 ulp_ops->cnic_init(dev);
3067 static void cnic_ulp_exit(struct cnic_dev *dev)
3070 struct cnic_local *cp = dev->cnic_priv;
3072 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3073 struct cnic_ulp_ops *ulp_ops;
3075 mutex_lock(&cnic_lock);
3076 ulp_ops = cnic_ulp_tbl[i];
3077 if (!ulp_ops || !ulp_ops->cnic_exit) {
3078 mutex_unlock(&cnic_lock);
3082 mutex_unlock(&cnic_lock);
3084 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3085 ulp_ops->cnic_exit(dev);
3091 static int cnic_cm_offload_pg(struct cnic_sock *csk)
3093 struct cnic_dev *dev = csk->dev;
3094 struct l4_kwq_offload_pg *l4kwqe;
3095 struct kwqe *wqes[1];
3097 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
3098 memset(l4kwqe, 0, sizeof(*l4kwqe));
3099 wqes[0] = (struct kwqe *) l4kwqe;
3101 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
3103 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
3104 l4kwqe->l2hdr_nbytes = ETH_HLEN;
3106 l4kwqe->da0 = csk->ha[0];
3107 l4kwqe->da1 = csk->ha[1];
3108 l4kwqe->da2 = csk->ha[2];
3109 l4kwqe->da3 = csk->ha[3];
3110 l4kwqe->da4 = csk->ha[4];
3111 l4kwqe->da5 = csk->ha[5];
3113 l4kwqe->sa0 = dev->mac_addr[0];
3114 l4kwqe->sa1 = dev->mac_addr[1];
3115 l4kwqe->sa2 = dev->mac_addr[2];
3116 l4kwqe->sa3 = dev->mac_addr[3];
3117 l4kwqe->sa4 = dev->mac_addr[4];
3118 l4kwqe->sa5 = dev->mac_addr[5];
3120 l4kwqe->etype = ETH_P_IP;
3121 l4kwqe->ipid_start = DEF_IPID_START;
3122 l4kwqe->host_opaque = csk->l5_cid;
3125 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
3126 l4kwqe->vlan_tag = csk->vlan_id;
3127 l4kwqe->l2hdr_nbytes += 4;
3130 return dev->submit_kwqes(dev, wqes, 1);
3133 static int cnic_cm_update_pg(struct cnic_sock *csk)
3135 struct cnic_dev *dev = csk->dev;
3136 struct l4_kwq_update_pg *l4kwqe;
3137 struct kwqe *wqes[1];
3139 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
3140 memset(l4kwqe, 0, sizeof(*l4kwqe));
3141 wqes[0] = (struct kwqe *) l4kwqe;
3143 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
3145 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
3146 l4kwqe->pg_cid = csk->pg_cid;
3148 l4kwqe->da0 = csk->ha[0];
3149 l4kwqe->da1 = csk->ha[1];
3150 l4kwqe->da2 = csk->ha[2];
3151 l4kwqe->da3 = csk->ha[3];
3152 l4kwqe->da4 = csk->ha[4];
3153 l4kwqe->da5 = csk->ha[5];
3155 l4kwqe->pg_host_opaque = csk->l5_cid;
3156 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
3158 return dev->submit_kwqes(dev, wqes, 1);
3161 static int cnic_cm_upload_pg(struct cnic_sock *csk)
3163 struct cnic_dev *dev = csk->dev;
3164 struct l4_kwq_upload *l4kwqe;
3165 struct kwqe *wqes[1];
3167 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
3168 memset(l4kwqe, 0, sizeof(*l4kwqe));
3169 wqes[0] = (struct kwqe *) l4kwqe;
3171 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
3173 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
3174 l4kwqe->cid = csk->pg_cid;
3176 return dev->submit_kwqes(dev, wqes, 1);
3179 static int cnic_cm_conn_req(struct cnic_sock *csk)
3181 struct cnic_dev *dev = csk->dev;
3182 struct l4_kwq_connect_req1 *l4kwqe1;
3183 struct l4_kwq_connect_req2 *l4kwqe2;
3184 struct l4_kwq_connect_req3 *l4kwqe3;
3185 struct kwqe *wqes[3];
3189 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
3190 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
3191 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
3192 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
3193 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
3194 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
3196 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
3198 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
3199 l4kwqe3->ka_timeout = csk->ka_timeout;
3200 l4kwqe3->ka_interval = csk->ka_interval;
3201 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
3202 l4kwqe3->tos = csk->tos;
3203 l4kwqe3->ttl = csk->ttl;
3204 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
3205 l4kwqe3->pmtu = csk->mtu;
3206 l4kwqe3->rcv_buf = csk->rcv_buf;
3207 l4kwqe3->snd_buf = csk->snd_buf;
3208 l4kwqe3->seed = csk->seed;
3210 wqes[0] = (struct kwqe *) l4kwqe1;
3211 if (test_bit(SK_F_IPV6, &csk->flags)) {
3212 wqes[1] = (struct kwqe *) l4kwqe2;
3213 wqes[2] = (struct kwqe *) l4kwqe3;
3216 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
3217 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
3219 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
3220 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
3221 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
3222 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
3223 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
3224 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
3225 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
3226 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
3227 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
3228 sizeof(struct tcphdr);
3230 wqes[1] = (struct kwqe *) l4kwqe3;
3231 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
3232 sizeof(struct tcphdr);
3235 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
3237 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
3238 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
3239 l4kwqe1->cid = csk->cid;
3240 l4kwqe1->pg_cid = csk->pg_cid;
3241 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
3242 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
3243 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
3244 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
3245 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
3246 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
3247 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
3248 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
3249 if (csk->tcp_flags & SK_TCP_NAGLE)
3250 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
3251 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
3252 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
3253 if (csk->tcp_flags & SK_TCP_SACK)
3254 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
3255 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
3256 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
3258 l4kwqe1->tcp_flags = tcp_flags;
3260 return dev->submit_kwqes(dev, wqes, num_wqes);
3263 static int cnic_cm_close_req(struct cnic_sock *csk)
3265 struct cnic_dev *dev = csk->dev;
3266 struct l4_kwq_close_req *l4kwqe;
3267 struct kwqe *wqes[1];
3269 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
3270 memset(l4kwqe, 0, sizeof(*l4kwqe));
3271 wqes[0] = (struct kwqe *) l4kwqe;
3273 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
3274 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
3275 l4kwqe->cid = csk->cid;
3277 return dev->submit_kwqes(dev, wqes, 1);
3280 static int cnic_cm_abort_req(struct cnic_sock *csk)
3282 struct cnic_dev *dev = csk->dev;
3283 struct l4_kwq_reset_req *l4kwqe;
3284 struct kwqe *wqes[1];
3286 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
3287 memset(l4kwqe, 0, sizeof(*l4kwqe));
3288 wqes[0] = (struct kwqe *) l4kwqe;
3290 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
3291 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
3292 l4kwqe->cid = csk->cid;
3294 return dev->submit_kwqes(dev, wqes, 1);
3297 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
3298 u32 l5_cid, struct cnic_sock **csk, void *context)
3300 struct cnic_local *cp = dev->cnic_priv;
3301 struct cnic_sock *csk1;
3303 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3307 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3309 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
3313 csk1 = &cp->csk_tbl[l5_cid];
3314 if (atomic_read(&csk1->ref_count))
3317 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
3322 csk1->l5_cid = l5_cid;
3323 csk1->ulp_type = ulp_type;
3324 csk1->context = context;
3326 csk1->ka_timeout = DEF_KA_TIMEOUT;
3327 csk1->ka_interval = DEF_KA_INTERVAL;
3328 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
3329 csk1->tos = DEF_TOS;
3330 csk1->ttl = DEF_TTL;
3331 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
3332 csk1->rcv_buf = DEF_RCV_BUF;
3333 csk1->snd_buf = DEF_SND_BUF;
3334 csk1->seed = DEF_SEED;
3340 static void cnic_cm_cleanup(struct cnic_sock *csk)
3342 if (csk->src_port) {
3343 struct cnic_dev *dev = csk->dev;
3344 struct cnic_local *cp = dev->cnic_priv;
3346 cnic_free_id(&cp->csk_port_tbl, be16_to_cpu(csk->src_port));
3351 static void cnic_close_conn(struct cnic_sock *csk)
3353 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
3354 cnic_cm_upload_pg(csk);
3355 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3357 cnic_cm_cleanup(csk);
3360 static int cnic_cm_destroy(struct cnic_sock *csk)
3362 if (!cnic_in_use(csk))
3366 clear_bit(SK_F_INUSE, &csk->flags);
3367 smp_mb__after_clear_bit();
3368 while (atomic_read(&csk->ref_count) != 1)
3370 cnic_cm_cleanup(csk);
3377 static inline u16 cnic_get_vlan(struct net_device *dev,
3378 struct net_device **vlan_dev)
3380 if (dev->priv_flags & IFF_802_1Q_VLAN) {
3381 *vlan_dev = vlan_dev_real_dev(dev);
3382 return vlan_dev_vlan_id(dev);
3388 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
3389 struct dst_entry **dst)
3391 #if defined(CONFIG_INET)
3396 memset(&fl, 0, sizeof(fl));
3397 fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
3399 err = ip_route_output_key(&init_net, &rt, &fl);
3404 return -ENETUNREACH;
3408 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
3409 struct dst_entry **dst)
3411 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
3414 memset(&fl, 0, sizeof(fl));
3415 ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
3416 if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
3417 fl.oif = dst_addr->sin6_scope_id;
3419 *dst = ip6_route_output(&init_net, NULL, &fl);
3424 return -ENETUNREACH;
3427 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
3430 struct cnic_dev *dev = NULL;
3431 struct dst_entry *dst;
3432 struct net_device *netdev = NULL;
3433 int err = -ENETUNREACH;
3435 if (dst_addr->sin_family == AF_INET)
3436 err = cnic_get_v4_route(dst_addr, &dst);
3437 else if (dst_addr->sin_family == AF_INET6) {
3438 struct sockaddr_in6 *dst_addr6 =
3439 (struct sockaddr_in6 *) dst_addr;
3441 err = cnic_get_v6_route(dst_addr6, &dst);
3451 cnic_get_vlan(dst->dev, &netdev);
3453 dev = cnic_from_netdev(netdev);
3462 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3464 struct cnic_dev *dev = csk->dev;
3465 struct cnic_local *cp = dev->cnic_priv;
3467 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
3470 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3472 struct cnic_dev *dev = csk->dev;
3473 struct cnic_local *cp = dev->cnic_priv;
3475 struct dst_entry *dst = NULL;
3476 struct net_device *realdev;
3480 if (saddr->local.v6.sin6_family == AF_INET6 &&
3481 saddr->remote.v6.sin6_family == AF_INET6)
3483 else if (saddr->local.v4.sin_family == AF_INET &&
3484 saddr->remote.v4.sin_family == AF_INET)
3489 clear_bit(SK_F_IPV6, &csk->flags);
3492 set_bit(SK_F_IPV6, &csk->flags);
3493 cnic_get_v6_route(&saddr->remote.v6, &dst);
3495 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
3496 sizeof(struct in6_addr));
3497 csk->dst_port = saddr->remote.v6.sin6_port;
3498 local_port = saddr->local.v6.sin6_port;
3501 cnic_get_v4_route(&saddr->remote.v4, &dst);
3503 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
3504 csk->dst_port = saddr->remote.v4.sin_port;
3505 local_port = saddr->local.v4.sin_port;
3509 csk->mtu = dev->netdev->mtu;
3510 if (dst && dst->dev) {
3511 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
3512 if (realdev == dev->netdev) {
3513 csk->vlan_id = vlan;
3514 csk->mtu = dst_mtu(dst);
3518 port_id = be16_to_cpu(local_port);
3519 if (port_id >= CNIC_LOCAL_PORT_MIN &&
3520 port_id < CNIC_LOCAL_PORT_MAX) {
3521 if (cnic_alloc_id(&cp->csk_port_tbl, port_id))
3527 port_id = cnic_alloc_new_id(&cp->csk_port_tbl);
3528 if (port_id == -1) {
3532 local_port = cpu_to_be16(port_id);
3534 csk->src_port = local_port;
3541 static void cnic_init_csk_state(struct cnic_sock *csk)
3544 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3545 clear_bit(SK_F_CLOSING, &csk->flags);
3548 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3552 if (!cnic_in_use(csk))
3555 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
3558 cnic_init_csk_state(csk);
3560 err = cnic_get_route(csk, saddr);
3564 err = cnic_resolve_addr(csk, saddr);
3569 clear_bit(SK_F_CONNECT_START, &csk->flags);
3573 static int cnic_cm_abort(struct cnic_sock *csk)
3575 struct cnic_local *cp = csk->dev->cnic_priv;
3576 u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
3578 if (!cnic_in_use(csk))
3581 if (cnic_abort_prep(csk))
3582 return cnic_cm_abort_req(csk);
3584 /* Getting here means that we haven't started connect, or
3585 * connect was not successful.
3588 cp->close_conn(csk, opcode);
3589 if (csk->state != opcode)
3595 static int cnic_cm_close(struct cnic_sock *csk)
3597 if (!cnic_in_use(csk))
3600 if (cnic_close_prep(csk)) {
3601 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3602 return cnic_cm_close_req(csk);
3609 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3612 struct cnic_ulp_ops *ulp_ops;
3613 int ulp_type = csk->ulp_type;
3616 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3618 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3619 ulp_ops->cm_connect_complete(csk);
3620 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3621 ulp_ops->cm_close_complete(csk);
3622 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3623 ulp_ops->cm_remote_abort(csk);
3624 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3625 ulp_ops->cm_abort_complete(csk);
3626 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3627 ulp_ops->cm_remote_close(csk);
3632 static int cnic_cm_set_pg(struct cnic_sock *csk)
3634 if (cnic_offld_prep(csk)) {
3635 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3636 cnic_cm_update_pg(csk);
3638 cnic_cm_offload_pg(csk);
3643 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3645 struct cnic_local *cp = dev->cnic_priv;
3646 u32 l5_cid = kcqe->pg_host_opaque;
3647 u8 opcode = kcqe->op_code;
3648 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3651 if (!cnic_in_use(csk))
3654 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3655 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3658 /* Possible PG kcqe status: SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3659 if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3660 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3661 cnic_cm_upcall(cp, csk,
3662 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3666 csk->pg_cid = kcqe->pg_cid;
3667 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3668 cnic_cm_conn_req(csk);
3674 static void cnic_process_fcoe_term_conn(struct cnic_dev *dev, struct kcqe *kcqe)
3676 struct cnic_local *cp = dev->cnic_priv;
3677 struct fcoe_kcqe *fc_kcqe = (struct fcoe_kcqe *) kcqe;
3678 u32 l5_cid = fc_kcqe->fcoe_conn_id + BNX2X_FCOE_L5_CID_BASE;
3679 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3681 ctx->timestamp = jiffies;
3683 wake_up(&ctx->waitq);
3686 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3688 struct cnic_local *cp = dev->cnic_priv;
3689 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3690 u8 opcode = l4kcqe->op_code;
3692 struct cnic_sock *csk;
3694 if (opcode == FCOE_RAMROD_CMD_ID_TERMINATE_CONN) {
3695 cnic_process_fcoe_term_conn(dev, kcqe);
3698 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3699 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3700 cnic_cm_process_offld_pg(dev, l4kcqe);
3704 l5_cid = l4kcqe->conn_id;
3706 l5_cid = l4kcqe->cid;
3707 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3710 csk = &cp->csk_tbl[l5_cid];
3713 if (!cnic_in_use(csk)) {
3719 case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
3720 if (l4kcqe->status != 0) {
3721 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3722 cnic_cm_upcall(cp, csk,
3723 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3726 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
3727 if (l4kcqe->status == 0)
3728 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
3730 smp_mb__before_clear_bit();
3731 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3732 cnic_cm_upcall(cp, csk, opcode);
3735 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3736 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3737 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3738 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3739 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3740 cp->close_conn(csk, opcode);
3743 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
3744 cnic_cm_upcall(cp, csk, opcode);
3750 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
3752 struct cnic_dev *dev = data;
3755 for (i = 0; i < num; i++)
3756 cnic_cm_process_kcqe(dev, kcqe[i]);
3759 static struct cnic_ulp_ops cm_ulp_ops = {
3760 .indicate_kcqes = cnic_cm_indicate_kcqe,
3763 static void cnic_cm_free_mem(struct cnic_dev *dev)
3765 struct cnic_local *cp = dev->cnic_priv;
3769 cnic_free_id_tbl(&cp->csk_port_tbl);
3772 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
3774 struct cnic_local *cp = dev->cnic_priv;
3776 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
3781 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
3782 CNIC_LOCAL_PORT_MIN)) {
3783 cnic_cm_free_mem(dev);
3789 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
3791 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
3792 /* Unsolicited RESET_COMP or RESET_RECEIVED */
3793 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
3794 csk->state = opcode;
3797 /* 1. If event opcode matches the expected event in csk->state
3798 * 2. If the expected event is CLOSE_COMP, we accept any event
3799 * 3. If the expected event is 0, meaning the connection was never
3800 * never established, we accept the opcode from cm_abort.
3802 if (opcode == csk->state || csk->state == 0 ||
3803 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP) {
3804 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
3805 if (csk->state == 0)
3806 csk->state = opcode;
3813 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
3815 struct cnic_dev *dev = csk->dev;
3816 struct cnic_local *cp = dev->cnic_priv;
3818 if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
3819 cnic_cm_upcall(cp, csk, opcode);
3823 clear_bit(SK_F_CONNECT_START, &csk->flags);
3824 cnic_close_conn(csk);
3825 csk->state = opcode;
3826 cnic_cm_upcall(cp, csk, opcode);
3829 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
3833 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
3837 get_random_bytes(&seed, 4);
3838 cnic_ctx_wr(dev, 45, 0, seed);
3842 static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
3844 struct cnic_dev *dev = csk->dev;
3845 struct cnic_local *cp = dev->cnic_priv;
3846 struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
3847 union l5cm_specific_data l5_data;
3849 int close_complete = 0;
3852 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3853 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3854 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3855 if (cnic_ready_to_close(csk, opcode)) {
3856 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3857 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
3862 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3863 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
3865 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3870 memset(&l5_data, 0, sizeof(l5_data));
3872 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
3874 } else if (close_complete) {
3875 ctx->timestamp = jiffies;
3876 cnic_close_conn(csk);
3877 cnic_cm_upcall(cp, csk, csk->state);
3881 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
3883 struct cnic_local *cp = dev->cnic_priv;
3889 if (!netif_running(dev->netdev))
3892 for (i = 0; i < cp->max_cid_space; i++) {
3893 struct cnic_context *ctx = &cp->ctx_tbl[i];
3895 while (test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
3898 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
3899 netdev_warn(dev->netdev, "CID %x not deleted\n",
3903 cancel_delayed_work(&cp->delete_task);
3904 flush_workqueue(cnic_wq);
3906 if (atomic_read(&cp->iscsi_conn) != 0)
3907 netdev_warn(dev->netdev, "%d iSCSI connections not destroyed\n",
3908 atomic_read(&cp->iscsi_conn));
3911 static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
3913 struct cnic_local *cp = dev->cnic_priv;
3914 u32 pfid = cp->pfid;
3915 u32 port = CNIC_PORT(cp);
3917 cnic_init_bnx2x_mac(dev);
3918 cnic_bnx2x_set_tcp_timestamp(dev, 1);
3920 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
3921 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfid), 0);
3923 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3924 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(port), 1);
3925 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3926 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(port),
3929 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3930 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfid), DEF_TTL);
3931 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3932 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfid), DEF_TOS);
3933 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3934 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid), 2);
3935 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3936 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfid), DEF_SWS_TIMER);
3938 CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(pfid),
3943 static void cnic_delete_task(struct work_struct *work)
3945 struct cnic_local *cp;
3946 struct cnic_dev *dev;
3948 int need_resched = 0;
3950 cp = container_of(work, struct cnic_local, delete_task.work);
3953 for (i = 0; i < cp->max_cid_space; i++) {
3954 struct cnic_context *ctx = &cp->ctx_tbl[i];
3956 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags) ||
3957 !test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
3960 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
3965 if (!test_and_clear_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
3968 cnic_bnx2x_destroy_ramrod(dev, i);
3970 cnic_free_bnx2x_conn_resc(dev, i);
3971 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI)
3972 atomic_dec(&cp->iscsi_conn);
3974 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
3978 queue_delayed_work(cnic_wq, &cp->delete_task,
3979 msecs_to_jiffies(10));
3983 static int cnic_cm_open(struct cnic_dev *dev)
3985 struct cnic_local *cp = dev->cnic_priv;
3988 err = cnic_cm_alloc_mem(dev);
3992 err = cp->start_cm(dev);
3997 INIT_DELAYED_WORK(&cp->delete_task, cnic_delete_task);
3999 dev->cm_create = cnic_cm_create;
4000 dev->cm_destroy = cnic_cm_destroy;
4001 dev->cm_connect = cnic_cm_connect;
4002 dev->cm_abort = cnic_cm_abort;
4003 dev->cm_close = cnic_cm_close;
4004 dev->cm_select_dev = cnic_cm_select_dev;
4006 cp->ulp_handle[CNIC_ULP_L4] = dev;
4007 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
4011 cnic_cm_free_mem(dev);
4015 static int cnic_cm_shutdown(struct cnic_dev *dev)
4017 struct cnic_local *cp = dev->cnic_priv;
4025 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
4026 struct cnic_sock *csk = &cp->csk_tbl[i];
4028 clear_bit(SK_F_INUSE, &csk->flags);
4029 cnic_cm_cleanup(csk);
4031 cnic_cm_free_mem(dev);
4036 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
4041 cid_addr = GET_CID_ADDR(cid);
4043 for (i = 0; i < CTX_SIZE; i += 4)
4044 cnic_ctx_wr(dev, cid_addr, i, 0);
4047 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
4049 struct cnic_local *cp = dev->cnic_priv;
4051 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
4053 if (CHIP_NUM(cp) != CHIP_NUM_5709)
4056 for (i = 0; i < cp->ctx_blks; i++) {
4058 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
4061 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
4063 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
4064 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
4065 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
4066 (u64) cp->ctx_arr[i].mapping >> 32);
4067 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
4068 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
4069 for (j = 0; j < 10; j++) {
4071 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
4072 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
4076 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
4084 static void cnic_free_irq(struct cnic_dev *dev)
4086 struct cnic_local *cp = dev->cnic_priv;
4087 struct cnic_eth_dev *ethdev = cp->ethdev;
4089 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4090 cp->disable_int_sync(dev);
4091 tasklet_kill(&cp->cnic_irq_task);
4092 free_irq(ethdev->irq_arr[0].vector, dev);
4096 static int cnic_request_irq(struct cnic_dev *dev)
4098 struct cnic_local *cp = dev->cnic_priv;
4099 struct cnic_eth_dev *ethdev = cp->ethdev;
4102 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, "cnic", dev);
4104 tasklet_disable(&cp->cnic_irq_task);
4109 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
4111 struct cnic_local *cp = dev->cnic_priv;
4112 struct cnic_eth_dev *ethdev = cp->ethdev;
4114 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4116 int sblk_num = cp->status_blk_num;
4117 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
4118 BNX2_HC_SB_CONFIG_1;
4120 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
4122 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
4123 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
4124 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
4126 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
4127 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
4128 (unsigned long) dev);
4129 err = cnic_request_irq(dev);
4133 while (cp->status_blk.bnx2->status_completion_producer_index &&
4135 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
4136 1 << (11 + sblk_num));
4141 if (cp->status_blk.bnx2->status_completion_producer_index) {
4147 struct status_block *sblk = cp->status_blk.gen;
4148 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
4151 while (sblk->status_completion_producer_index && i < 10) {
4152 CNIC_WR(dev, BNX2_HC_COMMAND,
4153 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
4158 if (sblk->status_completion_producer_index)
4165 netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
4169 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
4171 struct cnic_local *cp = dev->cnic_priv;
4172 struct cnic_eth_dev *ethdev = cp->ethdev;
4174 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4177 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4178 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
4181 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
4183 struct cnic_local *cp = dev->cnic_priv;
4184 struct cnic_eth_dev *ethdev = cp->ethdev;
4186 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4189 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4190 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
4191 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
4192 synchronize_irq(ethdev->irq_arr[0].vector);
4195 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
4197 struct cnic_local *cp = dev->cnic_priv;
4198 struct cnic_eth_dev *ethdev = cp->ethdev;
4199 struct cnic_uio_dev *udev = cp->udev;
4200 u32 cid_addr, tx_cid, sb_id;
4201 u32 val, offset0, offset1, offset2, offset3;
4204 dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4205 struct status_block *s_blk = cp->status_blk.gen;
4207 sb_id = cp->status_blk_num;
4209 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
4210 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4211 struct status_block_msix *sblk = cp->status_blk.bnx2;
4213 tx_cid = TX_TSS_CID + sb_id - 1;
4214 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
4216 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
4218 cp->tx_cons = *cp->tx_cons_ptr;
4220 cid_addr = GET_CID_ADDR(tx_cid);
4221 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
4222 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
4224 for (i = 0; i < PHY_CTX_SIZE; i += 4)
4225 cnic_ctx_wr(dev, cid_addr2, i, 0);
4227 offset0 = BNX2_L2CTX_TYPE_XI;
4228 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
4229 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
4230 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
4232 cnic_init_context(dev, tx_cid);
4233 cnic_init_context(dev, tx_cid + 1);
4235 offset0 = BNX2_L2CTX_TYPE;
4236 offset1 = BNX2_L2CTX_CMD_TYPE;
4237 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
4238 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
4240 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
4241 cnic_ctx_wr(dev, cid_addr, offset0, val);
4243 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
4244 cnic_ctx_wr(dev, cid_addr, offset1, val);
4246 txbd = (struct tx_bd *) udev->l2_ring;
4248 buf_map = udev->l2_buf_map;
4249 for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
4250 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
4251 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4253 val = (u64) ring_map >> 32;
4254 cnic_ctx_wr(dev, cid_addr, offset2, val);
4255 txbd->tx_bd_haddr_hi = val;
4257 val = (u64) ring_map & 0xffffffff;
4258 cnic_ctx_wr(dev, cid_addr, offset3, val);
4259 txbd->tx_bd_haddr_lo = val;
4262 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
4264 struct cnic_local *cp = dev->cnic_priv;
4265 struct cnic_eth_dev *ethdev = cp->ethdev;
4266 struct cnic_uio_dev *udev = cp->udev;
4267 u32 cid_addr, sb_id, val, coal_reg, coal_val;
4270 struct status_block *s_blk = cp->status_blk.gen;
4271 dma_addr_t ring_map = udev->l2_ring_map;
4273 sb_id = cp->status_blk_num;
4274 cnic_init_context(dev, 2);
4275 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
4276 coal_reg = BNX2_HC_COMMAND;
4277 coal_val = CNIC_RD(dev, coal_reg);
4278 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4279 struct status_block_msix *sblk = cp->status_blk.bnx2;
4281 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
4282 coal_reg = BNX2_HC_COALESCE_NOW;
4283 coal_val = 1 << (11 + sb_id);
4286 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
4287 CNIC_WR(dev, coal_reg, coal_val);
4292 cp->rx_cons = *cp->rx_cons_ptr;
4294 cid_addr = GET_CID_ADDR(2);
4295 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
4296 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
4297 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
4300 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
4302 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
4303 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
4305 rxbd = (struct rx_bd *) (udev->l2_ring + BCM_PAGE_SIZE);
4306 for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
4308 int n = (i % cp->l2_rx_ring_size) + 1;
4310 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4311 rxbd->rx_bd_len = cp->l2_single_buf_size;
4312 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
4313 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
4314 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4316 val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
4317 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
4318 rxbd->rx_bd_haddr_hi = val;
4320 val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
4321 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
4322 rxbd->rx_bd_haddr_lo = val;
4324 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
4325 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
4328 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
4330 struct kwqe *wqes[1], l2kwqe;
4332 memset(&l2kwqe, 0, sizeof(l2kwqe));
4334 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_LAYER_SHIFT) |
4335 (L2_KWQE_OPCODE_VALUE_FLUSH <<
4336 KWQE_OPCODE_SHIFT) | 2;
4337 dev->submit_kwqes(dev, wqes, 1);
4340 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
4342 struct cnic_local *cp = dev->cnic_priv;
4345 val = cp->func << 2;
4347 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
4349 val = cnic_reg_rd_ind(dev, cp->shmem_base +
4350 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
4351 dev->mac_addr[0] = (u8) (val >> 8);
4352 dev->mac_addr[1] = (u8) val;
4354 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
4356 val = cnic_reg_rd_ind(dev, cp->shmem_base +
4357 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
4358 dev->mac_addr[2] = (u8) (val >> 24);
4359 dev->mac_addr[3] = (u8) (val >> 16);
4360 dev->mac_addr[4] = (u8) (val >> 8);
4361 dev->mac_addr[5] = (u8) val;
4363 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
4365 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
4366 if (CHIP_NUM(cp) != CHIP_NUM_5709)
4367 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
4369 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
4370 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
4371 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
4374 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
4376 struct cnic_local *cp = dev->cnic_priv;
4377 struct cnic_eth_dev *ethdev = cp->ethdev;
4378 struct status_block *sblk = cp->status_blk.gen;
4379 u32 val, kcq_cid_addr, kwq_cid_addr;
4382 cnic_set_bnx2_mac(dev);
4384 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
4385 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
4386 if (BCM_PAGE_BITS > 12)
4387 val |= (12 - 8) << 4;
4389 val |= (BCM_PAGE_BITS - 8) << 4;
4391 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
4393 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
4394 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
4395 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
4397 err = cnic_setup_5709_context(dev, 1);
4401 cnic_init_context(dev, KWQ_CID);
4402 cnic_init_context(dev, KCQ_CID);
4404 kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
4405 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
4407 cp->max_kwq_idx = MAX_KWQ_IDX;
4408 cp->kwq_prod_idx = 0;
4409 cp->kwq_con_idx = 0;
4410 set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
4412 if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
4413 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
4415 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
4417 /* Initialize the kernel work queue context. */
4418 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4419 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4420 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_TYPE, val);
4422 val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
4423 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4425 val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
4426 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4428 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
4429 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4431 val = (u32) cp->kwq_info.pgtbl_map;
4432 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4434 kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
4435 cp->kcq1.io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
4437 cp->kcq1.sw_prod_idx = 0;
4438 cp->kcq1.hw_prod_idx_ptr =
4439 (u16 *) &sblk->status_completion_producer_index;
4441 cp->kcq1.status_idx_ptr = (u16 *) &sblk->status_idx;
4443 /* Initialize the kernel complete queue context. */
4444 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4445 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4446 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_TYPE, val);
4448 val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
4449 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4451 val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
4452 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4454 val = (u32) ((u64) cp->kcq1.dma.pgtbl_map >> 32);
4455 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4457 val = (u32) cp->kcq1.dma.pgtbl_map;
4458 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4461 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4462 struct status_block_msix *msblk = cp->status_blk.bnx2;
4463 u32 sb_id = cp->status_blk_num;
4464 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
4466 cp->kcq1.hw_prod_idx_ptr =
4467 (u16 *) &msblk->status_completion_producer_index;
4468 cp->kcq1.status_idx_ptr = (u16 *) &msblk->status_idx;
4469 cp->kwq_con_idx_ptr = (u16 *) &msblk->status_cmd_consumer_index;
4470 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
4471 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4472 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4475 /* Enable Commnad Scheduler notification when we write to the
4476 * host producer index of the kernel contexts. */
4477 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
4479 /* Enable Command Scheduler notification when we write to either
4480 * the Send Queue or Receive Queue producer indexes of the kernel
4481 * bypass contexts. */
4482 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
4483 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
4485 /* Notify COM when the driver post an application buffer. */
4486 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
4488 /* Set the CP and COM doorbells. These two processors polls the
4489 * doorbell for a non zero value before running. This must be done
4490 * after setting up the kernel queue contexts. */
4491 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
4492 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
4494 cnic_init_bnx2_tx_ring(dev);
4495 cnic_init_bnx2_rx_ring(dev);
4497 err = cnic_init_bnx2_irq(dev);
4499 netdev_err(dev->netdev, "cnic_init_irq failed\n");
4500 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4501 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4508 static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
4510 struct cnic_local *cp = dev->cnic_priv;
4511 struct cnic_eth_dev *ethdev = cp->ethdev;
4512 u32 start_offset = ethdev->ctx_tbl_offset;
4515 for (i = 0; i < cp->ctx_blks; i++) {
4516 struct cnic_ctx *ctx = &cp->ctx_arr[i];
4517 dma_addr_t map = ctx->mapping;
4519 if (cp->ctx_align) {
4520 unsigned long mask = cp->ctx_align - 1;
4522 map = (map + mask) & ~mask;
4525 cnic_ctx_tbl_wr(dev, start_offset + i, map);
4529 static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
4531 struct cnic_local *cp = dev->cnic_priv;
4532 struct cnic_eth_dev *ethdev = cp->ethdev;
4535 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
4536 (unsigned long) dev);
4537 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
4538 err = cnic_request_irq(dev);
4543 static inline void cnic_storm_memset_hc_disable(struct cnic_dev *dev,
4544 u16 sb_id, u8 sb_index,
4548 u32 addr = BAR_CSTRORM_INTMEM +
4549 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4550 offsetof(struct hc_status_block_data_e1x, index_data) +
4551 sizeof(struct hc_index_data)*sb_index +
4552 offsetof(struct hc_index_data, flags);
4553 u16 flags = CNIC_RD16(dev, addr);
4555 flags &= ~HC_INDEX_DATA_HC_ENABLED;
4556 flags |= (((~disable) << HC_INDEX_DATA_HC_ENABLED_SHIFT) &
4557 HC_INDEX_DATA_HC_ENABLED);
4558 CNIC_WR16(dev, addr, flags);
4561 static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
4563 struct cnic_local *cp = dev->cnic_priv;
4564 u8 sb_id = cp->status_blk_num;
4566 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4567 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4568 offsetof(struct hc_status_block_data_e1x, index_data) +
4569 sizeof(struct hc_index_data)*HC_INDEX_ISCSI_EQ_CONS +
4570 offsetof(struct hc_index_data, timeout), 64 / 12);
4571 cnic_storm_memset_hc_disable(dev, sb_id, HC_INDEX_ISCSI_EQ_CONS, 0);
4574 static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
4578 static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev,
4579 struct client_init_ramrod_data *data)
4581 struct cnic_local *cp = dev->cnic_priv;
4582 struct cnic_uio_dev *udev = cp->udev;
4583 union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) udev->l2_ring;
4584 dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4585 struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4586 int port = CNIC_PORT(cp);
4588 u32 cli = cp->ethdev->iscsi_l2_client_id;
4591 memset(txbd, 0, BCM_PAGE_SIZE);
4593 buf_map = udev->l2_buf_map;
4594 for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) {
4595 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
4596 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
4598 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4599 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4600 reg_bd->addr_hi = start_bd->addr_hi;
4601 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
4602 start_bd->nbytes = cpu_to_le16(0x10);
4603 start_bd->nbd = cpu_to_le16(3);
4604 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
4605 start_bd->general_data = (UNICAST_ADDRESS <<
4606 ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT);
4607 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
4611 val = (u64) ring_map >> 32;
4612 txbd->next_bd.addr_hi = cpu_to_le32(val);
4614 data->tx.tx_bd_page_base.hi = cpu_to_le32(val);
4616 val = (u64) ring_map & 0xffffffff;
4617 txbd->next_bd.addr_lo = cpu_to_le32(val);
4619 data->tx.tx_bd_page_base.lo = cpu_to_le32(val);
4621 /* Other ramrod params */
4622 data->tx.tx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_CQ_CONS;
4623 data->tx.tx_status_block_id = BNX2X_DEF_SB_ID;
4625 /* reset xstorm per client statistics */
4626 if (cli < MAX_STAT_COUNTER_ID) {
4627 val = BAR_XSTRORM_INTMEM +
4628 XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4629 for (i = 0; i < sizeof(struct xstorm_per_client_stats) / 4; i++)
4630 CNIC_WR(dev, val + i * 4, 0);
4634 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_CQ_CONS];
4637 static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev,
4638 struct client_init_ramrod_data *data)
4640 struct cnic_local *cp = dev->cnic_priv;
4641 struct cnic_uio_dev *udev = cp->udev;
4642 struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (udev->l2_ring +
4644 struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
4645 (udev->l2_ring + (2 * BCM_PAGE_SIZE));
4646 struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4648 int port = CNIC_PORT(cp);
4649 u32 cli = cp->ethdev->iscsi_l2_client_id;
4650 int cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
4652 dma_addr_t ring_map = udev->l2_ring_map;
4655 data->general.client_id = cli;
4656 data->general.statistics_en_flg = 1;
4657 data->general.statistics_counter_id = cli;
4658 data->general.activate_flg = 1;
4659 data->general.sp_client_id = cli;
4661 for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
4663 int n = (i % cp->l2_rx_ring_size) + 1;
4665 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4666 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4667 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4670 val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
4671 rxbd->addr_hi = cpu_to_le32(val);
4672 data->rx.bd_page_base.hi = cpu_to_le32(val);
4674 val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
4675 rxbd->addr_lo = cpu_to_le32(val);
4676 data->rx.bd_page_base.lo = cpu_to_le32(val);
4678 rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
4679 val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) >> 32;
4680 rxcqe->addr_hi = cpu_to_le32(val);
4681 data->rx.cqe_page_base.hi = cpu_to_le32(val);
4683 val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff;
4684 rxcqe->addr_lo = cpu_to_le32(val);
4685 data->rx.cqe_page_base.lo = cpu_to_le32(val);
4687 /* Other ramrod params */
4688 data->rx.client_qzone_id = cl_qzone_id;
4689 data->rx.rx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS;
4690 data->rx.status_block_id = BNX2X_DEF_SB_ID;
4692 data->rx.cache_line_alignment_log_size = L1_CACHE_SHIFT;
4693 data->rx.bd_buff_size = cpu_to_le16(cp->l2_single_buf_size);
4695 data->rx.mtu = cpu_to_le16(cp->l2_single_buf_size - 14);
4696 data->rx.outer_vlan_removal_enable_flg = 1;
4698 /* reset tstorm and ustorm per client statistics */
4699 if (cli < MAX_STAT_COUNTER_ID) {
4700 val = BAR_TSTRORM_INTMEM +
4701 TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4702 for (i = 0; i < sizeof(struct tstorm_per_client_stats) / 4; i++)
4703 CNIC_WR(dev, val + i * 4, 0);
4705 val = BAR_USTRORM_INTMEM +
4706 USTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4707 for (i = 0; i < sizeof(struct ustorm_per_client_stats) / 4; i++)
4708 CNIC_WR(dev, val + i * 4, 0);
4712 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS];
4713 cp->rx_cons = *cp->rx_cons_ptr;
4716 static int cnic_read_bnx2x_iscsi_mac(struct cnic_dev *dev, u32 upper_addr,
4722 val = CNIC_RD(dev, upper_addr);
4724 mac[0] = (u8) (val >> 8);
4727 val = CNIC_RD(dev, lower_addr);
4729 mac[2] = (u8) (val >> 24);
4730 mac[3] = (u8) (val >> 16);
4731 mac[4] = (u8) (val >> 8);
4734 if (is_valid_ether_addr(mac)) {
4735 memcpy(dev->mac_addr, mac, 6);
4742 static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
4744 struct cnic_local *cp = dev->cnic_priv;
4745 u32 base, base2, addr, addr1, val;
4746 int port = CNIC_PORT(cp);
4748 dev->max_iscsi_conn = 0;
4749 base = CNIC_RD(dev, MISC_REG_SHARED_MEM_ADDR);
4753 base2 = CNIC_RD(dev, (CNIC_PATH(cp) ? MISC_REG_GENERIC_CR_1 :
4754 MISC_REG_GENERIC_CR_0));
4755 addr = BNX2X_SHMEM_ADDR(base,
4756 dev_info.port_hw_config[port].iscsi_mac_upper);
4758 addr1 = BNX2X_SHMEM_ADDR(base,
4759 dev_info.port_hw_config[port].iscsi_mac_lower);
4761 cnic_read_bnx2x_iscsi_mac(dev, addr, addr1);
4763 addr = BNX2X_SHMEM_ADDR(base, validity_map[port]);
4764 val = CNIC_RD(dev, addr);
4766 if (!(val & SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT)) {
4769 addr = BNX2X_SHMEM_ADDR(base,
4770 drv_lic_key[port].max_iscsi_init_conn);
4771 val16 = CNIC_RD16(dev, addr);
4775 dev->max_iscsi_conn = val16;
4778 if (BNX2X_CHIP_IS_E2(cp->chip_id))
4779 dev->max_fcoe_conn = BNX2X_FCOE_NUM_CONNECTIONS;
4781 if (BNX2X_CHIP_IS_E1H(cp->chip_id) || BNX2X_CHIP_IS_E2(cp->chip_id)) {
4782 int func = CNIC_FUNC(cp);
4785 if (BNX2X_SHMEM2_HAS(base2, mf_cfg_addr))
4786 mf_cfg_addr = CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base2,
4789 mf_cfg_addr = base + BNX2X_SHMEM_MF_BLK_OFFSET;
4791 if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4792 /* Must determine if the MF is SD vs SI mode */
4793 addr = BNX2X_SHMEM_ADDR(base,
4794 dev_info.shared_feature_config.config);
4795 val = CNIC_RD(dev, addr);
4796 if ((val & SHARED_FEAT_CFG_FORCE_SF_MODE_MASK) ==
4797 SHARED_FEAT_CFG_FORCE_SF_MODE_SWITCH_INDEPT) {
4800 /* MULTI_FUNCTION_SI mode */
4801 addr = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4802 func_ext_config[func].func_cfg);
4803 val = CNIC_RD(dev, addr);
4804 if (!(val & MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD))
4805 dev->max_iscsi_conn = 0;
4807 if (!(val & MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD))
4808 dev->max_fcoe_conn = 0;
4810 addr = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4811 func_ext_config[func].
4812 iscsi_mac_addr_upper);
4813 addr1 = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4814 func_ext_config[func].
4815 iscsi_mac_addr_lower);
4816 rc = cnic_read_bnx2x_iscsi_mac(dev, addr,
4819 dev->max_iscsi_conn = 0;
4825 addr = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4826 func_mf_config[func].e1hov_tag);
4828 val = CNIC_RD(dev, addr);
4829 val &= FUNC_MF_CFG_E1HOV_TAG_MASK;
4830 if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) {
4831 dev->max_fcoe_conn = 0;
4832 dev->max_iscsi_conn = 0;
4835 if (!is_valid_ether_addr(dev->mac_addr))
4836 dev->max_iscsi_conn = 0;
4839 static void cnic_init_bnx2x_kcq(struct cnic_dev *dev)
4841 struct cnic_local *cp = dev->cnic_priv;
4842 u32 pfid = cp->pfid;
4844 cp->kcq1.io_addr = BAR_CSTRORM_INTMEM +
4845 CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0);
4846 cp->kcq1.sw_prod_idx = 0;
4848 if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4849 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
4851 cp->kcq1.hw_prod_idx_ptr =
4852 &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
4853 cp->kcq1.status_idx_ptr =
4854 &sb->sb.running_index[SM_RX_ID];
4856 struct host_hc_status_block_e1x *sb = cp->status_blk.gen;
4858 cp->kcq1.hw_prod_idx_ptr =
4859 &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
4860 cp->kcq1.status_idx_ptr =
4861 &sb->sb.running_index[SM_RX_ID];
4864 if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4865 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
4867 cp->kcq2.io_addr = BAR_USTRORM_INTMEM +
4868 USTORM_FCOE_EQ_PROD_OFFSET(pfid);
4869 cp->kcq2.sw_prod_idx = 0;
4870 cp->kcq2.hw_prod_idx_ptr =
4871 &sb->sb.index_values[HC_INDEX_FCOE_EQ_CONS];
4872 cp->kcq2.status_idx_ptr =
4873 &sb->sb.running_index[SM_RX_ID];
4877 static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
4879 struct cnic_local *cp = dev->cnic_priv;
4880 struct cnic_eth_dev *ethdev = cp->ethdev;
4881 int func = CNIC_FUNC(cp), ret, i;
4884 if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4885 u32 val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN_OVWR);
4888 val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN);
4890 val = (val >> 1) & 1;
4893 cp->pfid = func >> 1;
4895 cp->pfid = func & 0x6;
4901 ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
4902 cp->iscsi_start_cid);
4907 if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4908 ret = cnic_init_id_tbl(&cp->fcoe_cid_tbl,
4909 BNX2X_FCOE_NUM_CONNECTIONS,
4910 cp->fcoe_start_cid);
4916 cp->bnx2x_igu_sb_id = ethdev->irq_arr[0].status_blk_num2;
4918 cnic_init_bnx2x_kcq(dev);
4920 cnic_get_bnx2x_iscsi_info(dev);
4923 CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX);
4924 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4925 CSTORM_ISCSI_EQ_CONS_OFFSET(pfid, 0), 0);
4926 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4927 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0),
4928 cp->kcq1.dma.pg_map_arr[1] & 0xffffffff);
4929 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4930 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0) + 4,
4931 (u64) cp->kcq1.dma.pg_map_arr[1] >> 32);
4932 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4933 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0),
4934 cp->kcq1.dma.pg_map_arr[0] & 0xffffffff);
4935 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4936 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0) + 4,
4937 (u64) cp->kcq1.dma.pg_map_arr[0] >> 32);
4938 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4939 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfid, 0), 1);
4940 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4941 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfid, 0), cp->status_blk_num);
4942 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4943 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfid, 0),
4944 HC_INDEX_ISCSI_EQ_CONS);
4946 for (i = 0; i < cp->conn_buf_info.num_pages; i++) {
4947 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4948 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfid, i),
4949 cp->conn_buf_info.pgtbl[2 * i]);
4950 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4951 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfid, i) + 4,
4952 cp->conn_buf_info.pgtbl[(2 * i) + 1]);
4955 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4956 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid),
4957 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
4958 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4959 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid) + 4,
4960 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
4962 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4963 TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfid), DEF_RCV_BUF);
4965 cnic_setup_bnx2x_context(dev);
4967 ret = cnic_init_bnx2x_irq(dev);
4974 static void cnic_init_rings(struct cnic_dev *dev)
4976 struct cnic_local *cp = dev->cnic_priv;
4977 struct cnic_uio_dev *udev = cp->udev;
4979 if (test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
4982 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4983 cnic_init_bnx2_tx_ring(dev);
4984 cnic_init_bnx2_rx_ring(dev);
4985 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
4986 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4987 u32 cli = cp->ethdev->iscsi_l2_client_id;
4988 u32 cid = cp->ethdev->iscsi_l2_cid;
4990 struct client_init_ramrod_data *data;
4991 union l5cm_specific_data l5_data;
4992 struct ustorm_eth_rx_producers rx_prods = {0};
4995 rx_prods.bd_prod = 0;
4996 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
4999 cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
5001 off = BAR_USTRORM_INTMEM +
5002 (BNX2X_CHIP_IS_E2(cp->chip_id) ?
5003 USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id) :
5004 USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp), cli));
5006 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
5007 CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
5009 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5011 data = udev->l2_buf;
5013 memset(data, 0, sizeof(*data));
5015 cnic_init_bnx2x_tx_ring(dev, data);
5016 cnic_init_bnx2x_rx_ring(dev, data);
5018 l5_data.phy_address.lo = udev->l2_buf_map & 0xffffffff;
5019 l5_data.phy_address.hi = (u64) udev->l2_buf_map >> 32;
5021 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5023 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
5024 cid, ETH_CONNECTION_TYPE, &l5_data);
5027 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5031 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5032 netdev_err(dev->netdev,
5033 "iSCSI CLIENT_SETUP did not complete\n");
5034 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5035 cnic_ring_ctl(dev, cid, cli, 1);
5039 static void cnic_shutdown_rings(struct cnic_dev *dev)
5041 struct cnic_local *cp = dev->cnic_priv;
5043 if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5046 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5047 cnic_shutdown_bnx2_rx_ring(dev);
5048 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5049 struct cnic_local *cp = dev->cnic_priv;
5050 u32 cli = cp->ethdev->iscsi_l2_client_id;
5051 u32 cid = cp->ethdev->iscsi_l2_cid;
5052 union l5cm_specific_data l5_data;
5055 cnic_ring_ctl(dev, cid, cli, 0);
5057 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5059 l5_data.phy_address.lo = cli;
5060 l5_data.phy_address.hi = 0;
5061 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
5062 cid, ETH_CONNECTION_TYPE, &l5_data);
5064 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5068 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5069 netdev_err(dev->netdev,
5070 "iSCSI CLIENT_HALT did not complete\n");
5071 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5073 memset(&l5_data, 0, sizeof(l5_data));
5074 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
5075 cid, NONE_CONNECTION_TYPE, &l5_data);
5078 clear_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5081 static int cnic_register_netdev(struct cnic_dev *dev)
5083 struct cnic_local *cp = dev->cnic_priv;
5084 struct cnic_eth_dev *ethdev = cp->ethdev;
5090 if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
5093 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
5095 netdev_err(dev->netdev, "register_cnic failed\n");
5100 static void cnic_unregister_netdev(struct cnic_dev *dev)
5102 struct cnic_local *cp = dev->cnic_priv;
5103 struct cnic_eth_dev *ethdev = cp->ethdev;
5108 ethdev->drv_unregister_cnic(dev->netdev);
5111 static int cnic_start_hw(struct cnic_dev *dev)
5113 struct cnic_local *cp = dev->cnic_priv;
5114 struct cnic_eth_dev *ethdev = cp->ethdev;
5117 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
5120 dev->regview = ethdev->io_base;
5121 pci_dev_get(dev->pcidev);
5122 cp->func = PCI_FUNC(dev->pcidev->devfn);
5123 cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
5124 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
5126 err = cp->alloc_resc(dev);
5128 netdev_err(dev->netdev, "allocate resource failure\n");
5132 err = cp->start_hw(dev);
5136 err = cnic_cm_open(dev);
5140 set_bit(CNIC_F_CNIC_UP, &dev->flags);
5142 cp->enable_int(dev);
5148 pci_dev_put(dev->pcidev);
5152 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
5154 cnic_disable_bnx2_int_sync(dev);
5156 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
5157 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
5159 cnic_init_context(dev, KWQ_CID);
5160 cnic_init_context(dev, KCQ_CID);
5162 cnic_setup_5709_context(dev, 0);
5165 cnic_free_resc(dev);
5169 static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
5171 struct cnic_local *cp = dev->cnic_priv;
5174 *cp->kcq1.hw_prod_idx_ptr = 0;
5175 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5176 CSTORM_ISCSI_EQ_CONS_OFFSET(cp->pfid, 0), 0);
5177 CNIC_WR16(dev, cp->kcq1.io_addr, 0);
5178 cnic_free_resc(dev);
5181 static void cnic_stop_hw(struct cnic_dev *dev)
5183 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5184 struct cnic_local *cp = dev->cnic_priv;
5187 /* Need to wait for the ring shutdown event to complete
5188 * before clearing the CNIC_UP flag.
5190 while (cp->udev->uio_dev != -1 && i < 15) {
5194 cnic_shutdown_rings(dev);
5195 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
5196 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
5198 cnic_cm_shutdown(dev);
5200 pci_dev_put(dev->pcidev);
5204 static void cnic_free_dev(struct cnic_dev *dev)
5208 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
5212 if (atomic_read(&dev->ref_count) != 0)
5213 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
5215 netdev_info(dev->netdev, "Removed CNIC device\n");
5216 dev_put(dev->netdev);
5220 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
5221 struct pci_dev *pdev)
5223 struct cnic_dev *cdev;
5224 struct cnic_local *cp;
5227 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
5229 cdev = kzalloc(alloc_size , GFP_KERNEL);
5231 netdev_err(dev, "allocate dev struct failure\n");
5236 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
5237 cdev->register_device = cnic_register_device;
5238 cdev->unregister_device = cnic_unregister_device;
5239 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
5241 cp = cdev->cnic_priv;
5243 cp->l2_single_buf_size = 0x400;
5244 cp->l2_rx_ring_size = 3;
5246 spin_lock_init(&cp->cnic_ulp_lock);
5248 netdev_info(dev, "Added CNIC device\n");
5253 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
5255 struct pci_dev *pdev;
5256 struct cnic_dev *cdev;
5257 struct cnic_local *cp;
5258 struct cnic_eth_dev *ethdev = NULL;
5259 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
5261 probe = symbol_get(bnx2_cnic_probe);
5263 ethdev = (*probe)(dev);
5264 symbol_put(bnx2_cnic_probe);
5269 pdev = ethdev->pdev;
5275 if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
5276 pdev->device == PCI_DEVICE_ID_NX2_5709S) {
5279 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
5287 cdev = cnic_alloc_dev(dev, pdev);
5291 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
5292 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
5294 cp = cdev->cnic_priv;
5295 cp->ethdev = ethdev;
5296 cdev->pcidev = pdev;
5297 cp->chip_id = ethdev->chip_id;
5299 cp->cnic_ops = &cnic_bnx2_ops;
5300 cp->start_hw = cnic_start_bnx2_hw;
5301 cp->stop_hw = cnic_stop_bnx2_hw;
5302 cp->setup_pgtbl = cnic_setup_page_tbl;
5303 cp->alloc_resc = cnic_alloc_bnx2_resc;
5304 cp->free_resc = cnic_free_resc;
5305 cp->start_cm = cnic_cm_init_bnx2_hw;
5306 cp->stop_cm = cnic_cm_stop_bnx2_hw;
5307 cp->enable_int = cnic_enable_bnx2_int;
5308 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
5309 cp->close_conn = cnic_close_bnx2_conn;
5310 cp->next_idx = cnic_bnx2_next_idx;
5311 cp->hw_idx = cnic_bnx2_hw_idx;
5319 static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
5321 struct pci_dev *pdev;
5322 struct cnic_dev *cdev;
5323 struct cnic_local *cp;
5324 struct cnic_eth_dev *ethdev = NULL;
5325 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
5327 probe = symbol_get(bnx2x_cnic_probe);
5329 ethdev = (*probe)(dev);
5330 symbol_put(bnx2x_cnic_probe);
5335 pdev = ethdev->pdev;
5340 cdev = cnic_alloc_dev(dev, pdev);
5346 set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
5347 cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
5349 cp = cdev->cnic_priv;
5350 cp->ethdev = ethdev;
5351 cdev->pcidev = pdev;
5352 cp->chip_id = ethdev->chip_id;
5354 cp->cnic_ops = &cnic_bnx2x_ops;
5355 cp->start_hw = cnic_start_bnx2x_hw;
5356 cp->stop_hw = cnic_stop_bnx2x_hw;
5357 cp->setup_pgtbl = cnic_setup_page_tbl_le;
5358 cp->alloc_resc = cnic_alloc_bnx2x_resc;
5359 cp->free_resc = cnic_free_resc;
5360 cp->start_cm = cnic_cm_init_bnx2x_hw;
5361 cp->stop_cm = cnic_cm_stop_bnx2x_hw;
5362 cp->enable_int = cnic_enable_bnx2x_int;
5363 cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
5364 if (BNX2X_CHIP_IS_E2(cp->chip_id))
5365 cp->ack_int = cnic_ack_bnx2x_e2_msix;
5367 cp->ack_int = cnic_ack_bnx2x_msix;
5368 cp->close_conn = cnic_close_bnx2x_conn;
5369 cp->next_idx = cnic_bnx2x_next_idx;
5370 cp->hw_idx = cnic_bnx2x_hw_idx;
5374 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
5376 struct ethtool_drvinfo drvinfo;
5377 struct cnic_dev *cdev = NULL;
5379 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
5380 memset(&drvinfo, 0, sizeof(drvinfo));
5381 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
5383 if (!strcmp(drvinfo.driver, "bnx2"))
5384 cdev = init_bnx2_cnic(dev);
5385 if (!strcmp(drvinfo.driver, "bnx2x"))
5386 cdev = init_bnx2x_cnic(dev);
5388 write_lock(&cnic_dev_lock);
5389 list_add(&cdev->list, &cnic_dev_list);
5390 write_unlock(&cnic_dev_lock);
5397 * netdev event handler
5399 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
5402 struct net_device *netdev = ptr;
5403 struct cnic_dev *dev;
5407 dev = cnic_from_netdev(netdev);
5409 if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
5410 /* Check for the hot-plug device */
5411 dev = is_cnic_dev(netdev);
5418 struct cnic_local *cp = dev->cnic_priv;
5422 else if (event == NETDEV_UNREGISTER)
5425 if (event == NETDEV_UP) {
5426 if (cnic_register_netdev(dev) != 0) {
5430 if (!cnic_start_hw(dev))
5431 cnic_ulp_start(dev);
5435 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
5436 struct cnic_ulp_ops *ulp_ops;
5439 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
5440 if (!ulp_ops || !ulp_ops->indicate_netevent)
5443 ctx = cp->ulp_handle[if_type];
5445 ulp_ops->indicate_netevent(ctx, event);
5449 if (event == NETDEV_GOING_DOWN) {
5452 cnic_unregister_netdev(dev);
5453 } else if (event == NETDEV_UNREGISTER) {
5454 write_lock(&cnic_dev_lock);
5455 list_del_init(&dev->list);
5456 write_unlock(&cnic_dev_lock);
5468 static struct notifier_block cnic_netdev_notifier = {
5469 .notifier_call = cnic_netdev_event
5472 static void cnic_release(void)
5474 struct cnic_dev *dev;
5475 struct cnic_uio_dev *udev;
5477 while (!list_empty(&cnic_dev_list)) {
5478 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
5479 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5485 cnic_unregister_netdev(dev);
5486 list_del_init(&dev->list);
5489 while (!list_empty(&cnic_udev_list)) {
5490 udev = list_entry(cnic_udev_list.next, struct cnic_uio_dev,
5492 cnic_free_uio(udev);
5496 static int __init cnic_init(void)
5500 pr_info("%s", version);
5502 rc = register_netdevice_notifier(&cnic_netdev_notifier);
5508 cnic_wq = create_singlethread_workqueue("cnic_wq");
5511 unregister_netdevice_notifier(&cnic_netdev_notifier);
5518 static void __exit cnic_exit(void)
5520 unregister_netdevice_notifier(&cnic_netdev_notifier);
5522 destroy_workqueue(cnic_wq);
5525 module_init(cnic_init);
5526 module_exit(cnic_exit);