2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
4 * Largely derived from at91_dataflash.c:
5 * Copyright (C) 2003-2005 SAN People (Pty) Ltd
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/slab.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/mutex.h>
18 #include <linux/err.h>
19 #include <linux/math64.h>
21 #include <linux/of_device.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/flash.h>
26 #include <linux/mtd/mtd.h>
27 #include <linux/mtd/partitions.h>
30 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
31 * each chip, which may be used for double buffered I/O; but this driver
32 * doesn't (yet) use these for any kind of i/o overlap or prefetching.
34 * Sometimes DataFlash is packaged in MMC-format cards, although the
35 * MMC stack can't (yet?) distinguish between MMC and DataFlash
36 * protocols during enumeration.
39 /* reads can bypass the buffers */
40 #define OP_READ_CONTINUOUS 0xE8
41 #define OP_READ_PAGE 0xD2
43 /* group B requests can run even while status reports "busy" */
44 #define OP_READ_STATUS 0xD7 /* group B */
46 /* move data between host and buffer */
47 #define OP_READ_BUFFER1 0xD4 /* group B */
48 #define OP_READ_BUFFER2 0xD6 /* group B */
49 #define OP_WRITE_BUFFER1 0x84 /* group B */
50 #define OP_WRITE_BUFFER2 0x87 /* group B */
53 #define OP_ERASE_PAGE 0x81
54 #define OP_ERASE_BLOCK 0x50
56 /* move data between buffer and flash */
57 #define OP_TRANSFER_BUF1 0x53
58 #define OP_TRANSFER_BUF2 0x55
59 #define OP_MREAD_BUFFER1 0xD4
60 #define OP_MREAD_BUFFER2 0xD6
61 #define OP_MWERASE_BUFFER1 0x83
62 #define OP_MWERASE_BUFFER2 0x86
63 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
64 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
66 /* write to buffer, then write-erase to flash */
67 #define OP_PROGRAM_VIA_BUF1 0x82
68 #define OP_PROGRAM_VIA_BUF2 0x85
70 /* compare buffer to flash */
71 #define OP_COMPARE_BUF1 0x60
72 #define OP_COMPARE_BUF2 0x61
74 /* read flash to buffer, then write-erase to flash */
75 #define OP_REWRITE_VIA_BUF1 0x58
76 #define OP_REWRITE_VIA_BUF2 0x59
78 /* newer chips report JEDEC manufacturer and device IDs; chip
79 * serial number and OTP bits; and per-sector writeprotect.
81 #define OP_READ_ID 0x9F
82 #define OP_READ_SECURITY 0x77
83 #define OP_WRITE_SECURITY_REVC 0x9A
84 #define OP_WRITE_SECURITY 0x9B /* revision D */
91 unsigned partitioned:1;
93 unsigned short page_offset; /* offset in flash address */
94 unsigned int page_size; /* of bytes per page */
97 struct spi_device *spi;
103 static const struct of_device_id dataflash_dt_ids[] = {
104 { .compatible = "atmel,at45", },
105 { .compatible = "atmel,dataflash", },
109 #define dataflash_dt_ids NULL
112 /* ......................................................................... */
115 * Return the status of the DataFlash device.
117 static inline int dataflash_status(struct spi_device *spi)
119 /* NOTE: at45db321c over 25 MHz wants to write
120 * a dummy byte after the opcode...
122 return spi_w8r8(spi, OP_READ_STATUS);
126 * Poll the DataFlash device until it is READY.
127 * This usually takes 5-20 msec or so; more for sector erase.
129 static int dataflash_waitready(struct spi_device *spi)
134 status = dataflash_status(spi);
136 pr_debug("%s: status %d?\n",
137 dev_name(&spi->dev), status);
141 if (status & (1 << 7)) /* RDY/nBSY */
148 /* ......................................................................... */
151 * Erase pages of flash.
153 static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
155 struct dataflash *priv = mtd->priv;
156 struct spi_device *spi = priv->spi;
157 struct spi_transfer x = { .tx_dma = 0, };
158 struct spi_message msg;
159 unsigned blocksize = priv->page_size << 3;
163 pr_debug("%s: erase addr=0x%llx len 0x%llx\n",
164 dev_name(&spi->dev), (long long)instr->addr,
165 (long long)instr->len);
167 div_u64_rem(instr->len, priv->page_size, &rem);
170 div_u64_rem(instr->addr, priv->page_size, &rem);
174 spi_message_init(&msg);
176 x.tx_buf = command = priv->command;
178 spi_message_add_tail(&x, &msg);
180 mutex_lock(&priv->lock);
181 while (instr->len > 0) {
182 unsigned int pageaddr;
186 /* Calculate flash page address; use block erase (for speed) if
187 * we're at a block boundary and need to erase the whole block.
189 pageaddr = div_u64(instr->addr, priv->page_size);
190 do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
191 pageaddr = pageaddr << priv->page_offset;
193 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
194 command[1] = (uint8_t)(pageaddr >> 16);
195 command[2] = (uint8_t)(pageaddr >> 8);
198 pr_debug("ERASE %s: (%x) %x %x %x [%i]\n",
199 do_block ? "block" : "page",
200 command[0], command[1], command[2], command[3],
203 status = spi_sync(spi, &msg);
204 (void) dataflash_waitready(spi);
207 printk(KERN_ERR "%s: erase %x, err %d\n",
208 dev_name(&spi->dev), pageaddr, status);
209 /* REVISIT: can retry instr->retries times; or
210 * giveup and instr->fail_addr = instr->addr;
216 instr->addr += blocksize;
217 instr->len -= blocksize;
219 instr->addr += priv->page_size;
220 instr->len -= priv->page_size;
223 mutex_unlock(&priv->lock);
225 /* Inform MTD subsystem that erase is complete */
226 instr->state = MTD_ERASE_DONE;
227 mtd_erase_callback(instr);
233 * Read from the DataFlash device.
234 * from : Start offset in flash device
235 * len : Amount to read
236 * retlen : About of data actually read
237 * buf : Buffer containing the data
239 static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
240 size_t *retlen, u_char *buf)
242 struct dataflash *priv = mtd->priv;
243 struct spi_transfer x[2] = { { .tx_dma = 0, }, };
244 struct spi_message msg;
249 pr_debug("%s: read 0x%x..0x%x\n", dev_name(&priv->spi->dev),
250 (unsigned)from, (unsigned)(from + len));
258 /* Calculate flash page/byte address */
259 addr = (((unsigned)from / priv->page_size) << priv->page_offset)
260 + ((unsigned)from % priv->page_size);
262 command = priv->command;
264 pr_debug("READ: (%x) %x %x %x\n",
265 command[0], command[1], command[2], command[3]);
267 spi_message_init(&msg);
269 x[0].tx_buf = command;
271 spi_message_add_tail(&x[0], &msg);
275 spi_message_add_tail(&x[1], &msg);
277 mutex_lock(&priv->lock);
279 /* Continuous read, max clock = f(car) which may be less than
280 * the peak rate available. Some chips support commands with
281 * fewer "don't care" bytes. Both buffers stay unchanged.
283 command[0] = OP_READ_CONTINUOUS;
284 command[1] = (uint8_t)(addr >> 16);
285 command[2] = (uint8_t)(addr >> 8);
286 command[3] = (uint8_t)(addr >> 0);
287 /* plus 4 "don't care" bytes */
289 status = spi_sync(priv->spi, &msg);
290 mutex_unlock(&priv->lock);
293 *retlen = msg.actual_length - 8;
296 pr_debug("%s: read %x..%x --> %d\n",
297 dev_name(&priv->spi->dev),
298 (unsigned)from, (unsigned)(from + len),
304 * Write to the DataFlash device.
305 * to : Start offset in flash device
306 * len : Amount to write
307 * retlen : Amount of data actually written
308 * buf : Buffer containing the data
310 static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
311 size_t * retlen, const u_char * buf)
313 struct dataflash *priv = mtd->priv;
314 struct spi_device *spi = priv->spi;
315 struct spi_transfer x[2] = { { .tx_dma = 0, }, };
316 struct spi_message msg;
317 unsigned int pageaddr, addr, offset, writelen;
318 size_t remaining = len;
319 u_char *writebuf = (u_char *) buf;
320 int status = -EINVAL;
323 pr_debug("%s: write 0x%x..0x%x\n",
324 dev_name(&spi->dev), (unsigned)to, (unsigned)(to + len));
332 spi_message_init(&msg);
334 x[0].tx_buf = command = priv->command;
336 spi_message_add_tail(&x[0], &msg);
338 pageaddr = ((unsigned)to / priv->page_size);
339 offset = ((unsigned)to % priv->page_size);
340 if (offset + len > priv->page_size)
341 writelen = priv->page_size - offset;
345 mutex_lock(&priv->lock);
346 while (remaining > 0) {
347 pr_debug("write @ %i:%i len=%i\n",
348 pageaddr, offset, writelen);
351 * (a) each page in a sector must be rewritten at least
352 * once every 10K sibling erase/program operations.
353 * (b) for pages that are already erased, we could
354 * use WRITE+MWRITE not PROGRAM for ~30% speedup.
355 * (c) WRITE to buffer could be done while waiting for
356 * a previous MWRITE/MWERASE to complete ...
357 * (d) error handling here seems to be mostly missing.
359 * Two persistent bits per page, plus a per-sector counter,
360 * could support (a) and (b) ... we might consider using
361 * the second half of sector zero, which is just one block,
362 * to track that state. (On AT91, that sector should also
363 * support boot-from-DataFlash.)
366 addr = pageaddr << priv->page_offset;
368 /* (1) Maybe transfer partial page to Buffer1 */
369 if (writelen != priv->page_size) {
370 command[0] = OP_TRANSFER_BUF1;
371 command[1] = (addr & 0x00FF0000) >> 16;
372 command[2] = (addr & 0x0000FF00) >> 8;
375 pr_debug("TRANSFER: (%x) %x %x %x\n",
376 command[0], command[1], command[2], command[3]);
378 status = spi_sync(spi, &msg);
380 pr_debug("%s: xfer %u -> %d\n",
381 dev_name(&spi->dev), addr, status);
383 (void) dataflash_waitready(priv->spi);
386 /* (2) Program full page via Buffer1 */
388 command[0] = OP_PROGRAM_VIA_BUF1;
389 command[1] = (addr & 0x00FF0000) >> 16;
390 command[2] = (addr & 0x0000FF00) >> 8;
391 command[3] = (addr & 0x000000FF);
393 pr_debug("PROGRAM: (%x) %x %x %x\n",
394 command[0], command[1], command[2], command[3]);
396 x[1].tx_buf = writebuf;
398 spi_message_add_tail(x + 1, &msg);
399 status = spi_sync(spi, &msg);
400 spi_transfer_del(x + 1);
402 pr_debug("%s: pgm %u/%u -> %d\n",
403 dev_name(&spi->dev), addr, writelen, status);
405 (void) dataflash_waitready(priv->spi);
408 #ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY
410 /* (3) Compare to Buffer1 */
411 addr = pageaddr << priv->page_offset;
412 command[0] = OP_COMPARE_BUF1;
413 command[1] = (addr & 0x00FF0000) >> 16;
414 command[2] = (addr & 0x0000FF00) >> 8;
417 pr_debug("COMPARE: (%x) %x %x %x\n",
418 command[0], command[1], command[2], command[3]);
420 status = spi_sync(spi, &msg);
422 pr_debug("%s: compare %u -> %d\n",
423 dev_name(&spi->dev), addr, status);
425 status = dataflash_waitready(priv->spi);
427 /* Check result of the compare operation */
428 if (status & (1 << 6)) {
429 printk(KERN_ERR "%s: compare page %u, err %d\n",
430 dev_name(&spi->dev), pageaddr, status);
437 #endif /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */
439 remaining = remaining - writelen;
442 writebuf += writelen;
445 if (remaining > priv->page_size)
446 writelen = priv->page_size;
448 writelen = remaining;
450 mutex_unlock(&priv->lock);
455 /* ......................................................................... */
457 #ifdef CONFIG_MTD_DATAFLASH_OTP
459 static int dataflash_get_otp_info(struct mtd_info *mtd,
460 struct otp_info *info, size_t len)
462 /* Report both blocks as identical: bytes 0..64, locked.
463 * Unless the user block changed from all-ones, we can't
464 * tell whether it's still writable; so we assume it isn't.
469 return sizeof(*info);
472 static ssize_t otp_read(struct spi_device *spi, unsigned base,
473 uint8_t *buf, loff_t off, size_t len)
475 struct spi_message m;
478 struct spi_transfer t;
484 if ((off + len) > 64)
489 spi_message_init(&m);
491 l = 4 + base + off + len;
492 scratch = kzalloc(l, GFP_KERNEL);
496 /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
497 * IN: ignore 4 bytes, data bytes 0..N (max 127)
499 scratch[0] = OP_READ_SECURITY;
501 memset(&t, 0, sizeof t);
505 spi_message_add_tail(&t, &m);
507 dataflash_waitready(spi);
509 status = spi_sync(spi, &m);
511 memcpy(buf, scratch + 4 + base + off, len);
519 static int dataflash_read_fact_otp(struct mtd_info *mtd,
520 loff_t from, size_t len, size_t *retlen, u_char *buf)
522 struct dataflash *priv = mtd->priv;
525 /* 64 bytes, from 0..63 ... start at 64 on-chip */
526 mutex_lock(&priv->lock);
527 status = otp_read(priv->spi, 64, buf, from, len);
528 mutex_unlock(&priv->lock);
536 static int dataflash_read_user_otp(struct mtd_info *mtd,
537 loff_t from, size_t len, size_t *retlen, u_char *buf)
539 struct dataflash *priv = mtd->priv;
542 /* 64 bytes, from 0..63 ... start at 0 on-chip */
543 mutex_lock(&priv->lock);
544 status = otp_read(priv->spi, 0, buf, from, len);
545 mutex_unlock(&priv->lock);
553 static int dataflash_write_user_otp(struct mtd_info *mtd,
554 loff_t from, size_t len, size_t *retlen, u_char *buf)
556 struct spi_message m;
557 const size_t l = 4 + 64;
559 struct spi_transfer t;
560 struct dataflash *priv = mtd->priv;
566 /* Strictly speaking, we *could* truncate the write ... but
567 * let's not do that for the only write that's ever possible.
569 if ((from + len) > 64)
572 /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
575 scratch = kzalloc(l, GFP_KERNEL);
578 scratch[0] = OP_WRITE_SECURITY;
579 memcpy(scratch + 4 + from, buf, len);
581 spi_message_init(&m);
583 memset(&t, 0, sizeof t);
586 spi_message_add_tail(&t, &m);
588 /* Write the OTP bits, if they've not yet been written.
589 * This modifies SRAM buffer1.
591 mutex_lock(&priv->lock);
592 dataflash_waitready(priv->spi);
593 status = spi_sync(priv->spi, &m);
594 mutex_unlock(&priv->lock);
605 static char *otp_setup(struct mtd_info *device, char revision)
607 device->_get_fact_prot_info = dataflash_get_otp_info;
608 device->_read_fact_prot_reg = dataflash_read_fact_otp;
609 device->_get_user_prot_info = dataflash_get_otp_info;
610 device->_read_user_prot_reg = dataflash_read_user_otp;
612 /* rev c parts (at45db321c and at45db1281 only!) use a
613 * different write procedure; not (yet?) implemented.
616 device->_write_user_prot_reg = dataflash_write_user_otp;
623 static char *otp_setup(struct mtd_info *device, char revision)
630 /* ......................................................................... */
633 * Register DataFlash device with MTD subsystem.
636 add_dataflash_otp(struct spi_device *spi, char *name,
637 int nr_pages, int pagesize, int pageoffset, char revision)
639 struct dataflash *priv;
640 struct mtd_info *device;
641 struct mtd_part_parser_data ppdata;
642 struct flash_platform_data *pdata = spi->dev.platform_data;
646 priv = kzalloc(sizeof *priv, GFP_KERNEL);
650 mutex_init(&priv->lock);
652 priv->page_size = pagesize;
653 priv->page_offset = pageoffset;
655 /* name must be usable with cmdlinepart */
656 sprintf(priv->name, "spi%d.%d-%s",
657 spi->master->bus_num, spi->chip_select,
661 device->name = (pdata && pdata->name) ? pdata->name : priv->name;
662 device->size = nr_pages * pagesize;
663 device->erasesize = pagesize;
664 device->writesize = pagesize;
665 device->owner = THIS_MODULE;
666 device->type = MTD_DATAFLASH;
667 device->flags = MTD_WRITEABLE;
668 device->_erase = dataflash_erase;
669 device->_read = dataflash_read;
670 device->_write = dataflash_write;
673 device->dev.parent = &spi->dev;
676 otp_tag = otp_setup(device, revision);
678 dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n",
679 name, (long long)((device->size + 1023) >> 10),
681 dev_set_drvdata(&spi->dev, priv);
683 ppdata.of_node = spi->dev.of_node;
684 err = mtd_device_parse_register(device, NULL, &ppdata,
685 pdata ? pdata->parts : NULL,
686 pdata ? pdata->nr_parts : 0);
691 dev_set_drvdata(&spi->dev, NULL);
696 static inline int __devinit
697 add_dataflash(struct spi_device *spi, char *name,
698 int nr_pages, int pagesize, int pageoffset)
700 return add_dataflash_otp(spi, name, nr_pages, pagesize,
707 /* JEDEC id has a high byte of zero plus three data bytes:
708 * the manufacturer id, then a two byte device id.
712 /* The size listed here is what works with OP_ERASE_PAGE. */
718 #define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
719 #define IS_POW2PS 0x0001 /* uses 2^N byte pages */
722 static struct flash_info __devinitdata dataflash_data [] = {
725 * NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
726 * one with IS_POW2PS and the other without. The entry with the
727 * non-2^N byte page size can't name exact chip revisions without
728 * losing backwards compatibility for cmdlinepart.
730 * These newer chips also support 128-byte security registers (with
731 * 64 bytes one-time-programmable) and software write-protection.
733 { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
734 { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
736 { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
737 { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
739 { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
740 { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
742 { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
743 { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
745 { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
746 { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
748 { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
750 { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
751 { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
753 { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
754 { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
757 static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
760 uint8_t code = OP_READ_ID;
763 struct flash_info *info;
766 /* JEDEC also defines an optional "extended device information"
767 * string for after vendor-specific data, after the three bytes
768 * we use here. Supporting some chips might require using it.
770 * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
771 * That's not an error; only rev C and newer chips handle it, and
772 * only Atmel sells these chips.
774 tmp = spi_write_then_read(spi, &code, 1, id, 3);
776 pr_debug("%s: error %d reading JEDEC ID\n",
777 dev_name(&spi->dev), tmp);
789 for (tmp = 0, info = dataflash_data;
790 tmp < ARRAY_SIZE(dataflash_data);
792 if (info->jedec_id == jedec) {
793 pr_debug("%s: OTP, sector protect%s\n",
795 (info->flags & SUP_POW2PS)
796 ? ", binary pagesize" : ""
798 if (info->flags & SUP_POW2PS) {
799 status = dataflash_status(spi);
801 pr_debug("%s: status error %d\n",
802 dev_name(&spi->dev), status);
803 return ERR_PTR(status);
806 if (info->flags & IS_POW2PS)
809 if (!(info->flags & IS_POW2PS))
818 * Treat other chips as errors ... we won't know the right page
819 * size (it might be binary) even when we can tell which density
820 * class is involved (legacy chip id scheme).
822 dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec);
823 return ERR_PTR(-ENODEV);
827 * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
828 * or else the ID code embedded in the status bits:
830 * Device Density ID code #Pages PageSize Offset
831 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
832 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
833 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
834 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
835 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
836 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
837 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
838 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
840 static int __devinit dataflash_probe(struct spi_device *spi)
843 struct flash_info *info;
846 * Try to detect dataflash by JEDEC ID.
847 * If it succeeds we know we have either a C or D part.
848 * D will support power of 2 pagesize option.
849 * Both support the security register, though with different
852 info = jedec_probe(spi);
854 return PTR_ERR(info);
856 return add_dataflash_otp(spi, info->name, info->nr_pages,
857 info->pagesize, info->pageoffset,
858 (info->flags & SUP_POW2PS) ? 'd' : 'c');
861 * Older chips support only legacy commands, identifing
862 * capacity using bits in the status byte.
864 status = dataflash_status(spi);
865 if (status <= 0 || status == 0xff) {
866 pr_debug("%s: status error %d\n",
867 dev_name(&spi->dev), status);
868 if (status == 0 || status == 0xff)
873 /* if there's a device there, assume it's dataflash.
874 * board setup should have set spi->max_speed_max to
875 * match f(car) for continuous reads, mode 0 or 3.
877 switch (status & 0x3c) {
878 case 0x0c: /* 0 0 1 1 x x */
879 status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
881 case 0x14: /* 0 1 0 1 x x */
882 status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
884 case 0x1c: /* 0 1 1 1 x x */
885 status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
887 case 0x24: /* 1 0 0 1 x x */
888 status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
890 case 0x2c: /* 1 0 1 1 x x */
891 status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
893 case 0x34: /* 1 1 0 1 x x */
894 status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
896 case 0x38: /* 1 1 1 x x x */
898 status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
900 /* obsolete AT45DB1282 not (yet?) supported */
902 pr_debug("%s: unsupported device (%x)\n", dev_name(&spi->dev),
908 pr_debug("%s: add_dataflash --> %d\n", dev_name(&spi->dev),
914 static int __devexit dataflash_remove(struct spi_device *spi)
916 struct dataflash *flash = dev_get_drvdata(&spi->dev);
919 pr_debug("%s: remove\n", dev_name(&spi->dev));
921 status = mtd_device_unregister(&flash->mtd);
923 dev_set_drvdata(&spi->dev, NULL);
929 static struct spi_driver dataflash_driver = {
931 .name = "mtd_dataflash",
932 .owner = THIS_MODULE,
933 .of_match_table = dataflash_dt_ids,
936 .probe = dataflash_probe,
937 .remove = __devexit_p(dataflash_remove),
939 /* FIXME: investigate suspend and resume... */
942 module_spi_driver(dataflash_driver);
944 MODULE_LICENSE("GPL");
945 MODULE_AUTHOR("Andrew Victor, David Brownell");
946 MODULE_DESCRIPTION("MTD DataFlash driver");
947 MODULE_ALIAS("spi:mtd_dataflash");