2 * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
4 * Largely derived from at91_dataflash.c:
5 * Copyright (C) 2003-2005 SAN People (Pty) Ltd
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
12 #include <linux/config.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/spi/spi.h>
19 #include <linux/spi/flash.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/partitions.h>
26 * DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
27 * each chip, which may be used for double buffered I/O; but this driver
28 * doesn't (yet) use these for any kind of i/o overlap or prefetching.
30 * Sometimes DataFlash is packaged in MMC-format cards, although the
31 * MMC stack can't use SPI (yet), or distinguish between MMC and DataFlash
32 * protocols during enumeration.
35 #define CONFIG_DATAFLASH_WRITE_VERIFY
37 /* reads can bypass the buffers */
38 #define OP_READ_CONTINUOUS 0xE8
39 #define OP_READ_PAGE 0xD2
41 /* group B requests can run even while status reports "busy" */
42 #define OP_READ_STATUS 0xD7 /* group B */
44 /* move data between host and buffer */
45 #define OP_READ_BUFFER1 0xD4 /* group B */
46 #define OP_READ_BUFFER2 0xD6 /* group B */
47 #define OP_WRITE_BUFFER1 0x84 /* group B */
48 #define OP_WRITE_BUFFER2 0x87 /* group B */
51 #define OP_ERASE_PAGE 0x81
52 #define OP_ERASE_BLOCK 0x50
54 /* move data between buffer and flash */
55 #define OP_TRANSFER_BUF1 0x53
56 #define OP_TRANSFER_BUF2 0x55
57 #define OP_MREAD_BUFFER1 0xD4
58 #define OP_MREAD_BUFFER2 0xD6
59 #define OP_MWERASE_BUFFER1 0x83
60 #define OP_MWERASE_BUFFER2 0x86
61 #define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
62 #define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
64 /* write to buffer, then write-erase to flash */
65 #define OP_PROGRAM_VIA_BUF1 0x82
66 #define OP_PROGRAM_VIA_BUF2 0x85
68 /* compare buffer to flash */
69 #define OP_COMPARE_BUF1 0x60
70 #define OP_COMPARE_BUF2 0x61
72 /* read flash to buffer, then write-erase to flash */
73 #define OP_REWRITE_VIA_BUF1 0x58
74 #define OP_REWRITE_VIA_BUF2 0x59
76 /* newer chips report JEDEC manufacturer and device IDs; chip
77 * serial number and OTP bits; and per-sector writeprotect.
79 #define OP_READ_ID 0x9F
80 #define OP_READ_SECURITY 0x77
81 #define OP_WRITE_SECURITY 0x9A /* OTP bits */
88 unsigned partitioned:1;
90 unsigned short page_offset; /* offset in flash address */
91 unsigned int page_size; /* of bytes per page */
93 struct semaphore lock;
94 struct spi_device *spi;
99 #ifdef CONFIG_MTD_PARTITIONS
100 #define mtd_has_partitions() (1)
102 #define mtd_has_partitions() (0)
105 /* ......................................................................... */
108 * Return the status of the DataFlash device.
110 static inline int dataflash_status(struct spi_device *spi)
112 /* NOTE: at45db321c over 25 MHz wants to write
113 * a dummy byte after the opcode...
115 return spi_w8r8(spi, OP_READ_STATUS);
119 * Poll the DataFlash device until it is READY.
120 * This usually takes 5-20 msec or so; more for sector erase.
122 static int dataflash_waitready(struct spi_device *spi)
127 status = dataflash_status(spi);
129 DEBUG(MTD_DEBUG_LEVEL1, "%s: status %d?\n",
130 spi->dev.bus_id, status);
134 if (status & (1 << 7)) /* RDY/nBSY */
141 /* ......................................................................... */
144 * Erase pages of flash.
146 static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
148 struct dataflash *priv = (struct dataflash *)mtd->priv;
149 struct spi_device *spi = priv->spi;
150 struct spi_transfer x[1] = { { .tx_dma = 0, }, };
151 struct spi_message msg;
152 unsigned blocksize = priv->page_size << 3;
155 DEBUG(MTD_DEBUG_LEVEL2, "%s: erase addr=0x%x len 0x%x\n",
157 instr->addr, instr->len);
160 if ((instr->addr + instr->len) > mtd->size
161 || (instr->len % priv->page_size) != 0
162 || (instr->addr % priv->page_size) != 0)
165 x[0].tx_buf = command = priv->command;
171 while (instr->len > 0) {
172 unsigned int pageaddr;
176 /* Calculate flash page address; use block erase (for speed) if
177 * we're at a block boundary and need to erase the whole block.
179 pageaddr = instr->addr / priv->page_size;
180 do_block = (pageaddr & 0x7) == 0 && instr->len <= blocksize;
181 pageaddr = pageaddr << priv->page_offset;
183 command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
184 command[1] = (u8)(pageaddr >> 16);
185 command[2] = (u8)(pageaddr >> 8);
188 DEBUG(MTD_DEBUG_LEVEL3, "ERASE %s: (%x) %x %x %x [%i]\n",
189 do_block ? "block" : "page",
190 command[0], command[1], command[2], command[3],
193 status = spi_sync(spi, &msg);
194 (void) dataflash_waitready(spi);
197 printk(KERN_ERR "%s: erase %x, err %d\n",
198 spi->dev.bus_id, pageaddr, status);
199 /* REVISIT: can retry instr->retries times; or
200 * giveup and instr->fail_addr = instr->addr;
206 instr->addr += blocksize;
207 instr->len -= blocksize;
209 instr->addr += priv->page_size;
210 instr->len -= priv->page_size;
215 /* Inform MTD subsystem that erase is complete */
216 instr->state = MTD_ERASE_DONE;
217 mtd_erase_callback(instr);
223 * Read from the DataFlash device.
224 * from : Start offset in flash device
225 * len : Amount to read
226 * retlen : About of data actually read
227 * buf : Buffer containing the data
229 static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
230 size_t *retlen, u_char *buf)
232 struct dataflash *priv = (struct dataflash *)mtd->priv;
233 struct spi_transfer x[2] = { { .tx_dma = 0, }, };
234 struct spi_message msg;
239 DEBUG(MTD_DEBUG_LEVEL2, "%s: read 0x%x..0x%x\n",
240 priv->spi->dev.bus_id, (unsigned)from, (unsigned)(from + len));
247 if (from + len > mtd->size)
250 /* Calculate flash page/byte address */
251 addr = (((unsigned)from / priv->page_size) << priv->page_offset)
252 + ((unsigned)from % priv->page_size);
254 command = priv->command;
256 DEBUG(MTD_DEBUG_LEVEL3, "READ: (%x) %x %x %x\n",
257 command[0], command[1], command[2], command[3]);
259 x[0].tx_buf = command;
268 /* Continuous read, max clock = f(car) which may be less than
269 * the peak rate available. Some chips support commands with
270 * fewer "don't care" bytes. Both buffers stay unchanged.
272 command[0] = OP_READ_CONTINUOUS;
273 command[1] = (u8)(addr >> 16);
274 command[2] = (u8)(addr >> 8);
275 command[3] = (u8)(addr >> 0);
276 /* plus 4 "don't care" bytes */
278 status = spi_sync(priv->spi, &msg);
282 *retlen = msg.actual_length - 8;
285 DEBUG(MTD_DEBUG_LEVEL1, "%s: read %x..%x --> %d\n",
286 priv->spi->dev.bus_id,
287 (unsigned)from, (unsigned)(from + len),
293 * Write to the DataFlash device.
294 * to : Start offset in flash device
295 * len : Amount to write
296 * retlen : Amount of data actually written
297 * buf : Buffer containing the data
299 static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
300 size_t * retlen, const u_char * buf)
302 struct dataflash *priv = (struct dataflash *)mtd->priv;
303 struct spi_device *spi = priv->spi;
304 struct spi_transfer x[2] = { { .tx_dma = 0, }, };
305 struct spi_message msg;
306 unsigned int pageaddr, addr, offset, writelen;
307 size_t remaining = len;
308 u_char *writebuf = (u_char *) buf;
309 int status = -EINVAL;
312 DEBUG(MTD_DEBUG_LEVEL2, "%s: write 0x%x..0x%x\n",
313 spi->dev.bus_id, (unsigned)to, (unsigned)(to + len));
320 if ((to + len) > mtd->size)
323 x[0].tx_buf = command = priv->command;
327 pageaddr = ((unsigned)to / priv->page_size);
328 offset = ((unsigned)to % priv->page_size);
329 if (offset + len > priv->page_size)
330 writelen = priv->page_size - offset;
335 while (remaining > 0) {
336 DEBUG(MTD_DEBUG_LEVEL3, "write @ %i:%i len=%i\n",
337 pageaddr, offset, writelen);
340 * (a) each page in a sector must be rewritten at least
341 * once every 10K sibling erase/program operations.
342 * (b) for pages that are already erased, we could
343 * use WRITE+MWRITE not PROGRAM for ~30% speedup.
344 * (c) WRITE to buffer could be done while waiting for
345 * a previous MWRITE/MWERASE to complete ...
346 * (d) error handling here seems to be mostly missing.
348 * Two persistent bits per page, plus a per-sector counter,
349 * could support (a) and (b) ... we might consider using
350 * the second half of sector zero, which is just one block,
351 * to track that state. (On AT91, that sector should also
352 * support boot-from-DataFlash.)
355 addr = pageaddr << priv->page_offset;
357 /* (1) Maybe transfer partial page to Buffer1 */
358 if (writelen != priv->page_size) {
359 command[0] = OP_TRANSFER_BUF1;
360 command[1] = (addr & 0x00FF0000) >> 16;
361 command[2] = (addr & 0x0000FF00) >> 8;
364 DEBUG(MTD_DEBUG_LEVEL3, "TRANSFER: (%x) %x %x %x\n",
365 command[0], command[1], command[2], command[3]);
368 status = spi_sync(spi, &msg);
370 DEBUG(MTD_DEBUG_LEVEL1, "%s: xfer %u -> %d \n",
371 spi->dev.bus_id, addr, status);
373 (void) dataflash_waitready(priv->spi);
376 /* (2) Program full page via Buffer1 */
378 command[0] = OP_PROGRAM_VIA_BUF1;
379 command[1] = (addr & 0x00FF0000) >> 16;
380 command[2] = (addr & 0x0000FF00) >> 8;
381 command[3] = (addr & 0x000000FF);
383 DEBUG(MTD_DEBUG_LEVEL3, "PROGRAM: (%x) %x %x %x\n",
384 command[0], command[1], command[2], command[3]);
386 x[1].tx_buf = writebuf;
389 status = spi_sync(spi, &msg);
391 DEBUG(MTD_DEBUG_LEVEL1, "%s: pgm %u/%u -> %d \n",
392 spi->dev.bus_id, addr, writelen, status);
394 (void) dataflash_waitready(priv->spi);
396 #ifdef CONFIG_DATAFLASH_WRITE_VERIFY
398 /* (3) Compare to Buffer1 */
399 addr = pageaddr << priv->page_offset;
400 command[0] = OP_COMPARE_BUF1;
401 command[1] = (addr & 0x00FF0000) >> 16;
402 command[2] = (addr & 0x0000FF00) >> 8;
405 DEBUG(MTD_DEBUG_LEVEL3, "COMPARE: (%x) %x %x %x\n",
406 command[0], command[1], command[2], command[3]);
409 status = spi_sync(spi, &msg);
411 DEBUG(MTD_DEBUG_LEVEL1, "%s: compare %u -> %d \n",
412 spi->dev.bus_id, addr, status);
414 status = dataflash_waitready(priv->spi);
416 /* Check result of the compare operation */
417 if ((status & (1 << 6)) == 1) {
418 printk(KERN_ERR "%s: compare page %u, err %d\n",
419 spi->dev.bus_id, pageaddr, status);
426 #endif /* CONFIG_DATAFLASH_WRITE_VERIFY */
428 remaining = remaining - writelen;
431 writebuf += writelen;
434 if (remaining > priv->page_size)
435 writelen = priv->page_size;
437 writelen = remaining;
444 /* ......................................................................... */
447 * Register DataFlash device with MTD subsystem.
450 add_dataflash(struct spi_device *spi, char *name,
451 int nr_pages, int pagesize, int pageoffset)
453 struct dataflash *priv;
454 struct mtd_info *device;
455 struct flash_platform_data *pdata = spi->dev.platform_data;
457 priv = (struct dataflash *) kzalloc(sizeof *priv, GFP_KERNEL);
461 init_MUTEX(&priv->lock);
463 priv->page_size = pagesize;
464 priv->page_offset = pageoffset;
466 /* name must be usable with cmdlinepart */
467 sprintf(priv->name, "spi%d.%d-%s",
468 spi->master->bus_num, spi->chip_select,
472 device->name = (pdata && pdata->name) ? pdata->name : priv->name;
473 device->size = nr_pages * pagesize;
474 device->erasesize = pagesize;
475 device->owner = THIS_MODULE;
476 device->type = MTD_DATAFLASH;
477 device->flags = MTD_CAP_NORFLASH;
478 device->erase = dataflash_erase;
479 device->read = dataflash_read;
480 device->write = dataflash_write;
483 dev_info(&spi->dev, "%s (%d KBytes)\n", name, device->size/1024);
484 dev_set_drvdata(&spi->dev, priv);
486 if (mtd_has_partitions()) {
487 struct mtd_partition *parts;
490 #ifdef CONFIG_MTD_CMDLINE_PARTS
491 static const char *part_probes[] = { "cmdlinepart", NULL, };
493 nr_parts = parse_mtd_partitions(device, part_probes, &parts, 0);
496 if (nr_parts <= 0 && pdata && pdata->parts) {
497 parts = pdata->parts;
498 nr_parts = pdata->nr_parts;
502 priv->partitioned = 1;
503 return add_mtd_partitions(device, parts, nr_parts);
505 } else if (pdata->nr_parts)
506 dev_warn(&spi->dev, "ignoring %d default partitions on %s\n",
507 pdata->nr_parts, device->name);
509 return add_mtd_device(device) == 1 ? -ENODEV : 0;
513 * Detect and initialize DataFlash device:
515 * Device Density ID code #Pages PageSize Offset
516 * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
517 * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1025 264 9
518 * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
519 * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
520 * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
521 * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
522 * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
523 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
525 static int __devinit dataflash_probe(struct spi_device *spi)
529 status = dataflash_status(spi);
530 if (status <= 0 || status == 0xff) {
531 DEBUG(MTD_DEBUG_LEVEL1, "%s: status error %d\n",
532 spi->dev.bus_id, status);
538 /* if there's a device there, assume it's dataflash.
539 * board setup should have set spi->max_speed_max to
540 * match f(car) for continuous reads, mode 0 or 3.
542 switch (status & 0x3c) {
543 case 0x0c: /* 0 0 1 1 x x */
544 status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
546 case 0x14: /* 0 1 0 1 x x */
547 status = add_dataflash(spi, "AT45DB021B", 1025, 264, 9);
549 case 0x1c: /* 0 1 1 1 x x */
550 status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
552 case 0x24: /* 1 0 0 1 x x */
553 status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
555 case 0x2c: /* 1 0 1 1 x x */
556 status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
558 case 0x34: /* 1 1 0 1 x x */
559 status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
561 case 0x38: /* 1 1 1 x x x */
563 status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
565 /* obsolete AT45DB1282 not (yet?) supported */
567 DEBUG(MTD_DEBUG_LEVEL1, "%s: unsupported device (%x)\n",
568 spi->dev.bus_id, status & 0x3c);
573 DEBUG(MTD_DEBUG_LEVEL1, "%s: add_dataflash --> %d\n",
574 spi->dev.bus_id, status);
579 static int __devexit dataflash_remove(struct spi_device *spi)
581 struct dataflash *flash = dev_get_drvdata(&spi->dev);
584 DEBUG(MTD_DEBUG_LEVEL1, "%s: remove\n", spi->dev.bus_id);
586 if (mtd_has_partitions() && flash->partitioned)
587 status = del_mtd_partitions(&flash->mtd);
589 status = del_mtd_device(&flash->mtd);
595 static struct spi_driver dataflash_driver = {
597 .name = "mtd_dataflash",
598 .bus = &spi_bus_type,
599 .owner = THIS_MODULE,
602 .probe = dataflash_probe,
603 .remove = __devexit_p(dataflash_remove),
605 /* FIXME: investigate suspend and resume... */
608 static int __init dataflash_init(void)
610 return spi_register_driver(&dataflash_driver);
612 module_init(dataflash_init);
614 static void __exit dataflash_exit(void)
616 spi_unregister_driver(&dataflash_driver);
618 module_exit(dataflash_exit);
621 MODULE_LICENSE("GPL");
622 MODULE_AUTHOR("Andrew Victor, David Brownell");
623 MODULE_DESCRIPTION("MTD DataFlash driver");