drivers/mfd/omap-usb-tll.c

   1 /**
   2  * omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI
   3  *
   4  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
   5  * Author: Keshava Munegowda <keshava_mgowda@ti.com>
   6  *
   7  * This program is free software: you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2  of
   9  * the License as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/types.h>
  22 #include <linux/slab.h>
  23 #include <linux/spinlock.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/clk.h>
  26 #include <linux/io.h>
  27 #include <linux/err.h>
  28 #include <linux/pm_runtime.h>
  29 #include <linux/platform_data/usb-omap.h>
  30
  31 #define USBTLL_DRIVER_NAME      "usbhs_tll"
  32
  33 /* TLL Register Set */
  34 #define OMAP_USBTLL_REVISION                            (0x00)
  35 #define OMAP_USBTLL_SYSCONFIG                           (0x10)
  36 #define OMAP_USBTLL_SYSCONFIG_CACTIVITY                 (1 << 8)
  37 #define OMAP_USBTLL_SYSCONFIG_SIDLEMODE                 (1 << 3)
  38 #define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP                 (1 << 2)
  39 #define OMAP_USBTLL_SYSCONFIG_SOFTRESET                 (1 << 1)
  40 #define OMAP_USBTLL_SYSCONFIG_AUTOIDLE                  (1 << 0)
  41
  42 #define OMAP_USBTLL_SYSSTATUS                           (0x14)
  43 #define OMAP_USBTLL_SYSSTATUS_RESETDONE                 (1 << 0)
  44
  45 #define OMAP_USBTLL_IRQSTATUS                           (0x18)
  46 #define OMAP_USBTLL_IRQENABLE                           (0x1C)
  47
  48 #define OMAP_TLL_SHARED_CONF                            (0x30)
  49 #define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN             (1 << 6)
  50 #define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN            (1 << 5)
  51 #define OMAP_TLL_SHARED_CONF_USB_DIVRATION              (1 << 2)
  52 #define OMAP_TLL_SHARED_CONF_FCLK_REQ                   (1 << 1)
  53 #define OMAP_TLL_SHARED_CONF_FCLK_IS_ON                 (1 << 0)
  54
  55 #define OMAP_TLL_CHANNEL_CONF(num)                      (0x040 + 0x004 * num)
  56 #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT            24
  57 #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF            (1 << 11)
  58 #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE         (1 << 10)
  59 #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE              (1 << 9)
  60 #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE               (1 << 8)
  61 #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS             (1 << 1)
  62 #define OMAP_TLL_CHANNEL_CONF_CHANEN                    (1 << 0)
  63
  64 #define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0              0x0
  65 #define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM                0x1
  66 #define OMAP_TLL_FSLSMODE_3PIN_PHY                      0x2
  67 #define OMAP_TLL_FSLSMODE_4PIN_PHY                      0x3
  68 #define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0              0x4
  69 #define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM                0x5
  70 #define OMAP_TLL_FSLSMODE_3PIN_TLL                      0x6
  71 #define OMAP_TLL_FSLSMODE_4PIN_TLL                      0x7
  72 #define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0              0xA
  73 #define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM                0xB
  74
  75 #define OMAP_TLL_ULPI_FUNCTION_CTRL(num)                (0x804 + 0x100 * num)
  76 #define OMAP_TLL_ULPI_INTERFACE_CTRL(num)               (0x807 + 0x100 * num)
  77 #define OMAP_TLL_ULPI_OTG_CTRL(num)                     (0x80A + 0x100 * num)
  78 #define OMAP_TLL_ULPI_INT_EN_RISE(num)                  (0x80D + 0x100 * num)
  79 #define OMAP_TLL_ULPI_INT_EN_FALL(num)                  (0x810 + 0x100 * num)
  80 #define OMAP_TLL_ULPI_INT_STATUS(num)                   (0x813 + 0x100 * num)
  81 #define OMAP_TLL_ULPI_INT_LATCH(num)                    (0x814 + 0x100 * num)
  82 #define OMAP_TLL_ULPI_DEBUG(num)                        (0x815 + 0x100 * num)
  83 #define OMAP_TLL_ULPI_SCRATCH_REGISTER(num)             (0x816 + 0x100 * num)
  84
  85 #define OMAP_REV2_TLL_CHANNEL_COUNT                     2
  86 #define OMAP_TLL_CHANNEL_COUNT                          3
  87 #define OMAP_TLL_CHANNEL_1_EN_MASK                      (1 << 0)
  88 #define OMAP_TLL_CHANNEL_2_EN_MASK                      (1 << 1)
  89 #define OMAP_TLL_CHANNEL_3_EN_MASK                      (1 << 2)
  90
  91 /* Values of USBTLL_REVISION - Note: these are not given in the TRM */
  92 #define OMAP_USBTLL_REV1                0x00000015      /* OMAP3 */
  93 #define OMAP_USBTLL_REV2                0x00000018      /* OMAP 3630 */
  94 #define OMAP_USBTLL_REV3                0x00000004      /* OMAP4 */
  95
  96 #define is_ehci_tll_mode(x)     (x == OMAP_EHCI_PORT_MODE_TLL)
  97
  98 /* only PHY and UNUSED modes don't need TLL */
  99 #define omap_usb_mode_needs_tll(x)      ((x) != OMAP_USBHS_PORT_MODE_UNUSED &&\
 100                                          (x) != OMAP_EHCI_PORT_MODE_PHY)
 101
 102 struct usbtll_omap {
 103         int                                     nch;    /* num. of channels */
 104         struct usbhs_omap_platform_data         *pdata;
 105         struct clk                              **ch_clk;
 106         /* secure the register updates */
 107         spinlock_t                              lock;
 108 };
 109
 110 /*-------------------------------------------------------------------------*/
 111
 112 const char usbtll_driver_name[] = USBTLL_DRIVER_NAME;
 113 struct platform_device  *tll_pdev;
 114
 115 /*-------------------------------------------------------------------------*/
 116
 117 static inline void usbtll_write(void __iomem *base, u32 reg, u32 val)
 118 {
 119         __raw_writel(val, base + reg);
 120 }
 121
 122 static inline u32 usbtll_read(void __iomem *base, u32 reg)
 123 {
 124         return __raw_readl(base + reg);
 125 }
 126
 127 static inline void usbtll_writeb(void __iomem *base, u8 reg, u8 val)
 128 {
 129         __raw_writeb(val, base + reg);
 130 }
 131
 132 static inline u8 usbtll_readb(void __iomem *base, u8 reg)
 133 {
 134         return __raw_readb(base + reg);
 135 }
 136
 137 /*-------------------------------------------------------------------------*/
 138
 139 static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
 140 {
 141         switch (pmode) {
 142         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
 143         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
 144         case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
 145         case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
 146         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
 147         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
 148         case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
 149         case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
 150         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
 151         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
 152                 return true;
 153
 154         default:
 155                 return false;
 156         }
 157 }
 158
 159 /*
 160  * convert the port-mode enum to a value we can use in the FSLSMODE
 161  * field of USBTLL_CHANNEL_CONF
 162  */
 163 static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
 164 {
 165         switch (mode) {
 166         case OMAP_USBHS_PORT_MODE_UNUSED:
 167         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
 168                 return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
 169
 170         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
 171                 return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
 172
 173         case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
 174                 return OMAP_TLL_FSLSMODE_3PIN_PHY;
 175
 176         case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
 177                 return OMAP_TLL_FSLSMODE_4PIN_PHY;
 178
 179         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
 180                 return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
 181
 182         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
 183                 return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
 184
 185         case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
 186                 return OMAP_TLL_FSLSMODE_3PIN_TLL;
 187
 188         case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
 189                 return OMAP_TLL_FSLSMODE_4PIN_TLL;
 190
 191         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
 192                 return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
 193
 194         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
 195                 return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
 196         default:
 197                 pr_warn("Invalid port mode, using default\n");
 198                 return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
 199         }
 200 }
 201
 202 /**
 203  * usbtll_omap_probe - initialize TI-based HCDs
 204  *
 205  * Allocates basic resources for this USB host controller.
 206  */
 207 static int usbtll_omap_probe(struct platform_device *pdev)
 208 {
 209         struct device                           *dev =  &pdev->dev;
 210         struct usbhs_omap_platform_data         *pdata = dev->platform_data;
 211         void __iomem                            *base;
 212         struct resource                         *res;
 213         struct usbtll_omap                      *tll;
 214         unsigned                                reg;
 215         unsigned long                           flags;
 216         int                                     ret = 0;
 217         int                                     i, ver;
 218         bool needs_tll;
 219
 220         dev_dbg(dev, "starting TI HSUSB TLL Controller\n");
 221
 222         tll = devm_kzalloc(dev, sizeof(struct usbtll_omap), GFP_KERNEL);
 223         if (!tll) {
 224                 dev_err(dev, "Memory allocation failed\n");
 225                 return -ENOMEM;
 226         }
 227
 228         if (!pdata) {
 229                 dev_err(dev, "Platform data missing\n");
 230                 return -ENODEV;
 231         }
 232
 233         spin_lock_init(&tll->lock);
 234
 235         tll->pdata = pdata;
 236
 237         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 238         base = devm_request_and_ioremap(dev, res);
 239         if (!base) {
 240                 ret = -EADDRNOTAVAIL;
 241                 dev_err(dev, "Resource request/ioremap failed:%d\n", ret);
 242                 return ret;
 243         }
 244
 245         platform_set_drvdata(pdev, tll);
 246         pm_runtime_enable(dev);
 247         pm_runtime_get_sync(dev);
 248
 249         spin_lock_irqsave(&tll->lock, flags);
 250
 251         ver =  usbtll_read(base, OMAP_USBTLL_REVISION);
 252         switch (ver) {
 253         case OMAP_USBTLL_REV1:
 254                 tll->nch = OMAP_TLL_CHANNEL_COUNT;
 255                 break;
 256         case OMAP_USBTLL_REV2:
 257         case OMAP_USBTLL_REV3:
 258                 tll->nch = OMAP_REV2_TLL_CHANNEL_COUNT;
 259                 break;
 260         default:
 261                 tll->nch = OMAP_TLL_CHANNEL_COUNT;
 262                 dev_dbg(dev,
 263                  "USB TLL Rev : 0x%x not recognized, assuming %d channels\n",
 264                         ver, tll->nch);
 265                 break;
 266         }
 267
 268         spin_unlock_irqrestore(&tll->lock, flags);
 269
 270         tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk * [tll->nch]),
 271                                                 GFP_KERNEL);
 272         if (!tll->ch_clk) {
 273                 ret = -ENOMEM;
 274                 dev_err(dev, "Couldn't allocate memory for channel clocks\n");
 275                 goto err_clk_alloc;
 276         }
 277
 278         for (i = 0; i < tll->nch; i++) {
 279                 char clkname[] = "usb_tll_hs_usb_chx_clk";
 280
 281                 snprintf(clkname, sizeof(clkname),
 282                                         "usb_tll_hs_usb_ch%d_clk", i);
 283                 tll->ch_clk[i] = clk_get(dev, clkname);
 284
 285                 if (IS_ERR(tll->ch_clk[i]))
 286                         dev_dbg(dev, "can't get clock : %s\n", clkname);
 287         }
 288
 289         spin_lock_irqsave(&tll->lock, flags);
 290
 291         needs_tll = false;
 292         for (i = 0; i < tll->nch; i++)
 293                 needs_tll |= omap_usb_mode_needs_tll(pdata->port_mode[i]);
 294
 295         if (needs_tll) {
 296
 297                 /* Program Common TLL register */
 298                 reg = usbtll_read(base, OMAP_TLL_SHARED_CONF);
 299                 reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
 300                         | OMAP_TLL_SHARED_CONF_USB_DIVRATION);
 301                 reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
 302                 reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
 303
 304                 usbtll_write(base, OMAP_TLL_SHARED_CONF, reg);
 305
 306                 /* Enable channels now */
 307                 for (i = 0; i < tll->nch; i++) {
 308                         reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i));
 309
 310                         if (is_ohci_port(pdata->port_mode[i])) {
 311                                 reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
 312                                 << OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
 313                                 reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
 314                         } else if (pdata->port_mode[i] ==
 315                                         OMAP_EHCI_PORT_MODE_TLL) {
 316                                 /*
 317                                  * Disable AutoIdle, BitStuffing
 318                                  * and use SDR Mode
 319                                  */
 320                                 reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
 321                                         | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
 322                                         | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
 323                         } else {
 324                                 continue;
 325                         }
 326                         reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
 327                         usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg);
 328
 329                         usbtll_writeb(base,
 330                                       OMAP_TLL_ULPI_SCRATCH_REGISTER(i),
 331                                       0xbe);
 332                 }
 333         }
 334
 335         spin_unlock_irqrestore(&tll->lock, flags);
 336         pm_runtime_put_sync(dev);
 337         tll_pdev = pdev;
 338
 339         return 0;
 340
 341 err_clk_alloc:
 342         pm_runtime_put_sync(dev);
 343         pm_runtime_disable(dev);
 344
 345         return ret;
 346 }
 347
 348 /**
 349  * usbtll_omap_remove - shutdown processing for UHH & TLL HCDs
 350  * @pdev: USB Host Controller being removed
 351  *
 352  * Reverses the effect of usbtll_omap_probe().
 353  */
 354 static int usbtll_omap_remove(struct platform_device *pdev)
 355 {
 356         struct usbtll_omap *tll = platform_get_drvdata(pdev);
 357         int i;
 358
 359         for (i = 0; i < tll->nch; i++)
 360                 if (!IS_ERR(tll->ch_clk[i]))
 361                         clk_put(tll->ch_clk[i]);
 362
 363         pm_runtime_disable(&pdev->dev);
 364         return 0;
 365 }
 366
 367 static int usbtll_runtime_resume(struct device *dev)
 368 {
 369         struct usbtll_omap                      *tll = dev_get_drvdata(dev);
 370         struct usbhs_omap_platform_data         *pdata = tll->pdata;
 371         unsigned long                           flags;
 372         int i;
 373
 374         dev_dbg(dev, "usbtll_runtime_resume\n");
 375
 376         spin_lock_irqsave(&tll->lock, flags);
 377
 378         for (i = 0; i < tll->nch; i++) {
 379                 if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
 380                         int r;
 381
 382                         if (IS_ERR(tll->ch_clk[i]))
 383                                 continue;
 384
 385                         r = clk_enable(tll->ch_clk[i]);
 386                         if (r) {
 387                                 dev_err(dev,
 388                                  "Error enabling ch %d clock: %d\n", i, r);
 389                         }
 390                 }
 391         }
 392
 393         spin_unlock_irqrestore(&tll->lock, flags);
 394
 395         return 0;
 396 }
 397
 398 static int usbtll_runtime_suspend(struct device *dev)
 399 {
 400         struct usbtll_omap                      *tll = dev_get_drvdata(dev);
 401         struct usbhs_omap_platform_data         *pdata = tll->pdata;
 402         unsigned long                           flags;
 403         int i;
 404
 405         dev_dbg(dev, "usbtll_runtime_suspend\n");
 406
 407         spin_lock_irqsave(&tll->lock, flags);
 408
 409         for (i = 0; i < tll->nch; i++) {
 410                 if (omap_usb_mode_needs_tll(pdata->port_mode[i])) {
 411                         if (!IS_ERR(tll->ch_clk[i]))
 412                                 clk_disable(tll->ch_clk[i]);
 413                 }
 414         }
 415
 416         spin_unlock_irqrestore(&tll->lock, flags);
 417
 418         return 0;
 419 }
 420
 421 static const struct dev_pm_ops usbtllomap_dev_pm_ops = {
 422         SET_RUNTIME_PM_OPS(usbtll_runtime_suspend,
 423                            usbtll_runtime_resume,
 424                            NULL)
 425 };
 426
 427 static struct platform_driver usbtll_omap_driver = {
 428         .driver = {
 429                 .name           = (char *)usbtll_driver_name,
 430                 .owner          = THIS_MODULE,
 431                 .pm             = &usbtllomap_dev_pm_ops,
 432         },
 433         .probe          = usbtll_omap_probe,
 434         .remove         = usbtll_omap_remove,
 435 };
 436
 437 int omap_tll_enable(void)
 438 {
 439         if (!tll_pdev) {
 440                 pr_err("missing omap usbhs tll platform_data\n");
 441                 return  -ENODEV;
 442         }
 443         return pm_runtime_get_sync(&tll_pdev->dev);
 444 }
 445 EXPORT_SYMBOL_GPL(omap_tll_enable);
 446
 447 int omap_tll_disable(void)
 448 {
 449         if (!tll_pdev) {
 450                 pr_err("missing omap usbhs tll platform_data\n");
 451                 return  -ENODEV;
 452         }
 453         return pm_runtime_put_sync(&tll_pdev->dev);
 454 }
 455 EXPORT_SYMBOL_GPL(omap_tll_disable);
 456
 457 MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
 458 MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
 459 MODULE_LICENSE("GPL v2");
 460 MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers");
 461
 462 static int __init omap_usbtll_drvinit(void)
 463 {
 464         return platform_driver_register(&usbtll_omap_driver);
 465 }
 466
 467 /*
 468  * init before usbhs core driver;
 469  * The usbtll driver should be initialized before
 470  * the usbhs core driver probe function is called.
 471  */
 472 fs_initcall(omap_usbtll_drvinit);
 473
 474 static void __exit omap_usbtll_drvexit(void)
 475 {
 476         platform_driver_unregister(&usbtll_omap_driver);
 477 }
 478 module_exit(omap_usbtll_drvexit);